# Power MOSFET, N Channel, 75 V, 210 A, 3300 µohm, TO-220AB, Through Hole

![Product image](https://novapart.co/image/farnell:1298539/)

**URL**: https://novapart.co/products/IRFB3077PBF/power-mosfet-n-channel-75-v-210-a-3300-ohm-to
**SKU**: IRFB3077PBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.5000
**Stock**: 500+
**Lead Time**: 155 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:210A; Drain Source Voltage Vds:75V; On Resistance Rds(on):0.0033ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Power Dissip

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 370W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220AB |
| Drain Source Voltage Vds | 75V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 210A |
| Drain Source On State Resistance | 3300µohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1298539/)

## IRFB3077PbF 

## **Applications** 

High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply High Speed Power Switching Hard Switched and High Frequency Circuits 

## **Benefits** 

Worldwide Best R in TO-220 DS(on) Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

HEXFET ® Power MOSFET 

> D **VDSS 75V** ~~eeee~~ **RDS(on)   typ. 2.8m** ~~EE~~ **max. 3.3m** 

> G ~~a~~ **ID (Silicon Limited) 210A** S **ID (Package Limited) 120A** 

Fully Characterized Capacitance and Avalanche SOA 

Enhanced body diode dV/dt and dI/dt Capability 

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D<br>S<br>D<br>G<br>TO-220AB<br>IRFB3077PbF<br>**----- End of picture text -----**<br>


|**G**<br>**D**<br>**S**|
|---|
|Gate<br>Drain<br>Source|
|**Absolute Maximum Ratings**|
|**Symbol**<br>**Parameter**<br>**Units**<br>ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>A<br>ID@ TC= 100°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V(Wire Bond Limited)<br>IDM<br>Pulsed Drain Current<br>PD@TC= 25°C<br>Maximum Power Dissipation<br>W<br>Linear DeratingFactor<br>W/°C<br>VGS<br>Gate-to-Source Voltage<br>V<br>dV/dt<br>Peak Diode Recovery<br>V/ns<br>370<br>2.5<br>± 20<br>2.5<br>**Max.**<br>210<br>120<br>850<br>150<br>~~a~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~>~~<br>~~esGO~~<br>~~esGO~~<br>~~esGO~~<br>~~es~~<br>~~©Se~~<br>~~GO~~|
|TJ<br>Operating Junction and<br>°C<br>-55  to + 175|
|TSTG<br>Storage Temperature Range|
|Soldering Temperature, for 10 seconds<br>300|
|(1.6mm from case)|
|Mountingtorque,6-32 or M3 screw<br>10lb in(1.1N m)<br>~~Pf~~|
|**Avalanche Characteristics**|
|EAS(Thermallylimited)<br>Single Pulse Avalanche Energy<br>mJ<br>200<br>~~a (OO~~|
|IAR<br>Avalanche Current<br>A<br>EAR<br>Repetitive Avalanche Energy<br>mJ<br>**Thermal Resistance**<br>**Symbol**<br>**Parameter**<br>**Typ.**<br>**Max.**<br>**Units**<br>RθJC<br>Junction-to-Case<br>–––<br>0.402<br>RθCS<br>Case-to-Sink,Flat Greased Surface<br>0.50<br>–––<br>°C/W<br>RθJA<br>Junction-to-Ambient<br>–––<br>62<br>See Fig. 14, 15, 22a, 22b,<br>~~——~~<br>~~sj~~<br>~~PlOe~~<br>~~rT~~<br>~~Toa~~<br>~~eC~~<br>~~oo>*o=~~<br>~~es~~<br>~~>Sn~~<br>~~I~~<br>~~esnS~~<br>~~I~~<br>~~ae~~<br>~~>~~|
|www.irf.com<br>1|



5/2/11 

**Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**<br>**Parameter**<br>**Min. Typ. Max. Units**<br>V(BR)DSS<br>Drain-to-Source Breakdown Voltage<br>75<br>–––<br>–––<br>V<br>ΔV(BR)DSS/ΔTJBreakdown Voltage Temp. Coefficient<br>–––<br>0.091<br>–––<br>V/°C<br>RDS(on)<br>Static Drain-to-Source On-Resistance<br>–––<br>2.8<br>3.3<br>mΩ<br>VGS(th)<br>Gate Threshold Voltage<br>2.0<br>–––<br>4.0<br>V<br>IDSS<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>μA<br>–––<br>–––<br>250<br>IGSS<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>nA<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>RG<br>Gate Input Resistance<br>–––<br>1.2<br>–––<br>Ω<br>f = 1MHz,open drain<br>**Conditions**<br>VGS= 0V,ID= 250μA<br>Reference to 25°C,ID= 5mA<br>VGS= 10V,ID= 75A<br>VDS= VGS,ID= 250μA<br>VDS= 75V,VGS= 0V<br>VDS= 75V,VGS= 0V,TJ= 125°C<br>VGS= 20V<br>VGS= -20V<br>~~a GQ~~<br>~~GO~~<br>~~a~~<br>~~a GG~~<br>~~GO~~<br>~~a~~<br>~~a GG~~<br>~~GO~~<br>~~a~~<br>~~a ee~~<br>~~_—————————_—————eE~~<br>~~GQ~~<br>~~Rs~~<br>~~G~~|
|---|
|**Dynamic @ TJ = 25°C(unless otherwise specified)**|
|**Symbol**<br>**Parameter**<br>**Min. Typ. Max. Units**<br>gfs<br>Forward Transconductance<br>160<br>–––<br>–––<br>S<br>**Conditions**<br>VDS= 50V,ID= 75A<br>~~a GQ~~<br>~~QO~~<br>~~a OO~~|
|Qg<br>Total Gate Charge<br>–––<br>160<br>220<br>nC<br>ID= 75A<br>~~aee~~|
|Qgs<br>Gate-to-Source Charge<br>–––<br>37<br>–––<br>VDS= 38V<br>~~a~~|
|Qgd<br>Gate-to-Drain("Miller")Charge<br>–––<br>42<br>–––<br>VGS= 10V<br>~~aee~~|
|td(on)<br>Turn-On DelayTime<br>–––<br>25<br>–––<br>ns<br>VDD= 38V<br>~~a~~|
|tr<br>Rise Time<br>–––<br>87<br>–––<br>ID= 75A<br>~~aee~~|
|td(off)<br>Turn-Off DelayTime<br>–––<br>69<br>–––<br>RG= 2.1Ω<br>~~a~~|
|tf<br>Fall Time<br>–––<br>95<br>–––<br>VGS= 10V<br>~~a~~|
|Ciss<br>Input Capacitance<br>–––<br>9400<br>–––<br>pF<br>VGS= 0V<br>~~aee~~|
|Coss<br>Output Capacitance<br>–––<br>820<br>–––<br>VDS= 50V<br>~~a~~|
|Crss<br>Reverse Transfer Capacitance<br>–––<br>350<br>–––<br>ƒ= 1.0MHz<br>~~aee~~|
|Cosseff.(ER)<br>Effective Output Capacitance(EnergyRelated)<br>–––<br>1090<br>–––<br>VGS= 0V,VDS= 0V to 60V<br>,See Fig.11<br>~~a~~<br>~~>~~|
|Cosseff.(TR)<br>Effective Output Capacitance(Time Related)<br>–––<br>1260<br>–––<br>VGS= 0V,VDS= 0V to 60V<br>,See Fig. 5<br>~~a~~<br>~~ee~~|



## **Diode Characteristics** 

|**Symbol**|**Parameter**|**Min. **|**Typ. **|**Max. **|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|IS|Continuous Source Current<br>(Body Diode)|–––|–––|210|A|S<br>D<br>G<br>integral reverse<br>p-n junction diode.<br>MOSFET symbol<br>showing  the|
|ISM<br>~~a~~|Pulsed Source Current<br>(Body Diode)<br>~~a~~|–––|–––|850|||
|VSD<br>~~a~~<br>~~a~~<br>~~PT~~|Diode Forward Voltage<br>~~a~~<br>~~a~~<br>~~GQ~~<br>|–––<br>~~GQ~~<br>|–––<br>~~GQ~~<br>|1.3<br>~~GQ~~<br>|V<br>~~GQ~~<br>|TJ= 25°C,IS= 75A,VGS= 0V<br>~~GQ~~<br>~~>~~|
|trr<br>~~PT~~<br>~~PT~~|Reverse Recovery Time<br>~~[~~|–––<br>~~[~~|42<br>~~[~~|63<br>~~[~~|ns<br>~~[~~|TJ= 25°C<br>VR= 64V,<br>TJ= 125°C<br>IF= 75A<br>TJ= 25°C<br>di/dt = 100A/μs<br>TJ= 125°C<br>TJ= 25°C<br>~~>~~|
|||–––<br>~~[~~<br>~~PTT~~|50<br>~~[~~<br>~~PTT~~|75<br>~~[~~<br>~~PTT~~|||
|Qrr<br>~~PT~~<br>~~PT~~|Reverse Recovery Charge<br>|–––<br><br>~~PTT~~|59<br><br>~~PTT~~|89<br><br>~~PTT~~|nC<br>||
|||–––<br><br>~~PTT~~<br>~~PTT~~|86<br><br>~~PTT~~<br>~~PTT~~|130<br><br>~~PTT~~<br>~~PTT~~|||
|IRRM<br>~~PT~~<br>~~a~~|Reverse RecoveryCurrent|–––<br>~~PTT~~|2.5<br>~~PTT~~|–––<br>~~PTT~~|A||
|ton<br>~~PT~~<br>~~a~~<br>~~a ~~|Forward Turn-On Time<br> ~~Ge~~|Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~PTT~~<br>~~Ge~~|||||



Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 120A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. 

Repetitive rating;  pulse width limited by max. junction temperature. 

Limited by TJmax, starting TJ = 25°C, L = 0.028mH 

RG = 25 Ω , IAS = 120A, VGS =10V. Part not recommended for use above this value. 

Pulse width ≤ 400μs; duty cycle ≤ 2%. 

Coss eff. (TR) is a fixed capacitance that gives the same charging time 

as Coss while VDS is rising from 0 to 80% VDSS. 

Coss eff. (ER) is a fixed capacitance that gives the same energy as 

Coss while VDS is rising from 0 to 80% VDSS. 

When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom mended footprint and soldering techniques refer to application note #AN-994. 

θ 

> ISD ≤ 75A, di/dt ≤ 400A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. 

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1000<br>VGS nn ||<br>TOP           15V A<br>10V<br>8.0V<br>6.0V<br>fa<br>5.5V ||<br>5.0V fo<br>4.8V<br>BOTTOM 4.5V 4.5V<br>100 s ai<br>SA<br>i<br>YAAI an|<br>≤  60μs PULSE WIDTH<br>Tj = 175°C<br>10 YiAA<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>2.5<br>ID = 75AD = 75A= 75A<br>VGS = 10VGS = 10V= 10V<br>2.0<br>)3=6 osPeHAPeHAHA<br>1.5<br>HL A<br>1.00.5 dey ATTTTTT FT]<br>-60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>TJ , Junction Temperature (°C)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


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1000<br>Toa<br>VGS<br>FE AE TOP           15V<br>10V<br>8.0V<br>SS etilizaail 6.0V<br>nn! 5.5V<br>Zon 5.0V<br>4.8V<br>f BOTTOM 4.5V<br>fot<br>100<br>Za all 4.5V Ball<br>4<br>≤  60μs PULSE WIDTH<br>Tj = 25°C<br>SUN<br>10 unl<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


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Fig 1.   Typical Output Characteristics Fig 2.   Typical Output Characteristics<br>1000 2.5<br>ID = 75AD = 75A= 75A<br>VGS = 10VGS = 10V= 10V<br>2.0<br>100 / TA /A T] )3=6 osPeHAPeHAHA<br>TJ = 175°C<br>1.5<br>10 TJ = 25°C<br>f/oeee HL A<br>VDS = 25V<br>≤  60μs PULSE WIDTH<br>1<br>fi| 0.51.00.5 dey ATTTTTT FT]<br>2.0 3.0 4.0 5.0 6.0 7.0 8.0<br>-60 -40 -20 0 20 40 60 80 100 120 140 160<br>VGS, Gate-to-Source Voltage (V)<br>TJ , Junction Temperature (°C)<br>Fig 4.   Normalized On-Resistance vs. Temperature<br>Fig 3.   Typical Transfer Characteristics<br>16000 20<br>VCCGS  iss rss    = C = C = 0V,       f = 1 MHZgs gd + Cgd,  Cds SHORTED 16 a ID= 75A VVDS= 38VDS= 60V<br>12000 C oss   = C ds  + C gd VDS= 17V<br>Ciss<br>12<br>8000 teenTio a RaS AneE<br>8<br>a Sane” Aan<br>alll YA Z<br>4000<br>4<br>SL Baal Coss<br>Crss<br>0<br>0 REL fiij| | | | |<br>0 40 80 120 160 200 240 280<br>1 10 100<br> QG  Total Gate Charge (nC)<br>VDS, Drain-to-Source Voltage (V)<br>VGS, Gate-to-Source Voltage (V)<br>C, Capacitance (pF)<br>) (Α<br>ID, Drain-to-Source Current<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000.0<br>—— TJ = 175°C =<br>100.0<br>10.0<br>TJ = 25°C<br>1.0<br>VGS = 0V<br>fp<br>0.1<br>0.0 0.4 0.8 1.2 1.6 2.0<br>VSD, Source-to-Drain Voltage (V)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 7.** Typical Source-Drain Diode Forward Voltage 

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240<br>LIMITED BY PACKAGE<br>200 Lt A<br>160<br>120<br>80<br>40<br>0 SN|| | tt iN<br>25 50 75 100 125 150 175<br> TC,  Case Temperature (°C)<br>Fig 9.   Maximum Drain Current vs.<br>Case Temperature<br>3.0<br>2.5<br>Pitty!<br>2.0<br>Pope<br>1.5<br>PPE ELA<br>1.0<br>0.5<br>aa74nnnn<br>0.0 PZ<br>0 20 40 60 80<br>VDS, Drain-to-Source Voltage (V)<br>ID,  Drain Current (A)<br>Energy (μJ)<br>**----- End of picture text -----**<br>


**Fig 11.** Typical COSS Stored Energy 

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10000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>PE a<br>1000<br>1m sec<br>100 μsec<br>100<br>1 0m sec<br>LIMITED BY PACKAGE<br>10<br>1 Tc = 25°C DC<br>Tj = 175°C<br>Single Pulse<br>0.1 a<br>0.1 1 10 100<br>VDS, Drain-toSource Voltage (V)<br>Fig 8.   Maximum Safe Operating Area<br>100 Ty EL LLELE<br>90<br>80 leg C<br>70<br>-60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>TJ , Junction Temperature (°C)<br>Fig 10.   Drain-to-Source Breakdown Voltage<br>1000<br>                 I D<br>TOP          22A<br>800 aan                 40A<br>BOTTOM   120A<br>600 Nene<br>400 PKTT 1<br>200<br>SQNe<br>SSL<br>0<br>25 50 75 100 125 150 175<br>Starting TJ, Junction Temperature (°C)<br>ID,  Drain-to-Source Current (A)<br>EAS, Single Pulse Avalanche Energy (mJ)<br>V(BR)DSS , Drain-to-Source Breakdown Voltage<br>**----- End of picture text -----**<br>


**Fig 10.** Drain-to-Source Breakdown Voltage 

**Fig 12.** Maximum Avalanche Energy Vs. DrainCurrent 

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T@R Rectifier<br>1<br>eeeee ee ee ee  el<br>D = 0.50<br>0.1<br>0.20<br>0.10<br>Sie<br>0.01 — 0.05 0.02 0.01 Soamoe eg 0 ee τ J τ I J PI R1 R1 ee R2 R2 AAR R3 R3 || τ C τ ES Ri (0.0766    0.000083°C/W)    A  τ i (sec) i<br>ae oe ee e ee eee τ 1 τ 1 t { τ 2 τ 2 τ 3 τ 3 0.1743    0.000995 1<br>0.001 SINGLE PULSE Ci=  Ci τ i / τ Ri i / Ri 0.1513    0.007038<br>( THERMAL RESPONSE )<br>Notes:<br>1. Duty Factor D = t1/t2<br>0.0001 PT EE et EE 2. Peak Tj = P dm x Zthjc + Tc<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>1000<br>es ey | ee eT | a eT | ea ET ETI<br>PETE EET FETE<br>Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche<br>100 i HE pulsewidth, tav, assuming Δ Tj = 150°C and  iLL<br>Tstart =25°C (Single Pulse)<br>0.01<br>PL 0.05 Im as<br>10 0.10<br>ET BSH ET<br>Ft EL EZZPZ eeSTeTT<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  ΔΤ j = 25°C and<br>Tstart = 150°C.<br>1 PSHEoRIE<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Avalanche Current (A)<br>Thermal Response ( Z thJC )<br>**----- End of picture text -----**<br>


**Fig 14.** Typical Avalanche Current vs.Pulsewidth 

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240 Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>TOP          Single Pulse                 (For further info, see AN-1005 at www.irf.com)<br>BOTTOM   1% Duty Cycle 1. Avalanche failures assumption:<br>200 I D  = 120A<br>excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type.<br>160 Neer 2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded.<br>SK a 4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse.<br>120<br>INN EE TT during avalanche).<br>6. Iav = Allowable avalanche current.<br>80 7.  Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed as<br>BABSSCHRIEE 25°C in Figure 14, 15).<br>tav = Average time in avalanche.<br>40 D = Duty cycle in avalanche =  tav ·f<br>BEREERS SNEED ZthJC(D, tav) = Transient thermal resistance, see Figures 13)thJC(D, tav) = Transient thermal resistance, see Figures 13)(D, tav) = Transient thermal resistance, see Figures 13)av) = Transient thermal resistance, see Figures 13)) = Transient thermal resistance, see Figures 13)<br>0 TLL LLELNSN<br>25 50 75 100 125 150 175 PD (ave) = 1/2 ( 1.3·BV·Iav) = A T/ ZthJC<br>Starting TJ , Junction Temperature (°C) IEav = 2 A T/ [1.3·BV·Z = P ·tth]<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). 

- ZthJC(D, tav) = Transient thermal resistance, see Figures 13)thJC(D, tav) = Transient thermal resistance, see Figures 13)(D, tav) = Transient thermal resistance, see Figures 13)av) = Transient thermal resistance, see Figures 13)) = Transient thermal resistance, see Figures 13) 

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**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.0<br>YN ID = 1.0A<br>ID = 1.0mA<br>ID = 250μA<br>3.0 Xt  Sp<br>Sa DS<br>2.0 RN<br>1.0<br>-75 -50 -25 0 25 50 75 100 125 150 \ 175<br>TJ , Temperature ( °C )<br>VGS(th) Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


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24<br>20<br>BRRREEEEE<br>16<br>tity ep<br>12<br>8 eer<br>IF = 30A<br>VR = 64V<br>4<br>TJ = 125°C<br>TJ =  25°C<br>0<br>Pit ity =!<br>100 200 300 400 500 600 700 800 900 1000<br>dif / dt - (A / μs)<br>IRRM - (A)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage Vs. Temperature 

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24<br>20<br>THOTT:<br>¢ yp<br>16<br>12 BERERS oe nee Zen “1<br>8<br>x IF = 45A<br>VR = 64V<br>4 YO<br>weit || TJ = 125°C<br>TJ =  25°C<br>PEL<br>0<br>100 200 300 400 500 600 700 800 900 1000<br>dif / dt - (A / μs)<br>IRRM - (A)<br>**----- End of picture text -----**<br>


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400<br>300 TTT Le<br>¢ Y |<br>200 VeVAS24<br>Ba<br>100 C IF = 30A<br>VR = 64V<br>7<br>+ TJ = 125°C<br>TJ =  25°C<br>0<br>100 200 300 400 500 600 700 800 900 1000<br>dif / dt - (A / μs)<br>QRR - (nC)<br>**----- End of picture text -----**<br>


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400<br>300<br>V4<br>200 Vea<br>100 e er IF = 45A E e<br>VR = 64V<br>TJ = 125°C<br>TJ =  25°C<br>0<br>100 200 300 400 500 600 700 800 900 1000<br>dif / dt - (A / μs)<br>QRR - (nC)<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Driver Gate Drive<br>P.W.<br>Period D =<br>D.U.T + [{ P.W. n d — Period<br>) [©)]    •  Circuit Layout Considerations lt V | GS=10V<br> •<br>| —| - LowGround Stray Pla I n eductance<br> •   Low Leakage Inductance 2) D.U.T. ISD Waveform<br>+<br>Reverse<br>Recovery Body Diode Forward<br>oH - [1] Current Transformer - ® + Current r Current di/dt NN<br>1) D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 = VDD<br>ma<br>•   Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re ( aA •   dv/dt controlled by Rg Vpp -<br>•<br>D.U.T. - Device Under Test er ae<br>Isp controlled by Duty Factor "D" @ t Ripple  ≤ 5% ISD<br>* Veg = 5V for Logic Level Devices<br>Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V < tp ><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>20VVGS<br>tp 0.01 Ω IAS<br>**----- End of picture text -----**<br>


**Fig 22a.** Unclamped Inductive Test Circuit 

**Fig 22b.** Unclamped Inductive Waveforms 

**==> picture [186 x 282] intentionally omitted <==**

**----- Start of picture text -----**<br>
LD<br>VDS<br>+<br>VDD -<br>D.U.T<br>VGS<br>Pulse Width < 1μs<br>Duty Factor < 0.1%<br>Fig 23a.   Switching Time Test Circuit<br>L<br>VCC<br>DUT<br>0<br>1K<br>i:<br>**----- End of picture text -----**<br>


**Fig 23a.** Switching Time Test Circuit 

**==> picture [183 x 273] intentionally omitted <==**

**----- Start of picture text -----**<br>
V<br>DS<br>90%<br>10%<br>V<br>GS<br>*| . i<br>td(on) tr td(off) tf<br>Fig 23b.   Switching Time Waveforms<br>Id<br>Vds<br>Vgs<br>Vgs(th)<br>Qgs1 l ey! Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 24b.** Gate Charge Waveform 

**Fig 24a.** Gate Charge Test Circuit 

www.irf.com 

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**==> picture [331 x 72] intentionally omitted <==**

**----- Start of picture text -----**<br>
E XAMPLE: T HIS  IS  AN IRF1010<br>LOT  CODE 1789 C)<br>AS S E MB LE D ON WW 19, 1997 INT E RNAT IONAL PART  NUMBER<br>IN T HE  AS S EMB LY LINE  "C" RE CT IFIER RF1010 :<br>LOGO<br>Note:   "P" in assembly line<br>position indicates "Lead-Free" DAT E CODE<br>YEAR 7 =  1997<br>AS S E MB LY<br>LOT  CODE WEE K 19<br>LINE  C<br>**----- End of picture text -----**<br>


## TO-220AB packages are not recommended for Surface Mount Application. 

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 101N. Sepulveda, El Segundo, California 90245, USA Tel: (310) 2527105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact informationwww.irf.com **.** 05/2011 

8 

## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . 

With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( **www.infineon.com** ). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 



## Links

- [View this product on Novapart](https://novapart.co/products/IRFB3077PBF/power-mosfet-n-channel-75-v-210-a-3300-ohm-to)
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- [Supplier page](https://es.farnell.com/infineon/irfb3077pbf/mosfet-n-75v-to-220/dp/1298539)
---

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