# Dual MOSFET, N Channel, 50 V, 50 V, 3 A, 3 A, 0.11 ohm

![Product image](https://novapart.co/image/farnell:2467996RL/)

**URL**: https://novapart.co/products/IRF7103TRPBF/dual-mosfet-n-channel-50-v-3-a-011-ohm
**SKU**: IRF7103TRPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Dual MOSFETs
**Price**: €0.2150
**Stock**: 1000+
**Lead Time**: 134 days (indicative)

## Description

Transistor Polarity:Dual N Channel; Continuous Drain Current Id:3A; Drain Source Voltage Vds:50V; On Resistance Rds(on):0.11; Available until stocks are exhausted Alternative available

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Transistor Case Style | SOIC |
| Operating Temperature Max | 150°C |
| Power Dissipation N Channel | 2W |
| Power Dissipation P Channel | 2W |
| Drain Source Voltage Vds N Channel | 50V |
| Drain Source Voltage Vds P Channel | 50V |
| Continuous Drain Current Id N Channel | 3A |
| Continuous Drain Current Id P Channel | 3A |
| Drain Source On State Resistance N Channel | 0.11ohm |
| Drain Source On State Resistance P Channel | 0.11ohm |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2467996RL/)

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S1 1 8 D1<br>G1 aea 2 ae(at! | 7 ee D1 Voss = 50V<br>S2 3 6 D2 Ω<br>G2 7]od 4 fa 5 Lo D2 Rpg(on) = 0.130<br>Ip =3.0A<br>Top View<br>SO-8<br>**----- End of picture text -----**<br>


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∆ ∆<br>Ω<br>Rpscon) Static Drain-to-Source On-Resistance |= [0.11 [0.13 | Ves = 10V, Ip = 3.04 @<br>Gate | |0.16 [0.20 | Ves = 4.5V, Ip = 1.58 @<br>Threshold Voltage 11.0 |—- |3.0 | V_ | Vos= Ves, Ip = 250HA<br>Forward Transconductance |-- [38 |—-[ s | Vos = 15V, Ip = 3.0A ©<br>loss Drain-to-Source Leakage Current |— |— |20 | HA Vos = 40V, Ves = OV<br>Gate-to-Source | ——- |-—- | 25 | Vos = 40V, Ves = OV, Ty = 55 °C<br>nA<br>less Forward Leakage | -—- |-——- | 100 | Ves = 20V<br>[Qg Gate-to-Source Reverse Leakage | -—— |—- |-100 | Ves = - 20V<br>IQs | TotalGate-to-SourceGate ChargeCharge |}—- |[ 1 .22 ||-—30 | nc | Vpslp = 2.0A= 25V<br>IQga_—_'|_ Gatte-to-Drain ("Miller") Charge |-— | 3.5 |-— | Ves = 10V ®<br>ft; ‘| [RiseTime——SSS~S~S] Turn-On Delay Time | | 9.0 | 20 | Voo = 25V<br>Turn-Off Delay Time [|BO] ZO] | t= 1.0 Ω<br>Ω<br>FallTime [2545 [ 57 0 | ~|| R eo = 6.025 @ D<br>Lp Internal Drain Inductance — ;}40 ;— .<br>nH | Between lead,6mm(0.25in.) G<br>Ls Internal Source Inductance — }60 ;— | from. package and center<br>of die contact S<br>**----- End of picture text -----**<br>


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≤ ≤ 

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## International TOR Rectifier 

## IRF7103PbF 

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q oY |22 ear || | Uy<br>= femal gf Ys<br>E Yoo77 Ee Yantl<br>< ||| AARY ZeaeeiionenY Zeaeeiionen Zeaeeiionen J& ys YetYZ<br>ae a eee 7 oe ee<br>5 [+ Ae = 5 Fo gy ry<br>S |}—- yn Oo | TT gy ii<br>© t+ Ae = | ger<br>6mee,mee, YE240240 sé | 1 HwUy |i<br>AN)) “1G.Zi.<br>° -4 Vos, Drain-to-Source0 Drain-to-Source00 Voltage (volts)11 ° -41 Vbs; Drain-to-Source0 Voltage (volts)1<br>Fig 1. Typical Output Characteristics, Fig 2. Typical Output Characteristics,<br>Pit [it] ty tba eg© 2.5Pee-<br>z Saaanpe saat ott ttt TT TT<br>E / oan e EE ETT tT} Tt tty<br>$ Wn Se. tt Tt | tt pe<br>ae xc ON<br>: vo ae 74GREEEeee |2210Attt EEEEEEDat  Zantt<br>SES5 a GREECE<br>Se, Ae ee<br>4AtePTPtew 10 BEE6 -60| [{TTT] -40 -20 0 20E40T T 60 80tttTs100 120 140 160<br>Ves, Gate-to-Source Voltage (volts) Ty, Junction Temperature (°C)<br>**----- End of picture text -----**<br>


Fig 3. Typical Transfer Characteristics 

Fig 4. Normalized On-Resistance Vs. Temperature 

## IRF7103PbF 

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600 al CogVos ==OV,Cgs f +=Cgq,1MH“Cas SHORTED<br>sof Hs 7 fae<br>eS<br>uu~ meNeto<br>S:VESSeSo<<br>BL 300 NOSa —_<br>a.5: {teat<br>200<br>oO eat ><br>o PSK<br>SeeERS<br>r EA<br>Jt EHH<br>10° tL 40! Pr<br>Vps, Drain-to-Source Voltage (volts)<br>**----- End of picture text -----**<br>


- Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 

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International<br>TER Rectifier<br>ge °° Pos=25VIp = 2A BRR<br>g Pi tT eT TT<br>= Ee<br>opge tititi |ayy<br>3BS Pit tT Tv4<br>8oO Li [tity] t tf<br>oO Z)<br>$s Li [tie] tt |<br>Eg Ee<br>i)<br>8 ET<br>ee<br>3 0 4 8 SEE12 FIGURE16 12 20<br>Qg, Total Gate Charge (nC)<br>**----- End of picture text -----**<br>


- Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 

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402 pr rere<br>~_ 10! Ft FTF OPERATION IN THIS AREA LIMITED tHHtH<br>i a ee eeoe 5-4 BY Rpg (oN) HH<br>FESR =a / oo<br>< FPP yTy yyy Ty @ fH CAPT<br>§f +44 + Ea teTL| I<br>5 ti [l[7ITF7L] | | S10 SSSSSS Bees<br>oa 150°C / / —o §EISPH ES<br>ee oe oO5 ANLA TNT AWNee ail<br>28o eePAPeeRA AR| seee 4ee ee 0§cS , L ESSAUUMUIIIN1 ENOSUaLUTLL<br>& FAA H+ eS ssi ese stai eesti ai<br>~ |e {| FE ty tt if i a<br>3BOaTY06 0.8 4.0TT1.2 1.4 1.6 OTeeBS2 5 4 2 ea§ 49 2 8 4q22BB eniill8 493<br>Vsp, Source-to-Drain Voltage (volts) Vps, Drain-to-Source Voltage (volts)<br>**----- End of picture text -----**<br>


- Fig 7. Typical Source-Drain Diode Forward Voltage 

Fig 8. Maximum Safe Operating Area 

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+<br>-<br>N )t 40V<br>≤ 1<br>fp tt A Pulse Width ≤ 0.1 % us<br>TT TP rin steed<br>tt tt | IN Fig 10a. Switching Time Test Circuit<br>i [ttt]<br>VDS<br>es ee eettlee ty<br>90%<br>tt tt tT tt yA |<br>ti tt | | | |<br>50 75 400 125 150 |<br>Ta, Ambient Temperature (°C) 10%<br>Fig 9.   Maximum Drain Current Vs. VGS |\« >< >|| «he<br>Ambient Temperature td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


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 100<br>a ES _<br>R D = 0.50 oo Et<br>0.20 ee a et ee eee<br> 10<br>0.10<br>0.05<br>SS i an0 en9 eaee 0 ddOY<br>0.02<br>PDM<br> 1 0.01 —T<br>pene sii SINGLE PULSE eT t1<br>Pama (THERMAL RESPONSE) [ye TT t2<br>ee e e Notes:<br>a ee ee e eee<br>1. Duty factor D = t   / t1 2<br>a 2. Peak T J = P DM x  Z thJA + TA<br>0.1<br>0.0001 0.001 0.01 0.1  1  10  100<br>t  , Rectangular Pulse Duration (sec)1<br>thJA<br>(Z        )<br>Thermal Response<br>**----- End of picture text -----**<br>


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Current Regulator<br>Same Type as D.U.T.<br>QG 50KΩ<br>12V .2µF<br>Te [] alist .3µF<br>A le QGS i QGD —» a ia | I D.U.T. +-VDS<br>VG VGS<br>3mA<br>Charge<br>IG ID<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


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D.U.T + Circuit Layout Considerations<br>™    •  Low Stray Inductance<br>@  •   Ground Plane<br> •   Low Leakage Inductance<br>| I - Current Transformer<br>+<br>- - +<br>(0<br>Re •   dv/dt controlled by Rg +<br>•   Driver same type as D.U.T. -<br>•<br>•   D.U.T. - Device Under Test<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>Period D =<br>P.W. | Period _t<br>VGS=10V<br>t<br>@ D.U.T. ISD Waveform<br>Reverse<br>Recovery Body Diode Forward<br>Current ii Current di/dt /<br>©) D.U.T. VDS Waveform<br>Diode Recovery<br>dv/dt<br>VDD<br>ma<br>Re-Applied<br>Voltage Body Diode  __ Forward Drop _<br>® Inductor Curent ee ee<br>Ripple  ≤ 5% ISD<br>**----- End of picture text -----**<br>


## SO-8 Part Marking Information 

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

## SO-8 Tape and Reel (Dimensions are shown in milimeters (inches)) 

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TERMINAL NUMBER 1<br>oO Oo 0<br>12.3 ( .484 )<br>11.7 ( .461 )<br>8.1 ( .318 )<br>7.9 ( .312 ) | FEED DIRECTION<br>|  330.00<br>(12.992)<br>  MAX.<br>14.40 ( .566 )<br>12.40 ( .488 )<br>**----- End of picture text -----**<br>


NOTES: 

1.   CONTROLLING DIMENSION : MILLIMETER. 

2.   ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 

3.   OUTLINE CONFORMS TO EIA-481 & EIA-541. 

NOTES : 

1. CONTROLLING DIMENSION : MILLIMETER. 

2. OUTLINE CONFORMS TO EIA-481 & EIA-541. 

Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualifications Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 02/2010 



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- [Supplier page](https://es.farnell.com/infineon/irf7103trpbf/mosfet-dual-n-ch-50v-3a-soic-3/dp/2467996RL)
---

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