# Power MOSFET, N Channel, 40 V, 120 A, 5500 µohm, TO-263 (D2PAK), Surface Mount
**URL**: https://novapart.co/products/IRF4104SPBF/power-mosfet-n-channel-40-v-120-a-5500-ohm-to-263
**SKU**: IRF4104SPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.7600
**Stock**: 500+
**Lead Time**: 2 days (indicative)
## Description
Transistor Polarity:N Channel; Continuous Drain Current Id:120A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.0055ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Power Dissipation
## Specifications
| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | Lead (17-Jan-2023) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 140W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 120A |
| Drain Source On State Resistance | 5500µohm |
| Gate Source Threshold Voltage Max | 4V |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:1013378/)
## PD - 95468A
## IRF4104PbF IRF4104SPbF IRF4104LPbF
## **Features**
## HEXFET[®] Power MOSFET
Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free
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**----- Start of picture text -----**
D
VDSS = 40V
R = 5.5m Ω
DS(on)
G
ID = 75A
S
**----- End of picture text -----**
## **Description**
This HEXFET[®] Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications.
||**Parameter**|**Max.**|**Units**|
|---|---|---|---|
|ID@ TC= 25°C|Continuous Drain Current, VGS@ 10V(Silicon Limited)
~~**a**~~|120
~~**a**~~|A
~~7~~|
|ID@ TC= 100°C|Continuous Drain Current, VGS@ 10V
~~**a**~~|84
~~**a**~~||
|ID@ TC= 25°C|Continuous Drain Current, VGS@ 10V(Package limited)
~~**a**~~
~~a~~|(Package limited)
75
~~**a**~~
~~a~~||
|IDM|Pulsed Drain Current
~~**a**~~|470
~~**a**~~||
|PD@TC= 25°C|Power Dissipation
~~LG~~|140
~~LG~~|W
~~LG~~|
||Linear Derating Factor
~~LG~~
~~LG~~
~~TOTO~~|0.95
~~LG~~
~~LG~~
~~ooo~~|W/°C
~~LG~~
~~LG~~
~~ooo~~|
|VGS|Gate-to-Source Voltage
~~LG~~
~~TOTO~~
~~©~~|± 20
~~LG~~
~~ooo~~
~~es~~|V
~~LG~~
~~ooo~~|
|EAS (Thermally limited)|Single Pulse Avalanche Energy
~~TOTO~~
~~es~~
~~©~~
~~yh~~|120
~~ooo~~
~~es~~
~~es~~
~~yh~~|mJ
~~ooo~~
~~es~~|
|EAS(Tested )|Single Pulse Avalanche Energy Tested Value
~~es~~
~~©~~
~~tp~~
~~yh~~|220
~~es~~
~~es~~
~~tp~~
~~yh~~||
|IAR|Avalanche Current
~~es~~
~~©~~
~~tp~~
~~yh~~|See Fig.12a, 12b, 15, 16
~~es~~
~~es~~
~~tp~~
~~yh~~|A
~~es~~|
|EAR|Repetitive Avalanche Energy
~~yh~~
~~rr~~||mJ|
|TJ
TSTG
~~SN~~|Operating Junction and
Storage Temperature Range
~~rr~~
~~SN~~|-55 to + 175|°C|
|~~SN~~|Soldering Temperature, for 10 seconds
~~rr~~
~~SN~~|300 (1.6mm from case )||
|~~SN~~|Mounting Torque, 6-32 or M3 screw
~~rr~~
~~SN~~|10 lbf in (1.1N m)||
## **Electrical Characteristics @ TJ = 25°C (unless otherwise specified)**
||**Parameter**|**Min.**
~~Gs~~|**Typ.**
~~es~~|**Max. **|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-to-Source Breakdown Voltage
~~re~~|40
~~re~~
~~Gs~~|–––
~~re~~
~~es~~|–––
~~re~~|V
~~re~~|VGS= 0V, ID= 250µA
~~re~~|
|∆V(BR)DSS/∆TJ|Breakdown Voltage Temp. Coefficient
~~GO~~|–––
~~Gs ~~
~~GO~~
~~GO~~|0.032
~~es~~
~~GO~~
~~GO~~|–––|V/°C
~~QO~~|Reference to 25°C, ID= 1mA
~~QO~~
~~©~~|
|RDS(on)|Static Drain-to-Source On-Resistance
~~GO~~
~~Rs~~|–––
~~GO~~
~~Rs~~
~~GO~~
~~Gs~~|4.3
~~GO~~
~~Rs~~
~~GO~~
~~es~~|5.5
~~Rs~~|mΩ
~~QO~~
~~Rs~~|VGS= 10V, ID= 75A
~~QO~~
~~Rs~~
~~©~~|
|VGS(th)|Gate Threshold Voltage
~~Rs~~
~~re~~|2.0
~~Rs~~
~~GO~~
~~re~~
~~Gs~~|–––
~~Rs~~
~~GO~~
~~re~~
~~es~~|4.0
~~Rs~~
~~re~~|V
~~Rs~~
~~re~~|VDS= VGS, ID= 250µA
~~Rs~~
~~©~~
~~re~~|
|gfs|Forward Transconductance|63
~~Gs ~~|–––
~~es~~|–––|V|VDS= 10V, ID= 75A|
|IDSS|Drain-to-Source Leakage Current
~~PE~~
~~|~~|–––
~~PE~~|–––
~~PE~~|20
~~PE~~|µA
~~PE~~
~~i~~|VDS= 40V, VGS= 0V
VDS= 40V, VGS= 0V, TJ= 125°C
~~PE~~|
|||–––
~~PE~~
~~ee~~
~~|~~|–––
~~PE~~
~~ee i~~
|250
~~PE~~
~~i~~
|||
|IGSS|Gate-to-Source Forward Leakage
~~ee~~
~~|~~|–––
~~ee~~
~~ee~~
~~|~~|–––
~~ee~~
~~ee i~~
|200
~~ee~~
~~i~~
|nA
~~ee~~
~~i~~|VGS= 20V
VGS= -20V
~~ee~~|
||Gate-to-Source Reverse Leakage
~~ee~~
~~|~~|–––
~~ee~~
~~ee~~
~~|TT~~
~~es~~|–––
~~ee~~
~~ee i~~
~~TT~~
~~es~~|-200
~~ee~~
~~i~~
~~TT~~|||
|Qg|Total Gate Charge
~~ee~~
~~|~~
~~es~~
~~ee~~|–––
~~ee~~
~~ee~~
~~|TT~~
~~es~~
~~es~~
~~ee~~
|68
~~ee~~
~~ee i~~
~~TT~~
~~es~~
~~es~~
~~ee~~
|100
~~ee~~
~~i~~
~~TT~~
~~es~~|nC
~~ee~~
~~i~~|ID= 75A
VDS= 32V
VGS= 10V
~~ee~~
~~©~~|
|Qgs|Gate-to-Source Charge
~~es~~
~~ee~~|–––
~~es ~~
~~es~~
~~ee~~
~~ee~~|21
~~es~~
~~es~~
~~ee~~
~~ee~~|–––
~~es~~|||
|Qgd|Gate-to-Drain("Miller")Charge
~~ee~~|–––
~~ee~~
~~ee~~
~~ee~~|27
~~ee~~
~~ee~~
~~ee~~|–––|||
|td(on)|Turn-On DelayTime
~~ee ~~
~~es~~|–––
~~ee~~
~~ee ~~
~~es~~
~~ee~~
~~ee~~|16
~~ee~~
~~ee~~
~~es~~
~~ee~~
~~ee~~|–––
~~es~~|ns|VGS= 10V
VDD= 20V
ID= 75A
RG= 6.8Ω
~~©~~
©|
|tr|Rise Time
~~es~~
~~es~~|–––
~~ee~~
~~es~~
~~ee~~
~~ee~~
|130
~~ee~~
~~es~~
~~ee~~
~~ee~~
|–––
~~es~~|||
|td(off)|Turn-Off DelayTime
~~es~~
~~es~~|–––
~~ee~~
~~es~~
~~ee~~
|38
~~ee~~
~~es~~
~~ee~~
|–––
~~es~~|||
|tf|Fall Time
~~es ~~|–––
~~ee~~
~~ee~~|77
~~ee~~
~~ee~~|–––|||
|LD|Internal Drain Inductance
~~es ~~
~~eo~~|–––
~~ee~~
~~eo~~|4.5
~~ee~~
~~eo~~|–––
~~eo~~|nH|Between lead,
6mm (0.25in.)
from package
and center of die contact|
|LS|Internal Source Inductance
~~ee~~|–––
~~ee~~
~~ee~~|7.5
~~ee~~
~~ee~~|–––
~~ee~~|||
|Ciss|Input Capacitance
~~ee~~
~~es~~|–––
~~ee~~
~~es~~
~~ee~~
~~ee~~|3000
~~ee~~
~~es~~
~~ee~~
~~ee~~|–––
~~ee~~
~~es~~|pF|VGS= 0V
VDS= 25V
ƒ= 1.0MHz|
|Coss|Output Capacitance
~~es~~|–––
~~ee~~
~~es~~
~~ee~~
~~ee~~|660
~~ee~~
~~es~~
~~ee~~
~~ee~~|–––
~~es~~|||
|Crss|Reverse Transfer Capacitance
~~es~~|–––
~~ee~~
~~es~~
~~ee~~
~~ee~~|380
~~ee~~
~~es~~
~~ee~~
~~ee~~|–––
~~es~~|||
|Coss|Output Capacitance
~~es~~
~~ee~~|–––
~~ee~~
~~es~~
~~ee~~
~~ee~~
|2160
~~ee~~
~~es~~
~~ee~~
~~ee~~
|–––
~~es~~||VGS= 0V, VDS= 1.0V,ƒ= 1.0MHz|
|Coss|Output Capacitance
~~es~~
~~ee~~|–––
~~ee~~
~~es~~
~~ee~~
~~ee~~|560
~~ee~~
~~es~~
~~ee~~
~~ee~~|–––
~~es~~||VGS= 0V, VDS= 32V,ƒ= 1.0MHz
~~@~~|
|Cosseff.|Effective Output Capacitance
~~ee~~|–––
~~ee~~
~~ee~~|850
~~ee~~
~~ee~~|–––||VGS= 0V, VDS= 0V to 32V
~~@~~|
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**==> picture [263 x 478] intentionally omitted <==**
**----- Start of picture text -----**
1000 1000
PEE Zire — TOP 15V
Yoel
100 | e0v
ge 73
|fo Sao Soy|
10 100
1 eePl)y 4.5V ||
ea ee eee
aaa | |
20µs PULSE WIDTH
Tj = 25°C
0.1 HPSHt ad 10
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1000 120
i ea
T = 25°C
J 100
e e GEE TJ = 175°C ee
100 80
es ee ee —
yy 2 ee ee ee ee
60
10 |f/> ISd<—aPSNTOH_A—_I-HO,_,-,| | | | 40
ys es es
Es es ee 20
FE} ff
VDS = 15V
20µs PULSE WIDTH
1 ee ee cee ee 0
4 6 8 10 12
VGS, Gate-to-Source Voltage (V)
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (A)
A)
(
ID, Drain-to-Source Current
ID, Drain-to-Source Current (A)
**----- End of picture text -----**
**==> picture [213 x 479] intentionally omitted <==**
**----- Start of picture text -----**
1000
TOP 1sv TATEa
ft10V ll
rowrr
ey7 eoVA
100
|ppoiYI fh
| WY eo Hh
DP 77240 | il
4.5V 20µs PULSE WIDTH
Yet a Tj = 175°C l
10 Y) Paciilll |
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
120
T = 25°C
J
100
80
—
60
40 MLA TJ = 175°C
20
LY VDS = 10V _
380µs PULSE WIDTH
ee 0 |
0 20 40 60 80 100
ID, Drain-to-Source Current (A)
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (A)
**----- End of picture text -----**
**Fig 3.** Typical Transfer Characteristics
**Fig 4.** Typical Forward Transconductance Vs. Drain Current
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3
**==> picture [437 x 480] intentionally omitted <==**
**----- Start of picture text -----**
5000
VCGS iss = C = 0V, f = 1 MHZgs + Cgd, C ds SHORTED 20 ID= 75A
4000 | CCrss = C= C gd + C 16 VVDS= 20VDS= 32V |.
oss ds gd
= he
Ciss
3000 12
ee Oe
2000 8
t i i a
1000 a Coss ee 4
0 Tire Crss 0 Jt
1 10 100 0 20 40 60 80 100
VDS, Drain-to-Source Voltage (V) QG Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage Gate-to-Source Voltage
1000.0 10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)(on)
100.0 1000
TJ = 175°C
10.0 100
TJ = 25°C 100µsec
1.0 10
Tc = 25°C 1msec
Tj = 175°C
VGS = 0V Single Pulsegle Pulsele Pulse 10msec
0.1 ey ee 1 cot aC
0.2 0.6 1.0 1.4 1.8 0 1 10 100 1000
VSD, Source-toDrain Voltage (V) VDS , Drain-toSource Voltage (V)
ISD, Reverse Drain Current (A) ID, Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
**----- End of picture text -----**
**==> picture [213 x 198] intentionally omitted <==**
**----- Start of picture text -----**
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)(on)
1000
100
100µsec
10
Tc = 25°C 1msec
Tj = 175°C
Single Pulsegle Pulsele Pulse 10msec
1 cot aC
0 1 10 100 1000
VDS , Drain-toSource Voltage (V)
ID, Drain-to-Source Current (A)
**----- End of picture text -----**
**Fig 7.** Typical Source-Drain Diode Forward Voltage
**Fig 8.** Maximum Safe Operating Area
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**==> picture [438 x 485] intentionally omitted <==**
**----- Start of picture text -----**
120 2.0
LIMITED BY PACKAGE ID = 75A
100 VGS = 10V
80
1.5
60 ee TTT) TAT
40 Pt tf LN Beaapl dann
1.0
anew at
20
0
COCCON TTT
25 50 75 100 125 150 175 0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TC , Case Temperature (°C)
TJ , Junction Temperature (°C)
Fig 9. Maximum Drain Current Vs. Fig 10. Normalized On-Resistance
Case Temperature Vs. Temperature
10
PT rT EET EE
1
A
D = 0.50
0.20
0.1 0.10 R1 R1 R2 R2 R3R3 Ri (°C/W) τ i (sec)
— 0.05 τ J τ J τ C τ 0.371 0.000272
0.01 — 0.020.01 SoSea τ 1Ci= τ T 1 τ i / Ri T τ 2 τ 2 T τ 3 τ 3 -—1 0.337 0.0013750.337 0.018713 eae|
— Ci i / Ri dy |
Notes:
SINGLE PULSE 1. Duty Factor D = t1/t2
0.001 —atl| | II ( THERMAL RESPONSE ) rrHEEa LTTEa 2. Peak Tj = P dm x Zthjc + Tc [|1
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID , Drain Current (A)
Thermal Response ( Z thJC )
**----- End of picture text -----**
**Fig 11.** Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
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**----- Start of picture text -----**
15V
VDS L DRIVER
RG D.U.T +
- [V][DD]
IAS
20VVGS
tp 0.01 Ω
A
**----- End of picture text -----**
**==> picture [189 x 106] intentionally omitted <==**
**----- Start of picture text -----**
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
-_
ma
IAS a n
**----- End of picture text -----**
**Fig 12b.** Unclamped Inductive Waveforms
**==> picture [176 x 254] intentionally omitted <==**
**----- Start of picture text -----**
QG
QGS QGD
VG
;
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
ag 50K Ω Se
12V .2 µ F
.3 µ F |
The
+
D.U.T. -VDS
VGS
ue
3mA
nail
IG ID
Current Sampling Resistors
**----- End of picture text -----**
**==> picture [214 x 482] intentionally omitted <==**
**----- Start of picture text -----**
500
400
300 S F
200
AC UTREEL |
100
B ANNED
0
25 _ | 50 [S] 75 [SA] 100 125 150 175
Starting TJ, Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
4.0 OTT
ID = 250µA
3.0 PS N
2.0
CUEHEEXCEE
Poo
PELELEEN
1.0
-75 -50 -25 0 25 50 75 100 125 150 175
E E T
TJ , Temperature ( °C )
EAS, Single Pulse Avalanche Energy (mJ)
VGS(th) Gate threshold Voltage (V)
**----- End of picture text -----**
**Fig 14.** Threshold Voltage Vs. Temperature
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**Fig 13b.** Gate Charge Test Circuit 6
**==> picture [442 x 482] intentionally omitted <==**
**----- Start of picture text -----**
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs
100 avalanche pulsewidth, tav
0.01 assuming ∆ Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
0.05
exceed Tjmax
10 0.10
1
0.1 ee en
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
140 Notes on Repetitive Avalanche Curves , Figures 15, 16:
TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
120 BOTTOM 1% Duty Cycle 1. Avalanche failures assumption:
ID = 75A Purely a thermal phenomenon and failure occurs at a
a temperature far in excess of Tjmax. This is validated for
100 WNeee every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
80 INN EE not exceeded.
3. Equation below based on circuit and waveforms shown in
60 | INN 4. P Figures 12a, 12b.D (ave) = Average power dissipation per single
avalanche pulse.
40 P| [IAN] | 5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
20 aaNwNe 6. Iav = Allowable avalanche current.
7. ∆ T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
0 Pt tT tT [INA] tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
Starting TJ , Junction Temperature (°C) ZthJC(D, tav) = Transient thermal resistance, see figure 11)
EAR , Avalanche Energy (mJ)
Avalanche Current (A)
**----- End of picture text -----**
**Fig 16.** Maximum Avalanche Energy Vs. Temperature
**PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2 T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav**
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**----- Start of picture text -----**
Driver Gate Drive
P.W.
D.U.T + {¢$ P.W. Period —— | D = —— Period
) [©)] • Circuit Layout Considerations | t V i GS=10V
| — - • GroundLow StrayPlane Inductance
• CurrentLow LeakageTransformerInductance @ D.U.T. ISD Waveform
+
= ReverseRecovery Body Diode Forward \
- a - ® + Current r Current di/dt 7
® D.U.T. VDS Waveform Diode Recoverydv/dt ‘ ’
00 - VDD
ay
• Re-Applied
• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
Re ( a • dvidt controlledIsp controlled bybyDuty Re Factor "D" Vop - ® Inductor Curent
•
D.U.T. - Device Under Test Ripple ≤ 5% e s ISD ee
**----- End of picture text -----**
## **Fig 17.** Peak Diode Recovery dv/dt Test HEXFET ® Power MOSFETs
## for N-Channel
**==> picture [100 x 41] intentionally omitted <==**
**----- Start of picture text -----**
-
≤ 1 ys
≤ 0.1 %
**----- End of picture text -----**
**Fig 18a.** Switching Time Test Circuit
**==> picture [137 x 94] intentionally omitted <==**
**----- Start of picture text -----**
VDS
90%
10%
VGS | |
lee >! able
td(on) tr td(off) tf
**----- End of picture text -----**
**Fig 18b.** Switching Time Waveforms
## www.irf.com
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**----- Start of picture text -----**
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789 INTERNATIONAL PART NUMBER
ASSEMBLED ON WW 19, 2000 RECTIFIER IRF1010
IN THE ASSEMBLY LINE "C" LOGO TeaR 019
17 89 DATE CODE
YEAR 0 = 2000
Note: "P" in assembly line position ASSEMBLY
indicates "Lead - Free" LOT CODE WEEK 19
LINE C
**----- End of picture text -----**
## TO-220AB package is not recommended for Surface Mount Application
**Notes:**
**1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/datasheets/data/auirf4104.pdf 2. For the most current drawing please refer to IR website at http://www.irf.com/package/**
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**----- Start of picture text -----**
THIS IS AN IRF530S WITH PART NUMBER
LOT CODE 8024 INTERNATIONAL SS
ASSEMBLED ON WW 02, 2000 RECTIFIER F530S
IN THE ASSEMBLY LINE "L" LOGO TgaR 002.
80 24 DATE CODE
ASSEMBLY YEAR 0 = 2000
assembly line. positionaye LOT CODE b Hf U Y 7 WEEK 02
“Lead - Free” - : LINE L
OR
PART NUMBER
INTERNATIONAL oS
RECTIFIER F530S
LOGO TAR P0024 DATE CODE
80 24 P = DESIGNATES LEAD - FREE
PRODUCT (OPTIONAL)
ASSEMBLYLOT CODE WU77 U U YEAR 0 = 2000WEEK 02
A = ASSEMBLY SITE CODE
**----- End of picture text -----**
## **Notes:**
**1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/datasheets/data/auirf4104.pdf 2. For the most current drawing please refer to IR website at http://www.irf.com/package/** 10
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**----- Start of picture text -----**
www.irf.com
**----- End of picture text -----**
## TO-262 Package Outline Dimensions are shown in millimeters (inches)
## TO-262 Part Marking Information
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**----- Start of picture text -----**
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789 PART NUMBER
Note: "P" in assembly lineAS SEMBLED ON WW 19, 1997IN THE ASSEMBLY LINE "C" INTERNATIONALRECTIFIERLOGO TeaR cS 17IRL3103L719C89 DATE CODE
position indicates "Lead-Free" ASSEMBLY YEAR 7 = 1997
LOT CODE WEEK 19
LINE C
OR
PART NUMBER
INTERNATIONAL |
RECTIFIER IRL3103L
LOGO TRARP1789 719A DATE CODEP = DESIGNATES LEAD-FREE
ASSEMBLY PRODUCT (OPTIONAL)
LOT CODE YEAR 7 = 1997
WEEK 19
A = ASSEMBLY SITE CODE
**----- End of picture text -----**
## **Notes:**
**1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/**
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**----- Start of picture text -----**
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)3.90 (.153) 1.60 (.063)1.50 (.059) 0.368 (.0145)
0.342 (.0135)
in
FEED DIRECTION 1.85 (.073) 11.60 (.457)
S 1.65 (.065) lag 11.40 (.449) 15.42 (.609)15.22 (.601) £4 24.30 (.957)23.90 (.941)
TRL
ise 1.75 (.069) J
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
ep 16.10 (.634) Te 4.52 (.178)
15.90 (.626)
FEED DIRECTION
13.50 (.532) 27.40 (1.079)
, 12.80 (.504) 23.90 (.941) 4
4
330.00 60.00 (2.362)
(14.173) MIN.
MAX.
| F
30.40 (1.197)
NOTES : MAX.
5 1. COMFORMS TO EIA-418.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSION MEASURED @ HUB.4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039)24.40 (.961)3 IE 4
**----- End of picture text -----**
Notes: ®® Repetitive rating; pulse width limited by Limited by TJmaxJmax , see Fig.12a, 12b, 15, 16 for typical repetitive max. junction temperature. (See fig. 11). avalanche performance. @ Limited by TJmax, starting TJ = 25°C, L = 0.04mH © This value determined from sample failure population. 100% RG = 25 Ω , IAS = 75A, VGS =10V. Part not tested to this value in production. recommended for use above this value. @) This is only applied to TO-220AB pakcage. ® Pulse width ≤ 1.0ms; duty cycle ≤ 2%. This is applied to D[[2]] ® Coss eff. is a fixed capacitance that gives the 4 or G-10 Material). For recommended footprint and soldering same charging time as Coss while VDS is rising techniques refer to application note #AN-994. from 0 to 80% VDSS .
Limited by TJmaxJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.
© This value determined from sample failure population. 100% tested to this value in production.
@) This is only applied to TO-220AB pakcage. This is applied to D[[2]] Pak, when mounted on 1" square PCB (FR4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.
## **TO-220AB package is not recommended for Surface Mount Application.**
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site.
**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 07/2010
www.irf.com
12
## **IMPORTANT NOTICE**
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( **www.infineon.com** ).
## **WARNINGS**
Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
## Links
- [View this product on Novapart](https://novapart.co/products/IRF4104SPBF/power-mosfet-n-channel-40-v-120-a-5500-ohm-to-263)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/irf4104spbf/mosfet-n-d2-pak/dp/1013378)
---
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