# Power MOSFET, N Channel, 55 V, 240 A, 2600 µohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2839478RL/)

**URL**: https://novapart.co/products/IRF3805STRL-7PP/power-mosfet-n-channel-55-v-240-a-2600-ohm-to-263
**SKU**: IRF3805STRL-7PP
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €2.7000
**Stock**: 10+
**Lead Time**: 56 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:240A; Drain Source Voltage Vds:55V; On Resistance Rds(on):0.002ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Powe

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (21-Jan-2025) |
| No. Of Pins | 7Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Qualification | - |
| Power Dissipation | 300W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 55V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 240A |
| Drain Source On State Resistance | 2600µohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2839478RL/)

## **Features** 

Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free 

## **Description** 

## HEXFET[®] Power MOSFET 

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**----- Start of picture text -----**<br>
D<br>VDSS = 55V<br>G RDS(on) = 2.6mΩ<br>S ID = 160A<br>**----- End of picture text -----**<br>


This HEXFET[®] Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area.  Additional features of this design  are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. 

## **Absolute Maximum Ratings** 

||**Parameter**|**Max.**|**Units**|
|---|---|---|---|
|ID@ TC= 25°C|Continuous Drain Current,VGS@ 10V(Silicon Limited)|240|A|
|ID@ TC= 100°C|Continuous Drain Current,VGS@ 10V(See Fig. 9)<br>~~a~~|170<br>~~a~~||
|ID@ TC= 25°C|Continuous Drain Current,VGS@ 10V(Package Limited)|160||
|IDM|Pulsed Drain Current<br>~~©~~|1000<br>~~©~~||
|PD@TC= 25°C|Maximum Power Dissipation<br>~~©~~<br>~~Ge~~|300<br>~~©~~<br>~~Ge~~|W<br>~~Ge~~|
||Linear DeratingFactor<br>~~GO~~|2.0<br>~~GO~~|W/°C<br>~~GO~~|
|VGS|Gate-to-Source Voltage<br>~~GO~~<br>~~**a**~~|± 20<br>~~GO~~|V<br>~~GO~~|
|EAS|Single Pulse Avalanche Energy (ThermallyLimited)<br>~~**a**~~|440|mJ|
|EAS(tested)<br>~~a~~<br>~~Ne~~|Single Pulse Avalanche EnergyTested Value<br>~~a~~<br>~~a~~<br>~~Ne~~|680<br>~~a~~||
|IAR<br>~~a~~<br>~~Ne~~|Avalanche Current<br>~~a~~<br>~~a~~<br>~~Ne~~|See Fig.12a,12b,15,16<br>~~a~~|A|
|EAR<br>~~a~~<br>~~Ne~~|Repetitive Avalanche Energy<br>~~a~~<br>~~Nere~~||mJ|
|TJ<br>TSTG<br>~~Ne~~|Operating Junction and<br>Storage Temperature Range<br>~~Nere~~|-55  to + 175|°C|
||SolderingTemperature,for 10 seconds<br>~~re~~|300 (1.6mm from case )||
||Mountingtorque,6-32 or M3 screw<br>~~re~~<br>~~GO~~|10 lbf•in (1.1N•m)<br>300 (1.6mm from case )<br>~~GO~~|~~GO~~|



HEXFET[®] is a registered trademark of International Rectifier. 

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**Static @ TJ = 25°C (unless otherwise specified)** 

||**Parameter**|**Min.**|**Typ.**|**Max. **|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-to-Source Breakdown Voltage|55|–––|–––|V|VGS= 0V, ID= 250µA|
|∆ΒVDSS/∆TJ|Breakdown Voltage Temp. Coefficient|–––|0.05|–––|V/°C|Reference to 25°C, ID= 1mA|
|RDS(on)SMD|Static Drain-to-Source On-Resistance|–––|2.0|2.6|mΩ|VGS= 10V, ID= 140A�|
|VGS(th)|Gate Threshold Voltage|2.0|–––|4.0|V|VDS= VGS, ID= 250µA|
|gfs|Forward Transconductance|110|–––|–––|S|VDS= 25V, ID= 140A|
|IDSS|Drain-to-Source Leakage Current|–––|–––|20|µA|VDS= 55V, VGS= 0V|
|||–––|–––|250||VDS= 55V, VGS= 0V, TJ= 125°C|
|IGSS|Gate-to-Source Forward Leakage|–––|–––|200|nA|VGS= 20V|
||Gate-to-Source Reverse Leakage|–––|–––|-200||VGS= -20V|
|Qg|Total Gate Charge|–––|130|200|nC|ID= 140A<br>VDS= 44V<br>VGS= 10V�|
|Qgs|Gate-to-Source Charge|–––|53|–––|||
|Qgd|Gate-to-Drain("Miller")Charge|–––|49|–––|||
|td(on)|Turn-On DelayTime|–––|23|–––|ns|VGS= 10V�<br>RG= 2.4Ω<br>VDD= 28V<br>ID= 140A|
|tr|Rise Time|–––|130|–––|||
|td(off)|Turn-Off DelayTime|–––|80|–––|||
|tf|Fall Time|–––|52|–––|||
|LD|Internal Drain Inductance|–––|4.5|–––|nH|S<br>D<br>G<br>Between lead,<br>6mm (0.25in.)<br>from package<br>and center of die contact|
|LS|Internal Source Inductance|–––|7.5|–––|||
|Ciss|Input Capacitance|–––|7820|–––|pF|VGS= 0V<br>VDS= 25V<br>ƒ= 1.0MHz, See Fig. 5|
|Coss|Output Capacitance|–––|1260|–––|||
|Crss|Reverse Transfer Capacitance|–––|610|–––|||
|Coss|Output Capacitance|–––|4310|–––||VGS= 0V,  VDS= 1.0V,ƒ= 1.0MHz|
|Coss|Output Capacitance|–––|980|–––||VGS= 0V,  VDS= 44V,ƒ= 1.0MHz|
|Cosseff.|Effective Output Capacitance|–––|1540|–––||VGS= 0V, VDS= 0V to 44V|



## **Diode Characteristics** 

||**Parameter**|**Min.**|**Typ.**|**Max. **|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|IS|Continuous Source Current<br>(Body Diode)|–––|–––|240|A|S<br>D<br>G<br>showing  the<br>integral reverse<br>p-n junction diode.<br>MOSFET symbol|
|ISM|Pulsed Source Current<br>(Body Diode)��|–––|–––|1000|||
|VSD|Diode Forward Voltage|–––|–––|1.3|V|TJ= 25°C,IS= 140A,VGS= 0V�|
|trr|Reverse RecoveryTime|–––|45|68|ns|TJ= 25°C, IF= 140A, VDD= 28V<br>di/dt = 100A/µs�|
|Qrr|Reverse RecoveryCharge|–––|35|53|nC||



## **������** 

- Repetitive rating;  pulse width limited by 

- max. junction temperature. (See fig. 11). 

   - Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive 

   - avalanche performance. 

- Limited by TJmax, starting TJ = 25°C, 

- L=0.043mH, RG = 25Ω, IAS = 140A, VGS =10V. Part not recommended for use above this value. 

   - This value determined from sample failure population. 100% tested to this value in production. 

   - This is applied to D[2] Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).  For recommended footprint and soldering techniques refer to application note #AN-994. 

- Pulse width ≤ 1.0ms; duty cycle ≤ 2%. 

- Coss eff. is a fixed capacitance that gives the same soldering techniques refer to application note #AN-994. charging time as Coss while VDS is rising from 0 to 80% � Rθ is measured at TJ of approximately 90°C. VDSS. � Solder mounted on IMS substrate. 

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10000 10000<br>VGS VGS<br>TOP           15V TOP           15V<br>10V 10V<br>1000 8.0V7.0V 8.0V7.0V<br>S T 6.0V 1000 n i 6.0V<br>5.5V 5.5V<br>mer Ae 5.0V h e 5.0V<br>100 A enea BOTTOM 4.5V mel) oo BOTTOM 4.5V<br>ene meec ee eee 100 OL<br>10<br>4.5V<br>Sariiimensiiiaeeesiiaaaiil 10 T T Littcoh<br>1 4.5V<br>≤60µs PULSE WIDTH ≤60µs PULSE WIDTH<br>PT Tr | Tj = 175°C<br>0.1 IE Tj = 25°C 1 1 TE ll<br>0.1 1 10 100 1000 0.1 1 10 100 1000<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 1.** Typical Output Characteristics 

**Fig 2.** Typical Output Characteristics 

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**----- Start of picture text -----**<br>
1000<br>es ee ee ee<br>T = 175°C<br>100 J<br>— ——<br>Ee ey ee ee ee eee<br>es ya ee ee<br>TJ = 25°C<br>10 FOU TSCTt‘“‘(ié‘iTS~*Y<br>ee i VDS = 25V ; [sis]<br>≤60µs PULSE WIDTH<br>1.0<br>2 4 6 8 10<br>VGS, Gate-to-Source Voltage (V)<br>)(Α<br>ID, Drain-to-Source Current<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
250<br>T = 25°C<br>J  —<br>200<br>150<br>aa —<br>‘<br>100 J A TJ = 175°C<br>50 VA<br>VDS = 10V<br>380µs PULSE WIDTH<br>0<br>0 20 40 60 80 100 120<br>ID,Drain-to-Source Current (A)<br>Gfs, Forward Transconductance (S)<br>**----- End of picture text -----**<br>


**Fig 3.** Typical Transfer Characteristics 

**Fig 4.** Typical Forward Transconductance vs. Drain Current 

**==> picture [444 x 202] intentionally omitted <==**

**----- Start of picture text -----**<br>
100000 12.0<br>VCGS  iss   = C = 0V,       f = 1 MHZgs + Cgd,  C ds SHORTED ID= 140A VDS= 64V<br>=rt Crss   = C gd  10.0 P F | VDS= 40V ts —<br>C = C + C<br>oss   ds  gd<br>10000 - Ciss 8.0 P K<br>ro —<<br>Ce ee ee ee ee eee ee<br>e a t t 6.0 P f<br>C<br>oss<br>1000 ea OE Crss | l 4.0 A ne<br>Ee ee ee ee ee ee ee<br>aPCEee a ee eeCrh 2.0 A e<br>100 0.0<br>1 10 100 0 50 100 150<br>VDS, Drain-to-Source Voltage (V)  QG  Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>C, Capacitance(pF)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

**==> picture [452 x 206] intentionally omitted <==**

**----- Start of picture text -----**<br>
10000 10000<br>OPERATION IN THIS AREA<br>a ee ee ee es ee es pT LIMITED BY R DS(on) TT Tr<br>1000 p f ff | | | | 1000 00| |<br>T = 175°C<br>J  1 mse c 10 0µs ec<br>100 pA ot | 7ATt 100 eee L  cil i ea e S eendee eela cai<br>ee ee ee eee ee ee ee ee eee ee ee e ee<br>T = 25°C<br>10 e /a P J  e 10 e l 1 0msec<br>a ee | ee ee ee ee ee eee eee a ee e<br>1 1 Tc = 25°C<br>DC<br>p =f ft if {| | | VGS = 0V Tj = 175°CSingle Pulse S erae<br>0.1 ae eee = 0.1 l l<br>0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0.1 1 10 100<br>VSD, Source-to-Drain Voltage (V)<br>VDS, Drain-to-Source Voltage (V)<br>ISD, Reverse Drain Current (A) ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


## **Fig 7.** Typical Source-Drain Diode Forward Voltage 

**Fig 8.** Maximum Safe Operating Area 

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**----- Start of picture text -----**<br>
250<br>Limited By Package<br>200<br>To] ae<br>Sen<br>150<br>TP<br>| \<br>100<br>ING.<br>P oEENG)<br>50<br>P EN<br>0<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
2.5<br>ID = 140A<br>VGS = 10V<br>( PL LELELELLa<br>2.0<br>CeEEEE ELL]<br>EEEELEL LAE<br>1.5<br>T TT ATv,<br>1.0<br>H EAT<br>0.5 H ee<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

**Fig 10.** Normalized On-Resistance vs. Temperature 

**==> picture [435 x 204] intentionally omitted <==**

**----- Start of picture text -----**<br>
1<br>D = 0.50<br>a a em|<br>0.1 t 0.20 oe<br>0.10<br>p e a) 0.020.05 S n τJ τJ r R1 R1 R2 R2 R3R3 τCτ Ri (°C/W)   0.0794     0.000192 τi (sec)<br>0.01 τ1τ1 τ2 τ2 τ3τ3 0.1474     0.000628<br>0.01 ==e SA} SINGLE PULSE  -- aeen  e Ci=  a τi/Ri  |-— 0.2737     0.014012 ||rH<br>AEE ( THERMAL RESPONSE ) | eeT Ci i/Ri T T tral<br>a 0 Notes: a<br>1. Duty Factor D = t1/t2<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.001 FTFEHBLL EEEEEE EEErH pH ll<br>1E-005 0.0001 0.001 0.01 0.1 1<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z thJC )<br>**----- End of picture text -----**<br>


**Fig 11.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

**==> picture [147 x 98] intentionally omitted <==**

**----- Start of picture text -----**<br>
15V<br>VDS L DRIVER<br>RG D.U.T +<br>. - [V][DD]<br>IAS<br>20VVGS<br>tp 0.01Ω<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Fig 12a.   Unclamped Inductive Test Circuit<br>V(BR)DSS<br>e tp<br> —<br>/ |<br>|<br>IAS 7<br>**----- End of picture text -----**<br>


**Fig 12b.** Unclamped Inductive Waveforms 

**==> picture [131 x 107] intentionally omitted <==**

**----- Start of picture text -----**<br>
< QG<br>ale QGS oe QGD yy<br>VG<br>Charge _,<br>**----- End of picture text -----**<br>


**Fig 13a.** Basic Gate Charge Waveform 

**==> picture [130 x 127] intentionally omitted <==**

**----- Start of picture text -----**<br>
Current Regulator<br>Same Type as D.U.T.<br>r T<br>! 50KΩ !<br>IT: 12V .2µF |<br>.3µF<br>Lae |<br>+<br>! | D.U.T. -VDS<br>VGS<br>(=<br>3mA<br>|<br>IG ID<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


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2000<br>ID<br>TOP         21A<br>37A<br>1500 W ELL BOTTOM 140A<br>1000 NANG\ LE<br>500<br>S A<br>T ASS<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>Fig 12c.   Maximum Avalanche Energy<br>vs. Drain Current<br>5.0<br>a a<br>4.5 PF TAST [PMEELELSL_,] EELS I<br>4.0 P RE [EARLE]<br>I SEE E EEE<br>3.5 P SANACT EENLN<br>3.0 ID = 250µA VeRNEEE E<br>ID = 1.0mA oT INN ETL<br>2.5 ID = 1.0A Ptert? T|RNE,ANNE<br>2.0 P E EE EELELYN [|]<br>Frr)PfrerererererilN<br>1.5<br>-75 -50 -25 0 25 50 75 100 125 150 175 200<br>|<br>TJ , Temperature ( °C )<br>FT E E ETE ELEY  I<br>VGS(th) Gate threshold Voltage (V)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 14.** Threshold Voltage vs. Temperature 

**Fig 13b.** Gate Charge Test Circuit RE wittcom ©2073 international 

wittcom ©2073 international Rectifier Submit Datasheet Feedback October 25, 2013 

## ���������������� 

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**----- Start of picture text -----**<br>
1000<br>Duty Cycle = Single Pulse<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming ∆ Tj = 150°C and<br>Tstart =25°C (Single Pulse)<br>100<br>0.01<br>0.05<br>10 0.10<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming ∆Τ j = 25°C and<br>Tstart = 150°C.<br>1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 15.** Typical Avalanche Current vs.Pulsewidth 

**==> picture [208 x 203] intentionally omitted <==**

**----- Start of picture text -----**<br>
500<br>TOP          Single Pulse<br>BOTTOM   1% Duty Cycle<br>400 ID = 140A<br>300<br>200<br>100<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 16.** Maximum Avalanche Energy vs. Temperature 

**Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)** 

1. Avalanche failures assumption: 

- Purely a thermal phenomenon and failure occurs at a 

- temperature far in excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 

4. PD (ave) = Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6. Iav = Allowable avalanche current. 

7. ∆T = Allowable rise in junction temperature, not to exceed 

- Tjmax (assumed as 25°C in Figure 15, 16). 

- tav = Average time in avalanche. 

- D = Duty cycle in avalanche =  tav ·f 

- ZthJC(D, tav) = Transient thermal resistance, see figure 11) 

   - **PD (ave) = 1/2 ( 1.3·BV·Iav) =** � **T/ ZthJC Iav = 2** � **T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav** 

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**==> picture [415 x 490] intentionally omitted <==**

**----- Start of picture text -----**<br>
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**Fig 18b.** Switching Time Waveforms 

D[2] Pak - 7 Pin Package Outline Dimensions are shown in millimeters (inches) 

## D[2] Pak - 7 Pin Part Marking Information 

## D[2] Pak - 7 Pin Tape and Reel 

## TO-263CA 7 Pin Long Leads Package Outline 

Dimensions are shown in millimeters (inches) 

## **Revision History** 

|**Revision Historyy**||
|---|---|
|**Date**|**Comments**|
|10/25/2013|• Remove the "Automotive MOSFET" on the header,onpage 1.|



**IR WORLD HEADQUARTERS:** 101 N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ 



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---

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