# Power MOSFET, N Channel, 135 V, 160 A, 5900 µohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2710003RL/)

**URL**: https://novapart.co/products/IRF135SA204/power-mosfet-n-channel-135-v-160-a-5900-ohm-to-263
**SKU**: IRF135SA204
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €2.1700
**Stock**: 500+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:160A; Drain Source Voltage Vds:135V; On Resistance Rds(on):0.0047ohm; Rds(on) Test Volt; Available until stocks are exhausted

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (08-Jul-2021) |
| No. Of Pins | 7Pins |
| Channel Type | N Channel |
| Product Range | StrongIRFET HEXFET Series |
| Qualification | - |
| Power Dissipation | 500W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 135V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 160A |
| Drain Source On State Resistance | 5900µohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2710003RL/)

## Strong _IR_ FET™ IRF135SA204 

HEXFET[® ] Power MOSFET 

## **Application** 

- Brushed Motor drive applications 

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 BLDC Motor drive applications  D VDSS  135V<br> Battery powered circuits<br> Half-bridge and full-bridge topologies   RDS(on) typ. 4.7m <br> Synchronous rectifier applications  G<br>            max  5.9m <br> Resonant mode power supplies<br> OR-ing and redundant power switches  S ID (Silicon Limited)  160A<br> DC/DC and AC/DC converters  ==<br> DC/AC Inverters<br>D<br>Benefits  S S<br>S<br> Improved  Gate, Avalanche and Dynamic dV/dt Ruggedness  S S<br>S<br> Fully Characterized Capacitance and Avalanche SOA  G<br> Enhanced body diode dV/dt and dI/dt Capability    D [2] PAK-7Pin<br> Lead-Free, RoHS Compliant, Halogen-Free  IRF135SA204<br>G  D  S<br>Gate  Drain  Source<br>ee<br>Standard Pack<br>Base part number  Package Type  Orderable Part Number<br>Form  Quantity<br>IRF135SA204   D [2] PAK-7Pin    Tape and Reel   800  IRF135SA204<br>——E re<br>30 200<br>ID = 96A<br>25<br>Cot 150 SELLE<br>20 LOCC oe<br>15 100<br>10 Pe eeEE TJ = 125°C<br>50<br>5 KEPPEL aN<br>TJ = 25°C<br>0 PCC 0 ELLE<br>4 8 12 16 20<br>25 50 75 100 125 150 175<br>VGS, Gate-to-Source Voltage (V)<br>TC , CaseTemperature (°C)<br>ID  , Drain Current (A)<br>)<br><br>m<br>RDS(on),  Drain-to -Source On Resistance (<br>**----- End of picture text -----**<br>


**Fig 1.** Typical On– Resistance vs. Gate Voltage 

**Fig 2.** Maximum Drain Current vs. Case Temperature 

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## **Absolute Maximum Rating** 

|**Symbol**|**Parameter**|**Max.**|**Units**|
|---|---|---|---|
|ID @TC= 25°C<br>Continuous Drain Current|Continuous Drain Current,VGS @10V|160|A|
|ID @TC= 100°C<br>Continuous Drain Current|Continuous Drain Current,VGS @10V|113||
|IDM<br>Pulsed Drain Current|Pulsed Drain Current|608||
|PD @TC= 25°C<br>Maximum Power Dissi|Maximum Power Dissipation|500|W|
|Linear Deratin|Linear DeratingFactor|3.3|W/°C|
|VGS<br>Gate-to-Source Volta|Gate-to-Source Voltage|± 20|V|
|TJ<br>TSTG<br>Operating Junction and<br>Sto|Operating Junction and<br>StorageTemperatureRange|-55  to + 175|°C|
|Soldering Temperature, for 10 seconds (1.6mm from case)|Soldering Temperature, for 10 seconds (1.6mm from case)|300||



## **Avalanche Characteristics** 

|EAS (Thermally limited)|Single Pulse Avalanche Energy|670|mJ|
|---|---|---|---|
|EAS (Thermally limited)|SinglePulseAvalancheEnergy |1280||
|IAR|Avalanche Current|See Fig 15, 16, 23a, 23b|A|
|EAR|Repetitive Avalanche Energy||mJ|



|**Symbol**|**Parameter**|**Typ.**|**Max.**|**Units**|
|---|---|---|---|---|
|RJC|Junction-to-Case|–––|0.3|°C/W|
|RJA|Junction-to-Ambient(PCB Mount) |–––|40||



## **Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**<br>~~a~~|**Parameter**<br>~~a~~|**Min.**<br>~~a~~|**Typ. Max.**<br>~~a~~|**Typ. Max.**<br>~~a~~|**Units**<br>~~a~~|**Conditions**<br>~~a~~|
|---|---|---|---|---|---|---|
|V(BR)DSS<br>~~a~~<br>~~es~~|Drain-to-Source Breakdown Voltage<br>~~a~~<br>~~QO~~|135<br>~~a~~<br>~~QO~~|–––<br>~~a~~<br>~~QO GO~~|–––<br>~~a~~<br>~~GO~~|V<br>~~a~~<br>~~GO~~|VGS= 0V,ID= 250µA<br>~~a~~<br>~~GO~~|
|V(BR)DSS/TJ<br>~~a~~<br>~~es~~<br>~~en~~|JBreakdown Voltage Temp. Coefficient<br>~~a~~<br>~~QO~~<br>|–––<br>~~a~~<br>~~QO~~<br>|0.14<br>~~a~~<br>~~QO GO~~<br>|–––<br>~~a~~<br>~~GO~~<br>|V/°C<br>~~a~~<br>~~GO~~<br>|Reference to 25°C, ID= 5mA<br>~~a~~<br>~~GO~~<br>|
|RDS(on) <br>~~es~~<br>~~en~~|Static Drain-to-Source On-Resistance<br>~~QO~~<br>|–––<br>~~QO~~<br>|4.7<br>~~QO GO~~<br>|5.9<br>~~GO~~<br>|m<br>~~GO~~<br>|VGS= 10V,ID= 96A<br>~~GO~~<br>|
|VGS(th)<br>~~en~~|GateThresholdVoltage<br>|2.0<br>|3.0<br>|4.0<br>|V<br>|VDS= VGS,ID= 250µA<br>|
|GS(th)<br>IDSS<br>~~en~~|Drain-to-Source Leakage Current<br>|–––<br>|–––<br>|20<br>|µA<br>|VDS=135V,VGS=0V<br>|
|||–––<br>|–––<br>|250<br>||VDS= 135V,VGS= 0V,TJ=125°C<br>|
|IGSS<br>~~7~~<br>~~rs~~|Gate-to-Source Forward Leakage<br>~~7~~|–––<br>~~7~~|–––<br>~~7~~|100<br>~~7~~|nA<br>~~7~~<br>~~ee~~|VGS= 20V<br>~~7~~|
||Gate-to-Source Reverse Leakage<br>~~7~~<br>~~ee~~|–––<br>~~7~~<br>~~ee~~<br>~~rs~~|–––<br>~~7~~<br>~~ee~~<br>~~rs~~|-100<br>~~7~~<br>~~ee~~||VGS = -20V<br>~~7~~<br>~~ee~~|
|RG<br>~~rs~~|Gate Resistance<br>~~ee~~|–––<br>~~ee~~<br>~~rs~~|2.2<br>~~ee~~<br>~~rs~~|–––<br>~~ee~~|<br>~~ee~~|~~ee~~|



## **Notes:** 

-  Repetitive rating; pulse width limited by max. junction temperature. 

-   Limited by TJmax, starting TJ = 25°C, L = 146µH, RG = 50, IAS = 96A, VGS =10V. 

-  ISD  96A, di/dt  2200A/µs, VDD  V(BR)DSS, TJ 175°C. 

-  Pulse width  400µs; duty cycle  2%. 

- Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 

- Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. 

- R is measured at TJ approximately 90°C. 

-    When mounted on 1 inch square  PCB (FR-4). Please refer to AN-994 for more details: 

   - - 

   - http://www.irf.com/technical info/appnotes/an 994.pdf 

-     Limited by TJmax, starting TJ = 25°C, L = 1.0mH, RG = 50, IAS = 49A, VGS =10V. 

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## **Dynamic  Electrical Characteristics @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**<br>~~PO~~|**Parameter**<br>~~PO~~|**Min.**<br>~~PO~~|**Typ. **<br>~~PO~~|**Max. Units**<br>~~PO~~|**Max. Units**<br>~~PO~~|**Max. Units**<br>**Conditions**<br>~~PO~~|
|---|---|---|---|---|---|---|
|gfs<br>~~PO~~<br>~~ee~~|Forward Transconductance<br>~~PO~~|270<br>~~PO~~|–––<br>~~PO~~|–––<br>~~PO~~|S<br>~~PO~~|VDS= 10V,ID= 96A<br>~~PO~~|
|Qg<br>~~ee~~|Total Gate Charge|–––|210|315|nC|ID= 96A<br>VDS= 68V<br>VGS= 10V|
|Qgs<br>~~ee~~<br>~~a~~<br>~~ee~~|Gate-to-Source Charge|–––|54|–––|||
|Qgd<br>~~ee~~|Gate-to-Drain Charge|–––|57|–––|||
|Qsync<br>~~ee~~<br>~~a~~<br>~~es~~|Total Gate Charge Sync.(Qg–Qgd)|–––|153|–––|||
|td(on)<br>~~es~~<br>~~es~~|Turn-On DelayTime|–––|20|–––|ns|VDD= 81V<br>ID= 96A<br>RG= 2.7<br>VGS= 10V|
|tr<br>~~es~~<br>~~es~~<br>~~es~~|Rise Time|–––|56|–––|||
|td(off)<br>~~es~~<br>~~es~~<br>~~ee~~|Turn-Off DelayTime|–––|140|–––|||
|tf<br>~~es~~<br>~~ee~~|Fall Time|–––|56|–––|||
|Ciss<br>~~ee~~<br>~~a~~<br>~~ee~~|Input Capacitance|–––|11690|–––|pF|VGS= 0V<br>VDS= 50V<br>ƒ= 1.0MHz,  See Fig.7|
|Coss<br>~~ee~~<br>~~es~~|Output Capacitance|–––|650|–––|||
|Crss<br>~~ee~~<br>~~es~~|Reverse Transfer Capacitance|–––|290|–––|||
|Coss eff.(ER)<br>~~es~~<br>~~a~~|Effective Output Capacitance<br>(Energy Related)<br>~~ee~~|–––<br>~~ee~~|630<br>~~ee~~|–––<br>~~ee~~||VGS= 0V, VDS = 0V to 108V|
|Coss eff.(TR)<br>~~GG~~|Output Capacitance(Time Related)<br>~~GG~~|–––<br>~~GG~~|845<br>~~GG~~|–––<br>~~GG~~||VGS= 0V,VDS = 0V to 108V|
|**Diode Characteristics**<br>~~DG~~<br>~~a~~|||||||
|**Symbol**<br>~~e~~<br>~~a~~<br>~~ee~~|**Parameter **<br>~~e~~<br><br>|**Min.**<br>~~es~~<br><br>~~**ee**~~<br>|**Typ. **<br>~~s~~<br>~~DG~~<br><br>~~**e**ee~~<br>|**Max.**<br>~~s~~<br>~~DG~~<br><br>~~ee~~<br>|**Units**<br>~~s~~<br>~~ee~~<br>|**Conditions**<br>~~s~~|
|IS<br>~~e~~<br>~~a ee~~<br>~~ee~~|Continuous Source Current<br>(BodyDiode)<br>~~e~~<br>~~ee~~<br>|–––<br>~~es~~<br>~~ee~~<br>~~**ee**~~<br>|–––<br>~~s~~<br>~~DG~~<br>~~ee~~<br>~~**e**ee~~<br>|160<br>~~s~~<br>~~DG~~<br>~~ee~~<br>~~ee~~<br>~~e~~|A<br>~~s~~<br>~~ee~~<br>~~e~~<br>~~OG~~|MOSFET symbol<br>showing  the<br>integral reverse<br>p-n junction diode.<br>D<br>S<br>G<br>~~s~~<br>~~OG~~|
|ISM<br>~~ee~~|Pulsed Source Current<br>(Body Diode)<br>~~ee~~|–––<br>~~**ee**~~<br>~~ee~~|–––<br>~~**e**ee~~<br>~~ee~~<br>~~Ge~~|608<br>~~ee~~<br>~~eee~~<br>~~OG~~|||
|VSD<br>~~ee~~<br>~~eG~~|Diode Forward Voltage<br><br>~~eG~~|–––<br>~~**ee** ~~<br><br>~~eG~~|–––<br> ~~**e**ee~~<br><br>~~eG~~<br>~~Ge~~|1.3<br>~~ee~~<br>~~e~~<br>~~eG~~<br>~~OG~~|V<br>~~ee~~<br>~~e~~<br>~~eG~~<br>~~OG~~|TJ= 25°C,IS= 96A,VGS= 0V<br>~~eG~~<br>~~OG~~|
|dv/dt<br>~~eG~~<br>~~eG~~<br>~~a~~|Peak Diode Recoverydv/dt<br>~~eG~~<br>~~eG~~<br>~~ee eee~~|–––<br>~~eG~~<br>~~eG~~<br>~~eee~~|22<br>~~eG~~<br>~~Ge~~<br>~~eG~~<br>~~eee~~|–––<br>~~eG~~<br>~~OG~~<br>~~eG~~<br>~~eee~~|V/ns T<br>~~eG~~<br>~~OG~~<br>~~eG~~<br>~~eee~~|V/ns TJ= 175°C,IS=96A,VDS= 135V<br>~~eG~~<br>~~OG~~<br>~~eG~~|
|trr<br>~~eG~~<br>~~a~~<br>~~a~~|Reverse Recovery Time<br>~~eG~~<br>~~ee eee~~<br>~~|~~<br>|–––<br>~~eG~~<br>~~eee~~|85<br>~~eG~~<br>~~eee~~|–––<br>~~eG~~<br>~~eee~~|ns<br>~~eG~~<br>~~eee~~<br>|TJ =25°CVDD= 115V<br>TJ =125°CIF= 96A,<br>TJ =25°Cdi/dt = 100A/µs<br>TJ =125°C <br>TJ= 25°C<br>~~eG~~|
|||–––<br>~~eee~~<br>~~|~~<br>~~|~~<br>|98<br>~~eee~~<br>~~CCT~~<br>|–––<br>~~eee~~<br>~~CCT~~<br>|||
|Qrr<br>~~a ~~<br>~~a~~|Reverse Recovery Charge<br> ~~ee eee~~<br>~~|~~<br>~~ee eee~~|–––<br>~~eee~~<br>~~|~~<br>~~|~~<br>~~eee~~|315<br>~~eee~~<br>~~CCT~~<br>~~eee~~|–––<br>~~eee~~<br>~~CCT~~<br>~~eee~~|nC<br>~~eee~~<br>~~eee~~||
|||–––<br>~~|~~<br>~~|~~<br>~~eee~~<br>~~ee~~|430<br>~~CCT~~<br>~~eee~~<br>~~ee~~|–––<br>~~CCT~~<br>~~eee~~<br>~~ee~~|||
|IRRM<br>~~a ~~<br>~~a ee~~|Reverse RecoveryCurrent<br>~~|~~<br> ~~ee eee~~<br>~~ee~~|–––<br>~~|~~<br>~~|~~<br>~~eee~~<br>~~ee~~<br>~~ee~~|6.6<br>~~CCT~~<br>~~eee~~<br>~~ee~~<br>~~ee~~|–––<br>~~CCT~~<br>~~eee~~<br>~~ee~~<br>~~ee~~|A<br>~~eee~~<br>~~ee~~||



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1000 1000<br>VGS<br>VGS<br>TOP           15V<br>TOP           15V<br>10V<br>10V<br>6.0V<br>6.0V<br>5.5V<br>5.5V<br>5.0V<br>100 5.0V 4.5V<br>4.5V<br>4.3V<br>4.3V<br>BOTTOM 4.0V<br>yaa BOTTOM 4.0V 100 Vinee<br>4.0V<br>10 wm) Le<br>4.0V<br> 60µs PULSE WIDTH  60µs PULSE WIDTH<br>Tj = 25°C Tj = 175°C<br>1 ailTn 10 i[<br>0.1 1 10 100 0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 3.   Typical Output Characteristics  Fig 4.   Typical Output Characteristics<br>1000 3.5<br>ID = 96A<br>3.0 VGS = 10V<br>100<br>TJ = 175°C 2.5<br>le TOIL<br>10 Sf TJ = 25°C ft 2.0 FuPCCPEEEEEE.<br>1.5<br>1<br>cee VDS = 50V 1.0<br> 60µs PULSE WIDTH<br>0.1 Lib 0.5 CDeaYEEeEEEE ea<br>2.0 3.0 4.0 5.0 6.0<br>-60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>VGS, Gate-to-Source Voltage (V)<br>TJ , Junction Temperature (°C)<br>Fig 5.   Typical Transfer Characteristics  Fig 6.   Normalized On-Resistance vs. Temperature<br>100000 14<br>VGS   = 0V,       f = 1 MHZ<br>Ciss    = C gs + Cgd,  C ds SHORTED 12 ID=  96 A V DS=  1 08V<br>Crss    = Cgd  VDS= 68V<br>C oss   = C ds  + C gd 10 V DS=  27V<br>10000 Ciss<br>8<br>Sui el 6 nn Yau<br>1000 a all Yi<br>Coss 4<br>Crss 2<br>PRE tt EEE<br>0<br>100 Bi ae alll AHH<br>0 50 100 150 200 250 300<br>1 10 100 1000<br> QG  Total Gate Charge (nC)<br>VDS, Drain-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>C, Capacitance (pF)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 6.** Normalized On-Resistance vs. Temperature 

**Fig 7.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 8.** Typical Gate Charge vs.Gate-to-Source Voltage 

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1000 1000<br>100µsec<br>100 TJ = 175°C 100 10ms ec<br>1msec<br>10 ff T J  = 25°C 10 EE OPERATION IN THIS AREA<br>LIMITED BY RDS(on)<br>1 1 Tc = 25°C DC<br>Tj = 175°C<br>V GS  = 0V Single Pulse<br>0.1 0.1<br>0.2 0.4 0.6 0.8 1.0 1.2 0.1 1 10 100<br>VSD, Source-to-Drain Voltage (V) VDS,  Drain-toSource Voltage (V)<br>Fig 9.   Typical Source-Drain Diode Forward Voltage  Fig 10.   Maximum Safe Operating Area<br>170 6.0<br>Id = 5.0mA<br>5.0<br>160 LE PTT<br>4.0<br>150 LALWa 3.0 anneef] TIEt Tt,Ly<br>2.0<br>140 ALLELE 46<br>We 1.0 ttyl<br>MLL LL 0.0 EECACC ELA<br>130<br>0 20 40 60 80 100 120 140<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C ) VDS, Drain-to-Source Voltage (V)<br>ISD, Reverse Drain Current (A) ID,  Drain-to-Source Current (A)<br>Energy (µJ)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 10.** Maximum Safe Operating Area 

**Fig 11.** Drain-to-Source Breakdown Voltage 

**Fig 12.** Typical Coss Stored Energy 

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16.0<br>VGS = 4.5V<br>VGS = 5.5V<br>VGS = 6.0V<br>12.0 VGS = 8.0V<br>VGS = 10V<br>8.0<br>4.0 Se<br>0 50 100 150 200<br>ID, Drain Current (A)<br>)<br><br>m<br>RDS(on),  Drain-to -Source On Resistance (<br>**----- End of picture text -----**<br>


**Fig 13.** Typical On–Resistance vs. Drain Current 

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1<br>D = 0.50<br>0.1 TTTTT<br>0.20<br>0.10<br>0.05<br>0.01 rT<br>0.02 ill<br>0.01<br>0.001 ee TIE<br>SINGLE PULSE Notes:<br>( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.0001<br>Sma ML MAM<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 14.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>1000<br>Allowed avalanche Current vs avalanche<br>Duty Cycle = Single Pulse<br>pulsewidth, tav, assuming  Tj = 150°C and<br>Tstart =25°C (Single Pulse)<br>100 Mani Le<br>0.01 TN<br>0.05<br>10 ai iar 0.10 eee<br>1<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  j = 25°C and<br>Tstart = 150°C.<br>0.1 ect<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 15.  Avalanche Current vs. Pulse Width<br>700<br>Notes on Repetitive Avalanche Curves , Figures 15, 16:<br>TOP          Single Pulse<br>(For further info, see AN-1005 at www.irf.com)<br>600 NEP BOTTOM   1.0% Duty Cycle 1.Avalanche failures assumption:<br>I D  = 96A Purely a thermal phenomenon and failure occurs at a<br>500 temperature far in excess of Tjmaxjmax. This is validated for every<br>S|<br>part type.<br>2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not<br>400    exceeded.<br>PNNGEETT<br>3. Equation below based on circuit and waveforms shown in Figures<br>300     23a, 23b.<br>BERNDNEREEEE 4. PD (ave) = Average power dissipation per single avalanche pulse. D (ave) = Average power dissipation per single avalanche pulse. = Average power dissipation per single avalanche pulse.<br>200 PLLEININE 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage<br> increase during avalanche).<br>6. Iav = Allowable avalanche current.<br>100 tt EE 7. T = Allowable rise in junction temperature, not to exceed TT = Allowable rise in junction temperature, not to exceed TT = Allowable rise in junction temperature, not to exceed Tjmax<br>    (assumed as 25°C in Figure 14, 15).<br>0 PELELE LENKANN tav = Average time in avalanche.<br>25 50 75 100 125 150 175 D = Duty cycle in avalanche =  tav ·f<br>ZthJC(D, tav) = Transient thermal resistance, see Figures 14) thJC(D, tav) = Transient thermal resistance, see Figures 14) (D, tav) = Transient thermal resistance, see Figures 14) av) = Transient thermal resistance, see Figures 14) ) = Transient thermal resistance, see Figures 14)<br>Starting TJ , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJCav) = T/ ZthJC) = T/ ZthJCT/ ZthJCT/ ZthJCthJC<br>EAR , Avalanche Energy (mJ)<br>Thermal Response ( Z thJC ) °C/W<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


   - Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmaxjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 23a, 23b. 

4. PD (ave) = Average power dissipation per single avalanche pulse. D (ave) = Average power dissipation per single avalanche pulse. = Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. T = Allowable rise in junction temperature, not to exceed TT = Allowable rise in junction temperature, not to exceed TT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). 

   - ZthJC(D, tav) = Transient thermal resistance, see Figures 14) thJC(D, tav) = Transient thermal resistance, see Figures 14) (D, tav) = Transient thermal resistance, see Figures 14) av) = Transient thermal resistance, see Figures 14) ) = Transient thermal resistance, see Figures 14) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJCav) = T/ ZthJC) = T/ ZthJCT/ ZthJCT/ ZthJCthJC 

      - Iav = 2T/ [1.3·BV·Zth] 

**Fig 16.** Maximum Avalanche Energy vs. Temperature 

EAS (AR) = PD (ave)·tav 

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**==> picture [213 x 196] intentionally omitted <==**

**----- Start of picture text -----**<br>
4.0<br>3.5<br>TTT<br>3.0<br>SSS<br>2.5 I D  = 250µA<br>ID = 1.0mA SSNS<br>2.0 I D = 10mA<br>ID = 1.0A BAANNS<br>1.5 SEEBANS<br>1.0 PEEEEEEETN<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th) Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


**==> picture [211 x 201] intentionally omitted <==**

**----- Start of picture text -----**<br>
40<br>IF = 64A<br>VR = 115V<br>30 T J = 25°C ry fe<br>TJ = 125°C<br>ae<br>20<br>ean<br>10 BZann<br>0 Lae<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


**Fig 17.** Threshold Voltage vs. Temperature 

**==> picture [210 x 200] intentionally omitted <==**

**----- Start of picture text -----**<br>
40<br>IF = 96A<br>VR = 115V<br>30 T J = 25°C .<br>TJ = 125°C<br>20 cai<br>eZ<br>10 Bani<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


**Fig 18.** Typical Recovery Current vs. dif/dt 

**==> picture [215 x 200] intentionally omitted <==**

**----- Start of picture text -----**<br>
1400<br>IF = 64A<br>1200<br>V R  = 115V<br>TJ = 25°C nn<br>1000<br>TJ = 125°C<br>800<br>“f=<br>600<br>Hoe<br>400<br>aan<br>200<br>0 Ftft ff<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


**Fig 19.** Typical Recovery Current vs. dif/dt 

**Fig 20.** Typical Stored Charge vs. dif/dt 

**==> picture [215 x 200] intentionally omitted <==**

**----- Start of picture text -----**<br>
1400<br>IF = 96A<br>1200 Le<br>V R  = 115V<br>1000 TJ = 25°C — Let<br>TJ = 125°C<br>800<br>600 |ter|<br>400 Zan<br>200 eT<br>0 Ff ft| ft f t f<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


**Fig 21.** Typical Stored Charge vs. dif/dt 

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**Fig 22.** Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET[® ] Power MOSFETs 

**==> picture [157 x 88] intentionally omitted <==**

**----- Start of picture text -----**<br>
15V<br>VDS L DRIVER<br>R G D.U.T +<br>- [V][DD]<br>IAS<br>20V<br>Jt tp Y 0.01<br>**----- End of picture text -----**<br>


**==> picture [17 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
IAS<br>**----- End of picture text -----**<br>


**==> picture [105 x 25] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS<br>tp ><br>**----- End of picture text -----**<br>


**Fig 23a.** Unclamped Inductive Test Circuit 

**Fig 23b.** Unclamped Inductive Waveforms 

**Fig 24a.** Switching Time Test Circuit 

**==> picture [21 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>**----- End of picture text -----**<br>


**Fig 24b.** Switching Time Waveforms 

**==> picture [172 x 117] intentionally omitted <==**

**----- Start of picture text -----**<br>
Id<br>Vds<br>Vgs<br>Vgs(th)<br>l epi n e p i g pig<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 25a.** Gate Charge Test Circuit 

**Fig 25b.** Gate Charge Waveform 

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IRF135SA204 

**D[2] PAK-7Pin  Package Outline** (Dimensions are shown in millimeters (inches)) 

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

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## **D[2] Pak-7Pin  Part Marking Information** 

## **D[2] PAK-7Pin  Tape and Reel** 

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

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IRF135SA204 

## **Qualification Information[† ]** 

|**Qualification Information[† ]**|||
|---|---|---|
|**Qualification Level**|Industrial<br>(per JEDEC JESD47F)††||
|**Moisture Sensitivity Level**|D2PAK-7Pin|MSL1|
|**RoHS Compliant**|Yes||



- † Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product info/reliability/ 

†† Applicable version of JEDEC standard at the time of product release. 

## **Revision History** 

|**Date**||**Comments**|
|---|---|---|
|||Corrected package picture added “s” on pin number 2 - page 1.|
|05/12/2017||Changed datasheet with Infineon logo - all pages.|
|||Added disclaimer on last page|



**Published by Infineon Technologies AG 81726 München, Germany** 

**© Infineon Technologies AG 2015 All Rights Reserved.** 

## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 

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---

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