# Power MOSFET, N Channel, 24 V, 195 A, 1650 µohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:1698282/)

**URL**: https://novapart.co/products/IRF1324SPBF/power-mosfet-n-channel-24-v-195-a-1650-ohm-to-263
**SKU**: IRF1324SPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.5700
**Stock**: 10+

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:195A; Drain Source Voltage Vds:24V; On Resistance Rds(on):0.0013ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Power D

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 300W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 24V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 195A |
| Drain Source On State Resistance | 1650µohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1698282/)

## PD - 973534 IRF1324SPbF IRF1324LPbF HEXFET ® Power MOSFET 

> D **VDSS 24V** High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply **RDS(on)   typ. 1.3m** Ω 

> High Speed Power Switching **max. 1.65m** Ω Hard Switched and High Frequency Circuits G **ID (Silicon Limited) 340A** E S ~~==~~ **ID (Package Limited) 195A** Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness Fully Characterized Capacitance and Avalanche Enhanced body diode dV/dt and dI/dt Capability Lead-Free G[DS] G[DS] D[2] Pak TO-262 IRF1324SPbF IRF1324LPbF 

## **Applications** 

## **Benefits** 

Fully Characterized Capacitance and Avalanche SOA 

|**G**|**D**|**S**|
|---|---|---|
|Gate|Drain|Source|



Gate 

## **Absolute Maximum Ratings** 

|**Symbol**|**Parameter**<br>~~es~~|**Max.**|**Units**|
|---|---|---|---|
|ID@ TC= 25°C|Continuous Drain Current,VGS @ 10V(Silicon Limited)<br>~~a~~<br>~~es~~|340<br>~~G~~|A|
|ID@ TC= 100°C|Continuous Drain Current,VGS@ 10V(Silicon Limited)<br>~~es~~|240||
|ID@ TC= 25°C<br>~~a~~|Continuous Drain Current,VGS@ 10V(Wire Bond Limited)<br>~~es~~<br>~~Ge~~<br>~~a~~<br>~~eerT~~|195<br>~~Ge~~<br>~~eerT~~<br>~~O~—OTCCCSCSCiCY~~||
|IDM<br>~~a~~|Pulsed Drain Current<br>~~es~~<br>~~a~~<br>~~eerT~~|1420<br>~~eerT~~<br>~~O~—OTCCCSCSCiCY~~<br>~~G~~||
|PD@TC= 25°C<br>~~a~~|Maximum Power Dissipation<br>~~es~~<br>~~a~~<br>~~eerT~~<br>~~a~~|300<br>~~eerT~~<br>~~O~—OTCCCSCSCiCY~~<br>~~a~~<br>~~G~~<br>~~G~~|W<br>~~a~~|
||Linear DeratingFactor<br>~~a~~|2.0<br>~~G~~<br>~~a~~<br>~~G~~|W/°C<br>~~a~~|
|VGS|Gate-to-Source Voltage<br>~~DO~~|± 20<br>~~G~~<br>~~DO~~|V<br>~~DO~~|
|dv/dt|Peak Diode Recovery<br>~~DO~~<br>:|0.46<br>~~DO~~<br>|V/ns<br>~~DO~~<br>~~_~~|
|TJ<br>TSTG|Operating Junction and<br>Storage Temperature Range|-55  to + 175<br>~~——}~~|°C<br>~~——}_~~|
||Soldering Temperature, for 10 seconds<br>(1.6mm from case)|300<br>~~——}~~||



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09/24/09 

**Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**<br>V(BR)DSS<br>∆V(BR)DSS/∆TJ<br>RDS(on)<br>VGS(th)<br>IDSS<br>IGSS<br>RG|**Parameter**<br>**Min. Typ. Max. Units**<br>Drain-to-Source Breakdown Voltage<br>24<br>–––<br>–––<br>V<br>Breakdown Voltage Temp.Coefficient<br>–––<br>22<br>–––<br>mV/°C<br>Static Drain-to-Source On-Resistance<br>–––<br>1.3<br>1.65<br>mΩ<br>Gate Threshold Voltage<br>2.0<br>–––<br>4.0<br>V<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>µA<br>–––<br>–––<br>250<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>200<br>nA<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-200<br>Internal Gate Resistance<br>–––<br>2.3<br>–––<br>Ω<br>VGS= 20V<br>VGS= -20V<br>**Conditions**<br>VGS= 0V, ID= 250µA<br>Reference to 25°C,ID= 5.0mA<br>VGS= 10V, ID= 195A<br>VDS= VGS,ID= 250µA<br>VDS= 24V, VGS= 0V<br>VDS= 24V, VGS= 0V, TJ= 125°C<br>~~a~~<br>~~GQ~~<br>~~RG QO~~<br>~~pe~~<br>~~GQ~~<br>~~OO~~<br>~~CC~~<br>~~Ne~~<br>~~eee eee~~<br>~~PT~~<br>~~es~~<br>~~ee~~<br>~~PT~~<br>~~GG~~|**Parameter**<br>**Min. Typ. Max. Units**<br>Drain-to-Source Breakdown Voltage<br>24<br>–––<br>–––<br>V<br>Breakdown Voltage Temp.Coefficient<br>–––<br>22<br>–––<br>mV/°C<br>Static Drain-to-Source On-Resistance<br>–––<br>1.3<br>1.65<br>mΩ<br>Gate Threshold Voltage<br>2.0<br>–––<br>4.0<br>V<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>µA<br>–––<br>–––<br>250<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>200<br>nA<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-200<br>Internal Gate Resistance<br>–––<br>2.3<br>–––<br>Ω<br>VGS= 20V<br>VGS= -20V<br>**Conditions**<br>VGS= 0V, ID= 250µA<br>Reference to 25°C,ID= 5.0mA<br>VGS= 10V, ID= 195A<br>VDS= VGS,ID= 250µA<br>VDS= 24V, VGS= 0V<br>VDS= 24V, VGS= 0V, TJ= 125°C<br>~~a~~<br>~~GQ~~<br>~~RG QO~~<br>~~pe~~<br>~~GQ~~<br>~~OO~~<br>~~CC~~<br>~~Ne~~<br>~~eee eee~~<br>~~PT~~<br>~~es~~<br>~~ee~~<br>~~PT~~<br>~~GG~~|
|---|---|---|
|**Dynamic @ TJ = 25°C(unless otherwise specified)**|||
|**Symbol**<br>gfs<br>Qg|**Parameter**<br>**Min. Typ. Max. Units**<br>Forward Transconductance<br>180<br>–––<br>–––<br>S<br>TotalGateCharge<br>–––<br>160<br>240<br>nC<br>**Conditions**<br>VDS= 10V, ID= 195A<br>ID= 195A<br>~~ss~~<br>~~GQ~~<br>~~eG QO~~<br>~~a~~||
|Qgs|Gate-to-Source Charge<br>–––<br>84<br>–––<br>VDS= 12V<br>~~a~~||
|Qgd|Gate-to-Drain("Miller")Charge<br>–––<br>49<br>–––<br>VGS= 10V<br>~~a~~<br>®||
|Qsync|Total Gate Charge Sync.(Qg- Qgd)<br>–––<br>76<br>–––<br>ID= 195A,VDS=0V,VGS= 10V<br>~~a~~||
|td(on)|Turn-On DelayTime<br>–––<br>17<br>–––<br>ns<br>VDD= 16V<br>~~a~~||
|tr|Rise Time<br>–––<br>190<br>–––<br>ID= 195A<br>~~a~~||
|td(off)|Turn-Off DelayTime<br>–––<br>83<br>–––<br>RG= 2.7Ω<br>~~a~~||
|tf<br>Ciss|Fall Time<br>–––<br>120<br>–––<br>InputCapacitance<br>–––<br>7590<br>–––<br>pF<br>VGS= 10V<br>VGS= 0V<br>~~a~~<br>®<br>~~a~~||
|Coss|OutputCapacitance<br>–––<br>3440<br>–––<br>VDS= 24V<br>~~es~~||
|Crss|Reverse Transfer Capacitance<br>–––<br>1960<br>–––<br>ƒ= 1.0 MHz,See Fig. 5<br>~~ee~~||
|Cosseff.(ER)|EffectiveOutputCapacitance(EnergyRelated)<br>–––<br>4700<br>–––<br>VGS= 0V,VDS= 0V to 19V<br>,See Fig. 11<br>~~ag~~||
|Cosseff.(TR)|Effective Output Capacitance(Time Related)<br>–––<br>4490<br>–––<br>VGS= 0V, VDS= 0V to 19V<br>~~a~~©||
|**Diode Characteristics**|||
|**Symbol**|**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**||
|IS<br>ISM<br>VSD|S<br>D<br>G<br>Continuous Source Current<br>–––<br>–––<br>350<br>A<br>(Body Diode)<br>Pulsed Source Current<br>–––<br>–––<br>1420<br>A<br>(Body Diode)<br>Diode Forward Voltage<br>–––<br>–––<br>1.3<br>V<br>MOSFET symbol<br>showing  the<br>TJ= 25°C, IS= 195A, VGS= 0V<br>integral reverse<br>p-njunction diode.<br>~~SSS~~<br>~~poGG~~||
|trr<br>Qrr<br>IRRM|Reverse Recovery Time<br>–––<br>46<br>–––<br>ns<br>TJ= 25°C<br>VR= 20V,<br>–––<br>71<br>–––<br>TJ= 125°C<br>IF= 195A<br>Reverse Recovery Charge<br>–––<br>160<br>–––<br>nC<br>TJ= 25°C<br>di/dt = 100A/µs<br>–––<br>430<br>–––<br>TJ= 125°C<br>Reverse RecoveryCurrent<br>–––<br>7.7<br>–––<br>A<br>TJ= 25°C<br>~~ee~~<br>~~|~~~~**|**~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>°<br>~~|~~<br>~~a~~||
|ton|Forward Turn-On Time<br>Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~Ge~~||



Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current 

limitations arising from heating of the device leads may occur with 

ISD ≤ 195A, di/dt ≤ 450A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. 

Pulse width ≤ 400µs; duty cycle ≤ 2%. 

Coss eff. (TR) is a fixed capacitance that gives the same charging time 

some lead mounting arrangements. (Refer to AN-1140). as Coss while VDS is rising from 0 to 80% VDSS. 

®@ Repetitive rating;  pulse width limited by max. junction Coss eff. (ER) is a fixed capacitance that gives the same energy as temperature. Coss while VDS is rising from 0 to 80% VDSS. ® Limited by TJmax, starting TJ = 25°C, L = 0.014mH When mounted on 1" square PCB (FR-4 or G-10 Material).  For recomRG = 25Ω, IAS = 195A, VGS =10V. Part not recommended for use mended footprint and soldering techniques refer to application note #AN-994. above this value. @R θ is measured at Ty approximately 90°C. 

When mounted on 1" square PCB (FR-4 or G-10 Material).  For recommended footprint and soldering techniques refer to application note #AN-994. 

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10000<br>VGS<br>≤60µs PULSE WIDTH TOP           15V<br>Tj = 25°C 10V<br>1000 Ea 8.0V<br>6.0V<br>5.5V<br>5.0V<br>4.5V<br>100 e et BOTTOM 4.0V<br>10 P C eC<br>Pett<br>1 C n Th<br>4.0V<br>Pett ot Et<br>0.1 PT i<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics<br>1000<br>SS Eee<br>100<br>H f<br>T = 175°C<br>J<br>10 ff TJ = 25°C<br>p o} Ay | |<br>T/Ten 0 ee) ee eee| eedfee ee<br>1<br>S J<br>i | ee | eee VDS = 15V |<br>≤60µs PULSE WIDTH<br>0.1 sei<br>2 3 4 5 6 7 8 9<br>VGS, Gate-to-Source Voltage (V)<br>Fig 3.   Typical Transfer Characteristics<br>100000<br>-—— VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED<br>= C  = C<br>rss   gd<br>Coss   = Cds + Cgd<br>=<br>ee |<br>10000 Ciss<br>= Coss<br>a eeme | Peep ee eee<br>Crss<br>E H<br>e a<br>1000<br>1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>C, Capacitance (pF)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

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10000<br>VGS<br>≤60µs PULSE WIDTH TOP           15V<br>Tj = 175°C 10V<br>See 8.0V |<br>6.0V<br>5.5V<br>1000 5.0V4.5V<br>S S BOTTOM 4.0V<br>gY/ oaSee<br>100<br>7<br>OL.ooo<br>LH 4.0V ae<br>10 Cee Tn Il<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>2.0<br>ID = 195A<br>VGS = 10V<br>FE TE<br>1.5 T ELL LE<br>Bra<br>1.0 SEeEplaeeeeea<br>e T LLL<br>ELL<br>0.5 EEL EELEE<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>Fig 4.   Normalized On-Resistance vs. Temperature<br>14.0<br>ID= 195A<br>12.0 S e VDS= 19V 7<br>VDS= 12V<br>10.0 | | SA |<br>8.0 a ae<br>6.0<br>fF<br>/<br>4.0<br>P f<br>2.0 P |f<br>0.0<br>0 50 100 150 200<br> QG,  Total Gate Charge (nC)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000 10000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>T = 175°C 1000<br>J  100µsec<br>100<br>1msec<br>100<br>a p A S se Tta<br>T = 25°C Limited by<br>J<br>10 package<br>10msec<br>10<br>Tc = 25°C<br>Tj = 175°C<br>VGS = 0V Single Pulse DC<br>1.0 i ee 1 PA<br>0.0 0.5 1.0 1.5 1 10 100<br>VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 7.   Typical Source-Drain Diode Fig 8.   Maximum Safe Operating Area<br>Forward Voltage<br>350 32<br>Id = 5mA<br>300 Limited By Package<br>Pe 30 A LLELE<br>250<br>200<br>pS T TP<br>28<br>150<br>Pt fy IN we in<br>100 CTC T ELE<br>26<br>FEES EL<br>50 | | | | LN<br>0 | 24 UL LLELELEL<br>25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100120140160180<br> TC , Case Temperature (°C) TJ , Temperature ( °C )<br>Fig 9.   Maximum Drain Current vs. Fig 10.   Drain-to-Source Breakdown Voltage<br>Case Temperature<br>2.0 1200<br>1.8 ID<br>TOP         44A<br>1000<br>1.6 P f | | lt A 83A<br>BOTTOM 195A<br>1.4<br>H f} ft tt K t<br>800<br>1.2 a a N CEE<br>1.0 600<br>0.8<br>0.6 pT 400 R NEAN<br>0.4<br>200<br>0.2<br>0.0 PfEES 0 P| CRSST<br>-5 0 5 10 15 20 25 30 25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>VDS, Drain-to-Source Voltage (V)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>Energy (µJ)<br>ISD, Reverse Drain Current (A) ID,  Drain-to-Source Current (A)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 10.** Drain-to-Source Breakdown Voltage 

**Fig 11.** Typical COSS Stored Energy 

**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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1<br>e o<br>D = 0.50 I<br>r rr nel<br>0.1 ee 0.20 ee— oat |<br>0.10<br>0.05 R1 R1 R2 R2 R3 R3 R4R4 Ri (°C/W)    τi (sec)<br>0.01 = 0.02 ATerie τJ τ ee Jτ1τ1 τ2 τ2 τ3τ3 τ4τ4 τCτ | 0.0125       0.0000080.0822       0.0000780.2019       0.001110 -<br>H 0.01 T M<br>Ci= τi/Ri 0.2036       0.007197<br>LAT Ci i/Ri es ee<br>+7 a ee ee eee Notes: 0 ee ee el<br>SINGLE PULSE<br>1. Duty Factor D = t1/t2<br>( THERMAL RESPONSE )<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.001 adGaal ees  |1 ee senill<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


**Fig 13.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

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1000<br>Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche<br>STE ELIT TOC TT] | pulsewidth, tav, assuming ∆Tj = 150°C and  HTT<br>Tstart =25°C (Single Pulse)<br>pt 0.01 iil<br>100 P A STE or oo<br>0.05<br>RE<br>0.10 PUTTS<br>Sean cea: St ll<br>10<br>jp— ttt a TTA Ty 7si<br>| Allowed avalanche Current vs avalanche  re ee ee ee ee ee|ee ee<br>pulsewidth, tav, assuming ∆Τ j = 25°C and<br>Tstart = 150°C.<br>1 BETEPe STE eETETE CET<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 14.** Typical Avalanche Current vs.Pulsewidth 

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300<br>| |fd TOP          Single Pulse<br>BOTTOM   1.0% Duty Cycle<br>250200 NL INENE|FT ID = 195A TT TTT TT<br>P INNEEEEE LE<br>EaNNER EEE<br>150 PT EANELLE<br>100 P PiT tTTETEANNNEELELLE EEL<br>50 P t tT | TE | NAA<br>Pt ty ET TNA<br>Eee eeeeeeSN<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


## **Notes on Repetitive Avalanche Curves , Figures 14, 15:** 

**(For further info, see AN-1005 at www.irf.com)** 

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

4. PD (ave) = Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6. Iav = Allowable avalanche current. 

7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). 

- tav = Average time in avalanche. 

- D = Duty cycle in avalanche =  tav ·f 

- ZthJC(D, tav) = Transient thermal resistance, see Figures 13) 

**PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2 T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav** 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.5<br>TTTTISFsFosFdftfedises.<br>4.0 P t EE EET<br>e e<br>3.5 P R TL TENN EE<br>P ISS<br>3.0 P ET SNEEN<br>SSI<br>ID = 250µA<br>2.5 ID = 1.0mA PANN LT<br>rT [INN]<br>ID = 1.0A<br>2.01.5 P EE PELrT TT INNINN,<br>r T  EP ELE TT RE<br>1.0 PTE PeeEEEPerEET LLLTT LY |<br>-75 -50 -25 0 25 50 75 100 125 150 175 200<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage vs. Temperature 

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Driver Gate Drive<br>P.W.<br>D.U.T + {+ P.W. Period ——— — D = —— Period<br>VGS=10<br>)    •  | t<br>Pp ©) - Circuit  •  •   GroundLow Layout Leakage lane ConsiderationsInductance @ D.U.T. ISD Waveform t<br>+<br>Reverse<br>Recovery Body Diode Forward<br>oi - [1] Current Transformer - ® + Current r Current di/dt AN<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 a VDD<br>ma<br>•   Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re ( 4 •   dv/dt controlled by Rg Vpp -<br>•<br>D.U.T. - Device Under Test SOO |<br>Ripple  ≤ 5% ISD<br>Isp controlled by Duty Factor "D" @| t<br>* Vg = 5V for Logic Level Devices<br>Fig 21.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V —_ tp -><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>¢ 20VVGS dt<br>tp 0.01Ω IAS<br>**----- End of picture text -----**<br>


**Fig 22a.** Unclamped Inductive Test Circuit 

**Fig 22b.** Unclamped Inductive Waveforms 

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+<br>-<br>≤ 1  ys<br>≤ 0.1 %<br>**----- End of picture text -----**<br>


## **Fig 23a.** Switching Time Test Circuit 

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Current Regulator<br>Same Type as D.U.T.<br>50KΩ<br>12V .2µF .3µF ||<br>+<br>D.U.T. -VDS<br>VGS<br>3mA<br>WAV IG ID<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


**Fig 24a.** Gate Charge Test Circuit 

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VDS<br>90%<br>\<br>10% /\<br>VGS |«le ys| |<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


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Fig 23b.   Switching Time Waveforms<br>**----- End of picture text -----**<br>


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Id<br>Vds<br>fl Vgs<br>i<br>Vgs(th)<br>a plag [p] [l] [e] w i e » !<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 24b.** Gate Charge Waveform 

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www.irf.com 

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## TO-262 Package Outline 

Dimensions are shown in millimeters (inches) 

## TO-262 Part Marking Information 

www.irf.com 

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Dimensions are shown in millimeters (inches) 

**==> picture [21 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
TRR<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
1.60 (.063)<br>1.50 (.059)<br>1.60 (.063)<br>4.10 (.161)<br>1.50 (.059)<br>3.90 (.153) 0.368 (.0145)<br>0.342 (.0135)<br>lL TT<br>——* OOF OS |G -<br>FEED DIRECTION 1.85 (.073) 11.60 (.457)<br>1.65 (.065) 11.40 (.449) 24.30 (.957)<br>15.42 (.609)<br>23.90 (.941)<br>15.22 (.601)<br>TRL<br>| x<br>1.75 (.069)<br>10.90 (.429) 1.25 (.049)<br>4.72 (.136)<br>10.70 (.421)<br>0000 Cl 16.10 (.634) 4.52 (.178)<br>15.90 (.626)<br>**----- End of picture text -----**<br>


**==> picture [83 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
FEED DIRECTION<br>**----- End of picture text -----**<br>


**==> picture [383 x 222] intentionally omitted <==**

**----- Start of picture text -----**<br>
13.50 (.532) 27.40 (1.079)<br>é 12.80 (.504) 23.90 (.941) als<br>4<br>330.00<br>60.00 (2.362)<br>(14.173) al g       MIN.<br>  MAX.<br>x<br>30.40 (1.197)<br>      MAX.<br>26.40 (1.039) I 4<br>24.40 (.961)<br>3<br>**----- End of picture text -----**<br>


NOTES : 

1.   COMFORMS TO EIA-418. 

2.   CONTROLLING DIMENSION: MILLIMETER. 

3.   DIMENSION MEASURED @ HUB. 

4.   INCLUDES FLANGE DISTORTION @ OUTER EDGE. 

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 09/2009 

www.irf.com 

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## Links

- [View this product on Novapart](https://novapart.co/products/IRF1324SPBF/power-mosfet-n-channel-24-v-195-a-1650-ohm-to-263)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/irf1324spbf/mosfet-n-ch-24v-195a-d2pak/dp/1698282)
---

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