# Power MOSFET, N Channel, 24 V, 195 A, 1500 µohm, TO-220AB, Through Hole

![Product image](https://novapart.co/image/farnell:1698281/)

**URL**: https://novapart.co/products/IRF1324PBF/power-mosfet-n-channel-24-v-195-a-1500-ohm-to
**SKU**: IRF1324PBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.1600
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:195A; Drain Source Voltage Vds:24V; On Resistance Rds(on):0.0012ohm; Rds; Available until stocks are exhausted Alternative available

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (21-Jan-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 300W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220AB |
| Drain Source Voltage Vds | 24V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 195A |
| Drain Source On State Resistance | 1500µohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1698281/)

## IRF1324PbF 

HEXFET ® Power MOSFET 

## **Applications** 

High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply High Speed Power Switching Hard Switched and High Frequency Circuits 

## **Benefits** 

||HEXFET<br>Power MOSFET<br>®|Power MOSFET|
|---|---|---|
|S<br>D<br>G|**VDSS**|**24V**|
||**RDS(on)   typ.**<br>**max.**|**1.2m**|
|||**1.5m**|
||**ID (Silicon Limited)**|**353A**|
||**ID (Package Limited)**|**195A**|



Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

Fully Characterized Capacitance and Avalanche SOA 

Enhanced body diode dV/dt and dI/dt Capability Lead-Free 

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S<br>D<br>G<br>TO-220AB<br>IRF1324PbF<br>**----- End of picture text -----**<br>


||**G**<br>**D**||**S**|
|---|---|---|---|
||Gate<br>Drain<br>Source|||
|**Absolute Maximum Ratings**||||
|**Symbol**<br>**Parameter**<br>**Units**<br>ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>ID@ TC= 100°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V(Wire Bond Limited)<br>IDM<br>Pulsed Drain Current<br>PD@TC= 25°C<br>Maximum Power Dissipation<br>W<br>300<br>**Max.**<br>353<br>249<br>1412<br>195<br>A<br>~~OF Yeo~~<br>~~es~~<br>~~——TTTEFo..———~~<br>~~aI~~||||
||Linear DeratingFactor<br>W/°C<br>2.0<br>~~nD~~|||
|VGS<br>Gate-to-Source Voltage<br>V<br>dv/dt<br>Peak Diode Recovery<br>V/ns<br>0.46<br>± 20<br>~~nD~~<br>~~a~~||||
|TJ|Operating Junction and<br>-55  to + 175|||
|TSTG|Storage Temperature Range||°C|
||Soldering Temperature, for 10 seconds<br>300|||
||(1.6mm from case)|||
|**Avalanche Characteristics**||||
|EAS(Thermallylimited)<br>~~ns~~|Single Pulse Avalanche Energy<br>270<br>~~a~~<br>~~a~~||mJ<br>~~a~~|
|IAR|Avalanche Current<br>See Fig. 14, 15, 22a, 22b||A|
|EAR|Repetitive Avalanche Energy||mJ|
|**Thermal Resistance**||||
|**Symbol**<br>**Parameter**<br>**Typ.**<br>**Max.**<br>RθJC<br>Junction-to-Case<br>–––<br>0.50<br>RθCS<br>Case-to-Sink,Flat Greased Surface<br>0.50<br>–––<br>RθJA<br>Junction-to-Ambient<br>–––<br>62<br>~~99~~<br>~~SSS og~~<br>~~a~~<br>~~a~~|||**Units**<br>°C/W|



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09/24/09 

**Static @ TJ = 25°C (unless otherwise specified)** 

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|||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
|Symbol|Parameter|Min.|Typ.|Max.|Units|Conditions|
|V(BR)DSS|DG|Drain-to-Source Breakdown Voltage|24|–––|QO|–––|V|VGS = 0V, ID = 250µA|
|∆V(BR)DSS/∆TJ|GO|Breakdown Voltage Temp. Coefficient|–––|22|–––|mV/°C|Reference to 25°C, ID = 5.0mA|
|RDS(on)|a|Static Drain-to-Source On-Resistance|–––|1.2|GG|1.5|m|Qe|Ω|VGS = 10V, ID = 195A|
|VGS(th)|GO|Gate Threshold Voltage|2.0|–––|4.0|V|VDS = VGS, ID = 250µA|
|IDSS|Drain-to-Source Leakage Current|–––|–––|20|µA|VDS = 24V, VGS = 0V|
|–––|–––|250|VDS = 24V, VGS = 0V, TJ = 125°C|
|||
|IGSS|a|Gate-to-Source Forward Leakage|–––|–––|200|———|nA|VGS = 20V|
|Gate-to-Source Reverse Leakage|–––|–––|-200|VGS = -20V|
|RG|—————|Internal Gate Resistance|–––|||2.3|–––|_{_|Ω|
|a|PT|
|Dynamic @ TJ = 25°C (unless otherwise specified)|
|Symbol|Parameter|Min.|Typ.|Max.|Units|Conditions|
|gfs|GD|Forward Transconductance|180|–––|GQ|–––|S|VDS = 10V, ID = 195A|
|Qg|a|Total Gate Charge|–––|160|240|ID = 195A|
|Qgs|a|Gate-to-Source Charge|–––|84|–––|VDS = 12V|
|nC|
|Qgd|a|Gate-to-Drain ("Miller") Charge|–––|49|–––|VGS = 10V|®|
|Qsync|a|Total Gate Charge Sync. (Qg - Qgd)|–––|76|–––|ID = 195A, VDS =0V, VGS = 10V|
|td(on)|a|Turn-On Delay Time|–––|17|–––|VDD = 16V|
|tr|a|Rise Time|–––|190|–––|ID = 195A|
|ns|
|td(off)|a|Turn-Off Delay Time|–––|83|–––|RG = 2.7Ω|
|tf|a|Fall Time|–––|120|–––|VGS = 10V|@|
|Ciss|a|Input Capacitance|–––|7590|–––|VGS = 0V|
|Coss|a|Output Capacitance|–––|3440|–––|VDS = 24V|
|Crss|a|Reverse Transfer Capacitance|–––|1960|–––|pF|ƒ = 1.0 MHz,  See Fig. 5|
|Coss eff. (ER)|a|Effective Output Capacitance (Energy Related)|–––|4700|–––|VGS = 0V, VDS = 0V to 19V|e|See Fig. 11|
|Coss eff. (TR)|Effective Output Capacitance (Time Related)|–––|4490|–––|VGS = 0V, VDS = 0V to 19V|
|ee|©|
|Diode Characteristics|
|Symbol|Parameter|Min.|Typ.|Max.|Units|Conditions|
|IS|Continuous Source Current|–––|–––|353|MOSFET symbol|D|
|(Body Diode)|showing  the|
|ISM|SSSee|Pulsed Source Current(Body Diode)|–––|–––|1412|A|integral reversep-n junction diode.|ee)|G|S|
|VSD|CO|Diode Forward Voltage|–––|–––|ee|1.3|V|TJ = 25°C, IS = 195A, VGS = 0V|
|trr|Reverse Recovery Time|–––|46|–––|TJ = 25°C|VR = 20V,|
|ns|
|pF|–––|71|–––|TJ = 125°C|IF = 195A|
|||
|Qrr|Reverse Recovery Charge|–––|160|–––|TJ = 25°C|di/dt = 100A/µs|
|nC|
|–––|430|–––|TJ = 125°C|
|||
|IRRM|aNe|Reverse Recovery Current|–––|eee|||7.7|–––|A|TJ = 25°C|ee|°|
|ton|Ce|Forward Turn-On Time|Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)|

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® Calcuted continuous current based on maximum allowable junction temperature Bond wire current limit is 195A. Note that current limitation arising from heating of the device leds may occur with 

Pulse width ≤ 400µs; duty cycle ≤ 2%. 

- Coss eff. (TR) is a fixed capacitance that gives the same charging time 

some lead mounting arrangements. as Coss while VDS is rising from 0 to 80% VDSS. 

- @@ Repetitive rating;  pulse width limited by max. junction Coss eff. (ER) is a fixed capacitance that gives the same energy as temperature. 

   - Coss while VDS is rising from 0 to 80% VDSS. 

- © Limited by TJmax, starting TJ = 25°C, L = 0.014mH 

      - θ 

- RG = 25Ω, IAS = 195A, VGS =10V. Part not recommended for use above this value . 

   - ISD ≤ 195A, di/dt ≤ 450 A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. 

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10000<br>VGS<br>≤60µs PULSE WIDTH TOP           15V<br>=eneemnene Tj = 25°C siti 10V<br>1000 8.0V<br>6.0V<br>5.5V<br>5.0V<br>4.5V<br>100 e ee oe BOTTOM 4.0V<br>ee |<br>10<br>|<br>a<br>1<br>0.1 =oP 4.0V t<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics<br>1000<br>SS Eee<br>100<br>T = 175°C<br>J<br>10 if ee 2 2 T eee J = 25°C eeefeee ee<br>p f A p |<br>Se<br>ee ee ee ee ee ee eee<br>1<br>ee S PP| eee | ee er VDS = 15V e,<br>0.1 a ie ≤ a 60µs PULSE WIDTH<br>2 3 4 5 6 7 8 9<br>VGS, Gate-to-Source Voltage (V)<br>Fig 3.   Typical Transfer Characteristics<br>100000<br>— VGS   = 0V,       f = 1 MHZ<br>= Ciss   = C gs + Cgd,  C ds SHORTED<br>C  = C<br>rss   gd<br>Coss   = Cds + Cgd<br>ee |<br>10000 Ciss CUI UHI<br>Coss<br>re eemee |[typee ee<br>en Crss ll<br>1000<br>1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>C, Capacitance (pF)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

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10000<br>VGS<br>≤60µs PULSE WIDTH TOP           15V<br>ES Tj = 175°C a 10V l<br>8.0V<br>6.0V<br>5.5V<br>1000 5.0V4.5V<br>BOTTOM 4.0V<br>g n<br>O f<br>100 | BEE<br>OO AAOHH<br>4.0V<br>10 PE ames ot<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>2.0<br>ID = 195A<br>VGS = 10V<br>1.5 T TTBra4<br>SEeEplaeeeee<br>1.0<br>ZF ral<br>eT LLL<br>ELE EEL<br>0.5<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>Fig 4.   Normalized On-Resistance vs. Temperature<br>14.0<br>ID= 195A<br>12.0 p e VDS= 19V 7<br>VDS= 12V<br>10.08.0 a ae<br>4<br>6.0 V<br>4.0 f i<br>2.0<br>0.0<br>0 50 100 150 200<br> QG,  Total Gate Charge (nC)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000 10000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>T = 175°C 1000<br>J  100µsec<br>100<br>1msec<br>100<br>a p A R ae Tt)<br>T = 25°C Limited by<br>J<br>10 package<br>10msec<br>10<br>Tc = 25°C<br>Tj = 175°C<br>VGS = 0VGS = 0V= 0V Single Pulse DC<br>1.0 i ee 1 eS esi:<br>0.0 0.5 1.0 1.5 1 10 100<br>VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 7.   Typical Source-Drain Diode Fig 8.   Maximum Safe Operating Area<br>Forward Voltage<br>32<br>400<br>Id = 5mA<br>350<br>Limited By Package<br>Pyy 30 A LLEL<br>300<br>250<br>pi L LL.<br>28<br>200<br>ftt | a Lr<br>150<br>aaaaa T ELL<br>26<br>100 rT EL<br>TEN Le<br>50<br>0 PSeeeENeeeEN TE EN 24 UL LLELELEL<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br> TC , Case Temperature (°C)<br>Fig 9.   Maximum Drain Current vs. Fig 10.   Drain-to-Source Breakdown Voltage<br>Case Temperature<br>2.0 1200<br>1.8 ID<br>TOP         44A<br>1000<br>1.6 P f | | lt A 83A<br>BOTTOM 195A<br>1.4<br>j j} ttf K t<br>800<br>1.2 c o e N OE<br>1.0 600<br>0.8<br>0.6 pT 400 R NEAN<br>0.4<br>200<br>0.2<br>0.0 PfEES 0 I| CRSSNT<br>-5 0 5 10 15 20 25 30 25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>VDS, Drain-to-Source Voltage (V)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


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1000<br>T = 175°C<br>J<br>100<br>a<br>T = 25°C<br>J<br>10<br>VGS = 0VGS = 0V= 0V<br>1.0 i ee<br>0.0 0.5 1.0 1.5<br>VSD, Source-to-Drain Voltage (V)<br>Fig 7.   Typical Source-Drain Diode<br>Forward Voltage<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


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400<br>350<br>Limited By Package<br>Pyy<br>300<br>250<br>pi<br>200<br>ftt |<br>150<br>aaaaa<br>100 rT<br>TEN<br>50<br>0 SeeeENPSeeeENeeeEN TE EN<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 10.** Drain-to-Source Breakdown Voltage 

**Fig 11.** Typical COSS Stored Energy 

**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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1<br>a ee ee eee eee eee eee __eee<br>a ee ee ee ee:<br>a D = 0.50 rea ES ee |<br>0.1 ee 0.20 ee— oat |<br>0.10<br>e 0.05 e se R1 R1 R2 R2 R3 R3 R4R4 | Ri (°C/W)    τi (sec) -<br>0.01 = | 0.02 Terieemer τJ τ ee Jτ1τ1 τ2 τ2 τ3τ3 τ4τ4 τCτ 0.0125       0.0000080.0822       0.0000780.2019       0.001110<br>0.01<br>Ci= τi/Ri 0.2036       0.007197<br>PH tt Ci i/Ri Notes: HE<br>SINGLE PULSE<br>1. Duty Factor D = t1/t2<br>( THERMAL RESPONSE )<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.001 ryad|| ees  |1 senill<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


**Fig 13.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

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1000<br>a Duty Cycle = Single Pulse |  ee Allowed avalanche Current vs avalanche  ani<br>a eee A eee eee pulsewidth, tav, assuming ∆Tj = 150°C and  ll<br>Tstart =25°C (Single Pulse)<br>0.01<br>100 PAST s o<br>0.05<br>0.10<br>BSH TOR REET<br>TT Aa SSN<br>10 P E =<br>p Allowed avalanche Current vs avalanche  S<br>pulsewidth, tav, assuming ∆Τ j = 25°C and<br>Tstart = 150°C.<br>1 P ETE eR|S ET [EET] ETTee<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 14.   Typical Avalanche Current vs.Pulsewidth<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


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300<br>| |td TOP          Single Pulse<br>BOTTOM   1.0% Duty Cycle<br>250 NL aeN ID = 195A<br>200 I NINC| [FT] TT TTT TL<br>150 P PT ANINN E LELL EEL E L<br>P TTANTL I<br>100 P i ELE L EE<br>FP] tT | AN ELL ELL<br>50 P t tT EU NGNEE LEE<br>Pt tT yttT |NAATT TANNLE<br>0 PitettLL URSA<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Notes on Repetitive Avalanche Curves , Figures 14, 15:** 

**(For further info, see AN-1005 at www.irf.com)** 

1. Avalanche failures assumption: 

- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

4. PD (ave) = Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6. Iav = Allowable avalanche current. 

7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). 

- tav = Average time in avalanche. 

- D = Duty cycle in avalanche =  tav ·f 

- ZthJC(D, tav) = Transient thermal resistance, see Figures 13) 

**PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2 T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav** 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.5<br>TTTTISFsFosFdftfedises.<br>4.0 P t EE EET<br>e e<br>3.5 P R TL TENN EE<br>P ISS<br>3.0 P ET SNEEN<br>SSI<br>ID = 250µA<br>2.5 ID = 1.0mA PANN LT<br>rT [INN]<br>ID = 1.0A<br>2.01.5 P EE PELrT TT INNINN,<br>r T  EP ELE TT RE<br>1.0 PTE PeeEEEPerEET LLLTT LY |<br>-75 -50 -25 0 25 50 75 100 125 150 175 200<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage vs. Temperature 

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Driver Gate Drive<br>P.W.<br>D.U.T + {+ P.W. Period ——— — D = —— Period<br>VGS=10<br>)    •  | t<br>Pp ©) - Circuit  •  •   GroundLow Layout Leakage lane ConsiderationsInductance @ D.U.T. ISD Waveform t<br>+<br>Reverse<br>Recovery Body Diode Forward<br>oi - [1] Current Transformer - ® + Current r Current di/dt AN<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 a VDD<br>•   Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re ( 4 •   dv/dt controlledIsp controlled bybyDuty Rg Factor "D" Vpp - @| t =<br>•<br>D.U.T. - Device Under Test Ripple  ≤ 5% SOO | ISD<br>* Vg = 5V for Logic Level Devices<br>Fig 21.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V —_ tp -><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>¢ 20VVGS dt<br>tp 0.01Ω IAS<br>**----- End of picture text -----**<br>


**Fig 22a.** Unclamped Inductive Test Circuit 

## **Fig 22b.** Unclamped Inductive Waveforms 

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+<br>-<br>≤ 1  ys<br>≤ 0.1 %<br>**----- End of picture text -----**<br>


## **Fig 23a.** Switching Time Test Circuit 

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Current Regulator<br>es Same Type as D.U.T. |<br>!<br>|<br>50KΩ<br>| 12V .2µF |<br>| .3µF |<br>~LLii —): +<br>D.U.T. -VDS<br>VGS<br>3mA<br>ANE IG ID<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


**Fig 24a.** Gate Charge Test Circuit 

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VDS<br>90%<br>\<br>10% /\<br>VGS |«le ys| |<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


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Fig 23b.   Switching Time Waveforms<br>**----- End of picture text -----**<br>


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Id<br>Vds H<br>fl Vgs<br>i{<br>!<br>Vgs(th)<br>a p i e w i e » !<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 24b.** Gate Charge Waveform 

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7 

TO-220AB packages are not recommended for Surface Mount Application. 

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 09/2009 

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8 

## **IMPORTANT NOTICE** 

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In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

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For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( **www.infineon.com** ). 

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Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 



## Links

- [View this product on Novapart](https://novapart.co/products/IRF1324PBF/power-mosfet-n-channel-24-v-195-a-1500-ohm-to)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/irf1324pbf/mosfet-n-ch-24v-195a-to220/dp/1698281)
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