# Power MOSFET, N Channel, 80 V, 120 A, 2000 µohm, TO-220, Through Hole

![Product image](https://novapart.co/image/farnell:2709945/)

**URL**: https://novapart.co/products/IPP020N08N5AKSA1/power-mosfet-n-channel-80-v-120-a-2000-ohm-to-220
**SKU**: IPP020N08N5AKSA1
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €2.4900
**Stock**: 500+
**Lead Time**: 106 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:120A; Drain Source Voltage Vds:80V; On Resistance Rds(on):0.0018ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V; Pow

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | OptiMOS 5 |
| Qualification | - |
| Power Dissipation | 375W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220 |
| Drain Source Voltage Vds | 80V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 120A |
| Drain Source On State Resistance | 2000µohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2709945/)

## MOSFET 

**OptiMOS[TM] OptiMOS[ª]** 5 IPP020N08N5 

Final 

## **OptiMOS[ª]** 5 Power-Transistor, IPP020N08N5 80 V 

|1<br>Description||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|1<br>Description|||||||TO-220-3|||||||
|**Features**||||||||a|||tab|||
|||||||||.||||||
|* Ideal for high frequency switching and sync.|||rec.|||||||||||
|_R_DS(on)<br>¢ Excellent gate charge x||product (FOM)||||||||||||
|¢ Very low on-resistance R|DS(on)|||||||||||||
|¢ N-channel, normal level||||||||||||||
|* 100% avalanche tested||||||||||||||
|¢ Pb-free plating; ROHS compliant||||||||||||||
|* Qualified according toJEDEC<br>fortarget applications<br>* Halogen-free according to IEC61249-2-21|||||1|2|3|||||||
|||||||||||||||
|Table<br>1<br>Key<br>Performance Parameters|||||||||||Drain|||
||||||||||Pin 2, Tab|||||
|**Parameter**<br>**Value**|||**Unit**|||||||||||
|_V_DS<br>80|||V||||Gate<br>Pin 1|||||||
|_R_DS(on),max<br>2.0|||mΩ|||||||||||
|||||||||||Source||||
|_I_D<br>120|||A||||||||Pin 3|||
|_Q_oss<br>207|||nC|||||||||||
|_Q_G(0V..10V)<br>178|||nC||||(PB)|(PB)|||C|C|C|



## **Features** 

||**Package**|**Marking**||
|---|---|---|---|
|IPP020N08N5|PG-TO220-3|020N08N5|-|



1) J-STD20 and JESD22 

Final Data Sheet 

2 

IPP020N08N5 

**==> picture [146 x 65] intentionally omitted <==**

## **OptiMOS[ª] 5�Power-Transistor,�80�V** 

## **Table�of�Contents** 

Description   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Maximum ratings   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Thermal characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics diagrams  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package Outlines  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision History  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimer   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 

Final Data Sheet 

3 

Rev.�2.1,��2014-05-05 

**OptiMOS[ª] 5�Power-Transistor,�80�V** 

IPP020N08N5 

**==> picture [146 x 65] intentionally omitted <==**

**2�����Maximum�ratings** at� _T_ j�=�25�°C,�unless�otherwise�specified 

## **Table�2�����Maximum�ratings** 

|**Table2Maximumratings**|||||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Continuous drain current|_I_D|-<br>-|-<br>-|120<br>120|A|_T_C=25°C<br>_T_C=100°C|
|Pulsed drain current1)|_I_D,pulse|-|-|480|A|_T_C=25°C|
|Avalanche energy, single pulse2)|_E_AS|-|-|1228|mJ|_I_D=100A,_R_GS=25Ω|
|Gate source voltage|_V_GS|-20|-|20|V|-|
|Power dissipation|_P_tot|-|-|375|W|_T_C=25°C|
|Operating and storage temperature|_T_j,_T_stg|-55|-|175|°C|IEC climatic category;<br>DIN IEC 68-1: 55/175/56|



## **3�����Thermal�characteristics** 

## **Table�3�����Thermal�characteristics** 

|**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**|
|---|---|---|---|---|---|---|
|||**Min.**|**Typ.**|**Max.**|||
|Thermal resistance,junction - case|_R_thJC|-|0.3|0.4|K/W|-|
|Thermal resistance, junction - ambient,<br>minimal footprint|_R_thJA|-|-|62|K/W|-|
|Thermal resistance, junction - ambient,<br>6 cm2cooling area3)|_R_thJA|-|-|40|K/W|-|
|Soldering temperature, wave and<br>reflow soldering are allowed|_T_sold|-|-|260|°C|Reflow MSL1|



> 1) See figure 3 for more detailed information 

> 2) See figure 13 for more detailed information 

3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 

Final Data Sheet 

Rev.�2.1,��2014-05-05 

4 

IPP020N08N5 

**==> picture [146 x 65] intentionally omitted <==**

## **OptiMOS[ª] 5�Power-Transistor,�80�V** 

## **4�����Electrical�characteristics** 

## **Table�4�����Static�characteristics** 

|**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**|
|---|---|---|---|---|---|---|
|||**Min.**|**Typ.**|**Max.**|||
|Drain-source breakdown voltage|_V_(BR)DSS|80|-|-|V|_V_GS=0V,_I_D=1mA|
|Gate threshold voltage|_V_GS(th)|2.2|3|3.8|V|_V_DS=_V_GS,_I_D=280µA|
|Zero gate voltage drain current|_I_DSS|-<br>-|0.1<br>10|1<br>100|µA|_V_DS=80V,_V_GS=0V,_T_j=25°C<br>_V_DS=80V,_V_GS=0V,_T_j=125°C|
|Gate-source leakage current|_I_GSS|-|1|100|nA|_V_GS=20V,_V_DS=0V|
|Drain-source on-state resistance|_R_DS(on)|-<br>-|1.8<br>2.1|2.0<br>2.4|mΩ|_V_GS=10V,_I_D=100A<br>_V_GS=6V,_I_D=50A|
|Gate resistance1)|_R_G|-|1.5|2.3|Ω|-|
|Transconductance|_g_fs|114|228|-|S||_V_DS|>2|_I_D|_R_DS(on)max,_I_D=100A|
|**Table5Dynamiccharacteristics1)**|||||||
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Input capacitance|_C_iss|-|13000|16900|pF|_V_GS=0V,_V_DS=40V,_f_=1MHz|
|Output capacitance|_C_oss|-|2000|2600|pF|_V_GS=0V,_V_DS=40V,_f_=1MHz|
|Reverse transfer capacitance|_C_rss|-|86|150|pF|_V_GS=0V,_V_DS=40V,_f_=1MHz|
|Turn-on delay time|_t_d(on)|-|40|-|ns|_V_DD=40V,_V_GS=10V,_I_D=100A,<br>_R_G,ext=1.6Ω|
|Rise time|_t_r|-|36|-|ns|_V_DD=40V,_V_GS=10V,_I_D=100A,<br>_R_G,ext=1.6Ω|
|Turn-off delay time|_t_d(off)|-|102|-|ns|_V_DD=40V,_V_GS=10V,_I_D=100A,<br>_R_G,ext=1.6Ω|
|Fall time|_t_f|-|37|-|ns|_V_DD=40V,_V_GS=10V,_I_D=100A,<br>_R_G,ext=1.6Ω|
|**Table6Gatechargecharacteristics2)**|||||||
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Gate to source charge|_Q_gs|-|57|-|nC|_V_DD=40V,_I_D=100A,_V_GS=0to10V|
|Gate to drain charge1)|_Q_gd|-|37|56|nC|_V_DD=40V,_I_D=100A,_V_GS=0to10V|
|Switchingcharge|_Q_sw|-|59|-|nC|_V_DD=40V,_I_D=100A,_V_GS=0to10V|
|Gate charge total|_Q_g|-|178|223|nC|_V_DD=40V,_I_D=100A,_V_GS=0to10V|
|Gate plateau voltage|_V_plateau|-|4.5|-|V|_V_DD=40V,_I_D=100A,_V_GS=0to10V|
|Gate charge total, sync. FET|_Q_g(sync)|-|153|-|nC|_V_DS=0.1V,_V_GS=0to10V|
|Output charge1)|_Q_oss|-|207|275|nC|_V_DD=40V,_V_GS=0V|



> 1) Defined by design. Not subject to production test 

> 2) See ″ Gate charge waveforms ″ for parameter definition 

Final Data Sheet 

Rev.�2.1,��2014-05-05 

5 

IPP020N08N5 

**==> picture [146 x 65] intentionally omitted <==**

## **OptiMOS[ª] 5�Power-Transistor,�80�V** 

## **Table�7�����Reverse�diode** 

|**Table7Reversediode**|||||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Diode continous forward current|_I_S|-|-|120|A|_T_C=25°C|
|Diode pulse current|_I_S,pulse|-|-|480|A|_T_C=25°C|
|Diode forward voltage|_V_SD|-|0.92|1.2|V|_V_GS=0V,_I_F=100A,_T_j=25°C|
|Reverse recoverytime1)|_t_rr|-|105|210|ns|_V_R=40V,_I_F=100A,d_i_F/d_t_=100A/µs|
|Reverse recoverycharge1)|_Q_rr|-|308|616|nC|_V_R=40V,_I_F=100A,d_i_F/d_t_=100A/µs|



1) Defined by design. Not subject to production test Final Data Sheet 

6 

Rev.�2.1,��2014-05-05 

**OptiMOS[ª]** 

5 Power-Transistor, IPP020N08N5 80 V 

**==> picture [539 x 599] intentionally omitted <==**

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Final Data Sheet 

7 

IPP020N08N5 

## **OptiMOS[ª]** 

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**----- Start of picture text -----**<br>
480 5<br>440 10 V 6 V<br>7 V<br>400<br>_—————— 5.5 V 4 | | tt yt Te<br>360 ff<br>— [yp]<br>320<br>3 5 V<br>280<br>- 240 fo le is<br>5.5 V<br>| 5 V 6 V<br>200<br>2 7 V<br>> 10 V<br>160 | a a ee ee<br>Lf... es<br>120<br>80 Dy 1<br>——<br>40 a es Oe Oe ee ee ee ee<br>a<br>0 ee 0 eeeee<br>0 1 2 3 4 5 0 50 100 150 200<br>V DS ~ I D “<br>I D=f( V DS T j =25 °C; parameter: V GS R DS(on)=f( I D T j =25 °C; parameter: V GS<br>| i); 25°C;paramete; | i=; 25°C; parameters<br>300 250<br>eee ee ee<br>250<br>se<br>200<br>200 See | Eee<br>ae<br>150<br>ee | ,<br>150 175 °C 25 °C<br>fff Se A<br>100<br>TT) VA,<br>100<br>50<br>50 Sees | WE<br>Se ee<br>Spy,<br>0 e s  ae 0 Pf | | |}<br>0 2 4 6 8 0 40 80 120<br>V GS I D<br>I D=f( V GS V DS|>2| I D| R DS(on)max T j g fs=f( I D T j<br>] Ω<br>I D<br>DS(on)<br>R<br>I D fs g<br>**----- End of picture text -----**<br>


Final Data Sheet 

8 

5 Power-Transistor, IPP020N08N5 80 V 

## **OptiMOS[ª]** 

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**==> picture [527 x 266] intentionally omitted <==**

**----- Start of picture text -----**<br>
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Final Data Sheet 

9 

5 Power-Transistor, IPP020N08N5 80 V 

## **OptiMOS[ª]** 

**==> picture [528 x 600] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 [3] 12<br>40 V<br>LT TTT TE TTT ETT 10 L<br>20 V<br>60 V<br>10 [2] | 8 pf tt A<br>I 25 °C )<br>100 °C<br>6<br>150 °C<br>x HHH Tt SN = ‘A<br>| ae Ane<br>10 [1] 4<br>INS | ee e<br>a eeeel 2<br>| TA FT<br>COMI OUTCUTCT<br>10 [0] 0<br>CEI TM | Ae<br>10 [0] 10 [1] 10 [2] 10 [3] 0 50 100 150 200<br>t AV [us] Q gate [nC]<br>I AS=f( t AV R GS Ω T j(start) V GS=f( Q gate I D V DD<br>TT Gate charge waveforms<br>90<br>EL ELE Te<br>tTLETT.<br>80<br>|<br>70<br>iit a<br>ee eee<br>60 Qgs Qgg<br>-60 -20 20 60 100 140 180<br>T j [°C]<br>V BR(DSS)=f( T j I D PT<br>I AV V GS<br>BR(DSS)<br>V<br>**----- End of picture text -----**<br>


**==> picture [265 x 13] intentionally omitted <==**

**----- Start of picture text -----**<br>
TT Gate charge waveforms<br>**----- End of picture text -----**<br>


Final Data Sheet 

10 

**OptiMOS[ª]** 

V 5 Power-Transistor, IPP020N08N5 80 

IPP020N08N5 

Final Data Sheet 

11 

5 Power-Transistor, IPP020N08N5 80 V 

## **OptiMOS[ª]** 

IPP020N08N5 

|Previous Revision|Previous Revision||
|---|---|---|
|Revision|Date|Subjects (major changes since last revision)|
|2.1|2014-05-05|Release of Final Version|



## **erratum@infineon.com** 

## **Information** 

**www.infineon.com** ). 

## **Warnings** 

Final Data Sheet 

12 



## Links

- [View this product on Novapart](https://novapart.co/products/IPP020N08N5AKSA1/power-mosfet-n-channel-80-v-120-a-2000-ohm-to-220)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/ipp020n08n5aksa1/mosfet-n-ch-80v-120a-to-220/dp/2709945)
---

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