# Power MOSFET, N Channel, 500 V, 9 A, 0.59 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2781086RL/)

**URL**: https://novapart.co/products/IPD50R650CEAUMA1/power-mosfet-n-channel-500-v-9-a-059-ohm-to-252
**SKU**: IPD50R650CEAUMA1
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.3840
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:9A; Drain Source Voltage Vds:500V; On Resistance Rds(on):0.59ohm; Rds; Available until stocks are exhausted Alternative available

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 3 - 168 hours |
| Svhc | No SVHC (21-Jan-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | CoolMOS CE |
| Qualification | - |
| Power Dissipation | 69W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 13V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 500V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 9A |
| Drain Source On State Resistance | 0.59ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2781086RL/)

**IPD50R650CE** 

## **MOSFET** 

## **Features** 

## **Applications** 

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DPAK<br>tab<br>va<br>~<br>yy 2 -<br>1 a<br>3<br>Drain<br>Pin 2 ,<br>rae<br>Gate 7<br>Pin 1<br>Source<br>Pin 3<br>**----- End of picture text -----**<br>


~~Table~~ **Parameter** 1 Key ~~Performance~~ **Value** ~~Parameters~~ **Unit** VDS @ Tj,max 550 V RDS(on),max 0.65 Ω ID 9 A Qg,typ 15 nC ID,pulse 19 A Eoss @ 400V 1.69 µJ 

||**Package**|**Marking**||
|---|---|---|---|
|IPD50R650CE|PG-TO 252|50S650CE|see Appendix A|



Final Data Sheet 

1 

**500V�CoolMOSª�CE�Power�Transistor IPD50R650CE** 

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## **Table�of�Contents** 

Description   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test Circuits  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package Outlines  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Appendix A  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision History  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimer   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 

Final Data Sheet 

2 

Rev.�2.3,��2016-06-13 

**500V�CoolMOSª�CE�Power�Transistor IPD50R650CE** 

**==> picture [120 x 53] intentionally omitted <==**

## **1�����Maximum�ratings** 

at� _T_ j�=�25°C,�unless�otherwise�specified 

## **Table�2�����Maximum�ratings** 

|**Table2Maximumratings**|||||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Continuous drain current1)|_I_D|-<br>-|-<br>-|9<br>5.7|A|TC= 25°C<br>TC= 100°C|
|Pulsed drain current2)|_I_D,pulse|-|-|19|A|TC=25°C|
|Avalanche energy, single pulse|_E_AS|-|-|102|mJ|ID=2.3A; VDD= 50V|
|Avalanche energy, repetitive|_E_AR|-|-|0.15|mJ|ID=2.3A; VDD= 50V|
|Avalanche current, repetitive|_I_AR|-|-|2.3|A|-|
|MOSFET dv/dt ruggedness|dv/dt|-|-|50|V/ns|_V_DS=0...400V|
|Gate source voltage|_V_GS|-20<br>-30|-<br>-|20<br>30|V|static;<br>AC (f>1 Hz)|
|Power dissipation (non FullPAK)<br>TO-252|_P_tot|-|-|69|W|_T_C=25°C|
|Operatingand storage temperature|_T_j,_T_stg|-55|-|150|°C|-|
|Continuous diode forward current|_I_S|-|-|6.4|A|_T_C=25°C|
|Diode pulse current2)|_I_S,pulse|-|-|19.0|A|TC= 25°C|
|Reverse diode dv/dt3)|dv/dt|-|-|15|V/ns|_V_DS=0...400V,_I_SD<=_I_S,_T_j=25°C,<br>_t_cond<2µs|
|Maximum diode commutation speed3)|dif/dt|-|-|500|A/µs|_V_DS=0...400V,_I_SD<=_I_S,_T_j=25°C,<br>_t_cond<2µs|



## **2�����Thermal�characteristics** 

## **Table�3�����Thermal�characteristics�DPAK** 

|**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**|
|---|---|---|---|---|---|---|
|||**Min.**|**Typ.**|**Max.**|||
|Thermal resistance,junction  - case|_R_thJC|-|-|1.81|°C/W|-|
|Thermal resistance, junction  - ambient4|)_R_thJA|-<br>-|-<br>35|62<br>-|°C/W|SMD version, device on PCB,<br>minimal footprint<br>SMD version, device on PCB, 6cm2<br>cooling area4)|
|Soldering temperature, wave- &<br>reflowsoldering allowed|_T_sold|-|-|260|°C|reflow MSL 1|



> 1) Limited by Tj max. Maximum duty cycle D=0.5 

> 2) Pulse width tp limited by Tj,max 

> 3) _V_ DClink=400V;� _V_ DS,peak< _V_ (BR)DSS;�identical�low�side�and�high�side�switch�with�identical� _R_ G 

> 4) Device on 40mm*40mm*1.5mm one layer epoxy PCB FR4 with 6cm2 copper area (thickness 70 µ m) for drain connection. PCB is vertical without air stream cooling. 

Final Data Sheet 

3 

Rev.�2.3,��2016-06-13 

**500V�CoolMOSª�CE�Power�Transistor IPD50R650CE** 

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## **3�����Electrical�characteristics** 

## **Table�4�����Static�characteristics** 

|**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**|
|---|---|---|---|---|---|---|
|||**Min.**|**Typ.**|**Max.**|||
|Drain-source breakdown voltage|_V_(BR)DSS|500|-|-|V|_V_GS=0V,_I_D=1mA|
|Gate threshold voltage|_V_(GS)th|2.50|3|3.50|V|_V_DS=_V_GS,_I_D=0.15mA|
|Zero gate voltage drain current|_I_DSS|-<br>-|-<br>10|1<br>-|µA|_V_DS=500V,_V_GS=0V,_T_j=25°C<br>_V_DS=500V,_V_GS=0V,_T_j=150°C|
|Gate-source leakage curent|_I_GSS|-|-|100|nA|_V_GS=20V,_V_DS=0V|
|Drain-source on-state resistance|_R_DS(on)|-<br>-|0.59<br>1.54|0.65<br>-|Ω|_V_GS=13V,_I_D=1.8A,_T_j=25°C<br>_V_GS=13V,_I_D=1.8A,_T_j=150°C|
|Gate resistance|_R_G|-|3|-|Ω|_f_=1MHz,opendrain|
|**Table5Dynamiccharacteristics**|||||||
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Input capacitance|_C_iss|-|342|-|pF|_V_GS=0V,_V_DS=100V,_f_=1MHz|
|Output capacitance|_C_oss|-|26|-|pF|_V_GS=0V,_V_DS=100V,_f_=1MHz|
|Effective output capacitance, energy<br>related1)|_C_o(er)|-|21|-|pF|_V_GS=0V,_V_DS=0...400V|
|Effective output capacitance, time<br>related2)|_C_o(tr)|-|80|-|pF|_I_D=constant,_V_GS=0V,_V_DS=0...400V|
|Turn-on delay time|_t_d(on)|-|6|-|ns|_V_DD=400V,_V_GS=13V,_I_D=2.3A,<br>_R_G=5.3Ω|
|Rise time|_t_r|-|5|-|ns|_V_DD=400V,_V_GS=13V,_I_D=2.3A,<br>_R_G=5.3Ω|
|Turn-off delay time|_t_d(off)|-|27|-|ns|_V_DD=400V,_V_GS=13V,_I_D=2.3A,<br>_R_G=5.3Ω|
|Fall time|_t_f|-|13|-|ns|_V_DD=400V,_V_GS=13V,_I_D=2.3A,<br>_R_G=5.3Ω|
|**Table6Gatechargecharacteristics**|||||||
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Gate to source charge|_Q_gs|-|1.8|-|nC|_V_DD=400V,_I_D=2.3A,_V_GS=0to10V|
|Gate to drain charge|_Q_gd|-|8.1|-|nC|_V_DD=400V,_I_D=2.3A,_V_GS=0to10V|
|Gate charge total|_Q_g|-|15|-|nC|_V_DD=400V,_I_D=2.3A,_V_GS=0to10V|
|Gate plateau voltage|_V_plateau|-|5.3|-|V|_V_DD=400V,_I_D=2.3A,_V_GS=0to10V|



> 1) _C_ o(er)�is�a�fixed�capacitance�that�gives�the�same�stored�energy�as� _C_ oss�while� _V_ DS�is�rising�from�0�to�80%�V(BR)DSS 

> 2) _C_ o(tr)�is�a�fixed�capacitance�that�gives�the�same�charging�time�as� _C_ oss�while� _V_ DS�is�rising�from�0�to�80%�V(BR)DSS 

Final Data Sheet 

Rev.�2.3,��2016-06-13 

4 

**500V�CoolMOSª�CE�Power�Transistor IPD50R650CE** 

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## **Table�7�����Reverse�diode�characteristics** 

|**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**|
|---|---|---|---|---|---|---|
|||**Min.**|**Typ.**|**Max.**|||
|Diode forward voltage|_V_SD|-|0.84|-|V|_V_GS=0V,_I_F=2.3A,_T_f=25°C|
|Reverse recoverytime|_t_rr|-|162|-|ns|_V_R=400V,_I_F=2.3A,d_i_F/d_t_=100A/µs|
|Reverse recoverycharge|_Q_rr|-|1|-|µC|_V_R=400V,_I_F=2.3A,d_i_F/d_t_=100A/µs|
|Peak reverse recoverycurrent|_I_rrm|-|11.1|-|A|_V_R=400V,_I_F=2.3A,d_i_F/d_t_=100A/µs|



Final Data Sheet 

Rev.�2.3,��2016-06-13 

5 

**IPD50R650CE** 

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75 10 [2]<br>70<br>Se— ——EE——EE———E— Pe<br>6560 =S=SSS————E————=_—SS=_—=_—_==_===S=S a a<br>10 [1] 1 µs<br>55 SS SSS SS SSS |C ANN TU<br>50 eS | re ee ee<br>—————— re ee ee Se SS 10 µs NOE<br>45<br>40<br>= ——SSS te 10 [0] TAINLUTUNM 100 µs NIOTT<br>35<br>30 1 ms<br>—— ee ee<br>25 —————————— a Ss<br>10 ms<br>20 DC<br>SS SaaS SS 10 [-1] aa ee All|<br>15<br>10<br>—————— a<br>5<br>0 SS SSSI 10 [-2]<br>0 40 80 120 160 10 [0] 10 [1] 10 [2] 10 [3]<br>T C [°C] V DS [V]<br>25 P tot=f( T C) ° I D=f( V DS T C C; D =O; parameters t p<br>P tot I D<br>**----- End of picture text -----**<br>


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Final Data Sheet 

6 

**IPD50R650CE** 

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Final Data Sheet 

7 

**IPD50R650CE** 

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Final Data Sheet 

8 

**IPD50R650CE** 

**==> picture [538 x 296] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 [4] 2.5<br>a<br>S S e S |  EE a<br>2.0<br>PEEPEEPEPESe |  ee<br>10 [3]<br>en =<br>Ciss<br>ee<br>NERnn ES| =<br>CNC 1.5<br>E 10 [2] MVE} pojg eeeGEee<br>f= ===== === ======——— Soo TATE<br>Coss 1.0<br>See ee Ae<br>CVS ETE TATET<br>10 [1] SN eee = fF | [| wi [f| [| [| [| {| |<br>Crss 0.5<br>SO SSO | yY | | [| [| | fT fF [<br>| Ae<br>10 [0] PPLE EEERL LEE EER LLL 0.0 Ao—C*_ X_ Xx xX EE<br>0 100 200 300 400 500 0 100 200 300 400 500<br>V DS V DS<br>C =f( V DS V GS f E oss = f (V DS )<br>ve [V] OO [OOOOCOOSCOCSCSCSCSCSCSSCS*dY] [V]<br>C oss<br>E<br>**----- End of picture text -----**<br>


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Final Data Sheet 

9 

**500V�CoolMOSª�CE�Power�Transistor IPD50R650CE** 

**==> picture [120 x 53] intentionally omitted <==**

## **5�����Test�Circuits** 

## **Table�8�����Diode�characteristics** 

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**----- Start of picture text -----**<br>
Test circuit for diode characteristics Diode recovery waveform<br>V ,I<br>R g 1 VDS(peak) VDS<br>VDS<br>V DS IF tF trr tS<br>R g  2 dIF / dt<br>I F t<br>QF QS 10 %Irrm<br>R g 1 = RI F g  2 Irrm dIrr / dt tQrrrr =t= QF +tF S+QS<br>Table�9�����Switching�times<br>Switching times test circuit for inductive load Switching times waveform<br>V DS<br>90%<br>V DS<br>V GS 10%<br>V GS<br>t d(on) t r t d(off) t f<br>t on t off<br>**----- End of picture text -----**<br>


## **Table�9�����Switching�times** 

## **Table�10�����Unclamped�inductive�load** 

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**----- Start of picture text -----**<br>
Unclamped inductive load test circuit Unclamped inductive waveform<br>V<br>(BR)DS<br>I D V DS<br>V DS V DS<br>I D<br>**----- End of picture text -----**<br>


Final Data Sheet 

10 

Rev.�2.3,��2016-06-13 

**500V�CoolMOSª�CE�Power�Transistor IPD50R650CE** 

**==> picture [120 x 53] intentionally omitted <==**

## **6�����Package�Outlines** 

**==> picture [312 x 352] intentionally omitted <==**

*) mold flash not included 

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**----- Start of picture text -----**<br>
MILLIMETERS INCHES<br>DIM<br>MIN MAX MIN MAX<br>A 2.16 2.41 0.085 0.095<br>A1 0.00 0.15 0.000 0.006<br>b 0.64 0.89 0.025 0.035<br>b2 0.65 1.15 0.026 0.045 DOCUMENT NO.<br>b3 5.00 5.50 0.197 0.217 Z8B00003328<br>c 0.46 0.60 0.018 0.024<br>c2 0.46 0.98 0.018 0.039 SCALE 0<br>D 5.97 6.22 0.235 0.245<br>D1 5.02 5.84 0.198 0.230<br>2.0<br>E 6.40 6.73 0.252 0.265<br>E1 4.70 5.60 0.185 0.220 0 2.0<br>e 2.29 (BSC) 0.090 (BSC) 4mm<br>e1 4.57 (BSC) 0.180 (BSC)<br>N 3 3<br>EUROPEAN PROJECTION<br>H 9.40 10.48 0.370 0.413<br>L 1.18 1.70 0.046 0.067<br>L3 0.90 1.25 0.035 0.049<br>L4 0.51 1.00 0.020 0.039<br>F1 10.60 0.417<br>F2 6.40 0.252 ISSUE DATE<br>F3 2.20 0.087 01-09-2015<br>F4 5.80 0.228<br>F5 5.76 0.227 REVISION<br>F6 1.20 0.047 05<br>**----- End of picture text -----**<br>


**Figure�1�����Outline�PG-TO�252,�dimensions�in�mm/inches** 

Final Data Sheet 

11 

Rev.�2.3,��2016-06-13 

**IPD50R650CE** 

- 

- 

Final Data Sheet 

12 

**IPD50R650CE** 

## IPD50R650CE 

## Previous Revision 

|Revision|Date|Subjects (major changes since last revision)|
|---|---|---|
|2.0|2012-08-24|Release of final version|
|2.1|2013-07-16|update to Halogen free mold compound|
|2.2|2015-11-17|Updated to qualified for standard grade & updated package drawing|
|2.3|2016-06-13|Updated ID ratings, Zth, SOA and Pd curves|



## **erratum@infineon.com** 

## **Information** 

## **www.infineon.com** ). 

## **Warnings** 

Final Data Sheet 

13 



## Links

- [View this product on Novapart](https://novapart.co/products/IPD50R650CEAUMA1/power-mosfet-n-channel-500-v-9-a-059-ohm-to-252)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/ipd50r650ceauma1/mosfet-n-ch-500v-9a-to-252/dp/2781086RL)
---

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