# Power MOSFET, N Channel, 40 V, 90 A, 3600 µohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3703584/)

**URL**: https://novapart.co/products/IPD036N04LGATMA1/power-mosfet-n-channel-40-v-90-a-3600-ohm-to-252
**SKU**: IPD036N04LGATMA1
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.4600
**Stock**: 1000+
**Lead Time**: 78 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | OptiMOS 3 |
| Qualification | - |
| Power Dissipation | 94W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 90A |
| Drain Source On State Resistance | 3600µohm |
| Gate Source Threshold Voltage Max | 2V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3703584/)

**IPD036N04L G** 

## Type ~~Cin~~ fineon **OptiMOS[®] 3 Power-Transistor** 

## **Features** 

- Fast switching MOSFET for SMPS 

- Optimized technology for DC/DC converters 

## **Product Summary** 

|**Product Summary**|||
|---|---|---|
||||
|_V_DS|40|V|
||||
|_R_DS(on),max|3.6|mΩ|
||||
|_I_D|90|A|



- Qualified according to JEDEC[1)] for target applications 

- N-channel, logic level 

- Excellent gate charge x _R_ DS(on) product (FOM) 

- Very low on-resistance _R_ DS(on) 

- 100% Avalanche tested 

- Pb-free plating; RoHS compliant 

**==> picture [170 x 119] intentionally omitted <==**

**----- Start of picture text -----**<br>
Type IPD036N04L G<br>• Pb-free plating; RoHS compliant<br>ae.<br>Package PG-TO252-3<br>a<br>Marking 036N04L<br>a<br>**----- End of picture text -----**<br>


**Maximum ratings,** at _T_ j=25 °C, unless otherwise specified 

|**Maximum ratings,**at_T_j=25 °C, unless otherwise specified=25 °C, unless otherwise specified|j=25 °C, unless otherwise specified=25 °C, unless otherwise specified|j=25 °C, unless otherwise specified=25 °C, unless otherwise specified|||
|---|---|---|---|---|
|**Parameter**|**Symbol **|**Conditions**|**Unit**<br>**Value**|**Unit**|
|Continuous drain current|_I_D|_V_GS=10 V,_T_C=25 °C|90<br>A<br>87<br>90<br>75<br>400<br>90|A|
|||_V_GS=10 V,_T_C=100 °C|||
|||_V_GS=4.5 V,_T_C=25 °C|||
|||_V_GS=4.5 V,<br>_T_C=100 °C|||
|Pulsed drain current2)|_I D,pulse_|_T_C=25 °C|||
|Avalanche current, single pulse3)|_I_AS|_T_C=25 °C|||
|Avalanche energy, single pulse|_E_AS|_I_D=90 A,_R_GS=25Ω|55<br>mJ|mJ|
|Gate source voltage|_V_GS||±20<br>V|V|



1) J-STD20 and JESD22 

Rev. 1.0 

page 1 

2007-12-06 

**IPD036N04L G** 

**Maximum ratings,** at _T_ j=25 °C, unless otherwise specified 

||**Parameter**|**Symbol Conditions**<br>**Value**|**Unit**|
|---|---|---|---|
||Power dissipation|_P_tot<br>_T_C=25 °C<br>94|W|
||Operating and storage temperature|_T_j,_T_stg<br>-55 ... 175|°C|
||IEC climatic category; DIN IEC 68-1|55/175/56||
|**Parameter**<br>~~ee~~||**Symbol Conditions**<br>**Unit**<br>**min.**<br>**typ.**<br>**max.**<br>**Values**<br>~~eee~~||
||**Thermal characteristics**|||
|Thermal resistance, junction - case<br>_R_thJC<br>-<br>-<br>1.6<br>K/W<br>SMD version, device on PCB<br>_R_thJA<br>minimal footprint<br>-<br>-<br>75<br>6 cm² cooling area4)<br>-<br>-<br>50<br>~~i~~||||
||**Electrical characteristics,**at_T_j=25 °C, unless otherwise specified|=25 °C, unless otherwise specified||
||**Static characteristics**|||
||Drain-source breakdown voltage|_V_(BR)DSS _V_GS=0 V,_I_D=1 mA<br>40<br>-<br>-|V|
||Gate threshold voltage<br>Zero gate voltage drain current<br>Gate-source leakage current<br>Gate resistance<br>Drain-source on-state resistance|_V_GS(th)<br>_V_DS=_V_GS,_I_D=45 µA<br>1.2<br>-<br>2<br>_I_DSS<br>_V_DS=40 V,_V_GS=0 V,<br>_T_j=25 °C<br>-<br>0.1<br>1<br>_V_DS=40 V,_V_GS=0 V,<br>_T_j=125 °C<br>-<br>10<br>100<br>_I_GSS<br>_V_GS=20 V,_V_DS=0 V<br>-<br>10<br>100<br>_R_DS(on)<br>_V_GS=4.5 V,_I_D=90 A<br>-<br>3.9<br>4.9<br>_V_GS=10 V,_I_D=90 A<br>-<br>3.0<br>3.6<br>_R_G<br>-<br>1.6<br>-<br>~~PF=rre~~<br>~~-+—_} ff~~<br>~~a~~|µA<br>nA<br>mΩ<br>Ω|
||Transconductance|_g_fs<br>|_V_DS|>2|_I_D|_R_DS(on)max,<br>_I_D=90 A<br>85<br>170<br>-<br>~~CC~~|S|



2) See figure 3 for more detailed information 

3) See figure 13 for more detailed information 

4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 

Rev. 1.0 

page 2 

2007-12-06 

||||||||**IPD036N04L G**|**IPD036N04L G**|**IPD036N04L G**|
|---|---|---|---|---|---|---|---|---|---|
|**Parameter**<br>~~ee ee~~||**Symbol Conditions**<br>**min.**<br>~~ee ee~~|||||**Unit**<br>**typ.**<br>**max.**<br>**Values**<br>~~ee~~|||
||**Dynamic characteristics**|||||||||
||Input capacitance|_C_iss|||-||4700|6300|pF|
||Output capacitance|_C_oss|_V_GS=0 V,_V_DS=20 V,<br>_f_=1 MHz||-||1000|1300||
||Reverse transfer capacitance|Crss|||-||54|-||
||Turn-on delay time|_t_d(on)|||-||9.3|-|ns|
||Rise time|_t_r|_V_DD=20 V,_V_GS=10 V,||-||5.4|-||
||Turn-off delay time|_t_d(off)|_I_D=30 A,_R_G=1.6Ω||-||37|-||
||Fall time|_t_f|||-||6.0|-||
||Gate Charge Characteristics5)|||||||||
||Gate to source charge<br>Gate charge at threshold<br>Gate to drain charge<br>Switching charge<br>Gate charge total<br>Gate plateau voltage<br>Gate charge total<br>Gate charge total, sync. FET<br>Output charge<br>**Reverse Diode**|_Q_gs<br>-<br>14<br>-<br>nC<br>_Q_g(th)<br>-<br>7.4<br>-<br>_Q_gd<br>-<br>6.1<br>-<br>_Q_sw<br>-<br>13<br>-<br>_Q_g<br>-<br>59<br>78<br>_V_plateau<br>-<br>3.0<br>-<br>V<br>_Q_g<br>_V_DD=20 V,_I_D=30 A,<br>_V_GS=0 to 4.5 V<br>-<br>28<br>38<br>nC<br>_Q_g(sync)<br>_V_DS=0.1 V,<br>_V_GS=0 to 10 V<br>-<br>55<br>-<br>_Q_oss<br>_V_DD=20 V,_V_GS=0 V<br>-<br>37<br>-<br>_V_DD=20 V,_I_D=30 A,<br>_V_GS=0 to 10 V<br>~~iat~~<br>~~=~~<br>~~ee~~<br>~~P|tT~~<br>~~P|~~<br>~~ft~~<br>~~|~~<br>~~ee~~<br>~~ee~~||||||||
||Diode continuous forward current|_I_S|||-||-|78|A|
||||_T_C=25 °C|||||||
||Diode pulse current|_I_S,pulse|||-||-|400||
||Diode forward voltage|_V_SD|_V_GS=0 V,_I_F=90 A,<br>_T_j=25 °C||-||0.92|1.2|V|
||Reverse recovery charge|_Q_rr|_V_R=20 V,_I_F=_I_S,<br>d_i_F/d_t_=400 A/µs||-||45|-|nC|



> 5) See figure 16 for gate charge parameter definition 

Rev. 1.0 

page 3 

2007-12-06 

**IPD036N04L G** 

**==> picture [88 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
1 Power dissipation<br>**----- End of picture text -----**<br>


_P_ tot=f( _T_ 

) 

## **2 Drain current** 

_I_ D=f( _T_ C); _V_ GS ≥ 10 V 

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**----- Start of picture text -----**<br>
100 100<br>80 80<br>60 60<br>40 40<br>20 20<br>0 ALA 0<br>0 50 100 150 200 0 50 100 150 200<br>T  C [°C] T  C [°C]<br>3 Safe operating area 4 Max. transient thermal impedance<br>=f( V  DS); );  T  C=25 °C; =25 °C;  D  =0 Z  thJC=f( t  p)<br>parameter:  t  p parameter:  D  = t  p/ T<br>10 [3] 10<br>limited by on-state 1 µs<br>resistance<br>10 µs<br>10 [2]<br>100 µs<br>DC 1 0.5<br>10 [1] 1 ms 0.2<br>10 ms 0.1<br>0.1 0.05<br>10 [0] 0.02<br>0.01<br>single pulse<br>10 [-1] 0.01 0 0 0 0 0 0 1<br>10 [-1] 10 [0] 10 [1] 10 [2] 10 [-6] 10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 10 [0]<br>V  DS [V] t  p [s]<br> [W]  [A]<br>P  tot I  D<br> [A]  [K/W]<br>I  D<br> thJC<br>Z<br>**----- End of picture text -----**<br>


## **3 Safe operating area** 

_I_ D=f( _V_ DS); ); _T_ C=25 °C; =25 °C; _D_ =0 parameter: _t_ p 

Rev. 1.0 

page 4 

2007-12-06 

## **IPD036N04L G** 

## **5 Typ. output characteristics** 

_I_ D=f( _V_ DS); _T_ j=25 °C 

## **6 Typ. drain-source on resistance** 

_R_ DS(on)=f( _I_ D); _T_ j=25 °C 

**==> picture [440 x 595] intentionally omitted <==**

**----- Start of picture text -----**<br>
parameter:  V  GS parameter:  V  GS<br>320 12<br>3 V<br>5 V<br>280 4.5 V 3.2 V<br>10 V 10<br>240<br>8<br>3.5 V<br>200<br>4 V<br>160 6<br>4 V<br>120<br>4 4.5 V<br>5 V<br>80 3.5 V<br>10 V<br>2<br>40 3.2 V<br>3 V<br>2.8 V<br>0 BE 0<br>0 1 2 3 0 20 40 60 80 100<br>V  DS [V] I  D [A]<br>7 Typ. transfer characteristics 8 Typ. forward transconductance<br>I  D=f( V  GS); | V  DS|>2| I  D| R  DS(on)max g  fs=f( I  D);  T  j=25 °C<br>parameter:  T  j<br>200 240<br>200<br>160<br>160<br>120<br>120<br>80<br>80<br>40<br>40<br>175 °C<br>25 °C<br>0 0<br>0 1 2 3 4 5 0 40 80 120 160 200<br>V  GS [V] I  D [A]<br>]<br>Ω<br> [m<br> [A]<br>I  D<br> DS(on)<br>R<br> [A]  [S]<br>I  D g  fs<br>**----- End of picture text -----**<br>


Rev. 1.0 

2007-12-06 

page 5 

**IPD036N04L G** 

## **9 Drain-source on-state resistance** 

_R_ DS(on)=f( _T_ j); _I_ D=90 A; _V_ GS=10 V 

## **10 Typ. gate threshold voltage** 

_V_ GS(th)=f( _T_ j); _V_ GS= _V_ DS; _I_ D=250 µA 

**==> picture [434 x 574] intentionally omitted <==**

**----- Start of picture text -----**<br>
8 2.5<br>7<br>2<br>6<br>5<br>98 % 1.5<br>4<br>3 typ 1<br>2<br>0.5<br>1<br>0 0<br>-60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180<br>T  j [°C] T  j [°C] [°C]<br>11 Typ. capacitances 12 Forward characteristics of reverse diode<br> =f( V  DS); );  V  GS=0 V; =0 V;  f  =1 MHz I  F=f( V  SD)<br>parameter:  T  j<br>10 [4] 1000<br>Ciss 25 °C, 98%<br>175 °C, 98%<br>Coss<br>10 [3] 100<br>25 °C<br>ani<br>175 °C<br>10 [2] 10<br>Crss<br>10 [1] 1<br>0 10 20 30 40 0.0 0.5 1.0 1.5 2.0<br>V  DS [V] V  SD [V]<br>]<br>Ω<br>[m  [V]<br>R  DS(on) V  GS(th)<br>C   [pF]  [A] I  F<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
2.5<br>2<br>1.5<br>1<br>0.5<br>0<br>-60 -20 20 60 100 140 180<br>T  j [°C] [°C]<br> [V]<br> GS(th)<br>V<br>**----- End of picture text -----**<br>


## **11 Typ. capacitances** 

_C_ =f( _V_ DS); ); _V_ GS=0 V; =0 V; _f_ =1 MHz 

Rev. 1.0 

page 6 

2007-12-06 

**IPD036N04L G** 

## **13 Avalanche characteristics** 

_I_ AS=f( _t_ AV); _R_ GS=25 Ω parameter: _T_ j(start) 

## **14 Typ. gate charge** 

_V_ GS=f( _Q_ gate); _I_ D=30 A pulsed parameter: _V_ DD 

**==> picture [432 x 250] intentionally omitted <==**

**----- Start of picture text -----**<br>
100 12<br>25 °C 20 V<br>10<br>8 V<br>100 °C<br>32 V<br>8<br>150 °C<br>10 6<br>z<br>4<br>2<br>1 0<br>10 [-1] 10 [0] 10 [1] 10 [2] 10 [3] 0 10 20 30 40 50 60 70<br>t  AV [µs] Q  gate [nC]<br> [A]  [V]<br>I  AV V  GS<br>**----- End of picture text -----**<br>


**15 Drain-source breakdown voltage** 

## **16 Gate charge waveforms** 

_V_ BR(DSS)=f( _T_ j); _I_ D=1 mA 

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**----- Start of picture text -----**<br>
45<br>40<br>35<br>30<br>25<br>20<br>-60 -20 20 60 100 140 180<br>T  j [°C]<br> [V]<br> BR(DSS)<br>V<br>**----- End of picture text -----**<br>


**==> picture [193 x 214] intentionally omitted <==**

**----- Start of picture text -----**<br>
V GS<br>Q g<br>V gs(th)<br>Q g(th) Q sw Q gate<br>Q  gs Q  gd<br>**----- End of picture text -----**<br>


Rev. 1.0 

2007-12-06 

page 7 

**IPD036N04L G** 

**Package Outline PG-TO252-3** 

**==> picture [248 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Footprint: Packaging:<br>**----- End of picture text -----**<br>


Rev. 1.0 

page 8 

2007-12-06 

**IPD036N04L G** 

## **Published by** 

**Infineon Technologies AG 81726 Munich, Germany © 2007 Infineon Technologies AG All Rights Reserved.** 

## **Legal Disclaimer** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. 

## **Information** 

For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). 

## **Warnings** 

Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. 

Rev. 1.0 

page 9 

2007-12-06 



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- [Supplier page](https://es.farnell.com/infineon/ipd036n04lgatma1/mosfet-n-ch-40v-90a-to-252/dp/3703584)
---

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