# Intelligent Power Module (IPM), IGBT, 1.2 kV, 16 A, 2.5 kV, DIP, CIPOS

![Product image](https://novapart.co/image/farnell:4540075/)

**URL**: https://novapart.co/products/IM12B10CC1XKMA1/intelligent-power-module-ipm-igbt-12-kv-16-a-25
**SKU**: IM12B10CC1XKMA1
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || Intelligent Power Modules
**Price**: €15.9000
**Stock**: 100+
**Lead Time**: 197 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| Ipm Series | CIPOS |
| Product Range | CIPOS Maxi Series |
| Ipm Case Style | DIP |
| Ipm Power Device | IGBT |
| Isolation Voltage | 2.5kV |
| Current Rating (Ic / Id) | 16A |
| Voltage Rating (Vces / Vdss) | 1.2kV |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:4540075/)

**IM12B10CC1 Datasheet** — 

## **CIPOS™ Maxi IPM** 

## **IM12B10CC1, 1200 V 10 A** 

## **Description** 

The CIPOS™ Maxi IM12B10CC1 product offers the chance for integrating various power and control components to increase reliability, optimize PCB size and system costs. It is designed to control three phase AC motors and permanent magnet motors in variable speed drives applications such as low power motor drives (GPI, Servo drives), pumps, fan drives and active filter for HVAC (Heating, Ventilation, and Air Conditioning). The product concept is specially adapted to power applications, which need good thermal performance and electrical isolation as well as EMI save control and overload protection. Three phase inverter with 1200 V TRENCHSTOP™ IGBTs and Emitter Controlled diodes are combined with an optimized 6-channel SOI gate driver for excellent electrical performance. 

## **Features** 

## Package 

- Fully isolated Dual In-Line molded module 

- Very low thermal resistance due to DCB substrate 

- Lead-free terminal plating; RoHS compliant 

## Inverter 

- 1200 V TRENCHSTOP[TM] IGBT7 S7 

- Rugged 1200 V SOI gate driver technology with stability against transient and negative voltage 

- Allowable negative VS potential up to -11 V for signal transmission at VBS = 15 V 

- Integrated bootstrap functionality 

- Overcurrent shutdown 

- Built-in NTC thermistor for temperature monitoring 

- Undervoltage lockout at all channels 

- Low-side emitter pins accessible for phase current monitoring (open emitter) 

- Cross-conduction prevention 

- All of 6 switches turn off during protection 

- Programable fault clear timing and enable input 

## **Potential applications** 

Fan drives and pumps Active filter for HVAC 

Low power motor drives (GPI, Servo drives) 

Please read the Important Notice and Warnings at the end of this document page 1 of 22 

Datasheet 

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2024-06-03 

## **CIPOS™ Maxi IPM IM12B10CC1, 1200 V 10 A Product validation** 

**==> picture [103 x 46] intentionally omitted <==**

## **Product validation** 

Qualified for industrial applications according to the relevant tests of JEDEC47/20/22. 

## **Table 1 Product information** 

|**Base part number**|**Package type**|**Standardpack**|**Standardpack**|**Remark**|
|---|---|---|---|---|
|||**Form**|**MOQ**||
|IM12B10CC1|DIP 36x23D|14pcs/Tube|280pcs||



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**CIPOS™ Maxi IPM IM12B10CC1, 1200 V 10 A** 

**Table of contents** 

**==> picture [103 x 46] intentionally omitted <==**

## **Table of contents** 

|**Table of contents**|**Table of contents**|
|---|---|
|**Description .................................................................................................................................... 1**||
|**Features ........................................................................................................................................ 1**||
|**Potential applications ..................................................................................................................... 1**||
|**Product validation .......................................................................................................................... 2**||
|**Table**|**of contents ............................................................................................................................ 3**|
|**1**|**Internal electrical schematic ................................................................................................... 4**|
|**2**|**Pin description ....................................................................................................................... 5**|
|2.1|Pin assignment ........................................................................................................................................ 5|
|2.2|Pin description ........................................................................................................................................ 6|
|**3**|**Absolute maximum ratings ..................................................................................................... 8**|
|3.1|Module section ........................................................................................................................................ 8|
|3.2|Inverter section ....................................................................................................................................... 8|
|3.3|Control section ........................................................................................................................................ 8|
|**4**|**Thermal characteristics .......................................................................................................... 9**|
|**5**|**Recommended operation conditions ....................................................................................... 10**|
|**6**|**Static parameters ................................................................................................................. 11**|
|6.1|Inverter section ..................................................................................................................................... 11|
|6.2|Control section ...................................................................................................................................... 11|
|**7**|**Dynamic parameters ............................................................................................................. 12**|
|7.1|Inverter section ..................................................................................................................................... 12|
|7.2|Control section ...................................................................................................................................... 12|
|**8**|**Thermistor characteristics ..................................................................................................... 13**|
|**9**|**Mechanical characteristics and ratings .................................................................................... 14**|
|**10**|**Qualification information ....................................................................................................... 15**|
|**11**|**Diagrams and tables .............................................................................................................. 16**|
|11.1|TCmeasurement point .......................................................................................................................... 16|
|11.2|Backside curvature measurement point .............................................................................................. 16|
|11.3|Switching time definition ...................................................................................................................... 17|
|11.4|Sleep function timing diagram ............................................................................................................. 17|
|**12**|**Application guide .................................................................................................................. 18**|
|12.1|Typical application schematic .............................................................................................................. 18|
|12.2|Performance chart ................................................................................................................................ 19|
|**13**|**Package outline .................................................................................................................... 20**|
|**Revision history............................................................................................................................. 21**||



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**CIPOS™ Maxi IPM IM12B10CC1, 1200 V 10 A** 

**==> picture [103 x 46] intentionally omitted <==**

## **Internal electrical schematic** 

## **1 Internal electrical schematic** 

**==> picture [407 x 619] intentionally omitted <==**

**----- Start of picture text -----**<br>
P (24)<br>(1) VS(U)<br>(2) VB(U) VB 1 HO 1<br>U (23)<br>RBS1 VS 1<br>(3) VS(V)<br>(4) VB(V) VB 2 HO 2<br>V (22)<br>RBS2 VS 2<br>(5) VS(W)<br>(6) VB(W) VB 3 HO 3<br>W (21)<br>RBS3 VS 3<br>(7) HIN(U)<br>HIN1<br>(8) HIN(V)<br>HIN2<br>(9) HIN(W) LO 1<br>HIN3<br>NU (20)<br>(10) LIN(U)<br>LIN1<br>(11) LIN(V)<br>LIN2<br>(12) LIN(W) LO 2<br>LIN 3<br>(13) VDD NV (19)<br>VDD<br>(14) RFE<br>RFE<br>(15) ITRIP LO 3<br>ITRIP<br>(16) VSS NW (18)<br>VSS<br>(17) VTH<br>**----- End of picture text -----**<br>


**Figure 1 Internal electrical schematic** 

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**CIPOS™ Maxi IPM IM12B10CC1, 1200 V 10 A** 

## **Pin description** 

## **2 Pin description** 

## **2.1 Pin assignment** 

**==> picture [347 x 321] intentionally omitted <==**

**----- Start of picture text -----**<br>
Bottom view<br>(1) VS(U) (24) P<br>(2) VB(U) <6 Lr oO<br>5 ©<br>(3) VS(V)<br>(23) U<br>(4) VB(V)<br>, ‘a BE:<br>)<br>(5) VS(W)<br>(6) VB(W) =: (22) V<br>—<br>J<br>(7) HIN(U)<br>(8) HIN(V)<br>(21) W<br>(9) HIN(W)<br>(10) LIN(U)<br>(11) LIN(V)<br>(12) LIN(W) °<br>(13) VDD [r— : (20) NU<br>(14) RFE<br>(15) ITRIP a @ me: (19) NV<br>(16) VSS<br>(18) NW<br>(17) VTH<br>eo f/f \ of<br>**----- End of picture text -----**<br>


**Figure 2 Pin configuration** 

**Table 2 Pin assignment** 

|**Pin number**<br>~~||~~|**Pin name**<br>~~||~~|**Pin description**|
|---|---|---|
|1<br>~~||~~<br>~~|~~|VS(U)<br>~~||~~<br>~~|~~|U-phase high-side floatingIC supplyoffset voltage|
|2<br>~~|~~<br>~~|~~<br>~~|~~|VB(U)<br>~~|~~<br>~~|~~<br>~~|~~|U-phase high-side floatingIC supplyvoltage|
|3<br>~~|~~<br>~~|~~<br>~~PF~~|VS(V)<br>~~|~~<br>~~|~~<br>~~PF~~|V-phase high-side floatingIC supplyoffset voltage|
|4<br>~~|~~<br>~~PF~~|VB(V)<br>~~|~~<br>~~PF~~|V-phase high-side floatingIC supplyvoltage|
|5<br>~~PF~~<br>~~|~~|VS(W)<br>~~PFP|~~<br>~~|~~|W-phase high-side floatingIC supplyoffset voltage|
|6<br>~~|~~<br>~~|~~|VB(W)<br>~~|~~<br>~~|~~|W-phase high-side floatingIC supplyvoltage|
|7<br>~~|~~<br>~~||~~|HIN(U)<br>~~|~~<br>~~||~~|U-phase high-sidegate driver input|
|8<br>~~||~~<br>~~PF~~|HIN(V)<br>~~||~~<br>~~PF~~|V-phase high-sidegate driver input|
|9<br>~~|~~<br>~~PF~~|HIN(W)<br>~~|~~<br>~~PF~~|W-phase high-sidegate driver input|
|10<br>~~PF~~<br>~~|~~|LIN(U)<br>~~PFP|~~<br>~~|~~|U-phase low-sidegate driver input|
|11<br>~~|~~<br>~~|~~|LIN(V)<br>~~|~~<br>~~|~~|V-phase low-sidegate driver input|
|12<br>~~|~~<br>~~|~~<br>~~|~~|LIN(W)<br>~~|~~<br>~~|~~<br>~~|~~|W-phase low-sidegate driver input|
|13<br>~~|~~<br>~~|~~|VDD<br>~~|~~<br>~~|~~|Low-side control supply|



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## **Pin description** 

|**Pin description**|||
|---|---|---|
|**Pin number**|**Pin name**|**Pin description**|
|14|RFE|Programmable fault clear time,fault output,enable input|
|15|ITRIP|Overcurrent shutdown input|
|16|VSS|Low-side control negative supply|
|17|VTH|Temperature output|
|18|NW|W-phase low-side emitter|
|19|NV|V-phase low-side emitter|
|20|NU|U-phase low-side emitter|
|21|W|Motor W-phase output|
|22|V|Motor V-phase output|
|23|U|Motor U-phase output|
|24|P|Positive bus input voltage|



## **2.2 Pin description** 

## **HIN (U, V, W) and LIN (U, V, W) (High-side pins, Pin 7 – 9 and Low-side pins, Pin 10 - 12)** 

These pins are positive logic, and they are responsible for the control of the integrated IGBTs. The Schmitt-trigger input thresholds of them are such to guarantee LSTTL and CMOS compatibility down to 3.3 V controller outputs. Pull-down resistor of about 5 kΩ is internally provided to pre-bias inputs during supply start-up. Input Schmitt-trigger and noise filter provide beneficial noise rejection to short input pulses. 

The noise filter suppresses control pulses which are below the filter time tFIL, IN The filter acts according to Figure 4. It is not recommended for proper work to provide input pulse-width lower than 1 µs. 

**==> picture [238 x 185] intentionally omitted <==**

**----- Start of picture text -----**<br>
CIPOSTM<br>Schmitt-Trigger<br>HINx INPUT NOISE<br>LINx FILTER<br>   5 kΩ<br>SWITCH LEVEL<br>VSS VIH; VIL<br>Figure 3 Input pin structure<br>a) tFIL,IN b) tFIL,IN<br>HIN HIN<br>LIN LIN<br>high<br>HO HO<br>LO low LO<br>**----- End of picture text -----**<br>


**Figure 4 Input filter timing diagram** 

The integrated gate driver provides additionally a shoot through prevention capability which avoids the simultaneous on-state of two gate drivers of the same leg (i.e., HO1 and LO1, HO2 and LO2, HO3 and LO3). When two inputs of a same leg are activated, only former activated one is activated so that the leg is kept steadily in a safe state. 

A minimum deadtime insertion of typically 360 ns is also provided by driver IC, in order to reduce crossconduction of the external power switches. 

## **RFE (Fault / Fault-clear time / Enable, Pin 14)** 

The RFE pin combines three functions in one pin: programmable fault clear time by RC network, fault out and enable input. 

The programmable fault-clear time can be adjusted by RC network, which is external pull-up resistor and capacitor. For example, typical value is about 1 ms at 1 MΩ and 2 nF. The fault-out indicates a module failure in case of undervoltage at pin VDD or in case of triggered overcurrent detection at ITRIP. The microcontroller can pull this pin low to disable the IPM functionality. This is enabling function. 

**==> picture [238 x 109] intentionally omitted <==**

**----- Start of picture text -----**<br>
Bi-direction CIPOS [TM]<br>Schmitt-Trigger<br>NOISE FILTER<br>RFE<br>   1 From ITRIP - Latch<br>VSS RON,FLT From UV detection<br>Figure 5 Internal circuit at pin RFE<br>**----- End of picture text -----**<br>


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## **Pin description** 

## **VTH (Thermistor temperature output, Pin 17)** 

The VTH pin provides direct access to the NTC thermistor, which is referenced to VSS. An external pull-up resistor connected to +5 V ensures that the resulting voltage can be directly connected to the microcontroller. 

## **ITRIP (Over-current detection function, Pin 15)** 

The IM12B10CC1 product provides an overcurrent detection function by connecting the ITRIP input with the IGBT current feedback. The ITRIP comparator threshold (typical 0.5 V) is referenced to VSS ground. An input noise filter (tITRIP = typ. 500 ns) prevents the driver to detect false overcurrent events. 

Overcurrent detection generates a shutdown of outputs of the gate driver. After the shutdown propagation delay of typically 1 µs. The fault-clear time is set to typical 1.1 ms at RRCIN = 1 MΩ and CRCIN = 2 nF. 

## **VDD, VSS (Control supply and reference, Pin 13 and reference, Pin 16)** 

VDD is the control supply and it provides power both to input logic and to output power stage. Input logic is referenced to VSS ground. 

The undervoltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 12.2 V is present. 

The IC shuts down all the gate drivers power outputs, when the VDD supply voltage is below VDDUV- = 11.2 V. This prevents the external power switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation. 

## **VB (U, V, W) and VS (U, V, W) (High-side supplies, Pin 1 - 6)** 

VB to VS is the high-side supply voltage. The high-side circuit can float with respect to VSS following the external high-side power device emitter voltage. 

Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. 

The undervoltage detection operates with a rising supply threshold of typical VBSUV+ = 11.2 V and a falling threshold of VBSUV- = 10.2 V. 

VS (U, V, W) provide a high robustness against negative voltage in respect of VSS of -50 V transiently. This ensures very stable designs even under rough conditions. 

## **NW, NV, NU (Low-side emitter, Pin 18 - 20)** 

The low-side emitters are available for current measurements of each phase leg. It is recommended to keep the connection to pin VSS as short as possible in order to avoid unnecessary inductive voltage drops. 

## **W, V, U (High-side emitter and low-side collector, Pin 21 - 23)** 

These pins are connected to motor U, V, W input pins. 

## **P (Positive bus input voltage, Pin 24)** 

The high-side IGBTs are connected to the bus voltage. It is noted that the bus voltage does not exceed 900 V. 

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## **Absolute maximum ratings** 

## **3 Absolute maximum ratings** 

(VDD = 15 V and TJ = 25°C, if not stated otherwise) 

## **3.1 Module section** 

|**3.1**<br>**Module section**|||||
|---|---|---|---|---|
|**Description**|**Symbol**|**Condition**|**Value**|**Unit**|
|Storage temperature range|TSTG||-40 ~ 125|°C|
|Operatingcase temperature|TC|Refer to Figure 7|-40 ~ 125|°C|
|Operating junction temperature|TJ||-40 ~ 150|°C|
|Isolation voltage|VISO|1 min,RMS,f = 60 Hz|2500|V|



## **3.2 Inverter section** 

|**3.2**<br>**Inverter section**|||||
|---|---|---|---|---|
|**Description**|**Symbol**|**Condition**|**Value**|**Unit**|
|Maximum blockingvoltage|VCES/VRRM|IC= 250µA|1200|V|
|DC link supplyvoltage of P - N|VPN|Applied between P - N|900|V|
|DC link supplyvoltage(surge)of P - N|VPN(Surge)|Applied between P - N|1000|V|
|Collector current1|IC|TC= 25°C,TJ< 150°C|±16|A|
|||TC= 80°C,TJ< 150°C|±10||
|Maximum peak collector current|ICP|TC= 25°C, TJ< 150°C, limited by<br>TJmax.|±20|A|
|Power dissipationper IGBT|Ptot||55|W|
|Short circuit withstand time|tSC|VDD= 15 V, VDC≤ 800 V, TJ≤<br>150°C|5|µs|



## **3.3 Control section** 

|**3.3**<br>**Control section**|||||
|---|---|---|---|---|
|**Description**|**Symbol**|**Condition**|**Value**|**Unit**|
|High-side offset voltage|VS||1200|V|
|Repetitive peak reverse voltage of<br>bootstrapdiode|VRRM||1200|V|
|Module control supplyvoltage|VDD|Applied between VDD- VSS|-1 ~ 20|V|
|High-side floating supply voltage<br>(VBreference to VS)|VBS|Applied between VB- VS|-1 ~ 20|V|
|Input voltage(LIN,HIN,ITRIP,RFE)|VIN||-1 ~ VDD+ 0.3|V|



1Limited by junction temperature. 

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## **CIPOS™ Maxi IPM IM12B10CC1, 1200 V 10 A Thermal characteristics** 

**==> picture [103 x 46] intentionally omitted <==**

## **4 Thermal characteristics** 

|**Description**|**Symbol**|**Condition**||**Value**||**Unit**|
|---|---|---|---|---|---|---|
||||**Min.**|**Typ. **|**Max.**||
|Single IGBT thermal<br>resistance, junction-case|RthJC|High-side V-phase<br>(See Figure 7 for TC<br>measurement point)|-|-|2.25|K/W|
|Single diode thermal<br>resistance, junction-case|RthJC, D||-|-|2.80|K/W|



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## **Recommended operation conditions** 

## **5 Recommended operation conditions** 

All voltages are absolute voltages referenced to VSS-potential unless otherwise specified. 

|**Description**|**Symbol**||**Value**||**Unit**|
|---|---|---|---|---|---|
|||**Min.**|**Typ. **|**Max.**||
|DC link supplyvoltage of P - N|VPN|350|600|800|V|
|Low-side supplyvoltage|VDD|13.5|15|18.5|V|
|High-side floatingsupplyvoltage(VBvs. VS)|VBS|12.5|-|18.5|V|
|Logic input voltages LIN, HIN, ITRIP, RFE|VIN<br>VITRIP<br>VRFE|0|-|5|V|
|Inverter PWM carrier frequency|fPWM|-|-|20|kHz|
|External dead time between HIN& LIN|DT|0.5|-|-|µs|
|Voltage between VSS- N(includingsurge)|VCOMP|-5|-|5|V|
|Minimum input pulse width|PWIN(ON),<br>PWIN(OFF)|1|-|-|µs|
|Control supply variation|ΔVBS<br>ΔVDD|-1<br>-1|-<br>-|1<br>1|V/µs|



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**CIPOS™ Maxi IPM IM12B10CC1, 1200 V 10 A Static parameters** 

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## **6 Static parameters** 

(VDD = 15 V and TJ = 25°C, if not stated otherwise) 

## **6.1 Inverter section** 

|**6.1**<br>**Inverter section**|||||||
|---|---|---|---|---|---|---|
|**Description**|**Symbol**|**Condition**||**Value**||**Unit**|
||||**Min.**|**Typ. **|**Max.**||
|Collector-emitter saturation voltage|VCE(Sat)|IC= 10 A, TJ= 25°C<br>IC= 10 A,TJ= 150°C|-<br>-|1.90<br>2.30|2.30<br>-|V|
|Collector-emitter leakage current|ICES|VCE= 1200 V|-|-|1|mA|
|Diode forward voltage|VF|IF= 10 A, TJ= 25°C<br>IF= 10 A,TJ= 150°C|-<br>-|1.85<br>1.80|2.20<br>-|V|



## **6.2 Control section** 

|**6.2**<br>**Control section**|||||||
|---|---|---|---|---|---|---|
|**Description**|**Symbol**|**Condition**||**Value**||**Unit**|
||||**Min.**|**Typ. **|**Max.**||
|Logic "1" input voltage(LIN,HIN)|VIH||-|1.9|2.3|V|
|Logic "0" input voltage(LIN,HIN)|VIL||0.7|0.9|-|V|
|ITRIP positivegoingthreshold|VIT, TH+||475|500|525|mV|
|ITRIPinput hysteresis|VIT, HYS||-|55|-|mV|
|VDDand VBSsupply undervoltage<br>positive going threshold|VDDUV+||11.5|12.2|13.0|V|
||VBSUV+||10.5|11.2|12.0||
|VDDand VBSsupply undervoltage<br>negative going threshold|VDDUV-||10.5|11.2|12.0|V|
||VBSUV-||9.5|10.2|11.0||
|VDDand VBSsupply undervoltage<br>lockout hysteresis|VDDUVH,<br>VBSUVH||-|1.0|-|V|
|Quiescent VBSxsupply current<br>(VBSxonly)|IQBS|VHIN= 0 V|-|175|-|µA|
|Quiescent VDDsupply current<br>(VDDonly)|IQDD|VLIN= 0 V, VHINX= 5 V|-|1.0|-|mA|
|Input bias current for LIN,HIN|IIN+|VIN= 5 V|-|1.0|-|mA|
|Input bias current for ITRIP|IITRIP+|VITRIP= 5 V|-|30|100|µA|
|Input bias current for RFE|IRFE|VRFE= 5 V,VITRIP= 0 V|-|-|5|µA|
|RFE output voltage|VRFE|IRFE= 10 mA,VITRIP= 1 V|-|0.4|-|V|
|VRFE positivegoingthreshold|VRFE, TH+||-|1.9|2.3|V|
|VRFEnegativegoingthreshold|VRFE, TH-||0.7|0.9|-|V|
|Bootstrapdiode forward voltage|VF, BSD|IF= 0.3 mA|-|0.9|-|V|
|Bootstrap diode resistance|RBSD|Between VF= 4 V and<br>VF= 5 V|-|120|-|Ω|



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## **Dynamic parameters** 

## **7 Dynamic parameters** 

(VDD = 15 V and TJ = 25°C, if not stated otherwise) 

## **7.1 Inverter section** 

|**Description**|**Symbol**|**Condition**||**Value**||**Unit**|
|---|---|---|---|---|---|---|
||||**Min.**|**Typ. **|**Max.**||
|Turn-onpropagation delaytime|ton|VLIN, HIN= 5 V,<br>IC= 10 A,<br>VDC= 600 V|-|755|-|ns|
|Turn-on rise time|tr||-|25|-|ns|
|Turn-on switchingtime|tc(on)||-|155|-|ns|
|Reverse recoverytime|trr||-|190|-|ns|
|Turn-offpropagation delaytime|toff|VLIN, HIN= 0 V,<br>IC= 10 A,<br>VDC= 600 V|-|950|-|ns|
|Turn-off fall time|tf||-|135|-|ns|
|Turn-off switchingtime|tc(off)||-|195|-|ns|
|Short circuit propagation delay<br>time|tSCP|From VIT, TH+to 10% ISC|-|1110|-|ns|
|IGBT turn-on energy (includes<br>reverse recovery of diode)|Eon|VDC= 600 V, IC= 10 A<br>TJ= 25°C<br>150°C|-<br>-|0.86<br>1.43|-<br>-|mJ|
|IGBT turn-off energy|Eoff|VDC= 600 V, IC= 10 A<br>TJ= 25°C<br>150°C|-<br>-|0.48<br>0.81|-<br>-|mJ|
|Diode recovery energy|Erec|VDC= 600 V, IC= 10 A<br>TJ= 25°C<br>150°C|-<br>-|0.25<br>0.57|-<br>-|mJ|



## **7.2 Control section** 

|**Description**|**Symbol**|**Condition**||**Value**||**Unit**|
|---|---|---|---|---|---|---|
||||**Min.**|**Typ. **|**Max.**||
|Input filter time ITRIP|tITRIP|VITRIP= 1 V|-|500|-|ns|
|Input filter time at LIN, HINfor turn<br>on and off|tFIL, IN|VLIN, HIN= 0 V or 5 V|-|350|-|ns|
|Fault clear time after ITRIP-fault|tFLT, CLR|VITRIP= 1 V,<br>Vpull-up= 5 V<br>(R = 1 MΩ,C = 2 nF)|-|1.1|-|ms|
|ITRIPto fault propagation delay|tFLT|VLIN, HIN= 0 or 5 V,<br>VITRIP= 1 V|-|650|900|ns|
|Internal deadtime|DTIC|VIN= 0 V or VIN= 5 V|300|-|-|ns|
|Matching propagation delay time<br>(On & Off)all channels|MT|External dead time<br>> 500 ns|-|-|130|ns|



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**CIPOS™ Maxi IPM IM12B10CC1, 1200 V 10 A Thermistor characteristics** 

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## **8 Thermistor characteristics** 

||||||||**Value**|||
|---|---|---|---|---|---|---|---|---|---|
||**Description**|**Symbol**|||**Condition**|**Min.**|**Typ. **|**Max.**|**Unit**|
|||||||||||
|Resistance||RNTC|||TNTC= 25°C|-|85|-|kΩ|
|B-constant of NTC (Negative<br>Temperature Coefficient)thermistor||B (25/100)||||-|4092|-|K|



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**----- Start of picture text -----**<br>
3500 35  Min. Temp. [°C]  RMin. [kΩ]  RTyp. [kΩ]  RMax. [kΩ]<br> Min.<br>3000 30  Typ. Typ. 50  29.151  30.157  31.178<br>25  M  Max.ax.<br>60  20.018  20.669  21.329<br>2500 20<br>15 70  13.994  14.424  14.858<br>2000<br>10 80  9.946  10.234  10.523<br>5<br>1500 90  7.177  7.373  7.569<br>0<br>1000 50 60 70 80 90 100 110 120 130 100  5.253  5.388  5.523<br>Thermistor temperature [°C]<br>110  3.884  3.99  4.096<br>500<br>120  2.908  2.991  3.075<br>0<br>-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 125  2.527  2.601  2.676<br>Thermistor temperature [°C]<br>Thermistor resistance [kΩ]<br>Thermistor resistance [kΩ]<br>**----- End of picture text -----**<br>


**Figure 6 Thermistor resistance – temperature curve and table** 

**(For more information, please refer to application note ‘AN-2024-05 CIPOS[TM] Maxi IPM IM12BxxxC1 Series application note’.)** 

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**Mechanical characteristics and ratings** 

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## **9 Mechanical characteristics and ratings** 

|**Description**|**Condition**||**Value**||**Unit**|
|---|---|---|---|---|---|
|||**Min.**|**Typ. **|**Max.**||
|Comparative Tracking Index (CTI)||600|-|-||
|Mounting torque|M3 screw and washer|0.49|-|0.78|N∙m|
|Backside curvature|Refer to Figure 8|0|-|150|µm|
|Weight||-|7.1|-|g|



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## **Qualification information** 

## **10 Qualification information** 

|**UL certification**|File number: E314539||
|---|---|---|
|**Moisture sensitivity level**|-||
|**RoHS compliant**|Yes(Lead-free terminalplating)||
|**ESD (Electrostatic Discharge)**|HBM(Human bodymodel)class|2|
||CDM(Charged device model)class|C3|



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## **Diagrams and tables** 

## **11 Diagrams and tables** 

## **11.1 TC measurement point** 

**Figure 7 TC measurement point[1]** 

## **11.2 Backside curvature measurement point** 

**Figure 8 Backside curvature measurement position** 

1Any measurement except for the specified point in Figure 7 is not relevant for the temperature verification and brings wrong or different information. 

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**----- Start of picture text -----**<br>
CIPOS™ Maxi IPM<br>a IM12B10CC1, 1200 V 10 A<br>Diagrams and tables<br>11.3 Switching time definition<br> HINx<br>2.1V<br>LINx<br>0.9V<br>trr<br>toff ton<br>10%<br>iCx<br>90% 90%<br>tf tr<br>10%<br>10% 10% 10%<br>v CEx<br>tc(off) tc(on)<br>**----- End of picture text -----**<br>


**Figure 9 Switching times definition** 

## **11.4 Sleep function timing diagram** 

**==> picture [17 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
HINx<br>LINx<br>HOx<br>LOx<br>ITRIP<br>VDD<br>RFE<br>VBS<br>**----- End of picture text -----**<br>


**Figure 10 Sleep function timing diagram** 

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## **Application guide** 

## **12 Application guide** 

## **12.1 Typical application schematic** 

**==> picture [497 x 357] intentionally omitted <==**

**----- Start of picture text -----**<br>
P (24)<br>(1) VS(U)<br>(2) VB(U) VB 1 HO 1<br>U (23)<br>RBS1 VS 1<br>(3) VS(V)<br>#4 (4) VB(V) VB 2 HO 2<br>(5) VS(W) RBS2 VS 2 V (22) 3-ph AMotor C<br>(6) VB(W) VB 3 HO 3<br>W (21)<br>RBS3 VS 3<br>#1 #5<br>(7) HIN(U) HIN1<br>(8) HIN(V)<br>HIN2<br>(9) HIN(W) LO 1<br>HIN3<br>Micro (10) LIN(U) LIN1 NU (20)<br>Controller (11) LIN(V) LIN2<br>(12) LIN(W) LIN3 LO 2 #6 #7<br>(13) VDD NV (19)<br>#3.2 #3.1 VDD line VDD Power<br>(14) RFE RFE GND line<br>#2 (15) ITRIP ITRIP LO 3<br>5.0 V or 3.3 V line<br>(16) VSS VSS NW (18)<br>(17) VTH<br>5.0 V or 3.3 V line<br>U-phase current sensing<br>Temperature monitor<br>V-phase current sensing<br>W-phase current sensing<br><Signal for protection> <Signal for protection><br>GND line Control<br>**----- End of picture text -----**<br>


## **Figure 11 Typical application circuit** 

1. Input circuit 

   - To reduce input signal noise by high speed switching, the RIN and CIN filter circuit should be mounted. (100 Ω, 1 nF) 

   - - CIN should be placed as close to VSS pin as possible. 

2. ITRIP circuit 

   - To prevent protection function errors, CITRIP should be placed as close to ITRIP and VSS pins as possible. 

   - To prevent fault operation of the protection function, an RC filter is recommended around 1.5~2.0 µs (68 Ω, 22 nF, “Signal for protection” in the schematic leads the signal into the microcontroller”). 

3. RFE circuit 

   - 3.1 Pull-up resistor and pull-down capacitor 

   - RFE output is an open drain output. This signal line should be pulled up to the positive side of the 5.0 V/3.3 V logic power supply with a proper resistor RPU. 

   - The fault-clear time is adjusted by RC network of a pull-up resistor, a pull-down capacitor and pull-up voltage. 

      - tFLT, CLR = -Rpull-up ∙ Cpull-down ∙ ln(1 - VRFE,TH+ / Vpull-up) + internal fault-clear time 160  s 

      - tFLT, CLR = -1 MΩ x 2 nF x ln(1 - 1.9 / 5 V) + 160  s  1.1 ms at R = 1 MΩ, C = 2 nF and Vpull-up = 5 V 

      - A pull-up resistor is limited to max. 2 MΩ 

   - 3.2 RC filter 

   - It is recommended that RC filter be placed as close to the controller as possible. 

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## **Application guide** 

4. VB-VS circuit 

   - Capacitor for high side floating supply voltage should be placed as close to VB and VS pins as possible. 

5. Snubber capacitor 

   - The wiring between IPM and snubber capacitor including shunt resistor should be as short as possible. 

6. Shunt resistor 

   - The shunt resistor of SMD type should be used for reducing its stray inductance. 

7. Ground pattern 

   - Ground pattern should be separated at only one point of shunt resistor as short as possible. 

## **12.2 Performance chart** 

**Figure 12 Maximum operating current SOA[1]** 

1This maximum operating current SOA is just one of example based on typical characteristics for this product. It can be changed by each user’s actual operating conditions. 

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**CIPOS™ Maxi IPM IM12B10CC1, 1200 V 10 A Package outline** 

## **13 Package outline** 

**Figure 13 IM12B10CC1** 

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## **CIPOS™ Maxi IPM IM12B10CC1, 1200 V 10 A Revision history** 

**==> picture [103 x 46] intentionally omitted <==**

## **Revision history** 

|**Document**<br>**version**|**Date of release**|**Description of changes**|
|---|---|---|
|V 1.00|2024-05-15|Initial release|
|V 1.01|2024-06-03|Changed Figure 10|
||||
||||



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## **Trademarks** 

All referenced product or service names and trademarks are the property of their respective owners. 

## **IMPORTANT NOTICE** 

**Edition 2024-06-03** The information given in this document shall in no event be regarded as a guarantee of conditions or **Published by** characteristics (“Beschaffenheitsgarantie”). **Infineon Technologies AG** With respect to any examples, hints or any typical **81726 München, Germany** values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all **©  2024 Infineon Technologies AG.** warranties and liabilities of any kind, including without limitation warranties of non-infringement of **All Rights Reserved.** intellectual property rights of any third party. 

**Do you have a question about this** In addition, any information given in this document **document?** is subject to customer’s compliance with its obligations stated in this document and any **Email: erratum@infineon.com** applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s **Document reference** applications. **ifx1** 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( **www.infineon.com** ). 

Please note that this product is not qualified according to the AEC Q100 or AEC Q101 documents of the Automotive Electronics Council. 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 



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