# Intelligent Power Module (IPM), 3-Phase, IGBT, 600 V, 10 A, 2 kV, PowerDIP, CIPOS

![Product image](https://novapart.co/image/farnell:2787859/)

**URL**: https://novapart.co/products/IFCM10S60GDXKMA1/intelligent-power-module-ipm-3-phase-igbt-600-v-10
**SKU**: IFCM10S60GDXKMA1
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || Intelligent Power Modules
**Price**: €7.9800
**Stock**: 25+
**Lead Time**: 204 days (indicative)

## Description

IPM Power Device:IGBT; Voltage Rating (Vces / Vdss):600V; Current Rating (Ic / Id):10A; Isolation Voltage:2kV; IPM Case Style:PowerDIP; IPM Series:CIPOS; Product Range:CIPOS Mini Se

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| Ipm Series | CIPOS |
| Product Range | CIPOS Mini |
| Ipm Case Style | PowerDIP |
| Ipm Power Device | IGBT |
| Isolation Voltage | 2kV |
| Current Rating (Ic / Id) | 10A |
| Voltage Rating (Vces / Vdss) | 600V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2787859/)

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## Control Integrated POwer System (CIPOS™) 

## IFCM10S60GD 

## Datasheet 

Please read the Important Notice and Warnings at the end of this document page 1 of 18 

Datasheet www.infineon.com 

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Control Integrated POwer System (CIPOS™) IFCM10S60GD 

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## Table of contents 

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**----- Start of picture text -----**<br>
|||
|---|---|
|Table of contents ................................................................................................................................................... 2|
|CIPOS™ Control Integrated POwer System ............................................................................................................ 3|
|Features|.................................................................................................................................................................. 3|
|Target Applications ...................................................................................................................................................... 3|
|Description  .................................................................................................................................................................. 3|
|System Configuration .................................................................................................................................................. 3|
|Pin Configuration ................................................................................................................................................... 4|
|Internal Electrical Schematic ................................................................................................................................. 4|
|Pin Assignment ...................................................................................................................................................... 5|
|Pin Description ...................................................................................................................................................... 5|
|HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12) ............................................................ 5|
|VFO (Fault-output and NTC, Pin 14) ............................................................................................................................ 6|
|ITRIP (Over current detection function, Pin 15) .......................................................................................................... 6|
|VDD, VSS (Low side control supply and reference, Pin 13, 16) ................................................................................... 6|
|VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1 - 6) ............................................................................................. 6|
|N (Low side emitter, Pin 17) ......................................................................................................................................... 6|
|W, V, U (High side emitter and low side collector, Pin 18 - 20) ................................................................................... 6|
|P (Positive bus input voltage, Pin 21) .......................................................................................................................... 6|
|X, NX, GX (Single boost PFC, Pins 22-24) ..................................................................................................................... 6|
|Absolute Maximum Ratings ................................................................................................................................... 7|
|Module Section ............................................................................................................................................................ 7|
|Inverter Section............................................................................................................................................................ 7|
|Control Section ............................................................................................................................................................ 7|
|PFC Section  .................................................................................................................................................................. 8|
|Recommended Operation Conditions ................................................................................................................... 8|
|Static Parameters .................................................................................................................................................. 9|
|Inverter Section............................................................................................................................................................ 9|
|PFC Section  ................................................................................................................................................................ 10|
|Bootstrap Parameters ......................................................................................................................................... 10|
|Dynamic Parameters ........................................................................................................................................... 11|
|Inverter Section.......................................................................................................................................................... 11|
|PFC Section  ................................................................................................................................................................ 12|
|Thermistor ........................................................................................................................................................... 13|
|Mechanical Characteristics and Ratings .............................................................................................................. 13|
|Circuit of a Typical Application ............................................................................................................................ 14|
|Switching Times Definition .................................................................................................................................. 15|
|Package Outline ................................................................................................................................................... 16|
|Revision history ................................................................................................................................................... 17|

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Control Integrated POwer System (CIPOS™) IFCM10S60GD 

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## CIPOS ™ 

## C ontrol I ntegrated PO wer S ystem 

_Dual In-Line PFC integrated Intelligent Power Module 3 ɸ -bridge 600V/10A, Single phase PFC 650V/30A_ 

## Features 

Package 

- Dual In-Line molded module 

- Lead-free terminal plating; RoHS compliant 

- Very low thermal resistance due to DCB 

## Inverter 

- ™ 

- TRENCHSTOP IGBT3 

- Rugged SOI gate driver technology with stability against transient and negative voltage 

- Allowable negative VS potential up to -11V for signal transmission at VBS=15V 

- Integrated bootstrap functionality 

- Over current shutdown 

- Temperature monitor 

## Description 

The CIPOS ™ module family offers the chance for integrating various power and control components to increase reliability, optimize PCB size and system costs. 

It is designed to control three phase AC motors and permanent magnet motors with single phase PFC in variable speed drives for applications like an air conditioning and low power motor drives. The package concept is specially adapted to power applications, which need good thermal conduction and electrical isolation, but also EMI-save control and overload protection. 

TRENCHSTOP ™ IGBT3 and anti-parallel diodes are combined with an optimized SOI gate driver for excellent electrical performance. 

- Under-voltage lockout at all channels 

- Low side common emitter 

- Cross-conduction prevention 

- All of 6 switches turn off during protection 

## System Configuration 

- 3 half bridges with TRENCHSTOP ™ IGBT3 and anti parallel diodes 

PFC 

- ™ 

- TRENCHSTOP IGBT3 

- Rapid switching emitter controlled diode 

- 3 ɸ SOI gate driver 

- Single phase PFC with TRENCHSTOP ™ IGBT3 and Rapid switching emitter controlled diode 

- Thermistor 

## Target Applications 

   - Pin-to-heatsink clearance distance typ. 1.6mm 

- Home appliances 

- Low power motor drives 

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Control Integrated POwer System (CIPOS™) IFCM10S60GD 

## Pin Configuration 

## Bottom View 

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(24) GX<br>(1) VS(U)<br>(2) VB(U)<br>(23) NX<br>(3) VS(V)<br>(4) VB(V)<br>(22) X<br>(5) VS(W)<br>(6) VB(W)<br>(21) P<br>(7) HIN(U)<br>(8) HIN(V) (20) U<br>(9) HIN(W)<br>(10) LIN(U)<br>(11) LIN(V) (19) V<br>(12) LIN(W)<br>(13) VDD<br>(14) VFO (18) W<br>(15) ITRIP<br>(16) VSS<br>(17) N<br>**----- End of picture text -----**<br>


Figure 1 Pin configuration 

## Internal Electrical Schematic 

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GX (24)<br>NX (23)<br>(1) VS(U)<br>(2) VB(U) VB1<br>RBS1 X (22)<br>HO1<br>(3) VS(V)<br>VS1<br>(4) VB(V) VB2<br>ke RBS2 HO 2 P (21)<br>(5) VS(W) VS2<br>(6) VB(W) VB3<br>P| RBS3 HO3 BSE} U (20)<br>VS3<br>(7) HIN(U) HIN1 LO1<br>(8) HIN(V) Sy HIN2 Beh<br>V (19)<br>(9) HIN(W) HIN3<br>(10) LIN(U) — LIN1 aL<br>(11) LIN(V) LIN2 LO2<br>(12) LIN(W) LIN3<br>W (18)<br>(13) VDD =i VDD n eae<br>(14) VFO VFO<br>LO3<br>(15) ITRIP ITRIP<br>(16) VSS VSS N (17)<br>SS aL]<br>Thermistor<br>**----- End of picture text -----**<br>


Figure 2 Internal schematic 

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## Pin Assignment 

|Pin Number|Pin Name|Pin Description|
|---|---|---|
|1|VS(U)|U-phase high side floating IC supply offset voltage|
|2|VB(U)|U-phase high side floating IC supply voltage|
|3|VS(V)|V-phase high side floating IC supply offset voltage|
|4|VB(V)|V-phase high side floating IC supply voltage|
|5|VS(W)|W-phase high side floating IC supply offset voltage|
|6|VB(W)|W-phase high side floating IC supply voltage|
|7|HIN(U)|U-phase high side gate driver input|
|8|HIN(V)|V-phase high side gate driver input|
|9|HIN(W)|W-phase high side gate driver input|
|10|LIN(U)|U-phase low side gate driver input|
|11|LIN(V)|V-phase low side gate driver input|
|12|LIN(W)|W-phase low side gate driver input|
|13|VDD|Low side control supply|
|14|VFO|Fault output / Temperature monitor|
|15|ITRIP|Over current shutdown input|
|16|VSS|Low side control negative supply|
|17|N|Low side emitter|
|18|W|Motor W-phase output|
|19|V|Motor V-phase output|
|20|U|Motor U-phase output|
|21|P|Positive output voltage / Positive bus input voltage|
|22|X|PFC IGBT collector|
|23|NX|PFC IGBT emitter|
|24|GX|PFC IGBT gate|



## Pin Description 

HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12) 

These pins are positive logic and they are responsible for the control of the integrated IGBT. The Schmitt-trigger input thresholds of them are such to guarantee LSTTL and CMOS compatibility down to 3.3V controller outputs. Pull-down resistor of about 5k  is internally provided to pre-bias inputs during supply start-up and a zener clamp is provided for pin protection purposes. Input Schmitt-trigger and noise filter provide beneficial noise rejection to short input pulses. 

The noise filter suppresses control pulses which are below the filter time _t_ FILIN. The filter acts according to Figure 4. 

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**----- Start of picture text -----**<br>
CIPOS<br>Schmitt-Trigger<br>HINx INPUT NOISE<br>LINx FILTER<br> 5 k  UZ=10.5V<br>SWITCH LEVEL<br>VSS VIH; VIL<br>Figure 3 Input pin structure<br>a) t FILIN b) t FILIN<br>HIN HIN<br>LIN LIN<br>high<br>HO HO<br>LO low LO<br>Figure 4 Input filter timing diagram<br>**----- End of picture text -----**<br>


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## Control Integrated POwer System (CIPOS™) IFCM10S60GD 

It is recommended for proper work of this product not to provide input pulse-width lower than 1us. 

The integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on-state of two gate drivers of the same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and LO3). When two inputs of a same leg are activated, only former activated one is activated so that the leg is kept steadily in a safe state. 

A minimum deadtime insertion of typically 380ns is also provided by driver IC, in order to reduce crossconduction of the external power switches. 

## VFO (Fault-output and NTC, Pin 14) 

The VFO pin indicates a module failure in case of under voltage at pin VDD or in case of triggered over current detection at ITRIP. A pull-up resistor is externally required to bias the NTC. 

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**----- Start of picture text -----**<br>
VDD CIPOS<br>RON,FLT From ITRIP - Latch<br>VFO<br>   1<br>VSS From UV detection<br>Thermistor<br>**----- End of picture text -----**<br>


Figure 5 Internal circuit at pin VFO 

The same pin provides direct access to the NTC, which is referenced to VSS. An external pull-up resistor connected to +5V ensures that the resulting voltage can be directly connected to the microcontroller. 

## ITRIP (Over current detection function, Pin 15) 

CIPOS ™ provides an over current detection function by connecting the ITRIP input with the motor current feedback. The ITRIP comparator threshold (typ. 0.47V) is referenced to VSS ground. An input noise filter (typ: _t_ ITRIPMIN = 530ns) prevents the driver to detect false over-current events. 

Over current detection generates a shut down of all outputs of the gate driver after the shutdown propagation delay of typically 1000ns. 

VDD, VSS (Low side control supply and reference, Pin 13, 16) 

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The under-voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of _V_ DDUV+ = 12.1V is present. 

The IC shuts down all the gate drivers’ power outputs, when the VDD supply voltage is below VDDUV- = 10.4V. This prevents the external power switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation. 

## VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1 - 6) 

VB to VS is the high side supply voltage. The high side circuit can float with respect to VSS following the external high side power device emitter voltage. 

Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. 

The under-voltage detection operates with a rising supply threshold of typical _V_ BSUV+ = 12.1V and a falling threshold of _V_ BSUV- = 10.4V. 

VS(U,V,W) provide a high robustness against negative voltage in respect of VSS of -50V transiently. This ensures very stable designs even under rough conditions. 

## N (Low side emitter, Pin 17) 

The low side emitters are available for current measurements. It is recommended to keep the connection to pin VSS as short as possible in order to avoid unnecessary inductive voltage drops. 

W, V, U (High side emitter and low side collector, Pin 18 - 20) 

These pins are motor U, V, W input pins 

## P (Positive bus input voltage, Pin 21) 

The high side IGBTs and PFC diode cathode are connected to the bus voltage. It is noted that the bus voltage does not exceed 450V. 

## X, NX, GX (Single boost PFC, Pins 22-24) 

These pins are emitter, collector and gate of IGBT for single boost PFC. 

VDD is the low side supply and it provides power both to input logic and to low side output power stage. Input logic is referenced to VSS ground. 

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## Absolute Maximum Ratings 

(VDD = 15V and TJ = 25°C, if not stated otherwise) 

## Module Section 

|Module Section||||||
|---|---|---|---|---|---|
|Description|Condition|Symbol|Value||Unit|
||||min|max||
|Storage temperature range||Tstg|-40|125|°C|
|Isolation test voltage|RMS, f = 60Hz, t =1min|VISOL|2000|-|V|
|Operating case temperature range|Refer to Figure 6|TC|-40|125|°C|



## Inverter Section 

|Inverter Section||||||
|---|---|---|---|---|---|
|Description|Condition|Symbol|Value||Unit|
||||min|max||
|Max. blocking voltage|IC= 250µA|VCES|600|-|V|
|DC link supply voltage of P-N|Applied between P-N|VPN|-|450|V|
|DC link supply voltage (surge) of P-N|Applied between P-N|VPN(surge)|-|500|V|
|Output current|TC= 25°C, TJ< 150°C|IC|-10|10|A|
|Maximum peak output current|less than 1ms|IC(peak)|-20|20|A|
|Short circuit withstand time1|VDC≤ 400V, TJ= 150°C|tSC|-|5|µs|
|Power dissipation per IGBT||Ptot|-|39.3|W|
|Operating junction temperature<br>range||TJ|-40|150|°C|
|Single IGBT thermal resistance,<br>junction-case||RthJC|-|3.18|K/W|
|Single diode thermal resistance,<br>junction-case||RthJCD|-|4.67|K/W|



## Control Section 

|Control Section||||||
|---|---|---|---|---|---|
|Description|Condition|Symbol|Value||Unit|
||||min|max||
|Module supply voltage||VDD|-1|20|V|
|High side floating supply voltage (VB vs. VS)||VBS|-1|20|V|
|Input voltage|LIN, HIN, ITRIP|VIN<br>VITRIP|-1<br>-1|10<br>10|V|
|Inverter switching frequency||fPWM|-|20|kHz|
|PFC switching frequency||fPWM(PFC)|-|40|kHz|



1 Allowed number of short circuits: <1000; time between short circuits: > 1s. 

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## PFC Section 

(VGE = 15V and TJ = 25°C, if not stated otherwise) 

|Description|Condition|Symbol|Value|Value|Unit|
|---|---|---|---|---|---|
||||min|max||
|Max. blocking voltage|IC= 250µA|VCES|650|-|V|
|Repetitive peak reverse voltage|IR= 250µA|VRRM|650|-|V|
|Gate-emitter voltage||VGE|-20|20|V|
|Input RMS current|TJ≤ 150°C, TC= 25°C|Ii|-|30|A|
|Maximum peak input current|TJ≤ 150°C, TC= 25°C<br>less than 1ms, non-<br>repetitive|Ii(peak)|-|60|A|
|Short circuit withstand time1|VDC≤ 400V, TJ= 150°C|tSC|-|5|µs|
|Power dissipation||Ptot|-|105.9|W|
|Operating junction temperature<br>range||TJ|-40|150|°C|
|Single IGBT thermal resistance,<br>junction-case||RthJC|-|1.18|K/W|
|Single diode thermal resistance,<br>junction-case||RthJCD|-|2.76|K/W|



## Recommended Operation Conditions 

All voltages are absolute voltages referenced to VSS -potential unless otherwise specified. 

|Description|Symbol||Value||Unit|
|---|---|---|---|---|---|
|||min|typ|max||
|DC link supply voltage of P-N|VPN|0|-|450|V|
|High side floating supply voltage (VBvs. VS)|VBS|13.5|-|18.5|V|
|Low side supply voltage|VDD|14.5|16|18.5|V|
|Control supply variation|ΔVBS,<br>ΔVDD|-1<br>-1|-|1<br>1|V/µs|
|Logic input voltages LIN,HIN,ITRIP|VIN<br>VITRIP|0<br>0|-|5<br>5|V|
|Between VSS - N and NX(including surge)|VSS|-5|-|5|V|
|PFC IGBT gate-emitter voltage|VGE|14|-|18|V|
|PFC IGBT external gate parameters|RG|-|10|-|Ω|
||CGE|-|4.7|-|nF|
||RGE|-|10|-|kΩ|



1 Allowed number of short circuits: <1000; time between short circuits: > 1s. 

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## Static Parameters 

## Inverter Section 

(VDD = 15V and TJ = 25°C, if not stated otherwise) 

|Description|Condition|Symbol||Value||Unit|
|---|---|---|---|---|---|---|
||||min|typ|max||
|Collector-Emitter saturation voltage|IC= 6A<br>TJ=  25°C<br>150°C|VCE(sat)|-<br>-|1.55<br>1.85|2.05<br>-|V|
|Emitter-Collector forward voltage|IF= 6A<br>TJ=  25°C<br>150°C|VF|-<br>-|1.65<br>1.55|2.0<br>-|V|
|Collector-Emitter leakage current|VCE= 600V|ICES|-|-|1|mA|
|Logic "1" input voltage (LIN,HIN)||VIH|-|2.1|2.5|V|
|Logic "0" input voltage (LIN,HIN)||VIL|0.7|0.9|-|V|
|ITRIP positive going threshold||VIT,TH+|400|470|540|mV|
|ITRIP input hysteresis||VIT,HYS|40|70|-|mV|
|VDD and VBS supply under voltage<br>positive going threshold||VDDUV+<br>VBSUV+|10.8|12.1|13.0|V|
|VDD and VBS supply under voltage<br>negative going threshold||VDDUV-<br>VBSUV-|9.5|10.4|11.2|V|
|VDD and VBS supply under voltage<br>lockout hysteresis||VDDUVH<br>VBSUVH|1.0|1.7|-|V|
|Quiescent VBx supply current<br>(VBx only)|HIN= 0V|IQBS|-|300|500|µA|
|Quiescent VDD supply current<br>(VDD only)|LIN= 0V, HINX=5V|IQDD|-|370|900|µA|
|Input bias current|VIN= 5V|IIN+|-|1|1.5|mA|
|Input bias current|VIN= 0V|IIN-|-|2|-|µA|
|ITRIP input bias current|VITRIP= 5V|IITRIP+|-|65|150|µA|
|VFO input bias current|VFO = 5V, VITRIP= 0V|IFO|-|60|-|µA|
|VFO output  voltage|IFO= 10mA, VITRIP= 1V|VFO|-|0.5|-|V|



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## PFC Section 

(VGE = 15V and TJ = 25°C, if not stated otherwise) 

|Description|Condition|Symbol||Value||Unit|
|---|---|---|---|---|---|---|
||||min|typ|max||
|Collector-Emitter saturation<br>voltage|IC= 30A,<br>TJ=  25°C<br>150°C|VCE(sat)|-<br>-|2.0<br>2.55|2.4<br>-|V|
|Diode forward voltage|IF= 30A,<br>TJ=  25°C<br>150°C|VF|-<br>-|1.75<br>1.65|2.3<br>-|V|
|Gate-Emitter threshold voltage|IC= 0.43mA, VGE=VCE|VGE(th)|4.1|5.1|5.7|V|
|Collector-Emitter leakage current|VCE= 650V, VGE= 0V|ICES|-|-|1|mA|
|Gate-Emitter leakage current|VCE= 0V, VGE= 20V|IGES|-|-|1|µA|
|Diode reverse leakage current|VR= 650V|IR|-|-|1|mA|



## Bootstrap Parameters 

(TJ = 25°C, if not stated otherwise) 

|(TJ= 25°C, if not stated otherwise)|||||||
|---|---|---|---|---|---|---|
|Description|Condition|Symbol||Value||Unit|
||||min|typ|max||
|Repetitive peak reverse voltage||VRRM|600|-|-|V|
|Bootstrap diode resistance|Between VF=4V and<br>VF=5V|RBSD|-|40|-||
|Reverse recovery time|IF= 0.6A, di/dt=80A/µs|trr_BSD|-|50|-|ns|
|Bootstrap diode forward voltage|IF= 0.5mA|VF_BSD|-|1|-|V|



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## Dynamic Parameters 

## Inverter Section 

(VDD = 15V and TJ = 25°C, if not stated otherwise) 

|Description|Condition|Symbol||Value||Unit|
|---|---|---|---|---|---|---|
||||min|typ|max||
|Turn-on propagation delay time|VLIN,HIN= 5V,<br>IC= 6A,<br>VDC= 300V|ton|-|640|-|ns|
|Turn-on rise time||tr|-|15|-|ns|
|Turn-on switching time||tc(on)|-|130|-|ns|
|Reverse recovery time||trr|-|95|-|ns|
|Turn-off propagation delay time|VLIN,HIN= 0V,<br>IC= 6A,<br>VDC= 300V|toff|-|870|-|ns|
|Turn-off fall time||tf|-|80|-|ns|
|Turn-off switching time||tc(off)|-|135|-|ns|
|Short circuit propagation delay<br>time|From VIT,TH+to 10% ISC|tSCP|-|1300|-|ns|
|Input filter time ITRIP|VITRIP= 1V|tITRIPmin|-|530|-|ns|
|Input filter time at LIN, HIN for turn<br>on and off|VLIN,HIN= 0V & 5V|tFILIN|-|290|-|ns|
|Fault clear time after ITRIP-fault|VITRIP= 1V|tFLTCLR|40|-|-|µs|
|Deadtime between low side and<br>high side||DTPWM|1.0|-|-|µs|
|Deadtime of gate drive circuit||DTIC|-|380|-|ns|
|IGBT turn-on energy (includes<br>reverse recovery of diode)|VDC= 300V, IC= 6A<br>TJ=  25°C<br>150°C|Eon|-<br>-|140<br>175|-<br>-|µJ|
|IGBT turn-off energy|VDC= 300V, IC= 6A<br>TJ=  25°C<br>150°C|Eoff|-<br>-|110<br>140|-<br>-|µJ|
|Diode recovery energy|VDC= 300V, IC= 6A<br>TJ=  25°C<br>150°C|Erec|-<br>-|25<br>40|-<br>-|µJ|



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## PFC Section 

(VGE = 15V and TJ = 25°C, if not stated otherwise) 

|~~a~~|~~ee~~||~~ee~~|~~ee~~|~~ee~~||
|---|---|---|---|---|---|---|
|Description<br>~~a~~<br>~~a~~|Condition<br>~~ee~~|Symbol|Value<br>~~eee~~<br>~~ee~~|||Unit<br>~~eee~~|
||||min<br>~~eee~~<br>~~ee~~|typ<br>~~eee~~<br>~~ee~~|max<br>~~eee~~<br>~~ee~~||
|Input capacitance<br>~~a~~|VCE= 25V, VGE= 0V,<br>f = 1MHz<br>~~ee~~|Cies<br>~~| ~~|-<br>~~ee~~<br> ~~ff~~|1900<br>~~ee~~<br>~~ff~~|-<br>~~ee~~<br>~~ff~~|pF<br>~~ee~~|
|Output capacitance<br>~~a~~||Coes<br>~~| ~~|-<br> ~~ff~~|107<br>~~ff~~|-<br>~~ff~~||
|Reverse transfer capacitance<br>~~a~~||Cres|-|55<br>~~ee~~|-<br>~~ee~~||
|Gate charge<br>~~ee~~<br>~~a~~|VDC= 520V, IC= 30A,<br>VGE= 15V<br>~~ee~~|QG<br>~~ee~~|-<br>~~ee~~|165<br>~~ee~~<br>~~ee~~|-<br>~~ee~~<br>~~ee~~|nC<br>~~ee~~<br>~~ee~~|
|Turn-on delay time<br>~~a~~<br>~~ee~~|VDC= 400V, IC= 30A,<br>RG= 10Ω, CGE= 4.7nF,<br>RGE= 10kΩ, TJ=  25°C|td(on)<br>~~a eee~~|-<br>~~eee~~|20<br>~~ee~~<br>~~eee~~|-<br>~~ee~~<br>~~eee~~|ns<br>~~ee~~<br>~~eee~~|
|Turn-on rise time<br>~~ee~~<br>~~a~~||tr<br>~~a eee~~<br>~~a~~<br>~~ee~~|-<br>~~eee~~<br>~~a~~<br>~~ee~~|90<br>~~eee~~<br>~~ee~~|-<br>~~eee~~<br>~~ee~~|ns<br>~~eee~~<br>~~ee~~|
|Turn-off delay time<br>~~ee~~<br>~~a~~<br>~~a~~||td(off)<br>~~a eee~~<br>~~a~~<br>~~ee~~<br>~~ee~~|-<br>~~eee~~<br>~~a~~<br>~~ee~~<br>~~ee~~|205<br>~~eee~~<br>~~ee~~<br>~~ee~~|-<br>~~eee~~<br>~~ee~~<br>~~ee~~|ns<br>~~eee~~<br>~~ee~~<br>~~ee~~|
|Turn-off fall time<br>~~a~~<br>~~a~~||tf<br>~~ee ~~<br>~~ee~~|-<br> ~~ee~~<br>~~ee~~|30<br>~~ee~~<br>~~ee~~|-<br>~~ee~~<br>~~ee~~|ns<br>~~ee~~<br>~~ee~~|
|Reverse recovery time<br>~~a~~||trr<br>~~ee ~~|-<br> ~~ee~~|100<br>~~ee~~|-<br>~~ee~~|ns<br>~~ee~~|
|Turn-on energy|VDC= 400V, IC= 30A, RG= 10Ω,<br>CGE= 4.7nF, RGE= 10kΩ<br>TJ=  25°C<br>150°C|Eon|-<br>-|1540<br>2025|-<br>-|µJ|
|Turn-off energy|VDC= 400V, IC= 30A, RG= 10Ω,<br>CGE= 4.7nF, RGE= 10kΩ<br>TJ=  25°C<br>150°C|Eoff|-<br>-|510<br>600|-<br>-|µJ|
|Diode recovery energy|VDC= 400V, IC= 30A, RG= 10Ω,<br>CGE= 4.7nF, RGE= 10kΩ<br>TJ=  25°C<br>150°C|Erec|-<br>-|50<br>120|-<br>-|µJ|



Figure 6 TC measurement point[1] 

1 Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and brings wrong or different information. 

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## Thermistor 

|Thermistor|||||||
|---|---|---|---|---|---|---|
|Description|Condition|Symbol|Value|||Unit|
||||min|typ|max||
|Resistor|TNTC= 25°C|RNTC|-|85|-|k|
|B-constant of NTC<br>(Negative temperature coefficient)||B(25/100)|-|4092|-|K|



**==> picture [490 x 208] intentionally omitted <==**

**----- Start of picture text -----**<br>
3500<br>35<br>3000  Min.<br>TT 30 on Typ.<br>Max.<br>| 25 RES HHH<br>2500<br>A 20 eee a ERE Pe [esr [ase [ase<br>2000 ALE 15 CONCEEEEEEEEEr<br>10<br>1500 Wa BESe ed<br>5<br>KOE |  ee<br>1000 PA| 050 CECRCeceorse 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 res<br>Thermistor temperature [ ℃ ]<br>\<br>500<br>HANG<br>0 LEASE EE<br>-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130<br>Thermistor temperature [ ℃ ]<br>]<br>Ω<br>k<br>[<br>Thermistor resistance<br>]<br>Ω<br>Thermistor resistance [k<br>**----- End of picture text -----**<br>


Figure 7 Thermistor resistance – temperature curve and table 

(For more information, please refer to the application note ‘AN CIPOS **™** -Mini 1 Technical description’) 

## Mechanical Characteristics and Ratings 

|Description|Condition|Value|Value|Value|Unit|
|---|---|---|---|---|---|
|||min|typ|max||
|Mounting torque|M3 screw and washer|0.49|-|0.78|Nm|
|Flatness|Refer to Figure 8|-50|-|100|µm|
|Weight||-|6.83|-|g|



Figure 8 Flatness measurement position 

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**==> picture [103 x 46] intentionally omitted <==**

## Circuit of a Typical Application 

**==> picture [443 x 295] intentionally omitted <==**

**----- Start of picture text -----**<br>
#1<br>GX (24) RG PFC<br>gate  VDD line<br>driver<br>RGE CGE IC<br>#4 NX (23)<br>(1) VS(U)<br>(2) VB(U)<br>VB1 #8 #7<br>RBS1 X (22)<br>#4 (3) VS(V) HO1<br>(4) VB(V) VS1<br>VB2<br>RBS2 HO 2 P (21)<br>#4 (5) VS(W)<br>VS2<br>(6) VB(W)<br>VB3 ~<br>HO3 U (20)<br>RBS3 AC<br>#1 VS3<br>(7) HIN(U)<br>ControllerMicro (10) LIN(U)(8) HIN(V)(9) HIN(W) HIN1HIN2HIN3LIN1 LO1 V (19)  #5 3-ph AC Motor<br>(11) LIN(V)<br>LIN2<br>(12) LIN(W) LIN3 LO 2<br>(13) VDD W (18)<br>VDD line VDD #9<br>(14) VFO VFO<br>(15) ITRIP ITRIP LO3<br>5 or 3.3V line (16) VSS VSS N (17)<br>#3 #6 #7<br><Signal for protection><br>#2 Current sensing<br>Input surge voltage sensing<br><Signal for protection><br>**----- End of picture text -----**<br>


## Figure 9 Application circuit 

Because PFC IGBT inside this product has very high speed switching characteristics, considerable large surge voltage between P and NX terminals and switching noise on signaling path are generated easily. Please pay attention to the below items for optimized application circuit design. 

1. Input circuit 

   - 

   - 

      - To reduce input signal noise by high speed switching, the RIN and CIN filter circuit should be mounted. (100 Ω , 1nF) 

      - CIN should be placed as close to VSS pin as possible. 

2. Itrip circuit 

   - To prevent protection function errors, CITRIP should be placed as close to Itrip and VSS pins as possible. 

3. VFO circuit 

   - VFO output is an open drain output. This signal line should be pulled up to the positive side of the 5V/3.3V logic power supply with a proper resistor RPU. It is recommended that RC filter be placed as close to the controller as possible. 

4. VB-VS circuit 

   - 

      - Capacitor for high side floating supply voltage should be placed as close to VB and VS pins as possible. 

5. Snubber capacitor 

   - ™ 

   - The wiring between CIPOS Mini and snubber capacitor including shunt resistor should be as short as possible. 

6. Shunt resistor 

   - Each shunt resistor of SMD type should be used for reducing its stray inductance. 

7. Ground pattern 

   - Each ground pattern should be separated at only one point of shunt resistor as short as possible. 

   - Power ground pattern between PFC and Inverter should be connected as short as possible. 

8. Anti parallel diode 

   - It’s mandatory to connect anti-parallel diode (2A, voltage rating higher than 650V) to PFC IGBT. 

9. Input surge voltage protection circuit 

   - This protection circuit is necessary for PFC IGBT to be protected from excessive surge voltage. 

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## Switching Times Definition 

**==> picture [455 x 185] intentionally omitted <==**

**----- Start of picture text -----**<br>
HINx 2.1V<br>LINx 0.9V<br>trr<br>toff ton<br>10%<br>iCx<br>90% 90%<br>tf tr<br>10%<br>10% 10% 10%<br>v CEx<br>tc(off) tc(on)<br>**----- End of picture text -----**<br>


## Figure 10 Switching times definition of inverter 

**==> picture [451 x 186] intentionally omitted <==**

**----- Start of picture text -----**<br>
90%<br>v GE<br>10%<br>trr<br>td(off) td(on)<br>10%<br>iC<br>90%<br>90%<br>tr<br>10% 10%<br>v CE tf<br>**----- End of picture text -----**<br>


Figure 11 Switching times definition of PFC 

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## Package Outline 

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**==> picture [103 x 46] intentionally omitted <==**

## Revision history 

|Document<br>version|Date of release|Description of changes|
|---|---|---|
|V 2.1|Aug. 2017|Package outline update<br>Fig.9 Application circuit|
|V 2.2|Sep. 2017|Maximum operating case temperature, Tc= 125°C|
||||



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## Trademarks 

All referenced product or service names and trademarks are the property of their respective owners. 

## IMPORTANT NOTICE 

Edition 2017-09-06 The information given in this document shall in no event be regarded as a guarantee of conditions or Published by characteristics  (“Beschaffenheitsgarantie”) . Infineon Technologies AG With respect to any examples, hints or any typical 81726 München, Germany values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all © 2017 Infineon Technologies AG. warranties and liabilities of any kind, including without limitation warranties of non-infringement All Rights Reserved. of intellectual property rights of any third party. Do you have a question about this In addition, any information given in this document document? is subject to customer’s compliance with its obligations stated in this document and any Email: erratum@infineon.com applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in Document reference customer’s applications. ifx1 The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( www.infineon.com ). 

Please note that this product is not qualified according to the AEC Q100 or AEC Q101 documents of the Automotive Electronics Council. 

## WARNINGS 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 



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