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ICM-20948
MEMS Module, MotionTracking Series, 9-Axis Device, ±16g, 1.71 V to 3.6 V, QFN-24
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: TDK INVENSENSE
- Product type: MEMS Modules
- MEMS Module Function:-; Supply Voltage Min:1.71V; Supply Voltage Max:3.6V; Sensor Case Style:QFN; No. of Pins:24Pins; Gyroscope Range:± 250°/s, ± 500°/s, ± 1000°/s, ± 2000°/s; Ac
- MSL: -
- SVHC: No SVHC (15-Jun-2015)
- No. of Pins: 24Pins
- Sensor Type: Accelerometer, Gyroscope
- Sensing Axis: X, Y, Z
- Product Range: -
- Output Interface: I2C, SPI
- Sensor Case Style: QFN
- Supply Voltage Max: 3.6V
- Supply Voltage Min: 1.71V
- MEMS Module Function: Tri-Axis Gyroscope, Tri-Axis Accelerometer, Tri-Axis Compass
- Sensor Case / Package: QFN
- Operating Temperature Max: 85°C
- Operating Temperature Min: -40°C
- Sensing Range - Gyroscope: ± 250°/s, ± 500°/s, ± 1000°/s, ± 2000°/s
- Temperature Sensing Range: -
- Sensing Range - Accelerometer: ± 2g, ± 4g, ± 8g, ± 16g
| Delivery and price | |
|---|---|
| Units per pack | 1 |
| Price | 3.6 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
_**ICM-20948**_
## World’s Lowest Power 9-Axis MEMS MotionTrackin ™ Device g
## **GENERAL DESCRIPTION**
The ICM-20948 is the world’s lowest power 9-axis MotionTracking device that is ideally suited for Smartphones, Tablets, Wearable Sensors, and IoT applications.
- 3-axis gyroscope, 3-axis accelerometer, 3-axis compass, and a Digital Motion Processor™ (DMP[TM] ) in a 3 mm x 3 mm x 1 mm (24-pin QFN) package
- DMP offloads computation of motion processing algorithms from the host processor, improving system power performance
- Software drivers are fully compliant with Google’s latest Android release
- EIS FSYNC support
ICM-20948 supports an auxiliary I[2] C interface to external sensors, on-chip 16-bit ADCs, programmable digital filters, an embedded temperature sensor, and programmable interrupts. The device features an operating voltage range down to 1.71V. Communication ports include I[2] C and high speed SPI at 7 MHz.
Note: ICM-20948 VDDIO range is 1.71V to 1.95V, different than the MPU-9250 9-axis device.
## **ORDERING INFORMATION**
|**PART**|**TEMP RANGE**|**PACKAGE**|
|---|---|---|
|ICM-20948†|−40°C to +85°C|24-Pin QFN|
†Denotes RoHS and Green-Compliant Package
## **BLOCK DIAGRAM**
## **APPLICATIONS**
- Smartphones and Tablets
- Wearable Sensors
- IoT Applications
## **FEATURES**
- Lowest Power 9-Axis Device at 2.5 mW
- 3-Axis Gyroscope with Programmable FSR of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps
- 3-Axis Accelerometer with Programmable FSR of ±2 _g_ , ±4 _g_ , ±8 _g_ , and ±16 _g_
- 3-Axis Compass with a wide range to ±4900 µT
- Onboard Digital Motion Processor (DMP)
- Android support
- Auxiliary I[2] C interface for external sensors
- On-Chip 16-bit ADCs and Programmable Filters
- 7 MHz SPI or 400 kHz Fast Mode I²C
- Digital-output temperature sensor
- VDD operating range of 1.71V to 3.6V
- MEMS structure hermetically sealed and bonded at wafer level
- RoHS and Green compliant
## **TYPICAL OPERATING CIRCUIT**
**==> picture [224 x 204] intentionally omitted <==**
**----- Start of picture text -----**<br>
nCS<br>SCLK<br>SDI<br>NC 1 18 GND<br>NC 2 17 NC<br>NC 3 ICM-20948 16 NC<br>NC 4 15 NC<br>NC 5 14 NC<br>NC 6 13 VDD 1.71 – 3.6VDC<br>It C2, 0.1 µF<br>x<br>1.71 – 1.95VDC<br>C3, 0.1 µ F C1, 0.1 µF<br>SDO<br>SDA / SDI SCL / SCLK nCS AUX_DA RESV RESV<br>24 23 22 21 20 19<br>7 8 9 10 11 12<br>AUX_CL VDDIO / AD0 REGOUT FSYNC INT1<br>SDO<br>**----- End of picture text -----**<br>
**TDK Corporation** 1745 Technology Drive, San Jose, CA 95110 U.S.A +1(408) 988–7339
Document Number: DS-000189
InvenSense reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Revision: 1.3
Release Date: 06/02/2017
www.invensense.com
_**ICM-20948**_
|<br>**_ICM-20948_**<br>{TDK InvenSense|<br>**_ICM-20948_**<br>{TDK InvenSense|<br>**_ICM-20948_**<br>{TDK InvenSense|
|---|---|---|
|**TABLE OF CONTENTS**|||
||GENERALDESCRIPTION......................................................................................................................................................... 1||
||ORDERINGINFORMATION..................................................................................................................................................... 1||
||BLOCKDIAGRAM................................................................................................................................................................. 1||
||APPLICATIONS..................................................................................................................................................................... 1||
||FEATURES.......................................................................................................................................................................... 1||
||TYPICALOPERATINGCIRCUIT................................................................................................................................................. 1||
|**1**|**GENERAL DESCRIPTION ........................................................................................................................................ 9**||
||1.1|PURPOSE ANDSCOPE............................................................................................................................................... 9|
||1.2|PRODUCTOVERVIEW............................................................................................................................................... 9|
||1.3|APPLICATIONS......................................................................................................................................................... 9|
|**2**|**FEATURES .......................................................................................................................................................... 10**||
||2.1|GYROSCOPEFEATURES........................................................................................................................................... 10|
||2.2|ACCELEROMETERFEATURES..................................................................................................................................... 10|
||2.3|MAGNETOMETERFEATURES.................................................................................................................................... 10|
||2.4|DMP FEATURES.................................................................................................................................................... 10|
||2.5|ADDITIONALFEATURES........................................................................................................................................... 10|
|**3**|**ELECTRICAL CHARACTERISTICS ........................................................................................................................... 11**||
||3.1|GYROSCOPESPECIFICATIONS.................................................................................................................................... 11|
||3.2|ACCELEROMETERSPECIFICATIONS............................................................................................................................. 12|
||3.3|MAGNETOMETERSPECIFICATIONS............................................................................................................................ 13|
||3.4|ELECTRICALSPECIFICATIONS..................................................................................................................................... 13|
||_D.C. Electrical Characteristics ................................................................................................................................... 13_||
||_A.C. Electrical Characteristics ................................................................................................................................... 14_||
||_Other Electrical Specifications .................................................................................................................................. 15_||
||3.5|I2C TIMINGCHARACTERIZATION............................................................................................................................... 16|
||3.6|SPI TIMINGCHARACTERIZATION............................................................................................................................... 17|
||3.7|ABSOLUTEMAXIMUMRATINGS............................................................................................................................... 18|
|**4**|**APPLICATIONS INFORMATION ........................................................................................................................... 19**||
||4.1|PINOUTDIAGRAM ANDSIGNALDESCRIPTION............................................................................................................ 19|
||4.2|TYPICALOPERATINGCIRCUIT................................................................................................................................... 20|
||4.3|BILL OFMATERIALS FOREXTERNALCOMPONENTS....................................................................................................... 20|
||4.4|EXPOSEDDIEPADPRECAUTIONS.............................................................................................................................. 20|
||4.5|BLOCKDIAGRAM................................................................................................................................................... 21|
||4.6|OVERVIEW........................................................................................................................................................... 21|
||4.7|THREE-AXISMEMS GYROSCOPE WITH16-BITADCS ANDSIGNALCONDITIONING............................................................ 22|
||4.8|THREE-AXISMEMS ACCELEROMETER WITH16-BITADCS ANDSIGNALCONDITIONING...................................................... 22|
||4.9|THREE-AXISMEMS MAGNETOMETER WITH16-BITADCS ANDSIGNALCONDITIONING..................................................... 22|
||4.10|DIGITALMOTIONPROCESSOR.................................................................................................................................. 22|
||4.11|PRIMARYI2CANDSPI SERIALCOMMUNICATIONSINTERFACES....................................................................................... 22|
||_ICM-20948 Solution Using I2C Interface.................................................................................................................... 22_||
||_ICM-20948 Solution Using SPI Interface ................................................................................................................... 23_||
||4.12|AUXILIARYI2C SERIALINTERFACE.............................................................................................................................. 24|
||4.13|SELF-TEST............................................................................................................................................................ 24|
||4.14|CLOCKING............................................................................................................................................................ 25|
||4.15|SENSORDATAREGISTERS........................................................................................................................................ 25|
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_**ICM-20948**_
|{TDK|{TDK|<br>**_ICM-20948_**<br>{TDK InvenSense|
|---|---|---|
||4.16|FIFO ................................................................................................................................................................... 25|
||4.17|FSYNC ................................................................................................................................................................ 25|
||4.18|INTERRUPTS.......................................................................................................................................................... 25|
||4.19|DIGITAL-OUTPUTTEMPERATURESENSOR................................................................................................................... 26|
||4.20|BIAS ANDLDOS.................................................................................................................................................... 26|
||4.21|CHARGEPUMP...................................................................................................................................................... 26|
||4.22|POWERMODES..................................................................................................................................................... 26|
|**5**|**PROGRAMMABLE INTERRUPTS .......................................................................................................................... 27**||
|**6**|**DIGITAL INTERFACE ............................................................................................................................................ 28**||
||6.1|I2CANDSPI SERIALINTERFACES............................................................................................................................... 28|
||6.2|I2C INTERFACE...................................................................................................................................................... 28|
||6.3|I2C COMMUNICATIONSPROTOCOL........................................................................................................................... 28|
||6.4|I2C TERMS........................................................................................................................................................... 30|
||6.5|SPI INTERFACE...................................................................................................................................................... 31|
|**7**|**REGISTER MAP FOR GYROSCOPE AND ACCELEROMETER ................................................................................... 32**||
||7.1|USERBANK0 REGISTERMAP.................................................................................................................................. 32|
||7.2|USERBANK1 REGISTERMAP.................................................................................................................................. 33|
||7.3|USERBANK2 REGISTERMAP.................................................................................................................................. 34|
||7.4|USERBANK3 REGISTERMAP.................................................................................................................................. 34|
|**8**|**USER BANK 0 REGISTER DESCRIPTIONS .............................................................................................................. 36**||
||8.1|WHO_AM_I ....................................................................................................................................................... 36|
||8.2|USER_CTRL ........................................................................................................................................................ 36|
||8.3|LP_CONFIG ........................................................................................................................................................ 37|
||8.4|PWR_MGMT_1 ................................................................................................................................................. 37|
||8.5|PWR_MGMT_2 ................................................................................................................................................. 38|
||8.6|INT_PIN_CFG .................................................................................................................................................... 38|
||8.7|INT_ENABLE ...................................................................................................................................................... 39|
||8.8|INT_ENABLE_1 .................................................................................................................................................. 39|
||8.9|INT_ENABLE_2 .................................................................................................................................................. 39|
||8.10|INT_ENABLE_3 .................................................................................................................................................. 40|
||8.11|I2C_MST_STATUS ............................................................................................................................................. 40|
||8.12|INT_STATUS ...................................................................................................................................................... 40|
||8.13|INT_STATUS_1 .................................................................................................................................................. 41|
||8.14|INT_STATUS_2 .................................................................................................................................................. 41|
||8.15|INT_STATUS_3 .................................................................................................................................................. 41|
||8.16|DELAY_TIMEH ................................................................................................................................................... 41|
||8.17|DELAY_TIMEL .................................................................................................................................................... 42|
||8.18|ACCEL_XOUT_H ................................................................................................................................................ 42|
||8.19|ACCEL_XOUT_L ................................................................................................................................................. 42|
||8.20|ACCEL_YOUT_H ................................................................................................................................................ 42|
||8.21|ACCEL_YOUT_L ................................................................................................................................................. 43|
||8.22|ACCEL_ZOUT_H ................................................................................................................................................ 43|
||8.23|ACCEL_ZOUT_L ................................................................................................................................................. 43|
||8.24|GYRO_XOUT_H ................................................................................................................................................. 43|
||8.25|GYRO_XOUT_L .................................................................................................................................................. 44|
||8.26|GYRO_YOUT_H ................................................................................................................................................. 44|
||8.27|GYRO_YOUT_L .................................................................................................................................................. 44|
||8.28|GYRO_ZOUT_H ................................................................................................................................................. 44|
Page 3 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
|{TDK|{TDK|<br>**_ICM-20948_**<br>{TDK InvenSense|
|---|---|---|
||8.29|GYRO_ZOUT_L .................................................................................................................................................. 45|
||8.30|TEMP_OUT_H ................................................................................................................................................... 45|
||8.31|TEMP_OUT_L .................................................................................................................................................... 45|
||8.32|EXT_SLV_SENS_DATA_00 ................................................................................................................................. 45|
||8.33|EXT_SLV_SENS_DATA_01 ................................................................................................................................. 46|
||8.34|EXT_SLV_SENS_DATA_02 ................................................................................................................................. 46|
||8.35|EXT_SLV_SENS_DATA_03 ................................................................................................................................. 46|
||8.36|EXT_SLV_SENS_DATA_04 ................................................................................................................................. 46|
||8.37|EXT_SLV_SENS_DATA_05 ................................................................................................................................. 47|
||8.38|EXT_SLV_SENS_DATA_06 ................................................................................................................................. 47|
||8.39|EXT_SLV_SENS_DATA_07 ................................................................................................................................. 47|
||8.40|EXT_SLV_SENS_DATA_08 ................................................................................................................................. 47|
||8.41|EXT_SLV_SENS_DATA_09 ................................................................................................................................. 48|
||8.42|EXT_SLV_SENS_DATA_10 ................................................................................................................................. 48|
||8.43|EXT_SLV_SENS_DATA_11 ................................................................................................................................. 48|
||8.44|EXT_SLV_SENS_DATA_12 ................................................................................................................................. 48|
||8.45|EXT_SLV_SENS_DATA_13 ................................................................................................................................. 49|
||8.46|EXT_SLV_SENS_DATA_14 ................................................................................................................................. 49|
||8.47|EXT_SLV_SENS_DATA_15 ................................................................................................................................. 49|
||8.48|EXT_SLV_SENS_DATA_16 ................................................................................................................................. 49|
||8.49|EXT_SLV_SENS_DATA_17 ................................................................................................................................. 50|
||8.50|EXT_SLV_SENS_DATA_18 ................................................................................................................................. 50|
||8.51|EXT_SLV_SENS_DATA_19 ................................................................................................................................. 50|
||8.52|EXT_SLV_SENS_DATA_20 ................................................................................................................................. 50|
||8.53|EXT_SLV_SENS_DATA_21 ................................................................................................................................. 51|
||8.54|EXT_SLV_SENS_DATA_22 ................................................................................................................................. 51|
||8.55|EXT_SLV_SENS_DATA_23 ................................................................................................................................. 51|
||8.56|FIFO_EN_1 ........................................................................................................................................................ 52|
||8.57|FIFO_EN_2 ........................................................................................................................................................ 52|
||8.58|FIFO_RST ........................................................................................................................................................... 53|
||8.59|FIFO_MODE ...................................................................................................................................................... 53|
||8.60|FIFO_COUNTH .................................................................................................................................................. 53|
||8.61|FIFO_COUNTL ................................................................................................................................................... 53|
||8.62|FIFO_R_W ......................................................................................................................................................... 54|
||8.63|DATA_RDY_STATUS .......................................................................................................................................... 54|
||8.64|FIFO_CFG .......................................................................................................................................................... 54|
||8.65|REG_BANK_SEL ................................................................................................................................................. 54|
|**9**|**USR BANK 1 REGISTER DESCRIPTIONS ................................................................................................................ 55**|**USR BANK 1 REGISTER DESCRIPTIONS ................................................................................................................ 55**|
||9.1|SELF_TEST_X_GYRO .......................................................................................................................................... 55|
||9.2|SELF_TEST_Y_GYRO .......................................................................................................................................... 55|
||9.3|SELF_TEST_Z_GYRO .......................................................................................................................................... 55|
||9.4|SELF_TEST_X_ACCEL ......................................................................................................................................... 55|
||9.5|SELF_TEST_Y_ACCEL ......................................................................................................................................... 56|
||9.6|SELF_TEST_Z_ACCEL ......................................................................................................................................... 56|
||9.7|XA_OFFS_H ....................................................................................................................................................... 56|
||9.8|XA_OFFS_L ........................................................................................................................................................ 56|
||9.9|YA_OFFS_H ....................................................................................................................................................... 56|
||9.10|YA_OFFS_L ........................................................................................................................................................ 57|
||9.11|ZA_OFFS_H ....................................................................................................................................................... 57|
||9.12|ZA_OFFS_L ........................................................................................................................................................ 57|
Page 4 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
|{TDK|<br>**_ICM-20948_**<br>{TDK InvenSense|
|---|---|
|9.13|TIMEBASE_CORRECTION_PLL ........................................................................................................................... 57|
|9.14|REG_BANK_SEL ................................................................................................................................................. 58|
|**10**<br>**USR BANK 2 REGISTER MAP ........................................................................................................................... 59**||
|10.1|GYRO_SMPLRT_DIV .......................................................................................................................................... 59|
|10.2|GYRO_CONFIG_1 .............................................................................................................................................. 59|
|10.3|GYRO_CONFIG_2 .............................................................................................................................................. 60|
|10.4|XG_OFFS_USRH ................................................................................................................................................ 61|
|10.5|XG_OFFS_USRL ................................................................................................................................................. 62|
|10.6|YG_OFFS_USRH ................................................................................................................................................ 62|
|10.7|YG_OFFS_USRL ................................................................................................................................................. 62|
|10.8|ZG_OFFS_USRH................................................................................................................................................. 62|
|10.9|ZG_OFFS_USRL ................................................................................................................................................. 62|
|10.10|ODR_ALIGN_EN ............................................................................................................................................ 63|
|10.11|ACCEL_SMPLRT_DIV_1 ................................................................................................................................. 63|
|10.12|ACCEL_SMPLRT_DIV_2 ................................................................................................................................. 63|
|10.13|ACCEL_INTEL_CTRL ....................................................................................................................................... 63|
|10.14|ACCEL_WOM_THR ........................................................................................................................................ 64|
|10.15|ACCEL_CONFIG ............................................................................................................................................. 64|
|10.16|ACCEL_CONFIG_2 ......................................................................................................................................... 65|
|10.17|FSYNC_CONFIG ............................................................................................................................................. 66|
|10.18|TEMP_CONFIG .............................................................................................................................................. 67|
|10.19|MOD_CTRL_USR ........................................................................................................................................... 67|
|10.20|REG_BANK_SEL ............................................................................................................................................. 67|
|**11**<br>**USR BANK 3 REGISTER MAP ........................................................................................................................... 68**||
|11.1|I2C_MST_ODR_CONFIG .................................................................................................................................... 68|
|11.2|I2C_MST_CTRL .................................................................................................................................................. 68|
|11.3|I2C_MST_DELAY_CTRL ...................................................................................................................................... 69|
|11.4|I2C_SLV0_ADDR ................................................................................................................................................ 69|
|11.5|I2C_SLV0_REG................................................................................................................................................... 69|
|11.6|I2C_SLV0_CTRL ................................................................................................................................................. 70|
|11.7|I2C_SLV0_DO .................................................................................................................................................... 70|
|11.8|I2C_SLV1_ADDR ................................................................................................................................................ 70|
|11.9|I2C_SLV1_REG................................................................................................................................................... 71|
|11.10|I2C_SLV1_CTRL ............................................................................................................................................. 71|
|11.11|I2C_SLV1_DO ................................................................................................................................................ 72|
|11.12|I2C_SLV2_ADDR ............................................................................................................................................ 72|
|11.13|I2C_SLV2_REG............................................................................................................................................... 72|
|11.14|I2C_SLV2_CTRL ............................................................................................................................................. 73|
|11.15|I2C_SLV2_DO ................................................................................................................................................ 73|
|11.16|I2C_SLV3_ADDR ............................................................................................................................................ 73|
|11.17|I2C_SLV3_REG............................................................................................................................................... 74|
|11.18|I2C_SLV3_CTRL ............................................................................................................................................. 74|
|11.19|I2C_SLV3_DO ................................................................................................................................................ 74|
|11.20|I2C_SLV4_ADDR ............................................................................................................................................ 75|
|11.21|I2C_SLV4_REG............................................................................................................................................... 75|
|11.22|I2C_SLV4_CTRL ............................................................................................................................................. 75|
|11.23|I2C_SLV4_DO ................................................................................................................................................ 75|
|11.24|I2C_SLV4_DI .................................................................................................................................................. 76|
|11.25|REG_BANK_SEL ............................................................................................................................................. 76|
Page 5 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
|{TDK|<br>**_ICM-20948_**<br>{TDK InvenSense|
|---|---|
|**12**|**REGISTER MAP FOR MAGNETOMETER ........................................................................................................... 77**|
|12.1|REGISTERMAPDESCRIPTION................................................................................................................................... 77|
|**13**|**DETAILED DESCRIPTIONS FOR MAGNETOMETER REGISTERS .......................................................................... 78**|
|13.1|WIA: DEVICEID ................................................................................................................................................... 78|
|13.2|ST1: STATUS1 ..................................................................................................................................................... 78|
|13.3|HXLTOHZH: MEASUREMENTDATA........................................................................................................................ 78|
|13.4|ST2: STATUS2 ..................................................................................................................................................... 79|
|13.5|CNTL2: CONTROL2 .............................................................................................................................................. 79|
|13.6|CNTL3: CONTROL3 .............................................................................................................................................. 80|
|13.7|TS1, TS2: TEST1, 2 .............................................................................................................................................. 80|
|**14**|**USE NOTES ..................................................................................................................................................... 81**|
|14.1|GYROSCOPEMODETRANSITION............................................................................................................................... 81|
|14.2|POWERMANAGEMENT1 REGISTERSETTING.............................................................................................................. 81|
|14.3|DMP MEMORYACCESS......................................................................................................................................... 81|
|14.4|TIMEBASECORRECTION......................................................................................................................................... 81|
|14.5|I2C MASTERCLOCKFREQUENCY............................................................................................................................... 81|
|14.6|CLOCKING............................................................................................................................................................ 82|
|14.7|LP_EN BIT-FIELDUSAGE........................................................................................................................................ 82|
|14.8|REGISTERACCESSUSINGSPI INTERFACE.................................................................................................................... 82|
|**15**|**ORIENTATION OF AXES .................................................................................................................................. 83**|
|**16**|**PACKAGE DIMENSIONS .................................................................................................................................. 84**|
|**17**|**PART NUMBER PART MARKINGS.................................................................................................................... 86**|
|**18**|**REFERENCES ................................................................................................................................................... 87**|
|**19**|**DOCUMENT INFORMATION ........................................................................................................................... 88**|
|19.1|REVISIONHISTORY................................................................................................................................................. 88|
|COMPLIANCEDECLARATIONDISCLAIMER............................................................................................................................... 89||
Page 6 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
|{TDK|<br>**_ICM-20948_**<br>{TDK InvenSense|
|---|---|
|**LIST OF FIGURES**|**LIST OF FIGURES**|
|Figure 1. I|Figure 1. I2C Bus Timing Diagram ...................................................................................................................................... 16|
|Figure 2. SPI Bus Timing Diagram ..................................................................................................................................... 17|Figure 2. SPI Bus Timing Diagram ..................................................................................................................................... 17|
|Figure 3. Pin out Diagram for ICM-20948 3 mm x 3 mm x 1 mm QFN ............................................................................. 19|Figure 3. Pin out Diagram for ICM-20948 3 mm x 3 mm x 1 mm QFN ............................................................................. 19|
|Figure 4. ICM-20948 Application Schematic (a) I|Figure 4. ICM-20948 Application Schematic (a) I2C operation (b) SPI operation ............................................................. 20|
|Figure 5. ICM-20948 Block Diagram ................................................................................................................................. 21|Figure 5. ICM-20948 Block Diagram ................................................................................................................................. 21|
|Figure 6. ICM-20948 Solution Using I|Figure 6. ICM-20948 Solution Using I2C Interface ............................................................................................................ 23|
|Figure 7. ICM-20948 Solution Using SPI Interface ............................................................................................................ 24|Figure 7. ICM-20948 Solution Using SPI Interface ............................................................................................................ 24|
|Figure 8. START and STOP Conditions .............................................................................................................................. 28|Figure 8. START and STOP Conditions .............................................................................................................................. 28|
|Figure 9. Acknowledge on the I|Figure 9. Acknowledge on the I2C Bus .............................................................................................................................. 29|
|Figure 10. Complete I|Figure 10. Complete I2C Data Transfer ............................................................................................................................. 29|
|Figure 11. Typical SPI Master / Slave Configuration ......................................................................................................... 31|Figure 11. Typical SPI Master / Slave Configuration ......................................................................................................... 31|
|Figure 12. Orientation of Axes of Sensitivity and Polarity of Rotation ............................................................................. 83|Figure 12. Orientation of Axes of Sensitivity and Polarity of Rotation ............................................................................. 83|
|Figure 13. Orientation of Axes of Sensitivity for Magnetometer ..................................................................................... 83|Figure 13. Orientation of Axes of Sensitivity for Magnetometer ..................................................................................... 83|
|Figure 14. Package Dimensions ........................................................................................................................................ 84|Figure 14. Package Dimensions ........................................................................................................................................ 84|
|Figure 15. Part Number Part Markings ............................................................................................................................. 86|Figure 15. Part Number Part Markings ............................................................................................................................. 86|
Page 7 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
**LIST OF TABLES**
**==> picture [483 x 303] intentionally omitted <==**
**----- Start of picture text -----**<br>
||||
|---|---|---|
|Table 1. Gyroscope Specifications .................................................................................................................................... 11|
|Table 2. Accelerometer Specifications ............................................................................................................................. 12|
|Table 3. Magnetometer Specifications ............................................................................................................................. 13|
|Table 4. D.C. Electrical Characteristics.............................................................................................................................. 13|
|Table 5. A.C. Electrical Characteristics .............................................................................................................................. 15|
|Table 6. Other Electrical Specifications ............................................................................................................................ 15|
|Table 7. I|[2]|C Timing Characteristics ................................................................................................................................... 16|
|Table 8. SPI Timing Characteristics (7 MHz) ..................................................................................................................... 17|
|Table 9. Absolute Maximum Ratings ................................................................................................................................ 18|
|Table 10. Signal Descriptions ............................................................................................................................................ 19|
|Table 11. Bill of Materials ................................................................................................................................................. 20|
|Table 12. Power Modes for ICM-20948 ............................................................................................................................ 26|
|Table 13. Interrupt Sources .............................................................................................................................................. 27|
|Table 14. Serial Interface .................................................................................................................................................. 28|
|Table 15. I|[2]|C Terms ........................................................................................................................................................... 30|
|Table 16. Gyroscope Configuration 1 ............................................................................................................................... 60|
|Table 17. Gyroscope Configuration 2 ............................................................................................................................... 61|
|Table 18. Accelerator Configuration ................................................................................................................................. 64|
|Table 19. Accelerator Configuration 2 .............................................................................................................................. 66|
|Table 20. Register Table for Magnetometer .................................................................................................................... 77|
|Table 21. Register Map for Magnetometer ...................................................................................................................... 77|
|Table 22. Magnetometer Measurement Data Format ..................................................................................................... 79|
|Table 23. I|[2]|C Master Clock Frequency .............................................................................................................................. 82|
|Table 24. Package Dimensions ......................................................................................................................................... 85|
|Table 26. Part Number Part Markings .............................................................................................................................. 86|
**----- End of picture text -----**<br>
Page 8 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## _**1 GENERAL DESCRIPTION**_
## **1.1 PURPOSE AND SCOPE**
This document is a preliminary data sheet, providing a description, specifications, and design related information on the ICM-20948 MotionTracking device.
For references to register map and descriptions of individual registers, please refer to the ICM-20948 Register Map and Register Descriptions document.
## **1.2 PRODUCT OVERVIEW**
The ICM-20948 is a multi-chip module (MCM) consisting of two dies integrated into a single QFN package. One die houses a 3-axis gyroscope, a 3-axis accelerometer, and a Digital Motion Processor™ (DMP). The other die houses the AK09916 3-axis magnetometer from Asahi Kasei Microdevices Corporation. The ICM-20948 is a 9-axis MotionTracking device all in a small 3x3x1mm QFN package. The device supports the following features:
- FIFO of size 512 bytes (FIFO size will vary depending on DMP feature-set)
- Runtime Calibration
- Enhanced FSYNC functionality to improve timing for applications like EIS
ICM-20948 devices, with their 9-axis integration, on-chip DMP, and run-time calibration firmware, enable manufacturers to eliminate the costly and complex selection, qualification, and system level integration of discrete devices, guaranteeing optimal motion performance for consumers.
The gyroscope has a programmable full-scale range of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps. The accelerometer has a user-programmable accelerometer full-scale range of ±2 _g_ , ±4 _g_ , ±8 _g_ , and ±16 _g_ . Factory-calibrated initial sensitivity of both sensors reduces production-line calibration requirements.
Other key features include on-chip 16-bit ADCs, programmable digital filters, an embedded temperature sensor, and programmable interrupts. The device features I[2] C and SPI serial interfaces, a VDD operating range of 1.71V to 3.6V, and a separate digital IO supply, VDDIO from 1.71V to 1.95V.
Communication with all registers of the device is performed using I[2] C at up to 100 kHz (standard-mode) or up to 400 kHz (fast-mode), or SPI at up to 7 MHz.
By leveraging its patented and volume-proven CMOS-MEMS fabrication platform, which integrates MEMS wafers with companion CMOS electronics through wafer-level bonding, InvenSense has driven the package size down to a footprint and thickness of 3 mm x 3 mm x 1 mm (24-pin QFN), to provide a very small yet high-performance, low-cost package. The device provides high robustness by supporting 20,000 _g_ shock reliability.
## **1.3 APPLICATIONS**
- Smartphones and Tablets
- Wearable Sensors
- IoT Applications
- Drones
Page 9 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## _**2 FEATURES**_
## **2.1 GYROSCOPE FEATURES**
The triple-axis MEMS gyroscope in the ICM-20948 includes the following features:
- Digital-output X-, Y-, and Z-axis angular rate sensors (gyroscopes) with a user-programmable full-scale range of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps, and integrated 16-bit ADCs
- User-selectable ODR; User-selectable low pass filters
- Self-test
## **2.2 ACCELEROMETER FEATURES**
The triple-axis MEMS accelerometer in ICM-20948 includes the following features:
- Digital-output X-, Y-, and Z-axis accelerometer with a programmable full scale range of ±2g, ±4g, ±8g, and ±16 _g_ , and integrated 16-bit ADCs
- User-selectable ODR; User-selectable low pass filters
- Wake-on-motion interrupt for low power operation of applications processor
- Self-test
## **2.3 MAGNETOMETER FEATURES**
The triple-axis MEMS magnetometer in ICM-20948 includes a wide range of features:
- 3-axis silicon monolithic Hall-effect magnetic sensor with magnetic concentrator
- Wide dynamic measurement range and high resolution with lower current consumption.
- Output data resolution of 16-bits
- Full scale measurement range is ±4900 µT
- Self-test function with internal magnetic source to confirm magnetic sensor operation on end products
## **2.4 DMP FEATURES**
The DMP in ICM-20948 includes the following capabilities:
- Offloads computation of motion processing algorithms from the host processor. The DMP can be used to minimize power, simplify timing, simplify the software architecture, and save valuable MIPS on the host processor for use in applications.
- The DMP enables ultra-low power run-time and background calibration of the accelerometer, gyroscope, and compass, maintaining optimal performance of the sensor data for both physical and virtual sensors generated through sensor fusion. This enables the best user experience for all sensor enabled applications for the lifetime of the device.
- DMP features simplify the software architecture resulting in quicker time to market.
- DMP features are OS, Platform, and Architecture independent, supporting virtually any AP, MCU, or other embedded architecture.
## **2.5 ADDITIONAL FEATURES**
The ICM-20948 includes the following additional features:
- I[2] C at up to 100 kHz (standard-mode) or up to 400 kHz (fast-mode) or SPI at up to 7 MHz for communication with registers
- Auxiliary master I[2] C bus for reading data from external sensors (e.g. magnetometer)
- Digital-output temperature sensor
- 20,000 _g_ shock tolerant
- MEMS structure hermetically sealed and bonded at wafer level
- RoHS and Green compliant
Page 10 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## _**3 ELECTRICAL CHARACTERISTICS**_
## **3.1 GYROSCOPE SPECIFICATIONS**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
**NOTE** : All specifications apply to Low-Power Mode and Low-Noise Mode, unless noted otherwise
|**PARAMETER**<br>~~ts~~|**CONDITIONS**<br>~~ts~~<br>~~rr~~|**MIN**<br>~~ts~~|**TYP**<br>~~ts~~|**MAX**<br>~~ts~~|**UNITS**<br>~~ts~~|**NOTES**<br>~~ts~~|
|---|---|---|---|---|---|---|
|**GYROSCOPE SENSITIVITY**<br>~~rr~~|||||||
|Full-Scale Range|GYRO_FS_SEL=0<br>~~RG~~<br>~~es~~|~~RG~~<br>~~rs~~|±250<br>~~RG~~<br>~~rs~~|~~RG~~<br>~~rs~~|dps<br>~~RG~~|1<br>~~RG~~|
||GYRO_FS_SEL=1<br>~~es~~|~~rs~~<br>~~es~~|±500<br>~~rs~~<br>~~sO~~|~~rs~~<br>~~sO~~|dps|1|
||GYRO_FS_SEL=2<br>~~es~~<br>~~es~~|~~rs~~<br>~~es~~<br>~~es~~<br>~~ss~~|±1000<br>~~rs~~<br>~~es~~<br>~~sO~~<br>~~ss~~|~~rs~~<br>~~es~~<br>~~sO~~<br>~~QO~~|dps<br>~~es~~<br>~~QO~~|1<br>~~es~~|
||GYRO_FS_SEL=3<br>~~es~~|~~es~~<br>~~es~~<br>~~ss~~|±2000<br>~~sO~~<br>~~es~~<br>~~ss~~|~~sO~~<br>~~es~~<br>~~QO~~|dps<br>~~es~~<br>~~QO~~|1<br>~~es~~|
|Gyroscope ADC Word Length<br>~~GG~~|~~GG~~|~~ss~~<br>~~GG~~<br>~~GO~~|16<br>~~ss~~<br>~~GG~~|~~QO~~<br>~~GG~~|bits<br>~~QO~~<br>~~GG~~|1<br>~~GG~~|
|Sensitivity Scale Factor|GYRO_FS_SEL=0<br>~~es~~|~~es~~<br>~~GO~~|131<br>~~es~~|~~es~~|LSB/(dps)<br>~~es~~|1<br>~~es~~|
||GYRO_FS_SEL=1<br>~~rs~~|~~GO~~<br>~~rs~~|65.5<br>~~rs~~|~~rs~~|LSB/(dps)<br>~~rs~~|1<br>~~rs~~|
||GYRO_FS_SEL=2<br>~~rs~~|~~rs~~|32.8<br>~~rs~~|~~rs~~|LSB/(dps)<br>~~rs~~|1<br>~~rs~~|
||GYRO_FS_SEL=3<br>~~rs~~|~~rs~~|16.4<br>~~rs~~|~~rs~~|LSB/(dps)<br>~~rs~~|1<br>~~rs~~|
|SensitivityScale Factor Tolerance<br>~~a~~|25°C<br>~~GQ~~|~~GQ~~|±1.5<br>~~GQ~~|~~GQ~~|%<br>~~GQ~~|2<br>~~GQ~~|
|Sensitivity Scale Factor Variation Over<br>Temperature<br>~~a~~<br>~~Ds~~|-40°C to +85°C<br>~~GQ~~<br>~~Ds~~|~~GQ~~<br>~~Ds~~|±3<br>~~GQ~~<br>~~Ds~~|~~GQ~~<br>~~Ds~~|%<br>~~GQ~~<br>~~Ds~~|2<br>~~GQ~~<br>~~Ds~~|
|Nonlinearity<br>~~RG~~|Best fit straight line;25°C<br>~~RG~~<br>~~rs~~|~~RG~~<br>~~(QOD~~|±0.1<br>~~RG~~<br>~~(QOD~~|~~RG~~<br>~~(QOD~~|%<br>~~RG~~<br>~~I~~|2,3<br>~~RG~~|
|Cross-Axis Sensitivity<br>~~rs~~|~~rs~~<br>~~rs~~|~~rs~~<br>~~(QOD~~|±2<br>~~rs~~<br>~~(QOD~~|~~rs~~<br>~~(QOD~~|%<br>~~rs~~<br>~~I~~|2,3<br>~~rs~~|
|**ZERO-RATE OUTPUT(ZRO)**<br>~~rs(QOD I~~|||||||
|Initial ZRO Tolerance<br>~~PO~~|25°C(Component-level)<br>~~PO~~<br>~~rs~~|~~PO~~<br>~~(QOD~~|±5<br>~~PO~~<br>~~(QOD~~|~~PO~~<br>~~(QOD~~|dps<br>~~PO~~<br>~~I~~|2<br>~~PO~~|
|ZRO Variation Over Temperature<br>~~rs~~|-40°C to +85°C<br>~~rs~~<br>~~rs~~|~~rs~~<br>~~(QOD~~|±0.05<br>~~rs~~<br>~~(QOD~~|~~rs~~<br>~~(QOD~~|dps/°C<br>~~rs~~<br>~~I~~|2<br>~~rs~~|
|**GYROSCOPE NOISE PERFORMANCE(GYRO_FS_SEL=0)**<br>~~rs(QOD I~~<br>~~eeeeeeee~~<br>~~ee~~|||||||
|Noise Spectral Density<br>~~ee~~|Based on Noise Bandwidth =<br>10 Hz<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|0.015<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|dps/√Hz<br>~~ee~~<br>~~ee~~|2<br>~~ee~~|
|**GYROSCOPE MECHANICAL FREQUENCIES**<br>~~GG~~|~~ee ~~<br>~~GG~~|25<br> ~~ee ~~<br>~~GG~~|27<br> ~~ee ~~<br>~~GG~~|29<br> ~~ee~~<br>~~GG~~|kHz<br>~~ee~~<br>~~GG~~|2<br>~~GG~~|
|**LOW PASS FILTER RESPONSE**<br>~~GG~~<br>~~GG~~|Programmable Range<br>~~GG~~<br>~~GG~~|5.7<br>~~GG~~<br>~~GG~~|~~GG~~<br>~~GG~~|197<br>~~GG~~<br>~~GG~~|Hz<br>~~GG~~<br>~~GG~~|1,3<br>~~GG~~<br>~~GG~~|
|**GYROSCOPE START-UP TIME**<br>~~GG~~<br>~~po6~~|From Full-ChipSleepmode<br>~~GG~~<br>~~6~~|~~GG~~|35<br>~~GG~~|~~GG~~|ms<br>~~GG~~|2,3<br>~~GG~~|
|**OUTPUT DATA RATE**<br>~~GG~~<br>~~po6~~|Low-Power Mode<br>~~GG~~<br>~~6~~|4.4<br>~~GG~~|~~GG~~|562.5<br>~~GG~~|Hz<br>~~GG~~|1<br>~~GG~~|
||Low-Noise Mode<br>GYRO_FCHOICE=1;<br>GYRO_DLPFCFG=x<br>~~6~~|4.4||1.125k|Hz||
||Low-Noise Mode<br>GYRO_FCHOICE=0;<br>GYRO_DLPFCFG=x<br>~~6~~|||9k|Hz||
## **Table 1. Gyroscope Specifications**
## **NOTES:**
1. Guaranteed by design. 2. Derived from validation or characterization of parts, not guaranteed in production. 3. Low-noise mode specification.
Page 11 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## **3.2 ACCELEROMETER SPECIFICATIONS**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
**NOTES** : All specifications apply to Low-Power Mode and Low-Noise Mode, unless noted otherwise
|**PARAMETER**<br>~~rs~~<br>~~Cn~~|**CONDITIONS**<br>~~rs~~<br>~~Gs~~|**MIN**<br>~~rs~~<br>~~Gs~~|**TYP**<br>~~rs~~<br>~~Gs~~|**MAX**<br>~~rs~~<br>~~Gs~~|**UNITS**<br>~~rs~~<br>~~Gs~~|**NOTES**<br>~~rs~~<br>~~Gs~~|
|---|---|---|---|---|---|---|
|**ACCELEROMETER SENSITIVITY**<br>~~rs~~<br>~~CnGs~~|||||||
|Full-Scale Range<br>~~Cn ~~|ACCEL_FS=0<br>~~Gs~~|~~Gs~~|±2<br>~~Gs~~|~~Gs~~|_G_<br>~~Gs~~|1<br>~~Gs~~|
||ACCEL_FS=1<br>~~ss~~|~~ss~~|±4<br>~~ss~~|~~ss~~|_G_<br>~~ss~~|1<br>~~ss~~|
||ACCEL_FS=2<br>~~DO~~|~~DO~~|±8<br>~~DO~~|~~DO~~|_G_<br>~~DO~~|1<br>~~DO~~|
||ACCEL_FS=3<br>~~GQ~~|~~GQ~~|±16<br>~~GQ~~<br>~~GQ~~|~~GQ~~<br>~~GQ~~|_G_<br>~~GQ~~|1<br>~~GQ~~|
|ADC Word Length<br>~~rf~~|Output in two’s complement format<br>~~rf~~|~~rf~~|16<br>~~rf~~<br>~~GQ~~|~~rf~~<br>~~GQ~~|Bits<br>~~rf~~|1<br>~~rf~~|
|Sensitivity Scale Factor<br>~~es~~|ACCEL_FS=0<br>~~QQ~~|~~QQ~~<br>~~eG~~|16,384<br>~~GQ~~<br>~~QQ~~<br>~~eG~~|~~GQ~~<br>~~QQ~~|LSB/_g_<br>~~QQ~~|1<br>~~QQ~~|
||ACCEL_FS=1<br>~~es~~|~~es~~<br>~~eG~~|8,192<br>~~es~~<br>~~eG~~|~~es~~|LSB/_g_<br>~~es~~|1<br>~~es~~|
||ACCEL_FS=2<br>~~ss~~|~~eG~~<br>~~ss~~|4,096<br>~~eG~~<br>~~ss~~|~~ss~~|LSB/_g_<br>~~ss~~|1<br>~~ss~~|
||ACCEL_FS=3<br>~~ss~~<br>|~~ss~~<br>|2,048<br>~~ss~~<br>~~GG~~<br>|~~ss~~<br>~~GG~~<br>|LSB/_g_<br>~~ss~~|1<br>~~ss~~|
|Initial Tolerance<br>~~RG~~<br>~~es rs~~|Component-level<br>~~RG~~<br>~~rs~~|~~RG~~<br>~~rs~~|±0.5<br>~~RG~~<br>~~GG~~<br>~~ss~~|~~RG~~<br>~~GG~~<br>~~ss~~|%<br>~~RG~~|2<br>~~RG~~|
|Sensitivity Change vs. Temperature<br>~~es rs~~|-40°C to +85°C ACCEL_FS=0<br>~~rs~~|~~rs~~|±0.026<br>~~GG~~<br>~~ss~~<br>~~OO~~|~~GG~~<br>~~ss~~<br>~~OO~~|%/ºC|2|
|Nonlinearity<br>~~es rs~~<br>~~Rf~~|Best Fit Straight Line<br>~~rs ~~<br>~~Rf~~<br>~~rr~~|~~rs ~~<br>~~Rf~~<br>~~Qe~~|±0.5<br>~~GG~~<br> ~~ss~~<br>~~Rf~~<br>~~OO~~<br>~~(rs~~|~~GG~~<br>~~ss~~<br>~~Rf~~<br>~~OO~~<br>~~(Rs~~|%<br>~~Rf~~|2,3<br>~~Rf~~|
|Cross-Axis Sensitivity<br>~~rr~~|~~rr~~<br>~~rr~~|~~rr~~<br>~~Qe~~|±2<br>~~OO~~<br>~~rr~~<br>~~(rs~~|~~OO~~<br>~~rr~~<br>~~(Rs~~|%<br>~~rr~~|2,3<br>~~rr~~|
|**ZERO-G OUTPUT**<br>~~rr~~<br>~~Qe~~<br>~~(rs(Rs~~<br>~~Ce~~<br>~~GO~~|||||||
|Initial Tolerance<br>~~RG~~|Component-level,all axes<br>~~RG~~|~~RG~~|±25<br>~~RG~~<br>~~GO~~<br>~~GQ~~|~~RG~~<br>~~GO~~<br>~~GQ~~|m_g_<br>~~RG~~|2<br>~~RG~~|
|Initial Tolerance<br>~~rf~~|Board-level,all axes<br>~~rf~~<br>~~rr~~|~~rf~~<br>~~Qe~~|±50<br>~~GO~~<br>~~rf~~<br>~~GQ~~<br>~~(rs~~|~~GO~~<br>~~rf~~<br>~~GQ~~<br>~~(Rs~~|m_g_<br>~~rf~~|2<br>~~rf~~|
|Zero-G Level Change vs. Temperature<br>~~rr~~|0°C to +85°C<br>~~rr~~<br>~~rr~~|~~rr~~<br>~~Qe~~|±0.80<br>~~GQ~~<br>~~rr~~<br>~~(rs~~|~~GQ~~<br>~~rr~~<br>~~(Rs~~|m_g_/°C<br>~~rr~~|2<br>~~rr~~|
|**ACCELEROMETER NOISE PERFORMANCE**<br>~~rr~~<br>~~Qe~~<br>~~(rs(Rs~~<br>~~Ce~~<br>~~GO~~<br>~~a~~|||||||
|Noise Spectral Density<br>~~RG~~<br>~~a~~|Based on Noise Bandwidth = 10 Hz<br>~~RG~~|~~RG~~|230<br>~~RG~~<br>~~GO~~|~~RG~~<br>~~GO~~|µ_g_/√Hz<br>~~RG~~|2<br>~~RG~~|
|**LOW PASS FILTER RESPONSE**<br>~~a~~<br>~~een~~|Programmable Range<br>~~QQ~~<br>~~en~~|5.7<br>~~QQ~~<br>~~GEE~~|~~GO~~<br>~~QQ~~<br>~~GEE~~|246<br>~~GO~~<br>~~QQ~~|Hz<br>~~QQ~~|1,3<br>~~QQ~~|
|**ACCELEROMETER STARTUP TIME**<br>~~a~~<br>~~een~~<br>~~fF~~|From Sleepmode<br>~~QQ~~<br>~~en~~|~~QQ~~<br>~~GEE~~|20<br>~~GO~~<br>~~QQ~~<br>~~GEE~~|~~GO~~<br>~~QQ~~|ms<br>~~QQ~~|2,3<br>~~QQ~~|
||From Cold Start,1 ms VDDramp<br>~~en~~<br>~~Gs~~<br>~~fF~~|~~GEE~~<br>~~Gs~~|30<br>~~GEE~~<br>~~Gs~~|~~Gs~~|ms<br>~~Gs~~|2,3<br>~~Gs~~|
|**OUTPUT DATA RATE**<br>~~een~~<br>~~fF~~|Low-Power Mode<br>~~en ~~<br>~~fF~~|0.27<br> ~~GEE ~~|~~GEE~~|562.5|Hz|1|
||Low-Noise Mode<br>ACCEL_FCHOICE=1;<br>ACCEL_DLPFCFG=x<br>~~fF~~|4.5||1.125k|Hz||
||Low-Noise Mode<br>ACCEL_FCHOICE=0;<br>ACCEL_DLPFCFG=x<br>~~fF~~|||4.5k|Hz||
**Table 2. Accelerometer Specifications**
- **NOTES:** 1. Guaranteed by design. 2. Derived from validation or characterization of parts, not guaranteed in production.
3. Low-noise mode specification.
Page 12 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## **3.3 MAGNETOMETER SPECIFICATIONS**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**PARAMETER**<br>~~ee~~|**CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|**NOTES**|
|---|---|---|---|---|---|---|
|**MAGNETOMETER SENSITIVITY**<br>~~ee~~<br>~~rr~~||||||~~rr~~|
|Full-Scale Range<br>~~GO~~|~~GO~~|~~GO~~|±4900<br>~~GO~~|~~GO~~|µT<br>~~GO~~|1<br>~~GO~~|
|Output Resolution<br>~~GQ~~|~~GQ~~|~~GQ~~|16<br>~~GQ~~<br>~~(~~|~~GQ~~<br>~~D~~|bits<br>~~GQ~~|1<br>~~GQ~~|
|SensitivityScale Factor<br>~~GO~~|~~GO~~|~~GO~~|0.15<br>~~GO~~<br>~~(~~|~~GO~~<br>~~D~~|µT/LSB<br>~~GO~~|1<br>~~GO~~|
|**ZERO-FIELD OUTPUT**<br>~~(~~<br>~~D~~<br>~~Ce~~<br>~~GR~~<br>~~Cn~~|||||||
|Initial Calibration Tolerance<br>~~Ge~~<br>~~Cn~~|~~Ge~~|-2000<br>~~Ge~~|~~Ge~~<br>~~GR~~|+2000<br>~~Ge~~<br>~~GR~~|LSB<br>~~Ge~~|2<br>~~Ge~~|
|**OTHER**<br>~~GR~~<br>~~Cn~~<br>~~eeeeee~~|||||||
|Output Data Rate<br>~~Cn~~<br>~~ee~~|~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|~~GR~~<br>~~ee~~<br>~~ee~~|100<br>~~GR~~<br>~~ee~~<br>~~ee~~|Hz<br>~~ee~~<br>~~ee~~|1<br>~~ee~~|
## **Table 3. Magnetometer Specifications**
## **NOTES:**
1. Guaranteed by design. 2. Derived from validation or characterization of parts, not guaranteed in production.
## **3.4 ELECTRICAL SPECIFICATIONS**
## **D.C. Electrical Characteristics**
|**PARAMETER**<br>~~Cc~~|**CONDITIONS**<br>|**MIN**<br>|**TYP**<br>|**MAX**|**UNITS**|**NOTES**|
|---|---|---|---|---|---|---|
|**SUPPLY VOLTAGES**<br>~~Ccre(QQ~~|||||||
|VDD<br>~~Ccre~~<br>~~Cn~~|~~(QQ~~|1.71<br>~~(QQ~~<br>~~QOD~~|1.8<br>~~(QQ~~<br>~~GO~~|3.6<br>~~GO~~|V<br>~~I~~|1|
|VDDIO<br>~~re~~<br>~~QD~~<br>~~Cn~~|~~(QQ~~<br>~~QD~~|1.71<br>~~(QQ~~<br>~~QD~~<br>~~QOD~~|1.8<br>~~(QQ~~<br>~~QD~~<br>~~GO~~|1.95<br>~~QD~~<br>~~GO~~|V<br>~~QD~~<br>~~I~~|1<br>~~QD~~|
|**SUPPLY CURRENTS**<br>~~QD~~<br>~~QODGO~~<br>~~I~~<br>~~Cn~~|||||||
|9-Axis (DMP disabled)<br>~~Cn~~<br>~~ee~~|Low-Noise Mode; Compass in Continuous<br>Mode<br>~~ee~~|~~QOD ~~<br>~~ee~~|3.11<br> ~~GO~~<br>~~ee ee~~|~~GO~~<br>~~ee~~|mA<br>~~I~~<br>~~ee~~|2<br>~~ee~~|
|Gyroscope Only<br>(DMP, Barometer & Accelerometer<br>disabled)<br>~~ee~~|Low-Power Mode, 102.3 Hz update rate, 1x<br>averaging filter<br>~~ee~~|~~ee~~|1.23<br>~~ee ee~~|~~ee~~|mA<br>~~ee~~|2<br>~~ee~~|
|Accelerometer Only<br>(DMP, Barometer & Gyroscope<br>disabled)<br>~~ee ~~|Low-Power Mode, 102.3 Hz update rate, 1x<br>averaging filter<br> ~~ee~~|~~ee~~|68.9<br>~~ee ee~~|~~ee~~|µA<br>~~ee~~|2<br>~~ee~~|
|Magnetometer Only<br>(DMP, Accelerometer & Gyroscope<br>disabled)<br>~~Cn~~|8 Hz update rate|~~QOD~~|90<br>~~Cn~~|~~Cn~~|µA|2|
|Full-ChipSleepMode<br>~~Qs~~<br>~~Cn~~|~~Qs~~|~~Qs~~<br>~~QOD~~|8<br>~~Qs~~<br>~~Cn~~|~~Qs~~<br>~~Cn~~|µA<br>~~Qs~~|2<br>~~Qs~~|
|**TEMPERATURE RANGE**<br>~~Qs~~<br>~~QODCn~~<br>~~Cn~~<br>~~ee~~|||||||
|Specified Temperature Range<br>~~Cn~~<br>~~ee~~|Performance parameters are not applicable<br>beyond Specified Temperature Range<br>~~ee~~<br>~~ee~~|-40<br>~~QOD ~~<br>~~ee~~|~~Cn~~<br>~~ee~~|+85<br>~~Cn~~<br>~~ee~~|°C<br>~~ee~~|1<br>~~ee~~|
Page 13 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## **A.C. Electrical Characteristics**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**PARAMETER**<br>~~rs~~|**CONDITIONS**<br>~~rs~~<br>~~err~~|**MIN**<br>~~rs~~<br>~~(rs~~|**TYP**<br>~~rs~~<br>~~(rs~~|**MAX**<br>~~rs~~<br>~~(Oe~~|**UNITS**<br>~~rs~~|**NOTES**<br>~~rs~~|
|---|---|---|---|---|---|---|
|**SUPPLIES**<br>~~err (rs (Oe~~<br>~~|~~|||||||
|Supply Ramp Time (TRAMP)<br>~~Cn~~|Monotonic ramp. Ramp<br>rate is 10% to 90% of the<br>final value.<br>|0.01<br>|20<br>|100<br>|ms<br>|1|
|**TEMPERATURE SENSOR**<br>~~Cn~~<br>~~eeoo~~<br>~~oo~~|||||||
|OperatingRange<br>~~CneG~~<br>~~ee~~|Ambient<br>~~eG~~<br>~~ee~~|-40<br>~~eG~~<br>~~ee~~|~~eG~~<br>~~ee~~|85<br>~~eG~~<br>~~oo~~|°C<br>~~eG~~<br>~~oo~~|1|
|Sensitivity<br>~~ee~~|Untrimmed<br>~~ee~~<br>~~rr~~|~~ee~~<br>~~D(~~|333.87<br>~~ee~~<br>~~D(~~|~~oo~~|LSB/°C<br>~~oo~~||
|Room TempOffset<br>~~ee~~<br>~~Rr~~|21°C<br>~~ee~~<br>~~Rr~~<br>~~rr~~|~~ee~~<br>~~Rr~~<br>~~D(~~|0<br>~~ee~~<br>~~Rr~~<br>~~D(~~|~~oo~~<br>~~Rr~~|LSB<br>~~oo~~<br>~~Rr~~||
|**POWER-ON RESET**<br>~~ee oo~~<br>~~oo~~<br>~~rr~~<br>~~D(~~|||||||
|SupplyRampTime(TRAMP)<br>~~a~~|Validpower-on RESET|0.01|20|100|ms|1|
|Start-uptime for register read/write<br>~~nO~~|Frompower-up<br>~~nO~~<br>~~a~~|~~nO~~|11<br>~~nO~~|100<br>~~nO~~<br>~~ee~~|ms<br>~~nO~~<br>~~ee~~|1<br>~~ee~~|
|**I2C ADDRESS**<br>~~ee~~|AD0 = 0<br>AD0 = 1<br>~~ee~~<br>~~a~~|~~ee~~|1101000<br>1101001<br>~~ee~~|~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|
|**DIGITAL INPUTS(FSYNC, AD0, SCLK, SDI, CS)**<br>~~ee~~<br>~~a~~<br>~~ee~~<br>~~a~~<br>~~Q~~<br>~~———~~<br>~~eeee~~<br>~~eeoo~~<br>~~ooie~~|||||||
|VIH,High Level Input Voltage<br>~~a~~<br>~~———~~|~~ee~~|0.7*VDDIO<br>~~Q~~<br>~~ee~~|~~Q~~<br>~~ee~~|~~oo~~|V<br>~~oo~~|1<br>~~ie~~|
|VIL,Low Level Input Voltage<br>~~a~~<br>~~———~~<br>~~Co~~|~~ee~~<br>|~~Q~~<br>~~ee~~<br>~~Qe~~<br>|~~Q~~<br>~~ee~~<br>|0.3*VDDIO<br>~~oo~~<br>|V<br>~~oo~~<br>||
|CI,Input Capacitance<br>~~———~~<br>~~rs~~<br>~~Co~~|~~ee~~<br>~~rs~~<br>|~~ee~~<br>~~rs~~<br>~~Qe~~<br>|< 10<br>~~ee~~<br>~~rs~~<br>|~~oo~~<br>~~rs~~<br>|pF<br>~~oo~~<br>~~rs~~<br>||
|**DIGITAL OUTPUT(SDO, INT)**<br>~~———~~<br>~~ee ee~~<br>~~ee oo~~<br>~~oo ie~~<br>~~Qe~~<br>~~Co~~<br>~~——~~|||||||
|VOH,High Level Output Voltage<br>~~CoeG~~<br>~~——~~|RLOAD=1 MΩ;<br>~~eG~~|0.9*VDDIO<br>~~Qe~~<br>~~eG~~|~~eG~~|~~eG~~|V<br>~~eG~~|1|
|VOL1,LOW-Level Output Voltage<br>~~eG~~<br>~~eG~~<br>~~——~~|RLOAD=1 MΩ;<br>~~eG~~<br>~~eG~~|~~eG~~<br>~~eG~~|~~eG~~<br>~~eG~~|0.1*VDDIO<br>~~eG~~<br>~~eG~~|V<br>~~eG~~<br>~~eG~~||
|VOL.INT1, INT Low-Level Output Voltage<br>~~eG~~<br>~~——~~|OPEN=1, 0.3 mA sink<br>Current<br>~~eG~~|~~eG~~|~~eG~~|0.1<br>~~eG~~|V<br>~~eG~~||
|Output Leakage Current<br>~~——~~<br>~~eG~~<br>~~er~~|OPEN=1<br>~~eG~~<br>~~QO~~|~~eG~~<br>~~QO~~|100<br>~~eG~~<br>~~QO~~|~~eG~~|nA<br>~~eG~~||
|tINT,INT Pulse Width<br>~~——~~<br>~~er~~|LATCH_INT_EN=0<br>~~QO~~|~~QO~~|50<br>~~QO~~||µs||
|**I2C I/O(SCL, SDA)**<br>~~——~~<br>~~er~~<br>~~QO~~|||||||
|VIL,LOW Level Input Voltage<br>~~RG~~|~~RG~~<br>~~ee ee~~|-0.5V<br>~~RG~~<br>~~ee~~|~~RG~~<br>~~ee~~|0.3*VDDIO<br>~~RG~~<br>~~ee~~|V<br>~~RG~~|1<br>~~ee~~|
|VIH, HIGH-Level Input Voltage<br>~~ee~~|~~ee~~<br>~~ee ee~~|0.7*VDDIO<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|VDDIO +<br>0.5V<br>~~ee~~<br>~~ee~~|V<br>~~ee~~||
|Vhys,Hysteresis<br>~~ee~~<br>~~eG~~|~~ee~~<br>~~ee ee~~<br>~~eG~~|~~ee~~<br>~~ee~~<br>~~eG~~|0.1*VDDIO<br>~~ee~~<br>~~ee~~<br>~~eG~~|~~ee~~<br>~~ee~~<br>~~eG~~|V<br>~~ee~~<br>~~eG~~||
|VOL,LOW-Level Output Voltage<br>~~eG~~<br>~~RG~~<br>~~a~~|3 mA sink current<br>~~eG~~<br>~~RG~~<br>~~ee ee~~|0<br>~~eG~~<br>~~RG~~<br>~~ee~~|~~eG~~<br>~~RG~~<br>~~ee~~|0.4<br>~~eG~~<br>~~RG~~<br>~~ee~~|V<br>~~eG~~<br>~~RG~~<br>~~ee~~||
|IOL, LOW-Level Output Current<br>~~ee~~<br>~~a~~|VOL=0.4V<br>VOL=0.6V<br>~~ee~~<br>~~ee ee~~|~~ee~~<br>~~ee~~|3<br>6<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|mA<br>mA<br>~~ee~~<br>~~ee~~||
|Output Leakage Current<br>~~a~~|~~ee ee~~<br>~~QO~~|~~ee~~<br>~~QO~~|100<br>~~ee~~<br>~~QO~~|~~ee~~|nA<br>~~ee~~||
|tof, Output Fall Time from VIHmaxto<br>VILmax<br>~~a~~<br>~~ee~~<br>~~Cc~~|Cbbus capacitance in pf<br>~~ee ee~~<br>~~QO~~<br>~~ee~~<br>|20+0.1Cb<br>~~ee~~<br>~~QO~~<br>~~ee~~<br>|~~ee~~<br>~~QO~~<br>~~ee~~<br>|250<br>~~ee ~~<br>~~ee~~<br>|ns<br> ~~ee~~<br>~~ee~~<br>||
|**AUXILLIARY I/O(AUX_CL, AUX_DA)**<br>~~Cc~~|||||||
|VIL,LOW-Level Input Voltage<br>~~CceG~~|~~eG~~<br>~~ee~~|-0.5V<br>~~eG~~|~~eG~~|0.3*VDDIO<br>~~eG~~|V<br>~~eG~~|1|
|VIH, HIGH-Level Input Voltage<br>~~es~~|~~es~~<br>~~ee~~|0.7* VDDIO<br>~~es~~|~~es~~|VDDIO +<br>0.5V<br>~~es~~|V<br>~~es~~||
|Vhys,Hysteresis<br>~~eG~~|~~ee~~<br>~~eG~~<br>~~ee ee~~|~~eG~~<br>~~ee~~|0.1* VDDIO<br>~~eG~~<br>~~ee~~|~~eG~~<br>~~ee~~|V<br>~~eG~~||
|VOL1, LOW-Level Output Voltage<br>~~ee~~|VDDIO > 2V; 1 mA sink<br>current<br>~~ee~~<br>~~ee ee~~<br>~~ee~~|0<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|0.4<br>~~ee~~<br>~~ee~~|V<br>~~ee~~||
|VOL3, LOW-Level Output Voltage<br>~~es~~|VDDIO < 2V; 1 mA sink<br>current<br>~~ee ee~~<br>~~es~~<br>~~ee~~<br>~~ee ee~~|0<br>~~ee~~<br>~~es~~<br>~~ee~~|~~ee~~<br>~~es~~<br>~~ee~~|0.2* VDDIO<br>~~ee~~<br>~~es~~<br>~~ee~~|V<br>~~es~~||
|IOL, LOW-Level Output Current<br>~~ee~~|VOL= 0.4V<br>VOL= 0.6V<br>~~ee~~<br>~~ee~~<br>~~ee ee~~|~~ee~~<br>~~ee~~|3<br>6<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~ee~~|mA<br>mA<br>~~ee~~||
|Output Leakage Current<br>~~ee~~<br>~~eG~~|~~ee~~<br>~~ee ee~~<br>~~eG~~|~~ee~~<br>~~ee~~<br>~~eG~~|100<br>~~ee~~<br>~~ee~~<br>~~eG~~|~~ee~~<br>~~ee~~<br>~~eG~~|nA<br>~~ee~~<br>~~eG~~||
|tof, Output Fall Time from VIHmaxto<br>VILmax<br>~~eG~~<br>~~ef~~|Cbbus capacitance in pF<br>~~eG~~<br>~~ef~~|20+0.1Cb<br>~~eG~~<br>~~ef~~|~~eG~~<br>~~ef~~|250<br>~~eG~~<br>~~ef~~|ns<br>~~eG~~<br>~~ef~~||
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Document Number: DS-000189 Revision: 1.3
## _**ICM-20948**_
|**PARAMETER**|**CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|**NOTES**|
|---|---|---|---|---|---|---|
|**INTERNAL CLOCK SOURCE**|||||||
|Clock Frequency Initial Tolerance|Accelerometer OnlyMode|-5||+5|%|1|
||Gyroscope or 6-Axis Mode<br>WITHOUT Timebase<br>Correction|-9||+9|%|1|
||Gyroscope or 6-Axis Mode<br>WITH Timebase Correction|-1||+1|||
|Frequency Variation over<br>Temperature|Accelerometer OnlyMode|-10||+10|%|1|
||Gyroscope or 6-Axis Mode||±1||%|1|
**Table 5. A.C. Electrical Characteristics**
## **NOTES:**
1. Derived from validation or characterization of parts, not guaranteed in production.
## **Other Electrical Specifications**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**PARAMETER**|**CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|**NOTES**|
|---|---|---|---|---|---|---|
|**SERIAL INTERFACE**|||||||
|SPI Operating Frequency, All<br>Registers Read/Write|Low Speed Characterization||100<br>±10%||kHz||
||High Speed Characterization||7 ±10%||MHz||
|I2C Operating Frequency|All registers,Fast-mode|||400|kHz||
||All registers,Standard-mode|||100|kHz||
**Table 6. Other Electrical Specifications**
## **NOTES:**
1. Derived from validation or characterization of parts, not guaranteed in production.
Page 15 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## ~~G2 TIDIC trvensense~~
## **3.5 I[2] C TIMING CHARACTERIZATION**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**PARAMETERS**<br>~~pT~~<br>~~**p**o~~|**CONDITIONS**<br>~~pT~~|**MIN**<br>~~pT~~|**TYPICAL**<br>~~pT~~|**MAX**<br>~~pT~~|**UNITS**<br>~~pT~~|**NOTES**<br>~~pT~~|
|---|---|---|---|---|---|---|
|**I2C TIMING**<br>~~**p**o~~|**I2C FAST-MODE**||||||
|fSCL,SCL Clock Frequency<br>~~**p**o~~|~~o~~|~~o~~|~~o~~|400<br>~~o~~|kHz<br>~~o~~|1,2<br>~~o~~|
|tHD.STA, (Repeated) START Condition Hold<br>Time<br>~~a~~|~~a~~|0.6<br>~~a~~|~~a~~|~~a~~|µs<br>~~a~~|1, 2<br>~~a~~|
|tLOW,SCL Low Period<br>~~po~~|~~po~~|1.3<br>~~po~~|~~po~~|~~po~~|µs<br>~~po~~|1,2<br>~~po~~|
|tHIGH,SCL High Period<br>~~po~~|~~po~~|0.6<br>~~po~~|~~po~~|~~po~~|µs<br>~~po~~|1,2<br>~~po~~|
|tSU.STA, Repeated START Condition Setup<br>Time<br>~~a~~|~~a~~|0.6<br>~~a~~|~~a~~|~~a~~|µs<br>~~a~~|1, 2<br>~~a~~|
|tHD.DAT,SDA Data Hold Time<br>~~po~~|~~po~~|0<br>~~po~~|~~po~~|~~po~~|µs<br>~~po~~|1,2<br>~~po~~|
|tSU.DAT,SDA Data SetupTime<br>~~po~~|~~po~~|100<br>~~po~~|~~po~~|~~po~~|ns<br>~~po~~|1,2<br>~~po~~|
|tr,SDA and SCL Rise Time<br>~~a~~|Cbbus cap. from 10 to 400pF|20+0.1Cb||300|ns|1,2|
|tf,SDA and SCL Fall Time<br>~~po~~|Cbbus cap. from 10 to 400pF<br>~~po~~|20+0.1Cb<br>~~po~~|~~po~~|300<br>~~po~~|ns<br>~~po~~|1,2<br>~~po~~|
|tSU.STO, STOP Condition Setup Time<br>~~sO~~|~~sO~~|0.6<br>~~sO~~|~~sO~~|~~sO~~|µs<br>~~sO~~|1, 2<br>~~sO~~|
|tBUF, Bus Free Time Between STOP and<br>START Condition<br>~~sO~~<br>~~a~~|~~sO~~|1.3<br>~~sO~~|~~sO~~|~~sO~~|µs<br>~~sO~~|1, 2<br>~~sO~~|
|Cb,Capacitive Load for each Bus Line<br>~~po~~|~~po~~|~~po~~|< 400<br>~~po~~|~~po~~|pF<br>~~po~~|1,2<br>~~po~~|
|tVD.DAT,Data Valid Time<br>~~pf~~|~~pf~~|~~pf~~|~~pf~~|0.9<br>~~pf~~|µs<br>~~pf~~|1,2<br>~~pf~~|
|tVD.ACK,Data Valid Acknowledge Time<br>~~pf~~<br>~~a~~|~~pf~~|~~pf~~|~~pf~~|0.9<br>~~pf~~|µs<br>~~pf~~|1,2<br>~~pf~~|
**Table 7. I[2] C Timing Characteristics**
## **NOTES:**
1. Timing Characteristics apply to both Primary and Auxiliary I[2] C Bus.
2. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets.
**==> picture [469 x 146] intentionally omitted <==**
**----- Start of picture text -----**<br>
tf tr tSU.DAT<br>SDA a 70% r 70% r n ii7 oor n nt Hoa .<br>30% 30%<br>tf continued below at A<br>tr tVD.DAT<br>SCL 70% tHD.DAT 70%<br>30% 30%<br>tHD.STA 1/fSCL tLOW 9 [th] clock cycle<br>S 1 [st] clock cycle tHIGH<br>tBUF<br>SDA 70%<br>A 30%<br>tSU.STA tHD.STA tVD.ACK tSU.STO<br>SCL 70%<br>30%<br>Sr 9 [th] clock cycle P S<br>**----- End of picture text -----**<br>
**Figure 1. I[2] C Bus Timing Diagram**
Page 16 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## **3.6 SPI TIMING CHARACTERIZATION**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**PARAMETERS**<br>~~rr~~|**CONDITIONS**<br>~~rr~~<br>~~rs~~|**MIN**<br>~~rr~~<br>~~(~~|**TYPICAL**<br>~~rr~~<br>~~(~~|**MAX**<br>~~rr~~<br>~~(~~|**UNITS**<br>~~rr~~|**NOTES**<br>~~rr~~|
|---|---|---|---|---|---|---|
|**SPI TIMING**<br>~~a~~|~~rs~~<br>~~a~~|~~(~~<br>~~a~~|~~(~~<br>~~a~~|~~(~~<br>~~a~~|~~a~~|~~a~~|
|fSCLK, SCLK Clock Frequency<br>~~a~~<br>~~Ce~~|~~a~~|~~a~~|~~a~~|7<br>~~a~~|MHz<br>~~a~~|~~a~~|
|tLOW, SCLK Low Period<br>~~Ce~~||64|||ns||
|tHIGH, SCLK High Period<br>~~Ce~~<br>~~Ce~~||64|||ns||
|tSU.CS, CS Setup Time<br>~~Ce~~<br>~~Ce~~||8|||ns||
|tHD.CS, CS Hold Time<br>~~Ce~~<br>~~Ce~~||500|||ns||
|tSU.SDI, SDI Setup Time<br>~~Ce~~<br>~~Ce~~||5|||ns||
|tHD.SDI, SDI Hold Time<br>~~Ce~~||7|||ns||
|tVD.SDO, SDO Valid Time<br>~~Ce~~|Cload= 20 pF|||59|ns||
|tHD.SDO, SDO Hold Time|Cload= 20 pF|6|||ns||
|tDIS.SDO,SDO Output Disable Time||||50|ns||
**Table 8. SPI Timing Characteristics (7 MHz)**
## **NOTES:**
1. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets
**==> picture [473 x 148] intentionally omitted <==**
**----- Start of picture text -----**<br>
CS 70%<br>30%<br>tHD;CS<br>tSU;CS tHIGH 1/fCLK<br>SCLK r 70% e ee cl<br>30%<br>tSU;SDI tHD;SDI tLOW<br>! !<br>_ [+] =<br>SDI 70% MSB IN LSB IN<br>30%<br>aos tVD;SDO tHD;SDO -2-o8 tDIS;SDO<br>SDO 70%<br>MSB OUT LSB OUT<br>30%<br>$$>HO<br>**----- End of picture text -----**<br>
**==> picture [125 x 8] intentionally omitted <==**
**----- Start of picture text -----**<br>
Figure 2. SPI Bus Timing Diagram<br>**----- End of picture text -----**<br>
Page 17 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## **3.7 ABSOLUTE MAXIMUM RATINGS**
Stress above those listed as “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to the absolute maximum ratings conditions for extended periods may affect device reliability.
|**PARAMETER**|**RATING**|
|---|---|
|SupplyVoltage,VDD|-0.5V to +4V|
|SupplyVoltage,VDDIO|-0.3V to +2.5V|
|REGOUT|-0.5V to 2V|
|Input Voltage Level(AUX_DA,AD0,FSYNC,INT,SCL,SDA)|-0.5V to VDD + 0.5V|
|Acceleration(AnyAxis,unpowered)|20,000_g_for 0.2 ms|
|OperatingTemperature Range|-40°C to +105°C|
|Storage Temperature Range|-40°C to +125°C|
|Electrostatic Discharge (ESD) Protection|2kV (HBM);<br>200V(MM)|
|Latch-up|JEDEC Class II (2),125°C<br>±100 mA|
**Table 9. Absolute Maximum Ratings**
Page 18 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## _**4 APPLICATIONS INFORMATION**_
## **4.1 PIN OUT DIAGRAM AND SIGNAL DESCRIPTION**
|**PIN NUMBER**<br>~~rs rs~~<br>~~re~~|**PIN NAME**<br>~~rs~~<br>~~rs~~|**PIN DESCRIPTION**|
|---|---|---|
|7<br>~~rs rs~~<br>~~re~~<br>~~ee~~|AUX_CL<br>~~rs~~<br>~~rs~~|I2C Master serial clock,for connectingto external sensors|
|8<br>~~re~~<br>~~ee~~<br>~~ee~~|VDDIO<br>~~rs~~<br>~~es~~|Digital I/O supplyvoltage|
|9<br>~~ee~~<br>~~ee~~<br>~~ee~~|AD0/SDO<br>~~es~~<br>~~es~~|I2C Slave Address LSB(AD0);SPI serial data output(SDO)|
|10<br>~~ee ~~<br>~~ee~~<br>~~ee ee~~|REGOUT<br> ~~es~~<br>~~es~~<br>~~eeGr~~|Regulator filter capacitor connection<br>~~Gr~~|
|11<br>~~ee~~<br>~~ee ee~~<br>~~re~~|FSYNC<br>~~es~~<br>~~eeGr~~<br>~~rs~~|Frame synchronization digital input. Connect to GND if unused<br>~~Gr~~|
|12<br>~~ee ee~~<br>~~re~~<br>~~ee~~|INT1<br>~~ee Gr~~<br>~~rs~~|Interrupt 1<br>~~Gr~~|
|13<br>~~re~~<br>~~ee~~<br>~~es~~|VDD<br>~~rs~~<br>~~ee~~|Power supplyvoltage|
|18<br>~~ee~~<br>~~es~~<br>~~es ee~~|GND<br>~~ee~~<br>~~ee~~|Power supply ground|
|19<br>~~es ~~<br>~~es ee~~<br>~~ee~~|RESV<br> ~~ee~~<br>~~ee~~<br>~~rs~~|Reserved. Do not connect.|
|20<br>~~es ee~~<br>~~ee~~<br>~~es~~|RESV<br>~~ee~~<br>~~rs~~<br>~~eG~~|Reserved. Connect to GND.<br>~~eG~~|
|21<br>~~ee~~<br>~~es~~<br>~~es~~|AUX_DA<br>~~rs~~<br>~~eG~~<br>~~eG~~|I2C master serial data,for connectingto external sensors<br>~~eG~~<br>~~eG~~|
|22<br>~~es~~<br>~~es~~<br>~~ee~~|nCS<br>~~eG~~<br>~~eG~~<br>~~ee~~|Chipselect(SPI mode only)<br>~~eG~~<br>~~eG~~|
|23<br>~~es~~<br>~~ee~~<br>~~ee es~~|SCL/SCLK<br>~~eG~~<br>~~ee~~<br>~~es~~|I2C serial clock(SCL);SPI serial clock(SCLK)<br>~~eG~~|
|24<br>~~ee ~~<br>~~ee es~~<br>~~ee ee~~|SDA/SDI<br> ~~ee~~<br>~~es~~<br>~~ee~~|I2C serial data(SDA);SPI serial data input(SDI)|
|1 – 6, 14 - 17<br>~~ee es~~<br>~~ee ee~~|NC<br>~~es~~<br>~~ee~~|Do not connect|
**Table 10. Signal Descriptions**
**NOTE** : Power up with SCL/SCLK and nCS pins held low is not a supported use case. In case this power up approach is used, software reset is required using the PWR_MGMT_1 register, prior to initialization.
**==> picture [173 x 225] intentionally omitted <==**
**----- Start of picture text -----**<br>
NC 1 18 GND<br>NC 2 17 NC<br>NC 3 16 NC<br>ICM-20948<br>NC 4 15 NC<br>NC 5 14 NC<br>NC 6 13 VDD<br>SDA / SDI SCL / SCLK nCS AUX_DA RESV RESV<br>24 23 22 21 20 19<br>7 8 9 10 11 12<br>AUX_CL VDDIO SDO / AD0 REGOUT FSYNC INT1<br>**----- End of picture text -----**<br>
**Figure 3. Pin out Diagram for ICM-20948 3 mm x 3 mm x 1 mm QFN**
Page 19 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## **4.2 TYPICAL OPERATING CIRCUIT**
**==> picture [458 x 243] intentionally omitted <==**
**----- Start of picture text -----**<br>
nCS<br>VDDIO<br>SCL SCLK<br>SDA SDI<br>NC 1 18 GND NC 1 18 GND<br>NC 2 17 NC NC 2 17 NC<br>NC 3 ICM-20948 16 NC NC 3 ICM-20948 16 NC<br>NC 4 15 NC NC 4 15 NC<br>NC 5 14 NC NC 5 14 NC<br>NC 6 13 VDD 1.71 – 3.6VDC NC 6 13 VDD 1.71 – 3.6VDC<br>C2, 0.1 µF C2, 0.1 µF<br>XX<br>1.71 – 1.95VDC 1.71 – 1.95VDC<br>C3, 0.1 µ F a | bh C1, 0.1 µF C3, 0.1 µ F 1, | h C1, 0.1 µF<br>AD0 SDO<br>(a) (b)<br>SDA / SDI SCL / SCLK nCS AUX_DA RESV RESV SDA / SDI SCL / SCLK nCS AUX_DA RESV RESV<br>24 23 22 21 20 19 24 23 22 21 20 19<br>7 8 9 10 11 12 7 8 9 10 11 12<br>AUX_CL VDDIO / AD0 REGOUT FSYNC INT1 AUX_CL VDDIO / AD0 REGOUT FSYNC INT1<br>SDO SDO<br>**----- End of picture text -----**<br>
**Figure 4. ICM-20948 Application Schematic (a) I[2] C operation (b) SPI operation**
Note that the INT pin should be connected to a GPIO pin on the system processor that is capable of waking the system processor from suspend mode.
I[2] C lines are open drain and pullup resistors (e.g. 10 kΩ) are required.
## **4.3 BILL OF MATERIALS FOR EXTERNAL COMPONENTS**
|**COMPONENT**|**LABEL**|**SPECIFICATION**|**QUANTITY**|
|---|---|---|---|
|Regulator Filter Capacitor|C1|Ceramic, X7R, 0.1 µF ±10%, 2V|1|
|VDD Bypass Capacitor|C2|Ceramic, X7R, 0.1 µF ±10%, 4V|1|
|VDDIO Bypass Capacitor|C3|Ceramic, X7R, 0.1 µF ±10%, 4V|1|
**Table 11. Bill of Materials**
## **4.4 EXPOSED DIE PAD PRECAUTIONS**
InvenSense products have very low active and standby current consumption. The exposed die pad is not required for heat sinking, and should not be soldered to the PCB. Failure to adhere to this rule can induce performance changes due to package thermo-mechanical stress. There is no electrical connection between the pad and the CMOS.
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## **4.5 BLOCK DIAGRAM**
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**----- Start of picture text -----**<br>
ICM-20948<br>Self<br>test X Accel ADC Interrupt INT1<br>Status<br>Register<br>nCS<br>Self test Y Accel ADC Slave I2C and AD0 / SDO<br>FIFO SPI Serial<br>Interface SCL / SCLK<br>BOS Self test Z Accel ADC User & Config - = ai a SDA / SDI<br>Registers<br>Master I2C Serial AUX_CL<br>Self Serial Interface<br>test X Gyro AD C Sensor Interface Bypass Mux AUX_DA<br>Registers<br>FSYNC<br>s Self test O Y Gyro a|| ADC = im:<br>Digital Motion<br>Processor<br>|_| Self test W Z Gyro e AD C (DMP)<br>a Signal Conditioning _ |<br>Temp Sensor ADC<br>| PF ADC ADC ADC<br>Ld So)<br>X Y Z<br>Compass Compass Compass<br>Lj LJ LI<br>Charge Bias & LDOs<br>Pump<br>VDD GND REGOUT<br>Signal Conditioning<br>**----- End of picture text -----**<br>
**Figure 5. ICM-20948 Block Diagram**
## **4.6 OVERVIEW**
The ICM-20948 is comprised of the following key blocks and functions:
- Three-axis MEMS rate gyroscope sensor with 16-bit ADCs and signal conditioning
- Three-axis MEMS accelerometer sensor with 16-bit ADCs and signal conditioning
- Three-axis MEMS magnetometer sensor with 16-bit ADCs and signal conditioning
- Digital Motion Processor (DMP) engine
- Primary I[2] C and SPI serial communications interfaces
- Auxiliary I[2] C serial interface
- Gyroscope, Accelerometer, and Magnetometer Self-Test
- Clocking
- Sensor Data Registers
- FIFO
- FSYNC
- Interrupts
- Digital-Output Temperature Sensor
- Bias and LDOs
- Charge Pump
- Power Modes
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## **4.7 THREE-AXIS MEMS GYROSCOPE WITH 16-BIT ADCS AND SIGNAL CONDITIONING**
The ICM-20948 consists of three independent vibratory MEMS rate gyroscopes, which detect rotation about the X-, Y-, and Z-Axes. When the gyros are rotated about any of the sense axes, the Coriolis Effect causes a vibration that is detected by a capacitive pickoff. The resulting signal is amplified, demodulated, and filtered to produce a voltage that is proportional to the angular rate. This voltage is digitized using individual on-chip 16-bit Analog-to-Digital Converters (ADCs) to sample each axis. The full-scale range of the gyro sensors may be digitally programmed to ±250, ±500, ±1000, or ±2000 degrees per second (dps).
## **4.8 THREE-AXIS MEMS ACCELEROMETER WITH 16-BIT ADCS AND SIGNAL CONDITIONING**
The ICM-20948’s 3-Axis accelerometer uses separate proof masses for each axis. Acceleration along a particular axis induces displacement on the corresponding proof mass, and capacitive sensors detect the displacement differentially. The ICM-20948’s architecture reduces the accelerometers’ susceptibility to fabrication variations as well as to thermal drift. When the device is placed on a flat surface, it will measure 0 _g_ on the X- and Y-axes and +1 _g_ on the Z-axis. The accelerometers’ scale factor is calibrated at the factory and is nominally independent of supply voltage. Each sensor has a dedicated sigma-delta ADC for providing digital outputs. The full scale range of the digital output can be adjusted to ±2 _g_ , ±4 _g_ , ±8 _g_ , or ±16 _g_ .
## **4.9 THREE-AXIS MEMS MAGNETOMETER WITH 16-BIT ADCS AND SIGNAL CONDITIONING**
The 3-axis magnetometer uses highly sensitive Hall sensor technology. The magnetometer portion of the IC incorporates magnetic sensors for detecting terrestrial magnetism in the X-, Y-, and Z-Axes, a sensor driving circuit, a signal amplifier chain, and an arithmetic circuit for processing the signal from each sensor. Each ADC has a 16-bit resolution and a full scale range of ±4900 µT.
## **4.10 DIGITAL MOTION PROCESSOR**
The embedded Digital Motion Processor (DMP) within the ICM-20948 offloads computation of motion processing algorithms from the host processor. The DMP acquires data from accelerometers, gyroscopes, and additional third party sensors such as magnetometers, and processes the data. The resulting data can be read from the FIFO. The DMP has access to the external pins, which can be used for generating interrupts.
The purpose of the DMP is to offload both timing requirements and processing power from the host processor. Typically, motion processing algorithms should be run at a high rate, often around 200 Hz, in order to provide accurate results with low latency. This is required even if the application updates at a much lower rate; for example, a low power user interface may update as slowly as 5 Hz, but the motion processing should still run at 200 Hz. The DMP can be used to minimize power, simplify timing, simplify the software architecture, and save valuable MIPS on the host processor for use in applications.
## **4.11 PRIMARY I[2] C AND SPI SERIAL COMMUNICATIONS INTERFACES**
The ICM-20948 communicates to a system processor using either a SPI or an I[2] C serial interface. The ICM-20948 always acts as a slave when communicating to the system processor. The LSB of the of the I[2] C slave address is set by pin 1 (AD0).
## **ICM-20948 Solution Using I[2] C Interface**
In Figure 6, the system processor is an I[2] C master to the ICM-20948. In addition, the ICM-20948 is an I[2] C master to the optional external sensor. The ICM-20948 has limited capabilities as an I[2] C Master, and depends on the system processor to manage the initial configuration of any auxiliary sensors. The ICM-20948 has an interface bypass multiplexer, which connects the system processor I[2] C bus pins 23 and 24 (SCL and SDA) directly to the auxiliary sensor I[2] C bus pins 7 and 21 (AUX_CL and AUX_DA).
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Once the auxiliary sensors have been configured by the system processor, the interface bypass multiplexer should be disabled so that the ICM-20948 auxiliary I[2] C master can take control of the sensor I[2] C bus and gather data from the auxiliary sensors.
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**----- Start of picture text -----**<br>
I [2] C Processor Bus: for reading all<br>Interrupt Status INT1 sensor data from MPU and for configuring external sensors (i.e.<br>Register compass in this example)<br>ICM-20948 AD0<br>VDD or GND<br>Slave I [2] C<br>or SPI SCL | SCL<br>Serial System<br>Interface SDA/SDI SDA Processor<br>FIFO<br>Sensor I [2] C Bus: for<br>configuring and reading<br>User & Config from external sensors<br>Registers<br>Optional<br>RegisterSensor Master IInterfaceSensor Serial [2] C Interface Bypass Mux AUX_CLAUX_DA ! SCLSDA External Sensor<br>Factory<br>Calibration<br>Digital<br>Motion<br>Processor<br>(DMP)<br>Interface bypass mux allows<br>direct configuration of<br>compass by system processor<br>Bias & LDOs<br>VDD GND REGOUT<br>**----- End of picture text -----**<br>
**Figure 6. ICM-20948 Solution Using I[2] C Interface**
## **ICM-20948 Solution Using SPI Interface**
In Figure 7, the system processor is an SPI master to the ICM-20948. Pins 9, 22, 23, and 24 are used to support the SDO, nCS, SCLK, and SDI signals for SPI communications. Because these SPI pins are shared with the I[2] C slave pins (9, 23 and 24), the system processor cannot access the auxiliary I[2] C bus through the interface bypass multiplexer, which connects the processor I[2] C interface pins to the sensor I[2] C interface pins. Since the ICM-20948 has limited capabilities as an I[2] C Master, and depends on the system processor to manage the initial configuration of any auxiliary sensors, another method must be used for programming the sensors on the auxiliary sensor I[2] C bus pins 7 and 21 (AUX_CL and AUX_DA).
When using SPI communications between the ICM-20948 and the system processor, configuration of devices on the auxiliary I[2] C sensor bus can be achieved by using I[2] C Slaves 0-4 to perform read and write transactions on any device and register on the auxiliary I[2] C bus. The I[2] C Slave 4 interface can be used to perform only single byte read and write transactions. Once the external sensors have been configured, the ICM-20948 can perform single or multi-byte reads using the sensor I[2] C bus. The read results from the Slave 0-3 controllers can be written to the FIFO buffer as well as to the external sensor registers.
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**----- Start of picture text -----**<br>
{TDK InvenSense<br>Processor SPI Bus: for reading all<br>data from MPU and for configuring<br>MPU and external sensors<br>Interrupt<br>Status INT1<br>Register<br>nCS nCS<br>ICM-20948 SDO SDI<br>Slave I [2] C System<br>or SPI SCLK SCLK Processor<br>Serial<br>Interface SDI SDO<br>FIFO<br>Sensor I [2] C Bus: for<br>configuring and<br>Config reading data from<br>Register external sensors<br>Optional<br>RegisterSensor Master IInterfaceSensor Serial [2] C Interface Bypass Mux AUX_CLAUX_DA ' SCLSDA External Sensor<br>Factory<br>Calibration<br>Digital<br>Motion<br>Processor<br>(DMP) I [2] C Master performs<br>read and write<br>transactions on<br>Sensor I [2] C bus.<br>Bias & LDOs<br>a<br>VDD GND REGOUT<br>Figure 7. ICM-20948 Solution Using SPI Interface<br>4.12 AUXILIARY I [2] C SERIAL INTERFACE<br>The ICM-20948 has an auxiliary I [2] C bus for communicating to external sensors. This bus has two operating modes:<br>**----- End of picture text -----**<br>
- I[2] C Master Mode: The ICM-20948 acts as a master to any external sensors connected to the auxiliary I[2] C bus
- • Pass-Through Mode: The ICM-20948 directly connects the primary and auxiliary I[2] C buses together, allowing the system processor to directly communicate with any external sensors.
## **Auxiliary I[2] C Bus Modes of Operation:**
- I[2] C Master Mode: Allows the ICM-20948 to directly access the data registers of external sensors. In this mode, the ICM-20948 directly obtains data from auxiliary sensors without intervention from the system applications processor. The I[2] C Master can be configured to read up to 24 bytes from up to 4 auxiliary sensors. A fifth sensor can be configured to work single byte read/write mode.
- Pass-Through Mode: Allows an external system processor to act as master and directly communicate to the external sensors connected to the auxiliary I[2] C bus pins (AUX_DA and AUX_CL). In this mode, the auxiliary I[2] C bus control logic of the ICM-20948 is disabled, and the auxiliary I[2] C pins AUX_CL and AUX_DA (pins 7 and 21) are connected to the main I[2] C bus (Pins 23 and 24) through analog switches internally. Pass-Through mode is useful for configuring the external sensors.
## **4.13 SELF-TEST**
Self-test allows for the testing of the mechanical and electrical portions of the sensors. The self-test for each measurement axis can be activated by means of the gyroscope and accelerometer self-test registers.
When the self-test is activated, the electronics cause the sensors to be actuated and produce an output signal. The output signal is used to observe the self-test response.
The self-test response is defined as follows:
SELF-TEST RESPONSE = SENSOR OUTPUT WITH SELF-TEST ENABLED – SENSOR OUTPUT WITHOUT SELF-TEST ENABLED
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The self-test response for each gyroscope axis is defined in the gyroscope specification table, while that for each accelerometer axis is defined in the accelerometer specification table.
When the value of the self-test response is within the specified min/max limits, the part has passed self-test. When the self-test response exceeds the min/max values, the part is deemed to have failed self-test. It is recommended to use InvenSense MotionApps software for executing self-test.
## **4.14 CLOCKING**
The internal system clock sources include: (1) an internal relaxation oscillator, and (2) a PLL with MEMS gyroscope oscillator as the reference clock. With the recommended clock selection setting (CLKSEL = 1), the best clock source for optimum sensor performance and power consumption will be automatically selected based on the power mode. Specifically, the internal relaxation oscillator will be selected when operating in accelerometer only mode, while the PLL will be selected whenever gyroscope is on, which includes gyroscope and 6-axis modes.
As clock accuracy is critical to the preciseness of distance and angle calculations performed by DMP, it should be noted that the internal relaxation oscillator and PLL show different performances in some aspects. The internal relaxation oscillator is trimmed to have a consistent operating frequency at room temperature, while the PLL clock frequency varies from part to part. The PLL frequency deviation from the nominal value in percentage is captured in register TIMEBASE_CORRECTION_PLL (detailed in section 12.5), and users can factor it in during distance and angle calculations to not sacrifice accuracy. Other than that, PLL has better frequency stability and lower frequency variation over temperature than the internal relaxation oscillator.
## **4.15 SENSOR DATA REGISTERS**
The sensor data registers contain the latest gyro, accelerometer, auxiliary sensor, and temperature measurement data. They are read-only registers, and are accessed via the serial interface. Data from these registers may be read anytime.
## **4.16 FIFO**
The ICM-20948 contains a FIFO of size 512 bytes (FIFO size will vary depending on DMP feature-set) that is accessible via the Serial Interface. The FIFO configuration register determines which data is written into the FIFO. Possible choices include gyro data, accelerometer data, temperature readings, auxiliary sensor readings, and FSYNC input.
A FIFO counter keeps track of how many bytes of valid data are contained in the FIFO. The FIFO register supports burst reads. The interrupt function may be used to determine when new data is available.
For further information regarding the FIFO, please refer to the Section 7.
## **4.17 FSYNC**
The FSYNC pin can be used from an external interrupt source to wake up the device from sleep. It is particularly useful in EIS applications to synchronize the gyroscope ODR with external inputs from an imaging sensor. Connecting the VSYNC or HSYNC pin of the image sensor subsystem to FSYNC on ICM-20948 allows timing synchronization between the two otherwise unconnected subsystems.
An FSYNC_ODR delay time register is used to capture the delay between an FSYNC pulse and the very next gyroscope data ready pulse.
## **4.18 INTERRUPTS**
Interrupt functionality is configured via the Interrupt Configuration register. Items that are configurable include the INT pin configuration, the interrupt latching and clearing method, and triggers for the interrupt. Section 5 provides a summary of interrupt sources. The interrupt status can be read from the Interrupt Status register.
For further information regarding interrupts, please refer to Section 7.
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## **4.19 DIGITAL-OUTPUT TEMPERATURE SENSOR**
An on-chip temperature sensor and ADC are used to measure the ICM-20948 die temperature. The readings from the ADC can be read from the FIFO or the Sensor Data registers.
## **4.20 BIAS AND LDOS**
The bias and LDO section generates the internal supply and the reference voltages and currents required by the ICM20948. Its two inputs are an unregulated VDD and a VDDIO logic reference supply voltage. The LDO output is bypassed by a capacitor at REGOUT. For further details on the capacitor, please refer to the Bill of Materials for External Components.
## **4.21 CHARGE PUMP**
An on-chip charge pump generates the high voltage required for the MEMS oscillators.
## **4.22 POWER MODES**
Table 12 lists the user-accessible power modes for ICM-20948.
|**MODE**<br>~~ee~~|**NAME**|**GYRO**|**ACCEL**|**MAGNETOMETER**|**DMP**|
|---|---|---|---|---|---|
|1<br>~~ee~~<br>~~a es~~|SleepMode<br>~~es~~|Off<br>~~es~~|Off<br>~~es~~|Off<br>~~es~~|Off<br>~~es~~|
|2<br>~~a sO~~|Low-Power Accelerometer Mode<br>~~sO~~|Off<br>~~sO~~|Duty-Cycled<br>~~sO~~|Off<br>~~sO~~|On or Off<br>~~sO~~|
|3<br>~~a sO~~<br>~~a~~<br>~~a~~|Low-Noise Accelerometer Mode<br>~~sO~~<br>~~es~~<br>~~rs~~|Off<br>~~sO~~<br>~~es~~<br>~~rs~~|On<br>~~sO~~<br>~~es~~|Off<br>~~sO~~<br>~~es~~|On or Off<br>~~sO~~<br>~~es~~|
|4<br>~~a~~<br>~~a~~<br>~~Rs~~|Gyroscope Mode<br>~~es~~<br>~~rs~~<br>~~sO~~|On<br>~~es~~<br>~~rs~~<br>~~sO~~|Off<br>~~es~~<br>~~sO~~|Off<br>~~es~~<br>~~sO~~|On or Off<br>~~es~~<br>~~sO~~|
|5<br>~~a~~<br>~~Rs~~|Magnetometer Mode<br>~~rs~~<br>~~sO~~|Off<br>~~rs~~<br>~~sO~~|Off<br>~~sO~~|On<br>~~sO~~|On or Off<br>~~sO~~|
|6<br>~~Rs~~<br>~~a~~|Accel + Gyro Mode<br>~~sO~~|On<br>~~sO~~|On<br>~~sO~~|Off<br>~~sO~~|On or Off<br>~~sO~~|
|7<br>~~a~~|Accel + Magnetometer Mode<br>|Off<br>|On<br>|On<br>|On or Off<br>|
|8<br>~~es~~|9-Axis Mode<br>~~es~~|On<br>~~es~~|On<br>~~es~~|On<br>~~es~~|On or Off<br>~~es~~|
**Table 12. Power Modes for ICM-20948**
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## _**5 PROGRAMMABLE INTERRUPTS**_
The ICM-20948 has a programmable interrupt system which can generate an interrupt signal on the INT pin. Status flags indicate the source of an interrupt. Interrupt sources may be enabled and disabled individually. Table 13 lists the interrupt sources.
**INTERRUPT SOURCE** DMP Interrupt Wake on Motion Interrupt PLL RDY Interrupt I2C Master Interrupt Raw Data Ready Interrupt FIFO Overflow Interrupt FIFO Watermark Interrupt
**Table 13. Interrupt Sources**
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## _**6 DIGITAL INTERFACE**_
## **6.1 I[2] C AND SPI SERIAL INTERFACES**
The internal registers and memory of the ICM-20948 can be accessed using either I[2] C at 400 kHz or SPI at 7 MHz. SPI operates in four-wire mode.
|**PIN NUMBER**|**PIN NAME**|**PIN DESCRIPTION**|
|---|---|---|
|9|AD0 / SDO|I2C Slave Address LSB (AD0); SPI serial data output (SDO)|
|22|nCS|Chip select (SPI mode only)|
|23|SCL/SCLK|I2C serial clock(SCL);SPI serial clock(SCLK)|
|24|SDA/SDI|I2C serial data(SDA);SPI serial data input(SDI)|
## **Table 14. Serial Interface**
**NOTE:** To prevent switching into I[2] C mode when using SPI, the I[2] C interface should be disabled by setting the _I2C_IF_DIS_ configuration bit. Setting this bit should be performed immediately after waiting for the time specified by the “Start-Up Time for Register Read/Write” in Section 6.3.
For further information regarding the _I2C_IF_DIS_ bit, please refer to Section 7.
## **6.2 I[2] C INTERFACE**
I[2] C is a two-wire interface comprised of the signals serial data (SDA) and serial clock (SCL). In general, the lines are open-drain and bi-directional. In a generalized I[2] C interface implementation, attached devices can be a master or a slave. The master device puts the slave address on the bus, and the slave device with the matching address acknowledges the master.
The ICM-20948 always operates as a slave device when communicating to the system processor, which thus acts as the master. SDA and SCL lines typically need pull-up resistors to VDD. The maximum bus speed is 400 kHz.
The slave address of the ICM-20948 is b110100X which is 7 bits long. The LSB bit of the 7-bit address is determined by the logic level on pin AD0. This allows two ICM-20948s to be connected to the same I[2] C bus. When used in this configuration, the address of the one of the devices should be b1101000 (pin AD0 is logic low) and the address of the other should be b1101001 (pin AD0 is logic high).
## **6.3 I[2] C COMMUNICATIONS PROTOCOL**
_START (S) and STOP (P) Conditions_
Communication on the I[2] C bus starts when the master puts the START condition (S) on the bus, which is defined as a HIGH-to-LOW transition of the SDA line while SCL line is HIGH (see figure below). The bus is considered to be busy until the master puts a STOP condition (P) on the bus, which is defined as a LOW to HIGH transition on the SDA line while SCL is HIGH (see figure below).
Additionally, the bus remains busy if a repeated START (Sr) is generated instead of a STOP condition.
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**----- Start of picture text -----**<br>
SDA<br>| |<br>SCL<br>S P<br>START condition STOP condition<br>**----- End of picture text -----**<br>
**Figure 8. START and STOP Conditions**
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## _Data Format / Acknowledge_
I[2] C data bytes are defined to be 8-bits long. There is no restriction to the number of bytes transmitted per data transfer. Each byte transferred must be followed by an acknowledge (ACK) signal. The clock for the acknowledge signal is generated by the master, while the receiver generates the actual acknowledge signal by pulling down SDA and holding it low during the HIGH portion of the acknowledge clock pulse.
If a slave is busy and cannot transmit or receive another byte of data until some other task has been performed, it can hold SCL LOW, thus forcing the master into a wait state. Normal data transfer resumes when the slave is ready, and releases the clock line (refer to the following figure).
**==> picture [409 x 162] intentionally omitted <==**
**----- Start of picture text -----**<br>
DATA OUTPUT BY<br>TRANSMITTER (SDA)<br>a GD OG<br>not acknowledge<br>DATA OUTPUT BY<br>ee<br>RECEIVER (SDA)<br>acknowledge<br>7 —<br>SCL FROM<br>1 2 8 9<br>MASTER<br>clock pulse for<br>START acknowledgement<br>condition<br>**----- End of picture text -----**<br>
**Figure 9. Acknowledge on the I[2] C Bus**
## _Communications_
After beginning communications with the START condition (S), the master sends a 7-bit slave address followed by an 8[th] bit, the read/write bit. The read/write bit indicates whether the master is receiving data from or is writing to the slave device. Then, the master releases the SDA line and waits for the acknowledge signal (ACK) from the slave device. Each byte transferred must be followed by an acknowledge bit. To acknowledge, the slave device pulls the SDA line LOW and keeps it LOW for the high period of the SCL line. Data transmission is always terminated by the master with a STOP condition (P), thus freeing the communications line. However, the master can generate a repeated START condition (Sr), and address another slave without first generating a STOP condition (P). A LOW to HIGH transition on the SDA line while SCL is HIGH defines the stop condition. All SDA changes should take place when SCL is low, with the exception of start and stop conditions.
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**----- Start of picture text -----**<br>
SDA<br>SCL 1 – 7 8 9 1 – 7 8 9 1 – 7 8 9<br>S P<br>—) ed EE<br>START ADDRESS R/W ACK DATA ACK DATA ACK STOP<br>condition condition<br>**----- End of picture text -----**<br>
**Figure 10. Complete I[2] C Data Transfer**
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To write the internal ICM-20948 registers, the master transmits the start condition (S), followed by the I[2] C address and the write bit (0). At the 9[th] clock cycle (when the clock is high), the ICM-20948 acknowledges the transfer. Then the master puts the register address (RA) on the bus. After the ICM-20948 acknowledges the reception of the register address, the master puts the register data onto the bus. This is followed by the ACK signal, and data transfer may be concluded by the stop condition (P). To write multiple bytes after the last ACK signal, the master can continue outputting data rather than transmitting a stop signal. In this case, the ICM-20948 automatically increments the register address and loads the data to the appropriate register. The following figures show single and two-byte write sequences.
_Single-Byte Write Sequence_
Master S AD+W RA DATA P Slave ACK ACK ACK ~~ee~~ _Burst Write Sequence_ Master S AD+W RA DATA DATA P Slave ACK ACK ACK ACK ~~ee~~
_Burst Write Sequence_
To read the internal ICM-20948 registers, the master sends a start condition, followed by the I[2] C address and a write bit, and then the register address that is going to be read. Upon receiving the ACK signal from the ICM-20948, the master transmits a start signal followed by the slave address and read bit. As a result, the ICM-20948 sends an ACK signal and the data. The communication ends with a not acknowledge (NACK) signal and a stop bit from master. The NACK condition is defined such that the SDA line remains high at the 9[th] clock cycle. The following figures show single and two-byte read sequences.
_Single-Byte Read Sequence_
|Master<br>S<br>AD+W<br>RA<br>S<br>AD+R<br>NACK<br>P<br>Slave<br>ACK<br>ACK<br>ACK<br>DATA<br>~~ee~~<br>~~ee~~|Master<br>S<br>AD+W<br>RA<br>S<br>AD+R<br>NACK<br>P<br>Slave<br>ACK<br>ACK<br>ACK<br>DATA<br>~~ee~~<br>~~ee~~|Master<br>S<br>AD+W<br>RA<br>S<br>AD+R<br>NACK<br>P<br>Slave<br>ACK<br>ACK<br>ACK<br>DATA<br>~~ee~~<br>~~ee~~|Master<br>S<br>AD+W<br>RA<br>S<br>AD+R<br>NACK<br>P<br>Slave<br>ACK<br>ACK<br>ACK<br>DATA<br>~~ee~~<br>~~ee~~|Master<br>S<br>AD+W<br>RA<br>S<br>AD+R<br>NACK<br>P<br>Slave<br>ACK<br>ACK<br>ACK<br>DATA<br>~~ee~~<br>~~ee~~|Master<br>S<br>AD+W<br>RA<br>S<br>AD+R<br>NACK<br>P<br>Slave<br>ACK<br>ACK<br>ACK<br>DATA<br>~~ee~~<br>~~ee~~|Master<br>S<br>AD+W<br>RA<br>S<br>AD+R<br>NACK<br>P<br>Slave<br>ACK<br>ACK<br>ACK<br>DATA<br>~~ee~~<br>~~ee~~|Master<br>S<br>AD+W<br>RA<br>S<br>AD+R<br>NACK<br>P<br>Slave<br>ACK<br>ACK<br>ACK<br>DATA<br>~~ee~~<br>~~ee~~||||
|---|---|---|---|---|---|---|---|---|---|---|
|_Burst Read Sequence_|||||||||||
|**6.4**<br>**I2C TERMS**<br>Master<br>S<br>AD+W<br>Slave<br>~~**e**s~~|RA<br>S<br>AD+R<br>ACK<br>NACK<br>P<br>ACK<br>ACK<br>ACK<br>DATA<br>DATA<br>~~e~~||||||||||
|**SIGNAL**<br>**DESCRIPTION**|||||||||||
|S|Start Condition: SDA goes from high to low while SCL is high||||||||||
|AD|Slave I2C address||||||||||
|W|Write bit (0)||||||||||
|R|Read bit (1)||||||||||
|ACK|Acknowledge: SDA line is low while the SCL line is high at the 9|Acknowledge: SDA line is low while the SCL line is high at the 9|||Acknowledge: SDA line is low while the SCL line is high at the 9thclock cycle||||||
|NACK|NACK<br>Not-Acknowledge: SDA line stays high at the 9thclock cycle||||||||||
|RA|ICM-20948 internal register address||||||||||
|DATA|DATA<br>Transmit or received data||||||||||
|P|Stop condition: SDA going from low to high while SCL is high|Stop condition: SDA going from low to high while SCL is high|||||||||
_Burst Read Sequence_
**Table 15. I[2] C Terms**
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Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## **6.5 SPI INTERFACE**
SPI is a 4-wire synchronous serial interface that uses two control lines and two data lines. The ICM-20948 always operates as a Slave device during standard Master-Slave SPI operation.
With respect to the Master, the Serial Clock output (SCLK), the Serial Data Output (SDO) and the Serial Data Input (SDI) are shared among the Slave devices. Each SPI slave device requires its own Chip Select (CS) line from the master.
CS goes low (active) at the start of transmission and goes back high (inactive) at the end. Only one CS line is active at a time, ensuring that only one slave is selected at any given time. The CS lines of the non-selected slave devices are held high, causing their SDO lines to remain in a high-impedance (high-z) state so that they do not interfere with any active devices.
_SPI Operational Features_
1. Data is delivered MSB first and LSB last
2. Data is latched on the rising edge of SCLK
3. Data should be transitioned on the falling edge of SCLK
4. The maximum frequency of SCLK is 7MHz
5. SPI read and write operations are completed in 16 or more clock cycles (two or more bytes). The first byte contains the SPI Address, and the following byte(s) contain(s) the SPI data. The first bit of the first byte contains the Read/Write bit and indicates the Read (1) or Write (0) operation. The following 7 bits contain the Register Address. In cases of multiple-byte Read/Writes, data is two or more bytes:
**==> picture [204 x 248] intentionally omitted <==**
**----- Start of picture text -----**<br>
SPI Address format<br>MSB LSB<br>oo R/W A6 A5 A4 A3 A2 A1 A0<br>SPI Data format<br>MSB LSB<br>D7 D6 D5 D4 D3 D2 D1 D0<br>oo<br>SCLK<br>SDI<br>SPI Master SDO SPI Slave 1<br>/CS1 /CS<br>/CS2<br>SCLK<br>SDI<br>SDO<br>SPI Slave 2<br>/CS<br>**----- End of picture text -----**<br>
6. Supports Single or Burst Read/Writes.
**Figure 11. Typical SPI Master / Slave Configuration**
Page 31 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## _**7 REGISTER MAP FOR GYROSCOPE AND ACCELEROMETER**_
The following table lists the register map for the ICM-20948, for user banks 0, 1, 2, 3.
## **7.1 USER BANK 0 REGISTER MAP**
|**ADDR**<br>**(HEX)**<br>~~a~~|**ADDR**<br>**(DEC.)**<br>~~a~~|**REGISTER NAME**<br>~~ee~~|**SERIAL**<br>**I/F**<br>~~ee~~|**BIT7**<br>~~ee~~|**BIT6**<br>~~ee~~|**BIT5**<br>~~ee~~|**BIT4**<br>~~ee~~|**BIT3**<br>~~ee~~|**BIT2**<br>~~ee~~|**BIT1**<br>~~ee~~|**BIT0**|
|---|---|---|---|---|---|---|---|---|---|---|---|
|00<br>~~a~~<br>~~a~~<br>~~a~~|0<br>~~a~~|WHO_AM_I<br>~~ee~~<br>~~ses~~<br>~~se~~|R<br>~~ee ~~<br>~~ses~~<br>~~se~~|WHO_AM_I[7:0]<br> ~~ee~~<br>~~ee ee ee~~<br>~~rs~~<br>~~fe~~||||||||
|03<br>~~a~~<br>~~a~~|3|USER_CTRL<br>~~ses~~<br>~~se~~|R/W<br>~~ses~~<br>~~se~~|DMP_EN<br>~~rs~~|FIFO_EN|I2C_MST_EN<br>~~fe~~|I2C_IF_DIS<br>~~fe~~|DMP_RST|SRAM_RST|I2C_MST_RST|-|
|05<br>~~a~~<br>~~aa~~|5<br>~~aa~~|LP_CONFIG<br>~~se~~<br>~~aa~~|R/W<br>~~se ~~|~~rs~~|I2C_MST_CY<br>CLE|ACCEL_CYCLE<br>~~fe~~|GYRO_CYCLE<br>~~fe~~|-||||
|06<br>~~a~~<br>~~a~~|6<br>~~a~~a|PWR_MGMT_1<br>~~ses~~|R/W<br>~~ses~~|DEVICE_RESE<br>T<br>~~rr~~|SLEEP<br>~~rr~~|LP_EN|-|TEMP_DIS|CLKSEL[2:0]|||
|07<br>~~a~~<br>~~es~~|7<br>~~es~~|PWR_MGMT_2<br>~~ses~~<br>~~ee~~|R/W<br>~~ses~~<br>~~ee~~|-<br>~~rr~~<br>~~eees~~||DISABLE_ACCEL<br>~~eere~~|||DISABLE_GYRO|||
|0F<br>~~a~~<br>~~es~~<br>~~ee~~|15<br>~~es~~<br>~~ee~~|INT_PIN_CFG<br>~~ses~~<br>~~ee~~|R/W<br>~~ses ~~<br>~~ee~~<br>~~ee~~|INT1_ACTL<br> ~~rr~~<br>~~ee~~<br>~~es~~|INT1_OPEN<br>~~rr~~<br>~~es~~|INT1_LATCH_<br>INT_EN<br>~~ee~~|INT_ANYRD_<br>2CLEAR<br>~~re~~|ACTL_FSYNC|FSYNC_INT_<br>MODE_EN|BYPASS_EN|-|
|10<br>~~es~~<br>~~es~~<br>~~ee~~|16<br>~~es ~~<br>~~es~~<br>~~ee~~|INT_ENABLE<br> ~~ee ~~<br>~~es~~|R/W<br> ~~ee ~~<br>~~es~~<br>~~ee~~|REG_WOF_E<br>N<br> ~~ee ~~<br>~~es~~<br>~~es~~|-<br> ~~es ee re~~<br>~~es~~|||WOM_INT_E<br>N<br>~~es~~|PLL_RDY_EN<br>~~es~~|DMP_INT1_E<br>N<br>~~es~~|I2C_MST_INT<br>_EN<br>~~es~~|
|11<br>~~ee~~<br>~~a~~|17<br>~~ee~~<br>~~a~~|INT_ENABLE_1<br>~~se~~<br>~~es es~~|R/W<br>~~ee ~~<br>~~se~~<br>~~es~~|-<br> ~~es~~<br>~~fe~~|||||||RAW_DATA_<br>0_RDY_EN<br>~~fe~~|
|12<br>~~a~~<br>~~a~~|18<br>~~a~~<br>~~ss~~|INT_ENABLE_2<br>~~es es~~<br>~~ss es~~|R/W<br>~~es~~<br>~~es~~|-<br>~~fe~~|||FIFO_OVERFLOW_EN[4:0]<br>~~fe~~|||||
|13<br>~~a~~<br>~~a~~<br>~~a~~|19<br>~~a~~<br>~~ss~~<br>|INT_ENABLE_3<br>~~es es~~<br>~~ss es~~<br>|R/W<br>~~es~~<br>~~es~~<br>~~ee~~<br>|-<br>~~fe~~<br>~~eeeees~~|||FIFO_WM_EN[4:0]<br>~~fe~~<br>~~ee~~|||||
|17<br>~~a ~~<br>~~ee~~<br>~~a~~<br>~~a~~|23<br> ~~ss~~<br>~~ee~~<br>~~a~~<br>|I2C_MST_STATUS<br>~~ss es~~<br>~~ee~~<br>~~es~~|R/C<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~rs~~|PASS_THROU<br>GH<br>~~ee~~<br>~~ee~~|I2C_SLV4_DO<br>NE<br>~~ee~~<br>~~ee~~|I2C_LOST_AR<br>B<br>~~ee~~<br>~~es~~|I2C_SLV4_NA<br>CK<br>~~ee~~<br>~~ee~~|I2C_SLV3_NA<br>CK<br>~~ee~~|I2C_SLV2_NA<br>CK<br>~~ee~~|I2C_SLV1_NA<br>CK<br>~~ee~~|I2C_SLV0_NA<br>CK<br>~~ee~~|
|19<br>~~a~~<br>~~a~~<br>~~a~~|25<br>~~a~~<br>~~a~~<br>|INT_STATUS<br>~~es~~<br>~~es~~<br>|R/C<br>~~ee~~<br>~~rs~~<br>~~es~~<br>|-<br>~~eeeeesee~~<br>~~ee~~||||WOM_INT<br>~~ee~~|PLL_RDY_INT<br>~~ee~~|DMP_INT1<br>~~ee~~|I2C_MST_INT<br>~~ee~~|
|1A<br>~~a ~~<br>~~a~~<br>~~a~~<br>~~a~~|26<br> ~~a~~<br>~~a~~<br>~~ss~~<br>|INT_STATUS_1<br>~~es~~<br>~~es~~<br>~~ss~~<br>|R/C<br>~~ee ~~<br>~~rs~~<br>~~es~~<br>~~es~~<br>|-<br> ~~ee ee es ee~~<br>~~ee~~|||||||RAW_DATA_<br>0_RDY_INT<br>~~ee~~|
|1B<br> <br>~~a ~~<br>~~a ~~<br>~~a~~<br>~~a~~|27<br> ~~a ~~<br> ~~a~~<br> ~~ss~~<br>~~a~~|INT_STATUS_2<br> ~~es ~~<br>~~es~~<br>~~ss~~<br>~~es~~|R/C<br> ~~rs~~<br>~~es~~<br>~~es~~<br>~~es~~|-<br>~~ee~~|||FIFO_OVERFLOW_INT[4:0]<br>~~ee~~|||||
|1C<br> <br>~~a~~<br>~~a~~<br>~~a~~|28<br> ~~ss~~<br>~~a~~<br>|INT_STATUS_3<br>~~ss~~<br>~~es~~<br>~~es~~<br>|R/C<br>~~es~~<br>~~es~~<br>~~rs~~<br>|-|||FIFO_WM_INT[4:0]|||||
|28<br> <br>~~a ~~<br>~~a~~<br>~~a~~<br>~~a~~|40<br> ~~ss~~<br> ~~a ~~<br>~~a~~|DELAY_TIMEH<br>~~ss~~<br> ~~es~~<br>~~es~~<br>~~es~~|R<br>~~es~~<br>~~es~~<br>~~rs~~<br>~~ee~~|DELAY_TIMEH[7:0]||||||||
|29<br>~~a~~<br>~~a~~<br>~~a~~|41<br>~~a~~<br>|DELAY_TIMEL<br>~~es~~<br>~~es~~<br>~~es~~<br>|R<br>~~rs~~<br>~~ee~~<br>~~es~~<br>|DELAY_TIMEL[7:0]||||||||
|2D<br>~~a ~~<br>~~a~~<br>~~a~~<br>~~a~~|45<br> ~~a ~~<br>~~a~~<br>|ACCEL_XOUT_H<br>~~es ~~<br> ~~es~~<br>~~es~~<br>~~es~~|R<br> ~~rs~~<br>~~ee~~<br>~~es~~<br>~~ee~~|ACCEL_XOUT_H[7:0]||||||||
|2E<br>~~a~~<br>~~a~~<br>~~a~~|46<br>~~a~~<br>~~a~~|ACCEL_XOUT_L<br>~~es~~<br>~~es~~<br>~~ee ee~~|R<br>~~es~~<br>~~ee~~<br>~~ee~~|ACCEL_XOUT_L[7:0]||||||||
|2F<br>~~a ~~<br>~~a~~<br>~~a~~<br>~~a~~|47<br> ~~a~~<br>~~a~~<br>|ACCEL_YOUT_H<br>~~es~~<br>~~es~~<br>~~ee ee~~<br>~~es~~<br>|R<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~es~~<br>|ACCEL_YOUT_H[7:0]||||||||
|30<br> <br>~~a ~~<br>~~a~~<br>~~a~~<br>~~a~~|48<br> ~~a ~~<br> ~~a~~<br>~~a~~|ACCEL_YOUT_L<br> ~~es~~<br>~~ee ee~~<br>~~es~~<br>~~es~~|R<br>~~ee~~<br>~~ee~~<br>~~es~~<br>~~ee~~|ACCEL_YOUT_L[7:0]||||||||
|31<br>~~a~~<br>~~a~~<br>~~a~~|49<br>~~a~~<br>|ACCEL_ZOUT_H<br>~~es~~<br>~~es~~<br>~~e~~~~**s**~~|R<br>~~es~~<br>~~ee~~<br>~~es~~|ACCEL_ZOUT_H[7:0]||||||||
|32<br>~~a ~~<br>~~a~~<br>~~a~~|50<br> ~~a ~~<br>|ACCEL_ZOUT_L<br>~~es~~<br> ~~es~~<br>~~e~~~~**s**~~|R<br>~~es~~<br>~~ee~~<br>~~es~~|ACCEL_ZOUT_L[7:0]||||||||
|33<br>~~a ~~<br>~~a~~|51<br> ~~a~~<br>~~ss~~|GYRO_XOUT_H<br>~~e~~~~**s**~~<br>~~s~~<br>~~ss rs~~|R<br>~~es~~<br>~~s~~<br>~~rs~~|GYRO_XOUT_H[7:0]||||||||
|34<br>~~a~~<br>~~a~~|52<br>~~ss~~<br>~~a~~|GYRO_XOUT_L<br>~~ss rs~~<br>~~es ee~~|R<br>~~rs~~<br>~~ee~~|GYRO_XOUT_L[7:0]||||||||
|35<br>~~a ~~<br>~~a~~|53<br> ~~ss~~<br>~~a~~|GYRO_YOUT_H<br>~~ss rs~~<br>~~es ee~~|R<br>~~rs~~<br>~~ee~~|GYRO_YOUT_H[7:0]||||||||
|36<br>~~a ~~<br>~~a~~<br>~~a~~|54<br> ~~a~~<br>~~a~~|GYRO_YOUT_L<br>~~es ee~~<br>~~ss~~<br>~~es ee~~|R<br>~~ee~~<br>~~ss~~<br>~~ee~~|GYRO_YOUT_L[7:0]||||||||
|37<br>~~a~~<br>~~a~~|55<br>~~a~~|GYRO_ZOUT_H<br>~~es ee~~<br>~~es es~~|R<br>~~ee~~<br>~~es~~|GYRO_ZOUT_H[7:0]||||||||
|38<br>~~a ~~<br>~~a~~<br>~~a~~|56<br> ~~a~~<br>~~a~~|GYRO_ZOUT_L<br>~~es ee~~<br>~~es es~~<br>~~es ee~~|R<br>~~ee~~<br>~~es~~<br>~~ee~~|GYRO_ZOUT_L[7:0]||||||||
|39<br>~~a~~<br>~~a~~<br>~~a~~|57<br>~~a~~|TEMP_OUT_H<br>~~es es~~<br>~~es ee~~<br>~~es es~~|R<br>~~es~~<br>~~ee~~<br>~~es~~|TEMP_OUT_H[7:0]||||||||
|3A<br>~~a ~~<br>~~a~~<br>~~a~~|58<br> ~~a~~<br>~~a~~|TEMP_OUT_L<br>~~es ee~~<br>~~es es~~<br>~~es ee~~|R<br>~~ee~~<br>~~es~~<br>~~ee~~|TEMP_OUT_L[7:0]||||||||
|3B<br>~~a~~<br>~~a~~<br>~~a~~|59<br>~~a~~|EXT_SLV_SENS_DATA_00<br>~~es es~~<br>~~es ee~~<br>~~es es~~|R<br>~~es~~<br>~~ee~~<br>~~es~~|EXT_SLV_SENS_DATA_00[7:0]||||||||
|3C<br>~~a ~~<br>~~a~~<br>~~a~~|60<br> ~~a~~<br>~~a~~|EXT_SLV_SENS_DATA_01<br>~~es ee~~<br>~~es es~~<br>~~es ee~~|R<br>~~ee~~<br>~~es~~<br>~~ee~~|EXT_SLV_SENS_DATA_01[7:0]||||||||
|3D<br>~~a~~<br>~~a~~<br>~~a~~|61<br>~~a~~|EXT_SLV_SENS_DATA_02<br>~~es es~~<br>~~es ee~~<br>~~es es~~|R<br>~~es~~<br>~~ee~~<br>~~es~~|EXT_SLV_SENS_DATA_02[7:0]||||||||
|3E<br>~~a ~~<br>~~a~~<br>~~a~~|62<br> ~~a~~<br>~~a~~|EXT_SLV_SENS_DATA_03<br>~~es ee~~<br>~~es es~~<br>~~es ee~~|R<br>~~ee~~<br>~~es~~<br>~~ee~~|EXT_SLV_SENS_DATA_03[7:0]||||||||
|3F<br>~~a~~<br>~~a~~<br>~~a~~|63<br>~~a~~|EXT_SLV_SENS_DATA_04<br>~~es es~~<br>~~es ee~~<br>~~es es~~|R<br>~~es~~<br>~~ee~~<br>~~es~~|EXT_SLV_SENS_DATA_04[7:0]||||||||
|40<br>~~a ~~<br>~~a~~<br>~~a~~|64<br> ~~a~~<br>~~a~~|EXT_SLV_SENS_DATA_05<br>~~es ee~~<br>~~es es~~<br>~~es ee~~|R<br>~~ee~~<br>~~es~~<br>~~ee~~|EXT_SLV_SENS_DATA_05[7:0]||||||||
|41<br>~~a~~<br>~~a~~<br>~~a~~|65<br>~~a~~|EXT_SLV_SENS_DATA_06<br>~~es es~~<br>~~es ee~~<br>~~es es~~|R<br>~~es~~<br>~~ee~~<br>~~es~~|EXT_SLV_SENS_DATA_06[7:0]||||||||
|42<br>~~a ~~<br>~~a~~<br>~~a~~|66<br> ~~a~~<br>~~a~~|EXT_SLV_SENS_DATA_07<br>~~es ee~~<br>~~es es~~<br>~~re~~|R<br>~~ee~~<br>~~es~~<br>~~re~~|EXT_SLV_SENS_DATA_07[7:0]||||||||
|43<br>~~a~~<br>~~a~~|67<br>~~a~~|EXT_SLV_SENS_DATA_08<br>~~es es~~<br>~~re~~|R<br>~~es~~<br>~~re~~|EXT_SLV_SENS_DATA_08[7:0]||||||||
Page 32 of 89
Document Number: DS-000189 Revision: 1.3
## ‘TDK InvenSense
## _**ICM-20948**_
|**ADDR**<br>**(HEX)**<br>~~tf~~|**ADDR**<br>**(DEC.)**<br>~~tf~~<br>~~|~~|**REGISTER NAME**<br>~~ft~~|**SERIAL**<br>**I/F**<br>~~ft~~<br>||**BIT7**<br>~~tl~~|**BIT6**<br>~~tl~~|**BIT5**|**BIT4**|**BIT3**|**BIT2**|**BIT1**|**BIT0**|
|---|---|---|---|---|---|---|---|---|---|---|---|
|44<br>~~tf~~<br>~~a~~|68<br>~~tf~~<br>~~|~~<br>~~a~~|EXT_SLV_SENS_DATA_09<br>~~ft~~<br>~~a~~|R<br>~~ft~~<br>|<br>~~a~~|EXT_SLV_SENS_DATA_09[7:0]<br>~~tl~~<br>~~a~~||||||||
|45|69|EXT_SLV_SENS_DATA_10|R|EXT_SLV_SENS_DATA_10[7:0]||||||||
|46|70|EXT_SLV_SENS_DATA_11|R|EXT_SLV_SENS_DATA_11[7:0]||||||||
|47|71|EXT_SLV_SENS_DATA_12|R|EXT_SLV_SENS_DATA_12[7:0]||||||||
|48|72|EXT_SLV_SENS_DATA_13|R|EXT_SLV_SENS_DATA_13[7:0]||||||||
|49|73|EXT_SLV_SENS_DATA_14|R|EXT_SLV_SENS_DATA_14[7:0]||||||||
|4A|74|EXT_SLV_SENS_DATA_15|R|EXT_SLV_SENS_DATA_15[7:0]||||||||
|4B|75|EXT_SLV_SENS_DATA_16|R|EXT_SLV_SENS_DATA_16[7:0]||||||||
|4C|76|EXT_SLV_SENS_DATA_17|R|EXT_SLV_SENS_DATA_17[7:0]||||||||
|4D|77|EXT_SLV_SENS_DATA_18|R|EXT_SLV_SENS_DATA_18[7:0]||||||||
|4E|78|EXT_SLV_SENS_DATA_19|R|EXT_SLV_SENS_DATA_19[7:0]||||||||
|4F|79|EXT_SLV_SENS_DATA_20|R|EXT_SLV_SENS_DATA_20[7:0]||||||||
|50|80|EXT_SLV_SENS_DATA_21|R|EXT_SLV_SENS_DATA_21[7:0]||||||||
|51<br>~~a~~|81<br>~~a~~|EXT_SLV_SENS_DATA_22<br>~~a~~|R<br>~~a~~|EXT_SLV_SENS_DATA_22[7:0]<br>~~a~~||||||||
|52<br>~~a~~|82<br>~~a~~|EXT_SLV_SENS_DATA_23<br>~~a~~|R<br>~~a~~|EXT_SLV_SENS_DATA_23[7:0]<br>~~a~~||||||||
|66<br>~~ee~~|102<br>~~ee~~|FIFO_EN_1<br>~~ee~~|R/W<br>~~ee~~|-<br>~~ee~~||||SLV_3_FIFO_<br>EN<br>~~ee~~|SLV_2_FIFO_<br>EN<br>~~ee~~|SLV_1_FIFO_<br>EN<br>~~ee~~|SLV_0_FIFO_<br>EN<br>~~ee~~|
|67<br>~~ee~~|103<br>~~ee~~|FIFO_EN_2<br>~~ee~~|R/W<br>~~ee~~|-<br>~~es~~|||ACCEL_FIFO_<br>EN<br>~~es~~|GYRO_Z_FIF<br>O_EN|GYRO_Y_FIF<br>O_EN|GYRO_X_FIF<br>O_EN|TEMP_FIFO_<br>EN|
|68<br>~~a~~|104|FIFO_RST|R/W|-|||FIFO_RESET[4:0]|||||
|69<br>~~a~~|105|FIFO_MODE|R/W|-|||FIFO_MODE[4:0]|||||
|70|112|FIFO_COUNTH|R|-|||FIFO_CNT[12:8]|||||
|71|113|FIFO_COUNTL|R|FIFO_CNT[7:0]||||||||
|72|114|FIFO_R_W|R/W|FIFO_R_W[7:0]||||||||
|74<br>~~se~~|116<br>~~se~~|DATA_RDY_STATUS|R/C|WOF_STATU<br>S|-|||RAW_DATA_RDY[3:0]||||
|76<br>~~se~~|118<br>~~se~~|FIFO_CFG|R/W|-|||||||FIFO_CFG|
|7F|127|REG_BANK_SEL|R/W|-||USER_BANK[1:0]||-||||
**7.2 USER BANK 1 REGISTER MAP**
|**Addr**<br>**(Hex)**<br>~~eee~~|**Addr**<br>**(Dec.)**<br>~~eee~~|**Register Name**<br>~~eee~~|**Serial**<br>**I/F**<br>~~eee~~|**Bit7**<br>~~eee~~|**Bit6**<br>~~eee~~|**Bit5**<br>~~eee~~|**Bit4**<br>~~eee~~|**Bit3**<br>~~eee~~|**Bit2**<br>~~eee~~|**Bit1**<br>~~eee~~|**Bit0**<br>~~eee~~|
|---|---|---|---|---|---|---|---|---|---|---|---|
|02<br>~~eee~~<br>~~ee~~|2<br>~~eee~~<br>~~ee~~|SELF_TEST_X_GYRO<br>~~eee~~<br>~~ee~~|R/W<br>~~eee~~<br>~~ee~~|XG_ST_DATA[7:0]<br>~~eee~~<br>~~ee~~||||||||
|03<br>~~ee~~|3<br>~~ee~~|SELF_TEST_Y_GYRO<br>~~ee~~|R/W<br>~~ee~~|YG_ST_DATA[7:0]<br>~~ee~~||||||||
|04<br>~~ee~~<br>~~es~~|4<br>~~ee~~<br>~~es~~|SELF_TEST_Z_GYRO<br>~~ee~~<br>~~es~~|R/W<br>~~ee~~<br>~~es~~|ZG_ST_DATA[7:0]<br>~~ee~~<br>~~es~~||||||||
|0E<br>~~i~~<br>~~ee~~|14<br>~~i~~<br>~~ee~~|SELF_TEST_X_ACCEL<br>~~ee~~<br>|R/W<br>~~ee~~<br>|XA_ST_DATA[7:0]<br>||||||||
|0F<br>~~ee~~|15<br>~~ee~~|SELF_TEST_Y_ACCEL<br>|R/W<br>|YA_ST_DATA[7:0]<br>||||||||
|10<br>~~eeee~~|16<br>~~eeee~~|SELF_TEST_Z_ACCEL<br>~~ee~~|R/W<br>~~ee~~|ZA_ST_DATA[7:0]<br>~~ee~~||||||||
|14<br>~~ss~~|20<br>~~ss~~|XA_OFFS_H<br>~~ss~~|R/W<br>~~ss~~|XA_OFFS[14:7]<br>~~ss~~||||||||
|15<br>~~ss~~<br>~~i~~|21<br>~~ss~~<br>~~i~~|XA_OFFS_L<br>~~ss~~<br>~~ee~~|R/W<br>~~ss~~<br>~~ee~~|XA_OFFS[6:0]<br>~~ss~~<br>~~ee~~|||||||-<br>~~ss~~<br>~~ee~~|
|17<br>~~a~~|23|YA_OFFS_H|R/W|YA_OFFS[14:7]||||||||
|18<br>~~a~~|24|YA_OFFS_L|R/W|YA_OFFS[6:0]|||||||-|
|1A<br>~~ss~~|26<br>~~ss~~|ZA_OFFS_H<br>~~ss~~|R/W<br>~~ss~~|ZA_OFFS[14:7]||||||||
|1B<br>~~ee~~|27<br>~~ee~~|ZA_OFFS_L<br>~~ee~~|R/W<br>~~ee~~|ZA_OFFS[6:0]<br>~~ee~~|||||||-<br>~~ee~~|
Page 33 of 89
Document Number: DS-000189 Revision: 1.3
## ‘TDK InvenSense
## _**ICM-20948**_
|**Addr**<br>**(Hex)**|**Addr**<br>**(Dec.)**|**Register Name**|**Serial**<br>**I/F**|**Bit7**|**Bit6**|**Bit5**|**Bit4**|**Bit3**|**Bit2**|**Bit1**|**Bit0**|
|---|---|---|---|---|---|---|---|---|---|---|---|
|28|40|TIMEBASE_CORRECTIO<br>N_PLL|R/W|TBC_PLL[7:0]||||||||
|7F|127|REG_BANK_SEL|R/W|-||USER_BANK[1:0]||-||||
## **7.3 USER BANK 2 REGISTER MAP**
|**ADDR**<br>**(HEX)**<br>~~tf~~|**ADDR**<br>**(DEC.)**<br>~~tf~~<br>~~|~~|**REGISTER NAME**<br>~~ft~~|**SERIAL**<br>**I/F**<br>~~ft~~<br>||**BIT7**<br>~~tl~~|**BIT6**<br>~~tl~~|**BIT5**|**BIT4**|**BIT3**|**BIT2**|**BIT1**|**BIT0**|
|---|---|---|---|---|---|---|---|---|---|---|---|
|00<br>~~tf~~<br>~~I GG~~|0<br>~~tf~~<br>~~|~~<br>~~GG~~|GYRO_SMPLRT_DIV<br>~~ft~~<br>~~GG~~|R/W<br>~~ft~~<br>|<br>~~GG~~|GYRO_SMPLRT_DIV[7:0]<br>~~tl~~<br>~~GG~~||||||||
|01<br>~~I GG~~<br>~~ee~~|1<br>~~GG~~<br>~~ee~~|GYRO_CONFIG_1<br>~~GG~~<br>~~ee~~|R/W<br>~~GG~~<br>~~ee~~|-<br>~~GG~~<br>~~ee~~||GYRO_DLPFCFG[2:0]<br>~~GG~~<br>~~ee~~|||GYRO_FS_SEL[1:0]<br>~~GG~~<br>~~ee~~||GYRO_FCHOI<br>CE<br>~~GG~~<br>~~ee~~|
|02<br>~~ee~~<br>~~Po~~|2<br>~~ee~~<br>~~Po~~|GYRO_CONFIG_2<br>~~ee~~<br>~~Po~~|R/W<br>~~ee~~<br>~~Po~~|-<br>~~ee~~<br>~~Po~~||XGYRO_CTEN<br>~~ee~~<br>~~Po~~|YGYRO_CTEN<br>~~ee~~<br>~~Po~~|ZGYRO_CTEN<br>~~ee~~<br>~~Po~~|GYRO_AVGCFG[2:0]<br>~~ee~~<br>~~Po~~|||
|03<br>~~ee~~|3<br>~~ee~~|XG_OFFS_USRH<br>~~ee~~|R/W<br>~~ee~~|X_OFFS_USER[15:8]<br>~~ee~~||||||||
|04<br>~~ee~~|4<br>~~ee~~|XG_OFFS_USRL<br>~~ee~~|R/W<br>~~ee~~|X_OFFS_USER[7:0]<br>~~ee~~||||||||
|05<br>~~ee~~|5<br>~~ee~~|YG_OFFS_USRH<br>~~ee~~|R/W<br>~~ee~~|Y_OFFS_USER[15:8]<br>~~ee~~||||||||
|06<br>~~ee~~|6<br>~~ee~~|YG_OFFS_USRL<br>~~ee~~|R/W<br>~~ee~~|Y_OFFS_USER[7:0]<br>~~ee~~||||||||
|07<br>~~a~~|7<br>~~a~~|ZG_OFFS_USRH<br>~~a~~|R/W<br>~~a~~|Z_OFFS_USER[15:8]<br>~~a~~||||||||
|08<br>~~a~~|8<br>~~a~~|ZG_OFFS_USRL<br>~~a~~|R/W<br>~~a~~|Z_OFFS_USER[7:0]<br>~~a~~||||||||
|09<br>~~a~~|9<br>~~a~~|ODR_ALIGN_EN<br>~~a~~|R/W<br>~~a~~|-<br>~~a~~|||||||ODR_ALIGN_<br>EN<br>~~a~~|
|10<br>~~a~~|16<br>~~a~~|ACCEL_SMPLRT_DIV_1<br>~~a~~|R/W<br>~~a~~|-<br>~~a~~||||ACCEL_SMPLRT_DIV[11:8]<br>~~a~~||||
|11<br>~~a~~|17<br>~~a~~|ACCEL_SMPLRT_DIV_2<br>~~a~~|R/W<br>~~a~~|ACCEL_SMPLRT_DIV[7:0]<br>~~a~~||||||||
|12<br>~~ee~~|18<br>~~ee~~|ACCEL_INTEL_CTRL<br>~~ee~~|R/W<br>~~ee~~|-<br>~~ee~~||||||ACCEL_INTEL<br>_EN<br>~~ee~~|ACCEL_INTEL<br>_MODE_INT<br>~~ee~~|
|13<br>~~a~~|19<br>~~GG~~|ACCEL_WOM_THR<br>~~GG~~|R/W<br>~~GG~~|WOM_THRESHOLD[7:0]<br>~~GG~~||||||||
|14<br>~~a~~<br>~~i~~|20<br>~~GG~~<br>~~i~~|ACCEL_CONFIG<br>~~GG~~|R/W<br>~~GG~~|-<br>~~GG~~||ACCEL_DLPFCFG[2:0]<br>~~GG~~|||ACCEL_FS_SEL[1:0]<br>~~GG~~||ACCEL_FCHOI<br>CE<br>~~GG~~|
|15<br>~~i~~<br>~~ee~~|21<br>~~i~~<br>~~ee~~|ACCEL_CONFIG_2|R/W|-|||AX_ST_EN_R<br>EG|AY_ST_EN_R<br>EG|AZ_ST_EN_R<br>EG|DEC3_CFG[1:0]||
|52<br>~~ee~~<br>~~se~~|82<br>~~ee~~<br>~~se~~|FSYNC_CONFIG|R/W|DELAY_TIME<br>_EN|-|WOF_DEGLIT<br>CH_EN|WOF_EDGE_I<br>NT|EXT_SYNC_SET[3:0]||||
|53<br>~~a~~|83<br>~~eG~~|TEMP_CONFIG<br>~~eG~~|R/W<br>~~eG~~|-<br>~~eG~~|||||TEMP_DLPFCFG[2:0]<br>~~eG~~|||
|54<br>~~a~~<br>~~ee~~|84<br>~~eG~~<br>~~ee~~|MOD_CTRL_USR<br>~~eG~~|R/W<br>~~eG~~|-<br>~~eG~~|||||||REG_LP_DMP<br>_EN<br>~~eG~~|
|7F<br>~~ee~~<br>~~eG~~|127<br>~~ee~~<br>~~eG~~|REG_BANK_SEL<br>~~eG~~|R/W<br>~~eG~~|-<br>~~eG~~||USER_BANK[1:0]<br>~~DF~~||-<br>~~DF~~||||
## **7.4 USER BANK 3 REGISTER MAP**
|**ADDR**<br>**(HEX)**<br>~~[tf~~<br>~~a~~|**ADDR**<br>**(DEC.)**<br>~~[tf~~<br>|**REGISTER NAME**<br>~~[tf~~<br>|**SERIAL**<br>**I/F**<br>~~[tf~~<br>~~|~~<br>|**BIT7**<br>~~[tf~~<br>~~|~~<br>~~[|~~<br>|**BIT6**<br>~~[tf~~<br>~~[||~~<br>|**BIT5**<br>~~[tf~~<br>~~||~~<br>|**BIT4**<br>~~[tf~~<br>~~||~~<br>|**BIT3**<br>~~[tf~~<br>~~|~~<br>~~|~~<br>|**BIT2**<br>~~[tf~~<br>~~|~~<br>~~[|~~<br>|**BIT1**<br>~~[tf~~<br>~~[||~~<br>|**BIT0**<br>~~[tf~~<br>~~|4~~<br>|
|---|---|---|---|---|---|---|---|---|---|---|---|
|00<br>~~[tf~~<br>~~a ~~|0<br>~~[tf~~<br> ~~se~~|I2C_MST_ODR_CONFIG<br>~~[tf~~<br>~~se~~|R/W<br>~~[tf~~<br>~~|~~<br>~~GG~~|-<br>~~[tf~~<br>~~|~~<br>~~[| | | |~~<br>~~GG~~||||I2C_MST_ODR_CONFIG[3:0]<br>~~[tf~~<br>~~|~~<br>~~|~~<br>~~[| | 4~~<br>~~GG~~||||
|01<br>~~a~~<br>~~a~~|1<br>~~a~~|I2C_MST_CTRL<br>|R/W<br>|MULT_MST_<br>EN<br>|-<br><br>~~ee~~||I2C_MST_P_<br>NSR<br><br>~~ee~~|I2C_MST_CLK[3:0]<br>||||
|02<br>~~ee~~<br>~~a~~|2<br>~~ee~~|I2C_MST_DELAY_CTRL<br>~~ee~~|R/W<br>~~ee~~|DELAY_ES_S<br>HADOW<br>~~ee~~|-<br>~~ee~~<br>~~ee~~||I2C_SLV4_DE<br>LAY_EN<br>~~ee~~<br>~~ee~~|I2C_SLV3_DE<br>LAY_EN<br>~~ee~~|I2C_SLV2_DE<br>LAY_EN<br>~~ee~~|I2C_SLV1_DE<br>LAY_EN<br>~~ee~~|I2C_SLV0_DE<br>LAY_EN<br>~~ee~~|
|03<br>~~a~~|3|I2C_SLV0_ADDR|R/W|I2C_SLV0_RN<br>W|I2C_ID_0[6:0]<br>~~ee~~|||||||
|04<br>~~a~~<br>~~ef~~|4<br>~~GG~~<br>~~ef|~~|I2C_SLV0_REG<br>~~GG~~<br>~~|~~|R/W<br>~~GG~~|I2C_SLV0_REG[7:0]<br>~~GG~~||||||||
|05<br>~~ef~~|5<br>~~ef|~~|I2C_SLV0_CTRL<br>~~|~~|R/W|I2C_SLV0_EN|I2C_SLV0_BY<br>TE_SW|I2C_SLV0_RE<br>G_DIS|I2C_SLV0_GR<br>P|I2C_SLV0_LENG[3:0]||||
|06<br>~~ef~~<br>~~a~~|6<br>~~ef |~~<br>~~a~~|I2C_SLV0_DO<br>~~|~~|R/W|I2C_SLV0_DO[7:0]||||||||
|07<br>~~a~~|7<br>~~a~~|I2C_SLV1_ADDR|R/W|I2C_SLV1_RN<br>W|I2C_ID_1[6:0]|||||||
|08<br>~~I~~|8<br>~~I~~|I2C_SLV1_REG|R/W|I2C_SLV1_REG[7:0]||||||||
|09<br>~~I~~<br>~~i~~|9<br>~~I~~<br>~~i~~|I2C_SLV1_CTRL|R/W|I2C_SLV1_EN|I2C_SLV1_BY<br>TE_SW|I2C_SLV1_RE<br>G_DIS|I2C_SLV1_GR<br>P|I2C_SLV1_LENG[3:0]||||
Page 34 of 89
Document Number: DS-000189 Revision: 1.3
## _**ICM-20948**_
|**ADDR**<br>**(HEX)**<br>~~|~~|**ADDR**<br>**(DEC.)**<br>~~|~~|**REGISTER NAME**<br>~~f~~|**SERIAL**<br>**I/F**<br>~~|~~|**BIT7**<br>~~|~~|**BIT6**<br>~~fF~~|**BIT5**<br>~~fF~~<br>~~|~~|**BIT4**<br>~~|~~|**BIT3**<br>~~|~~|**BIT2**<br>~~f~~|**BIT1**<br>~~ff~~|**BIT0**<br>~~ff~~|
|---|---|---|---|---|---|---|---|---|---|---|---|
|0A<br>~~|~~<br>~~a~~|10<br>~~|~~<br>~~ee~~|I2C_SLV1_DO<br>~~f~~<br>~~ee~~|R/W<br>~~|~~|I2C_SLV1_DO[7:0]<br>~~|~~<br>~~fF~~<br>~~|~~<br>~~|~~<br>~~|~~<br>~~f~~<br>~~ff~~||||||||
|0B<br>~~se~~<br>~~a~~|11<br>~~se~~<br>~~a~~|I2C_SLV2_ADDR<br>~~se~~<br>~~es~~|R/W|I2C_SLV2_RN<br>W|I2C_ID_2[6:0]|||||||
|0C<br>~~a~~<br>~~Ff~~|12<br>~~a~~<br>~~Ff~~<br>~~|~~|I2C_SLV2_REG<br>~~es~~<br>~~|~~|R/W|I2C_SLV2_REG[7:0]||||||||
|0D<br>~~a ~~<br>~~Ff~~|13<br> ~~a ~~<br>~~Ff~~<br>~~|~~|I2C_SLV2_CTRL<br> ~~es~~<br>~~|~~|R/W|I2C_SLV2_EN|I2C_SLV2_BY<br>TE_SW|I2C_SLV2_RE<br>G_DIS|I2C_SLV2_GR<br>P|I2C_SLV2_LENG[3:0]||||
|0E<br>~~Ff~~<br>~~a~~|14<br>~~Ff~~<br>~~|~~<br>~~se~~|I2C_SLV2_DO<br>~~|~~<br>~~se~~|R/W|I2C_SLV2_DO[7:0]||||||||
|0F<br>~~a ~~<br>~~i~~|15<br> ~~se~~<br>~~i~~|I2C_SLV3_ADDR<br>~~se~~|R/W|I2C_SLV3_RN<br>W|I2C_ID_3[6:0]|||||||
|10<br>~~i~~<br>~~a~~<br>~~Ff~~|16<br>~~i~~<br>~~aa~~<br>~~Ff~~<br>~~|~~|I2C_SLV3_REG<br>~~se~~<br>~~|~~|R/W<br>~~se~~|I2C_SLV3_REG[7:0]||||||||
|11<br>~~Ff~~|17<br>~~Ff~~<br>~~|~~|I2C_SLV3_CTRL<br>~~|~~|R/W|I2C_SLV3_EN|I2C_SLV3_BY<br>TE_SW|I2C_SLV3_RE<br>G_DIS|I2C_SLV3_GR<br>P|I2C_SLV3_LENG[3:0]||||
|12<br>~~Ff~~<br>~~a~~|18<br>~~Ff~~<br>~~|~~<br>~~se~~|I2C_SLV3_DO<br>~~|~~<br>~~se~~|R/W|I2C_SLV3_DO[7:0]||||||||
|13<br>~~i~~|19<br>~~i~~|I2C_SLV4_ADDR<br>~~ee~~|R/W<br>~~ee~~|I2C_SLV4_RN<br>W|I2C_ID_4[6:0]|||||||
|14<br>~~a ~~|20<br> ~~ee~~|I2C_SLV4_REG<br>~~ee~~|R/W|I2C_SLV4_REG[7:0]||||||||
|15<br>~~ee~~|21<br>~~ee~~|I2C_SLV4_CTRL<br>~~ee~~|R/W<br>~~ee~~|I2C_SLV4_EN<br>~~ee~~|I2C_SLV4_BY<br>TE_SW<br>~~ee~~|I2C_SLV4_RE<br>G_DIS<br>~~ee~~|I2C_SLV4_DLY[4:0]<br>~~ee~~|||||
|16<br>~~ee~~<br>~~a ~~|22<br>~~ee~~<br> ~~a~~|I2C_SLV4_DO<br>~~ee~~<br>~~se~~|R/W<br>~~ee~~<br>~~se~~|I2C_SLV4_DO[7:0]<br>~~ee~~||||||||
|17|23|I2C_SLV4_DI|R|I2C_SLV4_DI[7:0]||||||||
|7F|127|REG_BANK_SEL|R/W|-||USER_BANK[1:0]||-||||
Page 35 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## _**8 USER BANK 0 REGISTER DESCRIPTIONS**_
This section describes the function and contents of the User Bank 0 Register Map within the ICM-20948.
**NOTE:** The device will come up in sleep mode upon power-up.
## **8.1 WHO_AM_I**
|**8.1**<br>**WHO_AM_I**|**8.1**<br>**WHO_AM_I**|**8.1**<br>**WHO_AM_I**|
|---|---|---|
|**Name: WHO_AM_I**<br>**Address: 0 (00h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0xEA**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:0|WHO_AM_I[7:0]|Register to indicate to user which device is being accessed.<br>The value for ICM-20948 is 0xEA.|
## **8.2 USER_CTRL**
|**8.2**<br>**USER_CTRL**|**8.2**<br>**USER_CTRL**|**8.2**<br>**USER_CTRL**|
|---|---|---|
|**Name: USER_CTRL**<br>**Address: 3 (03h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|DMP_EN|1 – Enables DMP features.<br>0 – DMP features are disabled after the currentprocessinground has completed.|
|6|FIFO_EN|1 – Enable FIFO operation mode.<br>0 – Disable FIFO access from serial interface.<br>To disable FIFO writes by DMA, use FIFO_EN register. To disable possible FIFO writes<br>from DMP,disable the DMP.|
|5|I2C_MST_EN|1 – Enable the I2C Master I/F module; pins ES_DA and ES_SCL are isolated from pins<br>SDA/SDI and SCL/ SCLK.<br>0 – Disable I2C Master I/F module; pins ES_DA and ES_SCL are logically driven by pins<br>SDA/SDI and SCL/SCLK.|
|4|I2C_IF_DIS|1 – Reset I2C Slave module andput the serial interface in SPI mode only.|
|3|DMP_RST|1 – Reset DMP module. Reset is asynchronous. This bit auto clears after one clock<br>cycle of the internal 20 MHz clock.|
|2|SRAM_RST|1 – Reset SRAM module. Reset is asynchronous. This bit auto clears after one clock<br>cycle of the internal 20 MHz clock.|
|1|I2C_MST_RST|1 – Reset I2C Master module. Reset is asynchronous. This bit auto clears after one<br>clock cycle of the internal 20 MHz clock.<br>**NOTE**: This bit should only be set when the I2C master has hung. If this bit is set during an active<br>I2C master transaction,the I2C slave will hang,which will require the host to reset the slave.|
|0|-|Reserved.|
Page 36 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## **8.3 LP_CONFIG**
**Name: LP_CONFIG Address: 5 (05h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x40**
|**8.3**<br>**LP_CONFIG**|**8.3**<br>**LP_CONFIG**|**8.3**<br>**LP_CONFIG**|
|---|---|---|
|**Name: LP_CONFIG**<br>**Address: 5 (05h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/W**<br>**Reset Value: 0x40**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|-|Reserved.|
|6|I2C_MST_CYCLE|1 - Operate I2C master in duty cycled mode. ODR is determined by<br>I2C_MST_ODR_CONFIG register.<br>0 – Disable I2C master dutycycled mode.|
|5|ACCEL_CYCLE|1 – Operate ACCEL in duty cycled mode. ODR is determined by ACCEL_SMPLRT_DIV<br>register.<br>0 – Disable ACCEL dutycycled mode.|
|4|GYRO_CYCLE|1 – Operate GYRO in duty cycled mode. ODR is determined by GYRO_SMPLRT_DIV<br>register.<br>0 – Disable GYRO dutycycled mode.|
|3:0|-|Reserved.|
## **8.4 PWR_MGMT_1**
**Name: PWR_MGMT_1 Address: 6 (06h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x41**
|**8.4**<br>**PWR_MGMT_1**|**8.4**<br>**PWR_MGMT_1**|**8.4**<br>**PWR_MGMT_1**|
|---|---|---|
|**Name: PWR_MGMT_1**<br>**Address: 6 (06h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/W**<br>**Reset Value: 0x41**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|DEVICE_RESET|1 – Reset the internal registers and restores the default settings. Write a 1 to set the<br>reset,the bit will auto clear.|
|6|SLEEP|When set, the chip is set to sleep mode (in sleep mode all analog is powered off).<br>Clearingthe bit wakes the chipfrom sleepmode.|
|5|LP_EN|The LP_EN only affects the digital circuitry, it helps to reduce the digital current when<br>sensors are in LP mode. Please note that the sensors themselves are set in LP mode<br>by the LP_CONFIG register settings. Sensors in LP mode, and use of LP_EN bit<br>together help to reduce overall current. The bit settings are:<br>1: Turn on low power feature.<br>0: Turn off low power feature.<br>LP_EN has no effect when the sensors are in low-noise mode.|
|4|-|Reserved.|
|3|TEMP_DIS|When set to 1,this bit disables the temperature sensor.|
|2:0|CLKSEL[2:0]|**Code: Clock Source**<br>0: Internal 20 MHz oscillator<br>1-5: Auto selects the best available clock source – PLL if ready, else use the Internal oscillator<br>6: Internal 20 MHz oscillator<br>7: Stops the clock and keeps timing generator in reset<br>**NOTE**: CLKSEL[2:0]should be set to 1~5 to achieve fullgyroscopeperformance.|
Page 37 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## **8.5 PWR_MGMT_2**
**Name: PWR_MGMT_2 Address: 7 (07h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:6|-|Reserved.|
|5:3|DISABLE_ACCEL|Only the following values are applicable:|
|||111 – Accelerometer (all axes) disabled.|
|||000 – Accelerometer(all axes)on.|
|2:0|DISABLE_GYRO|Only the following values are applicable:|
|||111 – Gyroscope (all axes) disabled.|
|||000 – Gyroscope(all axes)on.|
## **8.6 INT_PIN_CFG**
**Name: INT_PIN_CFG Address: 15 (0Fh) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x00**
|**8.6**<br>**INT_PIN_CFG**|**8.6**<br>**INT_PIN_CFG**|**8.6**<br>**INT_PIN_CFG**|
|---|---|---|
|**Name: INT_PIN_CFG**<br>**Address: 15 (0Fh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|INT1_ACTL|1 – The logic level for INT1 pin is active low.<br>0 – The logic level for INT1pin is active high.|
|6|INT1_OPEN|1 – INT1 pin is configured as open drain.<br>0 – INT1pin is configured aspush-pull.|
|5|INT1_LATCH__EN|1 – INT1 pin level held until interrupt status is cleared.<br>0 – INT1pin indicates interruptpulse is width 50µs.|
|4|INT_ANYRD_2CLEAR|1 – Interrupt status in INT_STATUS is cleared (set to 0) if any read operation is<br>performed.<br>0 – Interrupt status in INT_STATUS is cleared (set to 0) only by reading INT_STATUS<br>register.<br>This bit only affects the interrupt status bits that are contained in the register<br>INT_STATUS, and the corresponding hardware interrupt.<br>This bit does not affect the interrupt status bits that are contained in registers<br>INT_STATUS_1, INT_STATUS_2, INT_STATUS_3, and the corresponding hardware<br>interrupt.|
|3|ACTL_FSYNC|1 – The logic level for the FSYNC pin as an interrupt to the ICM-20948 is active low.<br>0 – The logic level for the FSYNCpin as an interrupt to the ICM-20948 is active high.|
|2|FSYNC_INT_MODE_EN|1 – This enables the FSYNC pin to be used as an interrupt. A transition to the active<br>level described by the ACTL_FSYNC bit will cause an interrupt. The status of the<br>interrupt is read in the I2C Master Status register PASS_THROUGH bit.<br>0 – This disables the FSYNCpin from causingan interrupt.|
|1|BYPASS_EN|When asserted, the I2C_MASTER interface pins (ES_CL and ES_DA) will go into<br>‘bypass mode’ when the I2C master interface is disabled.|
|0|-|Reserved.|
Page 38 of 89
Document Number: DS-000189 Revision: 1.3
_**ICM-20948**_
## **8.7 INT_ENABLE**
**Name: INT_ENABLE Address: 16 (10h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x00**
|**8.7**<br>**INT_ENABLE**|**8.7**<br>**INT_ENABLE**|**8.7**<br>**INT_ENABLE**|
|---|---|---|
|**Name: INT_ENABLE**<br>**Address: 16 (10h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|REG_WOF_EN|1 – Enable wake on FSYNC interrupt.<br>0 – Function is disabled.|
|6:4|-|Reserved.|
|3|WOM_INT_EN|1 – Enable interrupt for wake on motion to propagate to interrupt pin 1.<br>0 – Function is disabled.|
|2|PLL_RDY_EN|1 – Enable PLL RDY interrupt (PLL RDY means PLL is running and in use as the clock<br>source for the system) to propagate to interrupt pin 1.<br>0 – Function is disabled.|
|1|DMP_INT1_EN|1 – Enable DMP interrupt to propagate to interrupt pin 1.<br>0 – Function is disabled.|
|0|I2C_MST_INT_EN|1 – Enable I2C master interrupt to propagate to interrupt pin 1.<br>0 – Function is disabled.|
## **8.8 INT_ENABLE_1**
**Name: INT_ENABLE_1 Address: 17 (11h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:1|-|Reserved.|
|0|RAW_DATA_0_RDY_EN|1 – Enable raw data ready interrupt from any sensor to propagate to interrupt|
|||pin 1.|
|||0 – Function is disabled.|
## **8.9 INT_ENABLE_2**
|**8.9**<br>**INT_ENABLE_2**|**8.9**<br>**INT_ENABLE_2**|**8.9**<br>**INT_ENABLE_2**|
|---|---|---|
|**Name: INT_ENABLE_2**<br>**Address: 18 (12h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:5|-|Reserved.|
|4:0|FIFO_OVERFLOW_EN[4:0]|1 – Enable interrupt for FIFO overflow to propagate to interrupt pin 1.<br>0 – Function is disabled.|
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## **8.10 INT_ENABLE_3**
**Name: INT_ENABLE_3 Address: 19 (13h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:5|-|Reserved.|
|4:0|FIFO_WM_EN[4:0]|1 – Enable interrupt for FIFO watermark to propagate to interrupt pin 1.|
|||0 – Function is disabled.|
## **8.11 I2C_MST_STATUS**
**Name: I2C_MST_STATUS Address: 23 (17h) Type: USR0 Bank: 0 Serial IF: R/C Reset Value: 0x00**
|**Name: I2C_MST_STATUS**<br>**Address: 23 (17h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/C**<br>**Reset Value: 0x00**|**Name: I2C_MST_STATUS**<br>**Address: 23 (17h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/C**<br>**Reset Value: 0x00**|**Name: I2C_MST_STATUS**<br>**Address: 23 (17h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/C**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7|PASS_THROUGH|Status of FSYNC interrupt – used as a way to pass an external interrupt through this<br>chip to the host. If enabled in the INT_PIN_CFG register by asserting bit<br>FSYNC_INT_MODE_EN, this will cause an interrupt. A read of this register clears all<br>status bits in this register.|
|6|I2C_SLV4_DONE|Asserted when I2C slave 4’s transfer is complete, will cause an interrupt if bit<br>I2C_MST_INT_EN in the INT_ENABLE register is asserted, and if the<br>SLV4_DONE_INT_EN bit is asserted in the I2C_SLV4_CTRL register.|
|5|I2C_LOST_ARB|Asserted when I2C slave loses arbitration of the I2C bus, will cause an interrupt if bit<br>I2C_MST_INT_EN in the INT_ENABLE register is asserted.|
|4|I2C_SLV4_NACK|Asserted when slave 4 receives a NACK, will cause an interrupt if bit I2C_MST_INT_EN<br>in the INT_ENABLE register is asserted.|
|3|I2C_SLV3_NACK|Asserted when slave 3 receives a NACK, will cause an interrupt if bit I2C_MST_INT_EN<br>in the INT_ENABLE register is asserted.|
|2|I2C_SLV2_NACK|Asserted when slave 2 receives a NACK, will cause an interrupt if bit I2C_MST_INT_EN<br>in the INT_ENABLE register is asserted.|
|1|I2C_SLV1_NACK|Asserted when slave 1 receives a NACK, will cause an interrupt if bit I2C_MST_INT_EN<br>in the INT_ENABLE register is asserted.|
|0|I2C_SLV0_NACK|Asserted when slave 0 receives a NACK, will cause an interrupt if bit I2C_MST_INT_EN<br>in the INT_ENABLE register is asserted.|
## **8.12 INT_STATUS**
**Name: INT_STATUS Address: 25 (19h) Type: USR0 Bank: 0 Serial IF: R/C Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:4|-|Reserved.|
|3|WOM_INT|1 – Wake on motion interrupt occurred.|
|2|PLL_RDY_INT|1 – Indicates that the PLL has been enabled and is ready (delayof 4 ms ensures lock).|
|1|DMP_INT1|1 – Indicates the DMP hasgenerated INT1 interrupt.|
|0|I2C_MST_INT|1 – Indicates I2C master hasgenerated an interrupt.|
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## **8.13 INT_STATUS_1**
|**8.13 INT_STATUS_1**|**8.13 INT_STATUS_1**|**8.13 INT_STATUS_1**|
|---|---|---|
|**Name: INT_STATUS_1**<br>**Address: 26 (1Ah)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/C**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:1|-|Reserved.|
|0|RAW_DATA_0_RDY_INT|1 – Sensor Register Raw Data,from all sensors,is updated and readyto be read.|
## **8.14 INT_STATUS_2**
|**8.14 INT_STATUS_2**|**8.14 INT_STATUS_2**|**8.14 INT_STATUS_2**|
|---|---|---|
|**Name: INT_STATUS_2**<br>**Address: 27 (1Bh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/C**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:5|-|Reserved.|
|4:0|FIFO_OVERFLOW_INT[4:0]|1 – FIFO Overflow interrupt occurred.|
## **8.15 INT_STATUS_3**
|**8.15 INT_STATUS_3**|**8.15 INT_STATUS_3**|**8.15 INT_STATUS_3**|
|---|---|---|
|**Name: INT_STATUS_3**<br>**Address: 28 (1Ch)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/C**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:5|-|Reserved.|
|4:0|FIFO_WM_INT[4:0]|1 – Watermark interrupt for FIFO occurred.|
## **8.16 DELAY_TIMEH**
**Name: DELAY_TIMEH Address: 40 (28h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|DELAY_TIMEH[7:0]|High-byte of delay time between FSYNC event and the 1st gyro ODR event (after the|
|||FSYNC event).|
|||Reading DELAY_TIMEH will lock DELAY_TIMEH and DELAY_TIMEL from the next|
|||update. Reading DELAY_TIMEL will unlock DELAY_TIMEH and DELAY_TIMEL to take|
|||the next update due to an FSYNC event.|
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## **8.17 DELAY_TIMEL**
**Name: DELAY_TIMEL Address: 41 (29h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|DELAY_TIMEL[7:0]|Low-byte of delay time between FSYNC event and the 1st gyro ODR event (after the|
|||FSYNC event).|
|||Reading DELAY_TIMEH will lock DELAY_TIMEH and DELAY_TIMEL from the next|
|||update. Reading DELAY_TIMEL will unlock DELAY_TIMEH and DELAY_TIMEL to take|
|||the next update due to an FSYNC event.|
|||Delaytime inµs =(DELAY_TIMEH * 256 + DELAY_TIMEL)* 0.9645|
## **8.18 ACCEL_XOUT_H**
**Name: ACCEL_XOUT_H Address: 45 (2Dh) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 ACCEL_XOUT_H[7:0] High Byte of Accelerometer X-axis data.
## **8.19 ACCEL_XOUT_L**
|**8.19 ACCEL_XOUT_L**|**8.19 ACCEL_XOUT_L**|**8.19 ACCEL_XOUT_L**|
|---|---|---|
|**Name: ACCEL_XOUT_L**<br>**Address: 46 (2Eh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:0|ACCEL_XOUT_L[7:0]|Low Byte of Accelerometer X-axis data.<br>To convert the output of the accelerometer to acceleration measurement use the<br>formula below:<br>X_acceleration = ACCEL_XOUT/Accel_Sensitivity|
## **8.20 ACCEL_YOUT_H**
**Name: ACCEL_YOUT_H Address: 47 (2Fh) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 ACCEL_YOUT_H[7:0] High Byte of Accelerometer Y-axis data.
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## **8.21 ACCEL_YOUT_L**
**Name: ACCEL_YOUT_L Address: 48 (30h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|ACCEL_YOUT_L[7:0]|Low Byte of Accelerometer Y-axis data.|
|||To convert the output of the accelerometer to acceleration measurement use the|
|||formula below:|
|||Y_acceleration = ACCEL_YOUT/Accel_Sensitivity|
## **8.22 ACCEL_ZOUT_H**
**Name: ACCEL_ZOUT_H Address: 49 (31h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 ACCEL_ZOUT_H[7:0] High Byte of Accelerometer Z-axis data.
## **8.23 ACCEL_ZOUT_L**
|**Name: ACCEL_ZOUT_L**<br>**Address: 50 (32h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: ACCEL_ZOUT_L**<br>**Address: 50 (32h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: ACCEL_ZOUT_L**<br>**Address: 50 (32h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|ACCEL_ZOUT_L[7:0]|Low Byte of Accelerometer Z-axis data.<br>To convert the output of the accelerometer to acceleration measurement use the<br>formula below:<br>Z_acceleration = ACCEL_ZOUT/Accel_Sensitivity|
## **8.24 GYRO_XOUT_H**
**Name: GYRO_XOUT_H Address: 51 (33h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 GYRO_XOUT_H[7:0] High Byte of Gyroscope X-axis data.
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## **8.25 GYRO_XOUT_L**
**Name: GYRO_XOUT_L Address: 52 (34h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|GYRO_XOUT_L[7:0]|Low Byte of Gyroscope X-axis data.|
|||To convert the output of the gyroscope to angular rate measurement use the|
|||formula below:|
|||X_angular_rate = GYRO_XOUT/Gyro_Sensitivity|
## **8.26 GYRO_YOUT_H**
|**Name: GYRO_YOUT_H**<br>**Address: 53 (35h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: GYRO_YOUT_H**<br>**Address: 53 (35h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: GYRO_YOUT_H**<br>**Address: 53 (35h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|GYRO_YOUT_H[7:0]|High Byte of Gyroscope Y-axis data.|
## **8.27 GYRO_YOUT_L**
|**Name: GYRO_YOUT_L**<br>**Address: 54 (36h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: GYRO_YOUT_L**<br>**Address: 54 (36h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: GYRO_YOUT_L**<br>**Address: 54 (36h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|GYRO_YOUT_L[7:0]|Low Byte of Gyroscope Y-axis data.<br>To convert the output of the gyroscope to angular rate measurement use the<br>formula below:<br>Y_angular_rate = GYRO_YOUT/Gyro_Sensitivity|
## **8.28 GYRO_ZOUT_H**
**Name: GYRO_ZOUT_H Address: 55 (37h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 GYRO_ZOUT_H[7:0] High Byte of Gyroscope Z-axis data.
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## **8.29 GYRO_ZOUT_L**
**Name: GYRO_ZOUT_L Address: 56 (38h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|GYRO_ZOUT_L[7:0]|Low Byte of Gyroscope Z-axis data.|
|||To convert the output of the gyroscope to angular rate measurement use the|
|||formula below:|
|||Z_angular_rate = GYRO_ZOUT/Gyro_Sensitivity|
## **8.30 TEMP_OUT_H**
**Name: TEMP_OUT_H Address: 57 (39h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 TEMP_OUT_H[7:0] High Byte of Temp sensor data.
## **8.31 TEMP_OUT_L**
**Name: TEMP_OUT_L Address: 58 (3Ah) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|TEMP_OUT_L[7:0]|Low Byte of Temp sensor data.|
|||To convert the output of the temperature sensor to degrees C use the following|
|||formula:|
|||TEMP_degC =((TEMP_OUT – RoomTemp_Offset)/Temp_Sensitivity)+ 21degC|
## **8.32 EXT_SLV_SENS_DATA_00**
|**Name: EXT_SLV_SENS_DATA_00**<br>**Address: 59 (3Bh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_00**<br>**Address: 59 (3Bh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_00**<br>**Address: 59 (3Bh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_00[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
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## **8.33 EXT_SLV_SENS_DATA_01**
**Name: EXT_SLV_SENS_DATA_01 Address: 60 (3Ch) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|EXT_SLV_SENS_DATA_01[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data|
|||stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-|
|||4)_CTRL registers.|
## **8.34 EXT_SLV_SENS_DATA_02**
|**Name: EXT_SLV_SENS_DATA_02**<br>**Address: 61 (3Dh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_02**<br>**Address: 61 (3Dh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_02**<br>**Address: 61 (3Dh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_02[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.35 EXT_SLV_SENS_DATA_03**
|**Name: EXT_SLV_SENS_DATA_03**<br>**Address: 62 (3Eh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_03**<br>**Address: 62 (3Eh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_03**<br>**Address: 62 (3Eh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_03[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.36 EXT_SLV_SENS_DATA_04**
**Name: EXT_SLV_SENS_DATA_04 Address: 63 (3Fh) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 EXT_SLV_SENS_DATA_04[7:0] Sensor data read from external I[2] C devices via the I[2] C master interface. The data stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(04)_CTRL registers.
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## **8.37 EXT_SLV_SENS_DATA_05**
**Name: EXT_SLV_SENS_DATA_05 Address: 64 (40h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|EXT_SLV_SENS_DATA_05[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data|
|||stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-|
|||4)_CTRL registers.|
## **8.38 EXT_SLV_SENS_DATA_06**
|**Name: EXT_SLV_SENS_DATA_06**<br>**Address: 65 (41h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_06**<br>**Address: 65 (41h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_06**<br>**Address: 65 (41h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_06[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.39 EXT_SLV_SENS_DATA_07**
|**Name: EXT_SLV_SENS_DATA_07**<br>**Address: 66 (42h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_07**<br>**Address: 66 (42h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_07**<br>**Address: 66 (42h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_07[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.40 EXT_SLV_SENS_DATA_08**
**Name: EXT_SLV_SENS_DATA_08 Address: 67 (43h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 EXT_SLV_SENS_DATA_08[7:0] Sensor data read from external I[2] C devices via the I[2] C master interface. The data stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(04)_CTRL registers.
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## **8.41 EXT_SLV_SENS_DATA_09**
**Name: EXT_SLV_SENS_DATA_09 Address: 68 (44h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|EXT_SLV_SENS_DATA_09[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data|
|||stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-|
|||4)_CTRL registers.|
## **8.42 EXT_SLV_SENS_DATA_10**
|**Name: EXT_SLV_SENS_DATA_10**<br>**Address: 69 (45h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_10**<br>**Address: 69 (45h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_10**<br>**Address: 69 (45h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_10[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.43 EXT_SLV_SENS_DATA_11**
|**Name: EXT_SLV_SENS_DATA_11**<br>**Address: 70 (46h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_11**<br>**Address: 70 (46h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_11**<br>**Address: 70 (46h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_11[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.44 EXT_SLV_SENS_DATA_12**
**Name: EXT_SLV_SENS_DATA_12 Address: 71 (47h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 EXT_SLV_SENS_DATA_12[7:0] Sensor data read from external I[2] C devices via the I[2] C master interface. The data stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(04)_CTRL registers.
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## **8.45 EXT_SLV_SENS_DATA_13**
**Name: EXT_SLV_SENS_DATA_13 Address: 72 (48h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 EXT_SLV_SENS_DATA_13[7:0] Sensor data read from external I[2] C devices via the I[2] C master interface. The data stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(04)_CTRL registers.
## **8.46 EXT_SLV_SENS_DATA_14**
|**Name: EXT_SLV_SENS_DATA_14**<br>**Address: 73 (49h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_14**<br>**Address: 73 (49h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_14**<br>**Address: 73 (49h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_14[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.47 EXT_SLV_SENS_DATA_15**
|**Name: EXT_SLV_SENS_DATA_15**<br>**Address: 74 (4Ah)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_15**<br>**Address: 74 (4Ah)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_15**<br>**Address: 74 (4Ah)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_15[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.48 EXT_SLV_SENS_DATA_16**
**Name: EXT_SLV_SENS_DATA_16 Address: 75 (4Bh) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 EXT_SLV_SENS_DATA_16[7:0] Sensor data read from external I[2] C devices via the I[2] C master interface. The data stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(04)_CTRL registers.
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## **8.49 EXT_SLV_SENS_DATA_17**
**Name: EXT_SLV_SENS_DATA_17 Address: 76 (4Ch) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|EXT_SLV_SENS_DATA_17[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data|
|||stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-|
|||4)_CTRL registers.|
## **8.50 EXT_SLV_SENS_DATA_18**
|**Name: EXT_SLV_SENS_DATA_18**<br>**Address: 77 (4Dh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_18**<br>**Address: 77 (4Dh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_18**<br>**Address: 77 (4Dh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_18[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.51 EXT_SLV_SENS_DATA_19**
|**Name: EXT_SLV_SENS_DATA_19**<br>**Address: 78 (4Eh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_19**<br>**Address: 78 (4Eh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_19**<br>**Address: 78 (4Eh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_19[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.52 EXT_SLV_SENS_DATA_20**
|**Name: EXT_SLV_SENS_DATA_20**<br>**Address: 79 (4Fh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_20**<br>**Address: 79 (4Fh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_20**<br>**Address: 79 (4Fh)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_20[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
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## **8.53 EXT_SLV_SENS_DATA_21**
**Name: EXT_SLV_SENS_DATA_21 Address: 80 (50h) Type: USR0 Bank: 0 Serial IF: R Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|EXT_SLV_SENS_DATA_21[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data|
|||stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-|
|||4)_CTRL registers.|
## **8.54 EXT_SLV_SENS_DATA_22**
|**8.54 EXT_SLV_SENS_DATA_22**|**8.54 EXT_SLV_SENS_DATA_22**|**8.54 EXT_SLV_SENS_DATA_22**|
|---|---|---|
|**Name: EXT_SLV_SENS_DATA_22**<br>**Address: 81 (51h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_22[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
## **8.55 EXT_SLV_SENS_DATA_23**
|**Name: EXT_SLV_SENS_DATA_23**<br>**Address: 82 (52h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_23**<br>**Address: 82 (52h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|**Name: EXT_SLV_SENS_DATA_23**<br>**Address: 82 (52h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|EXT_SLV_SENS_DATA_23[7:0]|Sensor data read from external I2C devices via the I2C master interface. The data<br>stored is controlled by the I2C_SLV(0-4)_ADDR, I2C_SLV(0-4)_REG, and I2C_SLV(0-<br>4)_CTRL registers.|
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## **8.56 FIFO_EN_1**
**Name: FIFO_EN_1 Address: 102 (66h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x00**
|**8.56 FIFO_EN_1**|**8.56 FIFO_EN_1**|**8.56 FIFO_EN_1**|
|---|---|---|
|**Name: FIFO_EN_1**<br>**Address: 102 (66h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:4|-|Reserved.|
|3|SLV_3_FIFO_EN|1 – Write EXT_SENS_DATA registers associated to SLV_3 (as determined by<br>I2C_SLV2_CTRL, I2C_SLV1_CTRL, and I2C_SL20_CTRL) to the FIFO at the sample rate;<br>0 – Function is disabled.|
|2|SLV_2_FIFO_EN|1 – Write EXT_SENS_DATA registers associated to SLV_2 (as determined by<br>I2C_SLV0_CTRL, I2C_SLV1_CTRL, and I2C_SL20_CTRL) to the FIFO at the sample rate;<br>0 – Function is disabled.|
|1|SLV_1_FIFO_EN|1 – Write EXT_SENS_DATA registers associated to SLV_1 (as determined by<br>I2C_SLV0_CTRL and I2C_SLV1_CTRL) to the FIFO at the sample rate;<br>0 – Function is disabled.|
|0|SLV_0_FIFO_EN|1 – Write EXT_SENS_DATA registers associated to SLV_0 (as determined by<br>I2C_SLV0_CTRL) to the FIFO at the sample rate;<br>0 – Function is disabled.|
## **8.57 FIFO_EN_2**
**Name: FIFO_EN_2 Address: 103 (67h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x00**
|**8.57 FIFO_EN_2**|**8.57 FIFO_EN_2**|**8.57 FIFO_EN_2**|
|---|---|---|
|**Name: FIFO_EN_2**<br>**Address: 103 (67h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:5|-|Reserved.|
|4|ACCEL_FIFO_EN|1 – Write ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H, ACCEL_YOUT_L,<br>ACCEL_ZOUT_H, and ACCEL_ZOUT_L to the FIFO at the sample rate;<br>0 – Function is disabled.|
|3|GYRO_Z_FIFO_EN|1 – Write GYRO_ZOUT_H and GYRO_ZOUT_L to the FIFO at the sample rate.<br>0 – Function is disabled.|
|2|GYRO_Y_FIFO_EN|1 – Write GYRO_YOUT_H and GYRO_YOUT_L to the FIFO at the sample rate.<br>0 – Function is disabled.|
|1|GYRO_X_FIFO_EN|1 – Write GYRO_XOUT_H and GYRO_XOUT_L to the FIFO at the sample rate.<br>0 – Function is disabled.|
|0|TEMP_FIFO_EN|1 – Write TEMP_OUT_H and TEMP_OUT_L to the FIFO at the sample rate.<br>0 – Function is disabled.|
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## **8.58 FIFO_RST**
**Name: FIFO_RST Address: 104 (68h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:5|-|Reserved.|
|4:0|FIFO_RESET[4:0]|S/W FIFO reset. Assert and hold to set FIFO size to 0. Assert and de-assert to reset|
|||FIFO.|
## **8.59 FIFO_MODE**
**Name: FIFO_MODE Address: 105 (69h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:5|-|Reserved.|
|4:0|FIFO_MODE[4:0]|0 – Stream.|
|||1 – Snapshot.|
|||When set to ‘1’, when the FIFO is full, additional writes will not be written to FIFO.|
|||When set to ‘0’, when the FIFO is full, additional writes will be written to the FIFO,|
|||replacingthe oldest data.|
## **8.60 FIFO_COUNTH**
|**8.60 FIFO_COUNTH**||
|---|---|
|**Name: FIFO_COUNTH**||
|**Address: 112 (70h)**||
|**Type: USR0**||
|**Bank: 0**||
|**Serial IF: R**||
|**Reset Value: 0x00**||
|**BIT**<br>**NAME**|**FUNCTION**|
|7:5<br>-|Reserved.|
|4:0<br>FIFO_CNT[12:8]|High Bits, count indicates the number of written bytes in the FIFO.|
||Readingthis byte latches the data for both FIFO_COUNTH,and FIFO_COUNTL.|
|**8.61 FIFO_COUNTL**||
|**Name: FIFO_COUNTL**||
|**Address: 113 (71h)**||
|**Type: USR0**||
|**Bank: 0**||
|**Serial IF: R**||
|**Reset Value: 0x00**||
|**BIT**<br>**NAME**|**FUNCTION**|
|7:0<br>FIFO_CNT[7:0]|Low bits,count indicates the number of written bytes in the FIFO.|
## **8.61 FIFO_COUNTL**
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## **8.62 FIFO_R_W**
**Name: FIFO_R_W Address: 114 (72h) Type: USR0 Bank: 0 Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:0|FIFO_R_W[7:0]|Reading from or writing to this register actually reads/writes the FIFO. For example,|
|||to write a byte to the FIFO, write the desired byte value to FIFO_R_W[7:0]. To read a|
|||byte from the FIFO, perform a register read operation and access the result in|
|||FIFO_R_W[7:0].|
## **8.63 DATA_RDY_STATUS**
**Name: DATA_RDY_STATUS Address: 116 (74h) Type: USR0 Bank: 0 Serial IF: R/C Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7|WOF_STATUS|Wake on FSYNC interrupt status. Cleared on read.|
|6:4|-|Reserved.|
|3:0|RAW_DATA_RDY[3:0]|Data from sensors is copied to FIFO or SRAM.|
|||Set when sequence controller kicks off on a sensor data load. Only bit 0 is relevant in|
|||a single FIFO configuration. Cleared on read.|
## **8.64 FIFO_CFG**
|**8.64 FIFO_CFG**|**8.64 FIFO_CFG**|**8.64 FIFO_CFG**|
|---|---|---|
|**Name: FIFO_CFG**<br>**Address: 118 (76h)**<br>**Type: USR0**<br>**Bank: 0**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:1|-|Reserved.|
|0|FIFO_CFG|This bit should be set to 1 if interrupt status for each sensor is required.|
## **8.65 REG_BANK_SEL**
|**8.65 REG_BANK_SEL**|**8.65 REG_BANK_SEL**|**8.65 REG_BANK_SEL**|
|---|---|---|
|**Name: REG_BANK_SEL**<br>**Address: 127 (7Fh)**<br>**Type: ALL**<br>**Bank: 0**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:6|-|Reserved.|
|5:4|USER_BANK[1:0]|Use the following values in this bit-field to select a USER BANK.<br>0: Select USER BANK 0.<br>1: Select USER BANK 1.<br>2: Select USER BANK 2.<br>3: Select USER BANK 3.|
|3:0|-|Reserved.|
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## _**9 USR BANK 1 REGISTER DESCRIPTIONS**_
This section describes the function and contents of the User Bank 1 Register Map within the ICM-20948.
**NOTE:** The device will come up in sleep mode upon power-up.
## **9.1 SELF_TEST_X_GYRO**
|**Name: SELF_TEST_X_GYRO**<br>**Address: 2 (02h)**<br>**Type: USR1**<br>**Bank: 1**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: SELF_TEST_X_GYRO**<br>**Address: 2 (02h)**<br>**Type: USR1**<br>**Bank: 1**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: SELF_TEST_X_GYRO**<br>**Address: 2 (02h)**<br>**Type: USR1**<br>**Bank: 1**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|XG_ST_DATA[7:0]|The value in this register indicates the self-test output generated during<br>manufacturing tests. This value is to be used to check against subsequent self-test<br>outputsperformed bythe end user.|
## **9.2 SELF_TEST_Y_GYRO**
|**Name: SELF_TEST_Y_GYRO**<br>**Address: 3 (03h)**<br>**Type: USR1**<br>**Bank: 1**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: SELF_TEST_Y_GYRO**<br>**Address: 3 (03h)**<br>**Type: USR1**<br>**Bank: 1**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: SELF_TEST_Y_GYRO**<br>**Address: 3 (03h)**<br>**Type: USR1**<br>**Bank: 1**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|YG_ST_DATA[7:0]|The value in this register indicates the self-test output generated during<br>manufacturing tests. This value is to be used to check against subsequent self-test<br>outputsperformed bythe end user.|
## **9.3 SELF_TEST_Z_GYRO**
|**9.3**<br>**SELF_TEST_Z_GYRO**|**9.3**<br>**SELF_TEST_Z_GYRO**||
|---|---|---|
|**Name: SELF_TEST_Z_GYRO**|||
|**Address: 4 (04h)**|||
|**Type: USR1**|**Type: USR1**||
|**Bank: 1**|**Bank: 1**||
|**Serial IF: R/W**|**Serial IF: R/W**||
|**Reset Value: 0x00**|**Reset Value: 0x00**||
|**BIT**|**NAME**|**FUNCTION**|
|7:0|ZG_ST_DATA[7:0]|The value in this register indicates the self-test output generated during|
|||manufacturing tests. This value is to be used to check against subsequent self-test|
|||outputsperformed bythe end user.|
|**9.4**|**SELF_TEST_X_ACCEL**||
|**Name: SELF_TEST_X_ACCEL**|||
|**Address: 14 (0Eh)**|||
|**Type: USR1**|**Type: USR1**||
|**Bank: 1**|**Bank: 1**||
|**Serial IF: R/W**|**Serial IF: R/W**||
|**Reset Value: 0x00**|**Reset Value: 0x00**||
|**BIT**|**NAME**|**FUNCTION**|
|7:0|XA_ST_DATA[7:0]|Contains self-test data for the X Accelerometer.|
## **9.4 SELF_TEST_X_ACCEL**
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|**9.5**|**9.5**|**SELF_TEST_Y_ACCEL**||
|---|---|---|---|
||**Name: SELF_TEST_Y_ACCEL**|||
||**Address: 15 (0Fh)**|||
||**Type: USR1**|||
||**Bank: 1**|||
||**Serial IF: R/W**|||
||**Reset Value: 0x00**|||
||**BIT**|**NAME**|**FUNCTION**|
||7:0|YA_ST_DATA[7:0]|Contains self-test data for the Y Accelerometer.|
|**9.6**||**SELF_TEST_Z_ACCEL**||
||**Name: SELF_TEST_Z_ACCEL**|||
||**Address: 16 (10h)**|||
||**Type: USR1**|||
||**Bank: 1**|||
||**Serial IF: R/W**|||
||**Reset Value: 0x00**|||
||**BIT**|**NAME**|**FUNCTION**|
||7:0|ZA_ST_DATA[7:0]|Contains self-test data for the Z Accelerometer.|
|**9.7**||**XA_OFFS_H**||
||**Name: XA_OFFS_H**|||
||**Address: 20 (14h)**|||
||**Type: USR1**|||
||**Bank: 1**|||
||**Serial IF: R/W**|||
||**Reset Value: Trimmed on aper-part basis for optimalperformance**|||
||**BIT**|**NAME**|**FUNCTION**|
||7:0|XA_OFFS[14:7]|Upper bits of the X accelerometer offset cancellation.|
|**9.8**||**XA_OFFS_L**||
||**Name: XA_OFFS_L**|||
||**Address: 21 (15h)**|||
||**Type: USR1**|||
||**Bank: 1**|||
||**Serial IF: R/W**|||
||**Reset Value: Trimmed on aper-part basis for optimalperformance**|||
||**BIT**|**NAME**|**FUNCTION**|
||7:1|XA_OFFS[6:0]|Lower bits of the X accelerometer offset cancellation.|
||0|-|Reserved.|
|**9.9**||**YA_OFFS_H**||
||**Name: YA_OFFS_H**|||
||**Address: 23 (17h)**|||
||**Type: USR1**|||
||**Bank: 1**|||
||**Serial IF: R/W**|||
||**Reset Value: Trimmed on aper-part basis for optimalperformance**|||
||**BIT**|**NAME**|**FUNCTION**|
||7:0|YA_OFFS[14:7]|Upper bits of the Y accelerometer offset cancellation.|
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## **9.10 YA_OFFS_L**
|**9.10 YA_OFFS_L**|**9.10 YA_OFFS_L**|**9.10 YA_OFFS_L**|
|---|---|---|
|**Name: YA_OFFS_L**<br>**Address: 24 (18h)**<br>**Type: USR1**<br>**Bank: 1**<br>**Serial IF: R/W**<br>**Reset Value: Trimmed on aper-part basis for optimalperformance**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:1|YA_OFFS[6:0]|Lower bits of the Y accelerometer offset cancellation.|
|0|-|Reserved .|
## **9.11 ZA_OFFS_H**
|**9.11 ZA_OFFS_H**|**9.11 ZA_OFFS_H**|**9.11 ZA_OFFS_H**|
|---|---|---|
|**Name: ZA_OFFS_H**<br>**Address: 26 (1Ah)**<br>**Type: USR1**<br>**Bank: 1**<br>**Serial IF: R/W**<br>**Reset Value: Trimmed on aper-part basis for optimalperformance**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:0|ZA_OFFS[14:7]|Upper bits of the Z accelerometer offset cancellation.|
## **9.12 ZA_OFFS_L**
|**9.12 ZA_OFFS_L**|**9.12 ZA_OFFS_L**|**9.12 ZA_OFFS_L**|
|---|---|---|
|**Name: ZA_OFFS_L**<br>**Address: 27 (1Bh)**<br>**Type: USR1**<br>**Bank: 1**<br>**Serial IF: R/W**<br>**Reset Value: Trimmed on aper-part basis for optimalperformance**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:1|ZA_OFFS[6:0]|Lower bits of the Z accelerometer offset cancellation.|
|0|-|Reserved.|
## **9.13 TIMEBASE_CORRECTION_PLL**
**Name: TIMEBASE_CORRECTION_PLL Address: 40 (28h) Type: USR1 Bank: 1 Serial IF: R/W Reset Value: 0x00 BIT NAME FUNCTION** 7:0 TBC_PLL[7:0] System PLL clock period error (signed, [-10%, +10%]).
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## **9.14 REG_BANK_SEL**
|**9.14 REG_BANK_SEL**|**9.14 REG_BANK_SEL**|**9.14 REG_BANK_SEL**|
|---|---|---|
|**Name: REG_BANK_SEL**<br>**Address: 127 (7Fh)**<br>**Type:**<br>**Bank: 1**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:6|-|Reserved.|
|5:4|USER_BANK[1:0]|Use the following values in this bit-field to select a USER BANK.<br>0: Select USER BANK 0.<br>1: Select USER BANK 1.<br>2: Select USER BANK 2.<br>3: Select USER BANK 3.|
|3:0|-|Reserved.|
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_**ICM-20948**_
## _**10 USR BANK 2 REGISTER MAP**_
This section describes the function and contents of the User Bank 2 Register Map within the ICM-20948.
**NOTE:** The device will come up in sleep mode upon power-up.
## **10.1 GYRO_SMPLRT_DIV**
|**10.1 GYRO_SMPLRT_DIV**|**10.1 GYRO_SMPLRT_DIV**|**10.1 GYRO_SMPLRT_DIV**|
|---|---|---|
|**Name: GYRO_SMPLRT_DIV**<br>**Address: 0 (00h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:0|GYRO_SMPLRT_DIV[7:0]|Gyro sample rate divider. Divides the internal sample rate to generate the sample<br>rate that controls sensor data output rate, FIFO sample rate, and DMP sequence rate.<br>**NOTE:**This register is only effective when FCHOICE = 1’b1 (FCHOICE_B register bit is 1’b0), and<br>(0 < DLPF_CFG < 7).<br>ODR is computed as follows:<br>1.1 kHz/(1+GYRO_SMPLRT_DIV[7:0])|
## **10.2 GYRO_CONFIG_1**
|**10.2 GYRO_CONFIG_1**|**10.2 GYRO_CONFIG_1**|**10.2 GYRO_CONFIG_1**|
|---|---|---|
|**Name: GYRO_CONFIG_1**<br>**Address: 1 (01h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x01**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:6|-|Reserved.|
|5:3|GYRO_DLPFCFG[2:0]|Gyro lowpass filter configuration as shown in Table 16.|
|2:1|GYRO_FS_SEL[1:0]|Gyro Full Scale Select:<br>00 = ±250 dps<br>01= ±500 dps<br>10 = ±1000 dps<br>11 = ±2000 dps|
|0|GYRO_FCHOICE|0 – Bypass gyro DLPF.<br>1 – Enablegyro DLPF.|
The gyroscope DLPF is configured by GYRO_DLPFCFG _,_ when GYRO_FCHOICE = 1. The gyroscope data is filtered according to the value of GYRO_DLPFCFG and GYRO_FCHOICE as shown in Table 16.
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_**ICM-20948**_
|**GYRO_FCHOICE**<br><br>~~a ~~<br>~~es~~<br>~~a~~|**GYRO_DLPFCFG**<br><br> ~~a~~<br>~~rs~~<br>|**OUTPUT**<br>~~Cee~~<br>~~eeee~~|**OUTPUT**<br>~~Cee~~<br>~~eeee~~|**OUTPUT**<br>~~Cee~~<br>~~eeee~~|
|---|---|---|---|---|
|||**3DB BW**<br>**[HZ]**<br>~~Cee~~<br>~~ee~~<br>~~ee~~<br>|**NBW [HZ]**<br>~~Cee~~<br>~~ee~~<br>~~(nD~~<br>|**RATE [HZ]**<br>~~Cee~~<br>|
|0<br> <br>~~es~~<br>~~a~~|x<br> ~~a~~<br>~~rs~~<br>|12106<br>~~ee~~<br>~~ee~~<br>|12316<br>~~ee~~<br>~~(nD~~<br>|9000<br>|
|1<br> <br>~~es~~<br>~~a~~|0<br> ~~a~~<br>~~rs~~<br>|196.6<br>~~ee ~~<br>~~ee~~<br>|229.8<br> ~~ee~~<br>~~(nD~~<br>|1125/(1+GYRO_SMPLRT_DIV)Hz where<br>GYRO_SMPLRT_DIV is 0,1,2,…255<br>|
|1<br>~~aoo~~|1<br>~~rs ~~<br>~~oo~~|151.8<br> ~~ee ~~<br>~~oo~~|187.6<br> ~~(nD~~<br>~~oo~~|1125/(1+GYRO_SMPLRT_DIV)Hz where<br>GYRO_SMPLRT_DIV is 0,1,2,…255<br>~~oo~~|
|1<br>~~a~~|2<br>~~a~~|119.5<br>~~a~~|154.3<br>~~a~~|1125/(1+GYRO_SMPLRT_DIV)Hz where<br>GYRO_SMPLRT_DIV is 0,1,2,…255<br>~~a~~|
|1<br>~~a~~|3<br>~~a~~|51.2<br>~~a~~|73.3<br>~~a~~|1125/(1+GYRO_SMPLRT_DIV)Hz where<br>GYRO_SMPLRT_DIV is 0,1,2,…255<br>~~a~~|
|1<br>~~oo~~|4<br>~~oo~~|23.9<br>~~oo~~|35.9<br>~~oo~~|1125/(1+GYRO_SMPLRT_DIV)Hz where<br>GYRO_SMPLRT_DIV is 0,1,2,…255<br>~~oo~~|
|1<br>~~a~~|5<br>|11.6<br>|17.8<br>|1125/(1+GYRO_SMPLRT_DIV)Hz where<br>GYRO_SMPLRT_DIV is 0,1,2,…255<br>|
|1<br>~~aoo~~|6<br>~~oo~~|5.7<br>~~oo~~|8.9<br>~~oo~~|1125/(1+GYRO_SMPLRT_DIV)Hz where<br>GYRO_SMPLRT_DIV is 0,1,2,…255<br>~~oo~~|
|1<br>~~A~~|7<br>~~A~~|361.4<br>~~A~~|376.5<br>~~A~~|1125/(1+GYRO_SMPLRT_DIV)Hz where<br>GYRO_SMPLRT_DIV is 0,1,2,…255<br>~~A~~|
**Table 16. Gyroscope Configuration 1**
## **10.3 GYRO_CONFIG_2**
|**Table 16. Gyroscope Configuration 1**<br>**10.3 GYRO_CONFIG_2**|**Table 16. Gyroscope Configuration 1**<br>**10.3 GYRO_CONFIG_2**|**Table 16. Gyroscope Configuration 1**<br>**10.3 GYRO_CONFIG_2**|
|---|---|---|
|**Name: GYRO_CONFIG_2**<br>**Address: 2 (02h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:6|-|Reserved.|
|5|XGYRO_CTEN|X Gyro self-test enable.|
|4|YGYRO_CTEN|Y Gyro self-test enable.|
|3|ZGYRO_CTEN|Z Gyro self-test enable.|
|2:0|GYRO_AVGCFG[2:0]|Averaging filter configuration settings for low-power mode.<br>0: 1x averaging.<br>1: 2x averaging.<br>2: 4x averaging.<br>3: 8x averaging.<br>4: 16x averaging.<br>5: 32x averaging.<br>6: 64x averaging.<br>7: 128x averaging.|
Table 17 lists the gyroscope filter bandwidths available in the low-power mode of operation. In the low-power mode of operation, the gyroscope is duty-cycled.
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## _**ICM-20948**_
||**AVERAGES**|**1X**<br>~~|~~|**2X**|**4X**|**8X**|**16X**|**32X**|**64X**<br>~~ee~~|**128X**<br>~~ee~~|
|---|---|---|---|---|---|---|---|---|---|
||**GYRO_FCHOICE**|1<br>~~a ee~~<br>~~|~~<br>~~a~~|1<br>~~ee~~<br>||1<br>~~ee~~<br>||1<br>~~ee~~<br>~~TT~~|1<br>~~ee~~<br>~~TT~~|1<br>~~ee~~<br>~~TT~~|1<br>~~ee~~<br>~~ee~~|1<br>~~ee~~<br>~~ee~~|
||**GYRO_AVGCFG**|0<br>~~|~~<br>~~a~~|1<br>|<br>~~ee~~|2<br>|<br>~~ee~~|3<br>~~TT~~<br>~~ee~~|4<br>~~TT~~<br>~~ee~~|5<br>~~TT~~<br>~~ee~~|6<br>~~ee~~<br>~~ee~~|7<br>~~ee~~<br>~~ee~~<br>~~ee~~|
||**TON [MS]**|1.15<br>~~a~~|1.59<br>|<br>~~ee~~|2.48<br>| <br>~~ee~~|4.26<br> ~~TT~~<br>~~ee~~|7.82<br>~~TT~~<br>~~ee~~|14.93<br>~~TT~~<br>~~ee~~|29.15<br>~~ee~~|57.59<br>~~ee~~<br>~~ee~~|
||**NBW [HZ]**|773.5|469.8<br>~~ee~~|257.8<br>~~ee~~|134.8<br>~~ee~~|68.9<br>~~ee~~|34.8<br>~~ee~~|17.5<br>~~ee~~|8.8<br>~~ee~~<br>~~ee~~|
||**RMS NOISE**<br>**[DPS-RMS] TYP**<br>**(BASED ON GYROSCOPE**<br>**NOISE: 0.011 DPS/√HZ)**|0.31|0.24|0.18|0.13|0.09|0.06|0.05|0.03|
|**GYRO_SMPLRT_DIV**|**ODR [HZ]**|**CURRENT CONSUMPTION [MA] TYP**||||||||
|255<br>~~Po~~<br>~~Po~~<br>~~rrr—“(—i~~|4.4<br>~~Po~~<br>~~rrr—“(—i~~|1.04<br>~~Po~~|1.05<br>~~Po~~|1.05<br>~~Po~~|1.06<br>~~Po~~|1.09<br>~~Po~~|1.14<br>~~Po~~|1.24<br>~~Po~~|1.45<br>~~Po~~|
|64<br>~~Po~~<br>~~rrr—“(—i~~<br>~~Porc~~|17.3<br>~~rrr—“(—i~~|1.07|1.08|1.10|1.15|1.25|1.45|1.85|N/A|
|63<br>~~Po~~<br>~~rrr—“(—i~~<br>~~Porc~~|17.6<br>~~rrr—“(—i~~|1.07|1.08|1.11|1.16|1.26|1.46|1.87||
|32<br>~~Porc~~<br>~~pO~~<br>~~PrCU~~|34.1<br>~~pO~~<br>~~CU~~|1.10<br>~~pO~~|1.12<br>~~pO~~|1.17<br>~~pO~~|1.27<br>~~pO~~|1.47<br>~~pO~~|1.86<br>~~pO~~|N/A||
|31<br>~~pO~~<br>~~PrCU~~|35.2<br>~~pO~~<br>~~CU~~|1.10<br>~~pO~~|1.13<br>~~pO~~|1.18<br>~~pO~~|1.28<br>~~pO~~|1.48<br>~~pO~~|1.89<br>~~pO~~|||
|22<br>~~Pr CU~~<br>~~pO~~<br>~~Pree~~|48.9<br>~~CU~~<br>~~pO~~<br>~~ee~~|1.13<br>~~pO~~|1.16<br>~~pO~~|1.23<br>~~pO~~|1.37<br>~~pO~~|1.66<br>~~pO~~|2.22<br>~~pO~~|||
|16<br>~~pO~~<br>~~Pree~~|66.2<br>~~pO~~<br>~~ee~~|1.16<br>~~pO~~<br>~~ss~~|1.21<br>~~pO~~<br>~~ss~~|1.30<br>~~pO~~<br>~~ss~~|1.49<br>~~pO~~|1.88<br>~~pO~~|N/A<br>~~pO~~|||
|15<br>~~Pr ee~~<br>~~ss~~|70.3<br>~~ee~~<br>~~ss~~|1.17<br>~~ss~~<br>~~ss~~|1.22<br>~~ss~~<br>~~ss~~|1.32<br>~~ss~~<br>~~ss~~|1.52<br>~~ss~~|1.93<br>~~ss~~||||
|10<br>~~es~~<br>~~eo~~|102.3<br>~~es~~<br>|1.23<br>~~ss~~<br>~~es~~<br>|1.30<br>~~ss~~<br>~~es~~<br>|1.45<br>~~ss~~<br>~~es~~<br>|1.74<br>~~es~~<br>|2.34<br>~~es~~||||
|8<br>~~es~~<br>~~eo~~|125.0<br>~~es~~<br>|1.27<br>~~es~~<br>|1.36<br>~~es~~<br>|1.54<br>~~es~~<br>|1.90<br>~~es~~<br>|N/A<br>~~es~~||||
|7<br>~~eoes~~<br>~~eo~~|140.6<br>~~es~~<br>|1.30<br>~~es~~|1.40<br>~~es~~|1.60<br>~~es~~|2.01<br>~~es~~|||||
|5<br>~~es~~<br>~~eoes~~|187.5<br>~~es~~<br>~~ee~~|1.38<br>~~es~~|1.52<br>~~es~~|1.79<br>~~es~~|2.33<br>~~es~~|||||
|4<br>~~eoes~~|225.0<br>~~ee~~|1.45|1.62|1.94|N/A|||||
|3<br>~~es~~<br>~~es~~|281.3<br>~~ee~~<br>~~es~~|1.56<br>~~es~~|1.76<br>~~es~~|2.17<br>~~es~~||||||
|2<br>~~es~~<br>~~es ee~~|375.0<br>~~es~~<br>~~ee~~|1.74<br>~~es~~|2.00<br>~~es~~|N/A||||||
|1<br>~~es ee~~|562.5<br>~~ee~~|2.09|N/A|||||||
**Table 17. Gyroscope Configuration 2**
**NOTE:** Ton is the ON time for motion measurement when the gyroscope is in duty cycle mode.
## **10.4 XG_OFFS_USRH**
|**10.4 XG_OFFS_USRH**|**10.4 XG_OFFS_USRH**|**10.4 XG_OFFS_USRH**|
|---|---|---|
|**Name: XG_OFFS_USRH**<br>**Address: 3 (03h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:0|X_OFFS_USER[15:8]|Upper byte of Xgyro offset cancellation.|
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## **10.5 XG_OFFS_USRL**
**Name: XG_OFFS_USRL Address: 4 (04h) Type: USR2 Bank: 2 Serial IF: R/W Reset Value: 0x00 BIT NAME FUNCTION** 7:0 X_OFFS_USER[7:0] Lower byte of X gyro offset cancellation.
## **10.6 YG_OFFS_USRH**
|**10.6 YG_OFFS_USRH**|**10.6 YG_OFFS_USRH**|**10.6 YG_OFFS_USRH**|
|---|---|---|
|**Name: YG_OFFS_USRH**<br>**Address: 5 (05h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:0|Y_OFFS_USER[15:8]|Upper byte of Ygyro offset cancellation.|
## **10.7 YG_OFFS_USRL**
|**10.7 YG_OFFS_USRL**||
|---|---|
|**Name: YG_OFFS_USRL**||
|**Address: 6 (06h)**||
|**Type: USR2**||
|**Bank: 2**||
|**Serial IF: R/W**||
|**Reset Value: 0x00**||
|**BIT**<br>**NAME**|**FUNCTION**|
|7:0<br>Y_OFFS_USER[7:0]|Lower byte of Ygyro offset cancellation.|
|**10.8 ZG_OFFS_USRH**||
|**Name: ZG_OFFS_USRH**||
|**Address: 7 (07h)**||
|**Type: USR2**||
|**Bank: 2**||
|**Serial IF: R/W**||
|**Reset Value: 0x00**||
|**BIT**<br>**NAME**|**FUNCTION**|
|7:0<br>Z_OFFS_USER[15:8]|Upper byte of Zgyro offset cancellation.|
|**10.9 ZG_OFFS_USRL**||
|**Name: ZG_OFFS_USRL**||
|**Address: 8 (08h)**||
|**Type: USR2**||
|**Bank: 2**||
|**Serial IF: R/W**||
|**Reset Value: 0x00**||
|**BIT**<br>**NAME**|**FUNCTION**|
|7:0<br>Z_OFFS_USER[7:0]|Lower byte of Zgyro offset cancellation.|
## **10.8 ZG_OFFS_USRH**
## **10.9 ZG_OFFS_USRL**
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## **10.10 ODR_ALIGN_EN**
**Name: ODR_ALIGN_EN Address: 9 (09h) Type: USR2 Bank: 2 OTP: No Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:1|-|Reserved.|
|0|ODR_ALIGN_EN|0: Disables ODR start-time alignment.|
|||1: Enables ODR start-time alignment when any of the following registers is written|
|||(with the same value or with different values): GYRO_SMPLRT_DIV,|
|||ACCEL_SMPLRT_DIV_1,ACCEL_SMPLRT_DIV_2,I2C_MST_ODR_CONFIG.|
## **10.11 ACCEL_SMPLRT_DIV_1**
|**10.11 ACCEL_SMPLRT_DIV_1**|**10.11 ACCEL_SMPLRT_DIV_1**|**10.11 ACCEL_SMPLRT_DIV_1**|
|---|---|---|
|**Name: ACCEL_SMPLRT_DIV_1**<br>**Address: 16 (10h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:4|-|Reserved.|
|3:0|ACCEL_SMPLRT_DIV[11:8]|MSB for ACCEL sample rate div.|
## **10.12 ACCEL_SMPLRT_DIV_2**
|**10.12 ACCEL_SMPLRT_DIV_2**|**10.12 ACCEL_SMPLRT_DIV_2**|**10.12 ACCEL_SMPLRT_DIV_2**|
|---|---|---|
|**Name: ACCEL_SMPLRT_DIV_2**<br>**Address: 17 (11h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:0|ACCEL_SMPLRT_DIV[7:0]|LSB for ACCEL sample rate div.<br>ODR is computed as follows:<br>1.125 kHz/(1+ACCEL_SMPLRT_DIV[11:0])|
## **10.13 ACCEL_INTEL_CTRL**
|**10.13 ACCEL_INTEL_CTRL**|**10.13 ACCEL_INTEL_CTRL**|**10.13 ACCEL_INTEL_CTRL**|
|---|---|---|
|**Name: ACCEL_INTEL_CTRL**<br>**Address: 18 (12h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:2|-|Reserved.|
|1|ACCEL_INTEL_EN|Enable the WOM logic.|
|0|ACCEL_INTEL_MODE_INT|Selects WOM algorithm.<br>1 = Compare the current sample with the previous sample.<br>0 = Initial sample is stored,all future samples are compared to the initial sample.|
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## **10.14 ACCEL_WOM_THR**
|**Name: ACCEL_WOM_THR**<br>**Address: 19 (13h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: ACCEL_WOM_THR**<br>**Address: 19 (13h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: ACCEL_WOM_THR**<br>**Address: 19 (13h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|WOM_THRESHOLD[7:0]|This register holds the threshold value for the Wake on Motion Interrupt for ACCEL<br>x/y/z axes. LSB = 4 mg. Range is 0 mgto 1020 mg.|
## **10.15 ACCEL_CONFIG**
**Name: ACCEL_CONFIG Address: 20 (14h) Type: USR2 Bank: 2 Serial IF: R/W Reset Value: 0x01**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:6|-|Reserved.|
|5:3|ACCEL_DLPFCFG[2:0]|Accelerometer lowpass filter configuration as shown in Table 18.|
|2:1|ACCEL_FS_SEL[1:0]|Accelerometer Full Scale Select:|
|||00: ±2g|
|||01: ±4g|
|||10: ±8g|
|||11: ±16g|
|0|ACCEL_FCHOICE|0: Bypass accel DLPF.|
|||1: Enable accel DLPF.|
**OUTPUT** ~~Ce~~ **ACCEL_FCHOICE ACCEL_DLPFCFG 3DB BW NBW [HZ] RATE [HZ]** ~~ee~~ **[HZ]** 0 x 1209 1248 4500 ~~es ee~~ 1125/(1+ACCEL_SMPLRT_DIV)Hz where 1 0 246.0 265.0 ACCEL_SMPLRT_DIV is 0, 1, 2,…4095 ~~ee es re rs~~ 1125/(1+ACCEL_SMPLRT_DIV)Hz where 1 1 246.0 265.0 ~~a ee ee ee~~ ACCEL_SMPLRT_DIV is 0, ~~ee~~ 1, 2,…4095 1125/(1+ACCEL_SMPLRT_DIV)Hz where 1 2 111.4 136.0 ACCEL_SMPLRT_DIV is 0, 1, 2,…4095 ~~ee ee ee es~~ 1125/(1+ACCEL_SMPLRT_DIV)Hz where 1 3 50.4 68.8 ACCEL_SMPLRT_DIV is 0, 1, 2,…4095 ~~ee ee ee ee ee~~ 1125/(1+ACCEL_SMPLRT_DIV)Hz where 1 4 23.9 34.4 ACCEL_SMPLRT_DIV is 0, 1, 2,…4095 ~~ee es ee ee~~ 1125/(1+ACCEL_SMPLRT_DIV)Hz where 1 5 11.5 17.0 ACCEL_SMPLRT_DIV is 0, 1, 2,…4095 ~~ee es ee~~ 1125/(1+ACCEL_SMPLRT_DIV)Hz where 1 6 5.7 8.3 ACCEL_SMPLRT_DIV is 0, 1, 2,…4095 ~~ee ee ee ee ee~~ 1125/(1+ACCEL_SMPLRT_DIV)Hz where 1 7 473 499 ~~a es ee ee~~ ACCEL_SMPLRT_DIV is 0, 1, 2,…4095
**Table 18. Accelerator Configuration**
The data rate out of the DLPF filter block can be further reduced by a factor of 1.125 kHz/(1+ACCEL_SMPLRT_DIV[11:0]) where ACCEL_SMPLRT_DIV is a 12-bit integer.
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## **10.16 ACCEL_CONFIG_2**
**Name: ACCEL_CONFIG_2 Address: 21 (15h) Type: USR2 Bank: 2 Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:5|-|Reserved.|
|4|AX_ST_EN_REG|X Accel self-test enable.|
|3|AY_ST_EN_REG|Y Accel self-test enable.|
|2|AZ_ST_EN_REG|Z Accel self-test enable.|
|1:0|DEC3_CFG[1:0]|Controls the number of samples averaged in the accelerometer decimator:|
|||0: Average 1 or 4 samples depending on ACCEL_FCHOICE (see Table 19).|
|||1: Average 8 samples.|
|||2: Average 16 samples.|
|||3: Average 32 samples.|
Table 19 lists the accelerometer filter bandwidths available in the low-power mode of operation. In the low-power mode of operation, the accelerometer is duty-cycled.
||**AVERAGES**|**1X**<br>~~ee~~|**4X**<br>~~|~~<br>|**8X**<br>~~|~~<br>|**16X**|**32X**|
|---|---|---|---|---|---|---|
||**ACCEL_FCHOICE**|0<br>~~|~~<br>~~ee~~<br>~~ee~~|1<br>~~|~~<br>~~|~~<br>~~ee~~<br>|1<br>~~|~~<br>~~|~~<br>~~ee~~|1<br>~~|~~<br>~~ee~~|1<br>~~|~~<br>~~ee~~|
||**ACCEL_DLPFCFG**|x<br>~~ee~~<br>~~ee~~<br>~~ee~~|7<br>~~|~~<br>~~ee~~<br>~~**ee**~~|7<br>~~|~~<br>~~ee~~<br>~~ee~~|7<br>~~ee~~<br>~~ee~~|7<br>~~ee~~<br>~~**e**e~~|
||**DEC3_CFG**|0<br>~~ee ~~<br>~~ee~~<br>~~ee~~|0<br>~~|~~<br> ~~ee~~<br>~~**ee**~~|1<br>~~|~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|2<br>~~ee~~<br>~~ee~~<br>~~e~~|3<br>~~ee~~<br>~~**e**e~~<br>~~e~~|
||**TON (MS)**|0.821<br> <br>~~ee ~~<br>~~ee~~|1.488<br> ~~ee ~~<br> ~~**ee**~~|2.377<br> ~~ee~~<br>~~ee~~<br>~~ee~~|4.154<br>~~ee~~<br>~~ee~~<br>~~e~~|7.71<br>~~ee~~<br>~~**e**e~~<br>~~e~~|
||**NBW (HZ)**|1237.5<br> <br>~~ee~~|496.8<br> ~~**ee**~~|264.8<br>~~ee~~<br>~~ee~~|136.5<br>~~ee ~~<br>~~e~~|69.2<br> ~~**e**e~~<br>~~e~~|
||**RMS NOISE**<br>**[MG-RMS] TYP**<br>**(BASED ON**<br>**ACCELEROMETER NOISE:**<br>**190µG/√HZ)**|6.7|4.2|3.1|2.2|1.6|
|**ACCEL_SMPLRT_DIV**|**ODR [HZ]**<br>~~eG~~|**CURRENT CONSUMPTION [µA] TYP**<br>~~eG~~|||||
|4095<br>~~es~~|0.27<br>~~es~~<br>~~eG~~|6.2<br>~~es~~<br>~~eG~~|6.3<br>~~es~~<br>~~eG~~|6.5<br>~~es~~|6.9<br>~~es~~|7.6<br>~~es~~|
|2044<br>~~es~~<br>~~ee~~<br>~~PO~~|0.55<br>~~es~~<br>~~eG~~<br>~~ee~~|6.3<br>~~es~~<br>~~eG~~<br>~~ee~~|6.6<br>~~es~~<br>~~eG~~<br>~~ee~~|7.0<br>~~es~~<br>~~ee~~|7.7<br>~~es~~<br>~~ee~~|9.2<br>~~es~~<br>~~ee~~|
|1022<br>~~PO~~|1.1|6.7|7.2|8.0|9.4|12.3|
|513<br>~~PO~~<br>~~Of~~<br>~~PO~~|2.2<br>~~Of~~|7.3<br>~~Of~~|8.4<br>~~Of~~|9.9<br>~~Of~~|12.8<br>~~Of~~|18.6<br>~~Of~~|
|255<br>~~PO~~|4.4|8.7|10.9|13.8|19.7|31.4|
|127<br>~~PO~~<br>~~Of~~<br>~~PO~~|8.8<br>~~Of~~|11.4<br>~~Of~~|15.8<br>~~Of~~|21.6<br>~~Of~~|33.3<br>~~Of~~|56.7<br>~~Of~~|
|63<br>~~PO~~|17.6|16.8|25.6|37.3|60.7|107.5|
|31<br>~~PO~~<br>~~eG~~|35.2<br>~~eG~~|27.6<br>~~eG~~|45.2<br>~~eG~~|68.6<br>~~eG~~|115.3<br>~~eG~~|208.9<br>~~eG~~|
|22<br>~~Of~~<br>~~PO~~|48.9<br>~~Of~~|36.1<br>~~Of~~|60.5<br>~~Of~~|93.0<br>~~Of~~|158.1<br>~~Of~~|288.3<br>~~Of~~|
|15<br>~~PO~~|70.3|49.2|84.3|131.1|224.7|411.9|
|10<br>~~PO~~<br>~~ee~~<br>~~ee~~|102.3<br>~~ee~~|68.9<br>~~ee~~|119.9<br>~~ee~~|188.0<br>~~ee~~|324.1<br>~~ee~~|596.3<br>~~ee~~|
|7<br>~~ee~~|140.6|92.4|162.7|256.3|443.3|N/A|
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|5|187.5|121.2|214.9|||
|---|---|---|---|---|---|
|3|281.3|178.9|319.3||N/A|
|1|562.5|351.7||N/A||
**Table 19. Accelerator Configuration 2**
**NOTE:** Ton is the ON time for motion measurement when the accelerometer is in duty cycle mode.
## **10.17 FSYNC_CONFIG**
|**10.17 FSYNC_CONFIG**|**10.17 FSYNC_CONFIG**|**10.17 FSYNC_CONFIG**|
|---|---|---|
|**Name: FSYNC_CONFIG**<br>**Address: 82 (52h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|DELAY_TIME_EN|0: Disables delay time measurement between FSYNC event and the first ODR event<br>(after FSYNC event).<br>1: Enables delay time measurement between FSYNC event and the first ODR event<br>(after FSYNC event).|
|6|-|Reserved.|
|5|WOF_DEGLITCH_EN|Enable digital deglitchingof FSYNC input for Wake on FSYNC.|
|4|WOF_EDGE_INT|0: FSYNC is a level interrupt for Wake on FSYNC.<br>1: FSYNC is an edge interrupt for Wake on FSYNC.<br>ACTL_FSYNC is used to set thepolarityof the interrupt.|
|3:0|EXT_SYNC_SET[3:0]|Enables the FSYNC pin data to be sampled.<br>EXT_SYNC_SET FSYNC bit location.<br>0: Function disabled.<br>1: TEMP_OUT_L[0].<br>2: GYRO_XOUT_L[0].<br>3: GYRO_YOUT_L[0].<br>4: GYRO_ZOUT_L[0].<br>5: ACCEL_XOUT_L[0].<br>6: ACCEL_YOUT_L[0].<br>7: ACCEL_ZOUT_L[0].|
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## **10.18 TEMP_CONFIG**
|**10.18 TEMP_CONFIG**|**10.18 TEMP_CONFIG**|**10.18 TEMP_CONFIG**|
|---|---|---|
|**Name: TEMP_CONFIG**<br>**Address: 83 (53h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**<br>~~a~~<br>~~rs~~|||
|**BIT**<br>~~a~~|**NAME**<br>~~rs~~|**FUNCTION**<br>|
|2:0<br>~~a~~|TEMP_DLPFCFG[2:0]<br>~~rs~~|Lowpass filter configuration for temperature sensor as shown in the table below:<br>**TEMP_DLPCFG<2:0>**<br>**TEMP SENSOR**<br>**NBW(HZ)**<br>**RATE(KHZ)**<br>0<br>7932.0<br>9<br>1<br>217.9<br>1.125<br>2<br>123.5<br>1.125<br>3<br>65.9<br>1.125<br>4<br>34.1<br>1.125<br>5<br>17.3<br>1.125<br>6<br>8.8<br>Rate(kHz)<br>7<br>7932.0<br>9<br>~~ee peer eee~~<br>~~GO~~<br>~~GO~~<br>~~RG~~<br>~~RG~~<br>~~GO~~<br>~~GO~~<br>~~TT~~<br>~~Cord~~|
## **10.19 MOD_CTRL_USR**
|**10.19 MOD_CTRL_USR**|**10.19 MOD_CTRL_USR**|**10.19 MOD_CTRL_USR**|
|---|---|---|
|**Name: MOD_CTRL_USR**<br>**Address: 84 (54h)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x03**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:1|-|Reserved.|
|0|REG_LP_DMP_EN|Enable turningon DMP in Low Power Accelerometer mode.|
## **10.20 REG_BANK_SEL**
|**Name: REG_BANK_SEL**<br>**Address: 127 (7Fh)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: REG_BANK_SEL**<br>**Address: 127 (7Fh)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: REG_BANK_SEL**<br>**Address: 127 (7Fh)**<br>**Type: USR2**<br>**Bank: 2**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:6|-|Reserved.|
|5:4|USER_BANK[1:0]|Use the following values in this bit-field to select a USER BANK.<br>0: Select USER BANK 0.<br>1: Select USER BANK 1.<br>2: Select USER BANK 2.<br>3: Select USER BANK 3.|
|3:0|-|Reserved.|
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## _**11 USR BANK 3 REGISTER MAP**_
This section describes the function and contents of the User Bank 3 Register Map within the ICM-20948.
**NOTE:** The device will come up in sleep mode upon power-up.
## **11.1 I2C_MST_ODR_CONFIG**
|**11.1 I2C_MST_ODR_CONFIG**|**11.1 I2C_MST_ODR_CONFIG**|**11.1 I2C_MST_ODR_CONFIG**|
|---|---|---|
|**Name: I2C_MST_ODR_CONFIG**<br>**Address: 0 (00h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7:4|-|Reserved|
|3:0|I2C_MST_ODR_CONFIG[3:0]|ODR configuration for external sensor when gyroscope and accelerometer are<br>disabled. ODR is computed as follows:<br>1.1 kHz/(2^((odr_config[3:0])) )<br>When gyroscope is enabled, all sensors (including I2C_MASTER) use the gyroscope<br>ODR. If gyroscope is disabled, then all sensors (including I2C_MASTER) use the<br>accelerometer ODR.|
## **11.2 I2C_MST_CTRL**
|**11.2 I2C_MST_CTRL**|**11.2 I2C_MST_CTRL**|**11.2 I2C_MST_CTRL**|
|---|---|---|
|**Name: I2C_MST_CTRL**<br>**Address: 1 (01h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|MULT_MST_EN|Enables multi-master capability. When disabled, clocking to the I2C_MST_IF can be<br>disabled when not in use and the logic to detect lost arbitration is disabled.|
|6:5|-|Reserved.|
|4|I2C_MST_P_NSR|This bit controls the I2C Master’s transition from one slave read to the next slave<br>read.<br>0 - There is a restart between reads.<br>1 - There is a stopbetween reads.|
|3:0|I2C_MST_CLK[3:0]|Sets I2C master clock frequencyas shown in Table 23.|
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## **11.3 I2C_MST_DELAY_CTRL**
**Name: I2C_MST_DELAY_CTRL Address: 2 (02h) Type: USR3 Bank: 3 Serial IF: R/W Reset Value: 0x00**
|**11.3 I2C_MST_DELAY_CTRL**|**11.3 I2C_MST_DELAY_CTRL**|**11.3 I2C_MST_DELAY_CTRL**|
|---|---|---|
|**Name: I2C_MST_DELAY_CTRL**<br>**Address: 2 (02h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|DELAY_ES_SHADOW|Delays shadowingof external sensor data until all data is received.|
|6:5|-|Reserved.|
|4|I2C_SLV4_DELAY_EN|When enabled, slave 4 will only be accessed 1/(1+I2C_SLC4_DLY) samples as<br>determined byI2C_MST_ODR_CONFIG.|
|3|I2C_SLV3_DELAY_EN|When enabled, slave 3 will only be accessed 1/(1+I2C_SLC4_DLY) samples as<br>determined byI2C_MST_ODR_CONFIG.|
|2|I2C_SLV2_DELAY_EN|When enabled, slave 2 will only be accessed 1/(1+I2C_SLC4_DLY) samples as<br>determined byI2C_MST_ODR_CONFIG.|
|1|I2C_SLV1_DELAY_EN|When enabled, slave 1 will only be accessed 1/(1+I2C_SLC4_DLY) samples as<br>determined byI2C_MST_ODR_CONFIG.|
|0|I2C_SLV0_DELAY_EN|When enabled, slave 0 will only be accessed 1/(1+I2C_SLC4_DLY) samples as<br>determined byI2C_MST_ODR_CONFIG.|
## **11.4 I2C_SLV0_ADDR**
|**11.4 I2C_SLV0_ADDR**||
|---|---|
|**Name: I2C_SLV0_ADDR**||
|**Address: 3 (03h)**||
|**Type: USR3**||
|**Bank: 3**||
|**Serial IF: R/W**||
|**Reset Value: 0x00**||
|**BIT**<br>**NAME**|**FUNCTION**|
|7<br>I2C_SLV0_RNW|1 – Transfer is a read.|
||0 – Transfer is a write.|
|6:0<br>I2C_ID_0[6:0]|Physical address of I2C slave 0.|
|**11.5 I2C_SLV0_REG**||
|**Name: I2C_SLV0_REG**||
|**Address: 4 (04h)**||
|**Type: USR3**||
|**Bank: 3**||
|**Serial IF: R/W**||
|**Reset Value: 0x00**||
|**BIT**<br>**NAME**|**FUNCTION**|
|7:0<br>I2C_SLV0_REG[7:0]|I2C slave 0 register address from where to begin data transfer.|
## **11.5 I2C_SLV0_REG**
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## **11.6 I2C_SLV0_CTRL**
|**11.6 I2C_SLV0_CTRL**|**11.6 I2C_SLV0_CTRL**|**11.6 I2C_SLV0_CTRL**|
|---|---|---|
|**Name: I2C_SLV0_CTRL**<br>**Address: 5 (05h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|I2C_SLV0_EN|1 – Enable reading data from this slave at the sample rate and storing data at the first<br>available EXT_SENS_DATA register, which is always EXT_SENS_DATA_00 for I2C slave 0.<br>0 – Function is disabled for this slave.|
|6|I2C_SLV0_BYTE_SW|1 – Swap bytes when reading both the low and high byte of a word. Note there is<br>nothing to swap after reading the first byte if I2C_SLV0_REG[0] = 1, or if the last byte<br>read has a register address lsb = 0.<br>For example, if I2C_SLV0_REG = 0x1, and I2C_SLV0_LENG = 0x4:<br>1) The first byte read from address 0x1 will be stored at EXT_SENS_DATA_00,<br>2) the second and third bytes will be read and swapped, so the data read from address<br>0x2 will be stored at EXT_SENS_DATA_02, and the data read from address 0x3 will be<br>stored at EXT_SENS_DATA_01,<br>3) The last byte read from address 0x4 will be stored at EXT_SENS_DATA_03.<br>0 – No swappingoccurs;bytes are written in order read.|
|5|I2C_SLV0_REG_DIS|When set, the transaction does not write a register value, it will only read data, or write<br>data.|
|4|I2C_SLV0_GRP|External sensor data typically comes in as groups of two bytes. This bit is used to<br>determine if the groups are from the slave’s register address 0 and 1, 2 and 3, etc.., or if<br>the groups are address 1 and 2, 3 and 4, etc.<br>0 indicates slave register addresses 0 and 1 are grouped together (odd numbered<br>register ends the group). 1 indicates slave register addresses 1 and 2 are grouped<br>together (even numbered register ends the group). This allows byte swapping of<br>registers that aregrouped startingat anyaddress.|
|3:0|I2C_SLV0_LENG[3:0]|Number of bytes to be read from I2C slave 0.|
## **11.7 I2C_SLV0_DO**
**Name: I2C_SLV0_DO Address: 6 (06h) Type: USR3 Bank: 3 Serial IF: R/W Reset Value: 0x00 BIT NAME FUNCTION** 7:0 I2C_SLV0_DO[7:0] Data out when slave 0 is set to write.
## **11.8 I2C_SLV1_ADDR**
|**11.8 I2C_SLV1_ADDR**|**11.8 I2C_SLV1_ADDR**|**11.8 I2C_SLV1_ADDR**|
|---|---|---|
|**Name: I2C_SLV1_ADDR**<br>**Address: 7 (07h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|I2C_SLV1_RNW|1 – Transfer is a read.<br>0 – Transfer is a write.|
|6:0|I2C_ID_1[6:0]|Physical address of I2C slave 1.|
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## **11.9 I2C_SLV1_REG**
**Name: I2C_SLV1_REG Address: 8 (08h) Type: USR3 Bank: 3 Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|||**FUNCTION**|
|---|---|---|---|---|
|7:0|I2C_SLV1_REG[7:0]|I2C slave 1 re|C slave 1 re|C slave 1 register address from where to begin data transfer.|
## **11.10 I2C_SLV1_CTRL**
**Name: I2C_SLV1_CTRL Address: 9 (09h) Type: USR3 Bank: 3 Serial IF: R/W Reset Value: 0x00**
|**11.10 I2C_SLV1_CTRL**|**11.10 I2C_SLV1_CTRL**|**11.10 I2C_SLV1_CTRL**|
|---|---|---|
|**Name: I2C_SLV1_CTRL**<br>**Address: 9 (09h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|I2C_SLV1_EN|1 – Enable reading data from this slave at the sample rate and storing data at the first<br>available EXT_SENS_DATA register as determined by I2C_SLV0_EN and<br>I2C_SLV0_LENG.<br>0 – Function is disabled for this slave.|
|6|I2C_SLV1_BYTE_SW|1 – Swap bytes when reading both the low and high byte of a word. Note there is<br>nothing to swap after reading the first byte if I2C_SLV1_REG[0] = 1, or if the last byte<br>read has a register address lsb = 0.<br>For example, if I2C_SLV0_EN = 0x1, and I2C_SLV0_LENG = 0x3 (to show swap has to<br>do with I2C slave address not EXT_SENS_DATA address), and if I2C_SLV1_REG = 0x1,<br>and I2C_SLV1_LENG = 0x4:<br>1) The first byte read from address 0x1 will be stored at EXT_SENS_DATA_03 (slave<br>0’s data will be in EXT_SENS_DATA_00, EXT_SENS_DATA_01, and<br>EXT_SENS_DATA_02),<br>2) the second and third bytes will be read and swapped, so the data read from<br>address 0x2 will be stored at EXT_SENS_DATA_04, and the data read from address<br>0x3 will be stored at EXT_SENS_DATA_05,<br>3) The last byte read from address 0x4 will be stored at EXT_SENS_DATA_06.<br>0 – No swappingoccurs,bytes are written in order read.|
|5|I2C_SLV1_REG_DIS|When set, the transaction does not write a register value, it will only read data, or<br>write data.|
|4|I2C_SLV1_GRP|External sensor data typically comes in as groups of two bytes. This bit is used to<br>determine if the groups are from the slave’s register address 0 and 1, 2 and 3, etc..,<br>or if the groups are address 1 and 2, 3 and 4, etc.<br>0 indicates slave register addresses 0 and 1 are grouped together (odd numbered<br>register ends the group). 1 indicates slave register addresses 1 and 2 are grouped<br>together (even numbered register ends the group). This allows byte swapping of<br>registers that aregrouped startingat anyaddress.|
|3:0|I2C_SLV1_LENG[3:0]|Number of bytes to be read from I2C slave 1.|
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## **11.11 I2C_SLV1_DO**
**Name: I2C_SLV1_DO Address: 10 (0Ah) Type: USR3 Bank: 3 Serial IF: R/W Reset Value: 0x00 BIT NAME FUNCTION** 7:0 I2C_SLV1_DO[7:0] Data out when slave 1 is set to write.
## **11.12 I2C_SLV2_ADDR**
|**11.12 I2C_SLV2_ADDR**||
|---|---|
|**Name: I2C_SLV2_ADDR**||
|**Address: 11 (0Bh)**||
|**Type: USR3**||
|**Bank: 3**||
|**Serial IF: R/W**||
|**Reset Value: 0x00**||
|**BIT**<br>**NAME**|**FUNCTION**|
|7<br>I2C_SLV2_RNW|1 – Transfer is a read.|
||0 – Transfer is a write.|
|6:0<br>I2C_ID_2[6:0]|Physical address of I2C slave 2.|
|**11.13 I2C_SLV2_REG**||
|**Name: I2C_SLV2_REG**||
|**Address: 12 (0Ch)**||
|**Type: USR3**||
|**Bank: 3**||
|**Serial IF: R/W**||
|**Reset Value: 0x00**||
|**BIT**<br>**NAME**|**FUNCTION**|
|7:0<br>I2C_SLV2_REG[7:0]|I2C slave 2 register address from where to begin data transfer.|
## **11.13 I2C_SLV2_REG**
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## **11.14 I2C_SLV2_CTRL**
|**11.14 I2C_SLV2_CTRL**|**11.14 I2C_SLV2_CTRL**|**11.14 I2C_SLV2_CTRL**|
|---|---|---|
|**Name: I2C_SLV2_CTRL**<br>**Address: 13 (0Dh)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|I2C_SLV2_EN|1 – Enable reading data from this slave at the sample rate and storing data at the first<br>available EXT_SENS_DATA register as determined by I2C_SLV0_EN, I2C_SLV0_LENG,<br>I2C_SLV1_EN and I2C_SLV1_LENG.<br>0 – Function is disabled for this slave.|
|6|I2C_SLV2_BYTE_SW|1 – Swap bytes when reading both the low and high byte of a word. Note there is<br>nothing to swap after reading the first byte if I2C_SLV2_REG[0] = 1, or if the last byte<br>read has a register address lsb = 0.<br>See I2C_SLV1_CTRL for an example.<br>0 – No swappingoccurs,bytes are written in order read.|
|5|I2C_SLV2_REG_DIS|When set, the transaction does not write a register value, it will only read data, or<br>write data.|
|4|I2C_SLV2_GRP|External sensor data typically comes in as groups of two bytes. This bit is used to<br>determine if the groups are from the slave’s register address 0 and 1, 2 and 3, etc..,<br>or if the groups are address 1 and 2, 3 and 4, etc.<br>0 indicates slave register addresses 0 and 1 are grouped together (odd numbered<br>register ends the group). 1 indicates slave register addresses 1 and 2 are grouped<br>together (even numbered register ends the group). This allows byte swapping of<br>registers that aregrouped startingat anyaddress.|
|3:0|I2C_SLV2_LENG[3:0]|Number of bytes to be read from I2C slave 2.|
## **11.15 I2C_SLV2_DO**
**Name: I2C_SLV2_DO Address: 14 (0Eh) Type: USR3 Bank: 3 Serial IF: R/W Reset Value: 0x00 BIT NAME FUNCTION** 7:0 I2C_SLV2_DO[7:0] Data out when slave 2 is set to write.
## **11.16 I2C_SLV3_ADDR**
|**11.16 I2C_SLV3_ADDR**|**11.16 I2C_SLV3_ADDR**|**11.16 I2C_SLV3_ADDR**|
|---|---|---|
|**Name: I2C_SLV3_ADDR**<br>**Address: 15 (0Fh)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|I2C_SLV3_RNW|1 – Transfer is a read.<br>0 – Transfer is a write.|
|6:0|I2C_ID_3[6:0]|Physical address of I2C slave 3.|
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## **11.17 I2C_SLV3_REG**
**Name: I2C_SLV3_REG Address: 16 (10h) Type: USR3 Bank: 3 Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|||**FUNCTION**|
|---|---|---|---|---|
|7:0|I2C_SLV3_REG[7:0]|I2C slave 3 re|C slave 3 re|C slave 3 register address from where to begin data transfer.|
## **11.18 I2C_SLV3_CTRL**
**Name: I2C_SLV3_CTRL Address: 17 (11h) Type: USR3 Bank: 3 Serial IF: R/W Reset Value: 0x00**
|**Name: I2C_SLV3_CTRL**<br>**Address: 17 (11h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: I2C_SLV3_CTRL**<br>**Address: 17 (11h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: I2C_SLV3_CTRL**<br>**Address: 17 (11h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7|I2C_SLV3_EN|1 – Enable reading data from this slave at the sample rate and storing data at the first<br>available EXT_SENS_DATA register as determined by I2C_SLV0_EN, I2C_SLV0_LENG,<br>I2C_SLV1_EN, I2C_SLV1_LENG, I2C_SLV2_EN and I2C_SLV2_LENG.<br>0 – Function is disabled for this slave.|
|6|I2C_SLV3_BYTE_SW|1 – Swap bytes when reading both the low and high byte of a word. Note there is<br>nothing to swap after reading the first byte if I2C_SLV3_REG[0] = 1, or if the last byte<br>read has a register address lsb = 0.<br>See I2C_SLV1_CTRL for an example.<br>0 – No swappingoccurs,bytes are written in order read.|
|5|I2C_SLV3_REG_DIS|When set, the transaction does not write a register value, it will only read data, or<br>write data.|
|4|I2C_SLV3_GRP|External sensor data typically comes in as groups of two bytes. This bit is used to<br>determine if the groups are from the slave’s register address 0 and 1, 2 and 3, etc..,<br>or if the groups are address 1 and 2, 3 and 4, etc.<br>0 indicates slave register addresses 0 and 1 are grouped together (odd numbered<br>register ends the group). 1 indicates slave register addresses 1 and 2 are grouped<br>together (even numbered register ends the group). This allows byte swapping of<br>registers that aregrouped startingat anyaddress.|
|3:0|I2C_SLV3_LENG[3:0]|Number of bytes to be read from I2C slave 3.|
## **11.19 I2C_SLV3_DO**
|**Name: I2C_SLV3_DO**<br>**Address: 18 (12h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: I2C_SLV3_DO**<br>**Address: 18 (12h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: I2C_SLV3_DO**<br>**Address: 18 (12h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7:0|I2C_SLV3_DO[7:0]|Data out when slave 3 is set to write.|
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## **11.20 I2C_SLV4_ADDR**
|**11.20 I2C_SLV4_ADDR**|**11.20 I2C_SLV4_ADDR**|**11.20 I2C_SLV4_ADDR**|
|---|---|---|
|**Name: I2C_SLV4_ADDR**<br>**Address: 19 (13h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|||
|**BIT**|**NAME**|**FUNCTION**|
|7|I2C_SLV4_RNW|1 – Transfer is a read.<br>0 – Transfer is a write.|
|6:0|I2C_ID_4[6:0]|Physical address of I2C slave 4.|
**NOTE** : The I[2] C Slave 4 interface can be used to perform only single byte read and write transactions.
## **11.21 I2C_SLV4_REG**
**Name: I2C_SLV4_REG Address: 20 (14h) Type: USR3 Bank: 3 Serial IF: R/W Reset Value: 0x00 BIT NAME FUNCTION** 7:0 I2C_SLV4_REG[7:0] I[2] C slave 4 register address from where to begin data transfer.
## **11.22 I2C_SLV4_CTRL**
|**Name: I2C_SLV4_CTRL**<br>**Address: 21 (15h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: I2C_SLV4_CTRL**<br>**Address: 21 (15h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|**Name: I2C_SLV4_CTRL**<br>**Address: 21 (15h)**<br>**Type: USR3**<br>**Bank: 3**<br>**Serial IF: R/W**<br>**Reset Value: 0x00**|
|---|---|---|
|**BIT**|**NAME**|**FUNCTION**|
|7|I2C_SLV4_EN|1 – Enable data transfer with this slave at the sample rate. If read command, store<br>data in I2C_SLV4_DI register, if write command, write data stored in I2C_SLV4_DO<br>register. Bit is cleared when a single transfer is complete. Be sure to write<br>I2C_SLV4_DO first.<br>0 – Function is disabled for this slave.|
|6|I2C_SLV4_INT_EN|1 – Enables the completion of the I2C slave 4 data transfer to cause an interrupt.<br>0 – Completion of the I2C slave 4 data transfer will not cause an interrupt.|
|5|I2C_SLV4_REG_DIS|When set, the transaction does not write a register value, it will only read data, or<br>write data.|
|4:0|I2C_SLV4_DLY[4:0]|When enabled via the I2C_MST_DELAY_CTRL, those slaves will only be enabled<br>every1/(1+I2C_SLV4_DLY)samples as determined byI2C_MST_ODR_CONFIG.|
## **11.23 I2C_SLV4_DO**
**Name: I2C_SLV4_DO Address: 22 (16h) Type: USR3 Bank: 3 Serial IF: R/W Reset Value: 0x00 BIT NAME FUNCTION** 7:0 I2C_SLV4_DO[7:0] Data out when slave 4 is set to write.
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## **11.24 I2C_SLV4_DI**
**Name: I2C_SLV4_DI Address: 23 (17h) Type: USR3 Bank: 3 Serial IF: R Reset Value: 0x00 BIT NAME FUNCTION** 7:0 I2C_SLV4_DI[7:0] Data read from I[2] C Slave 4.
## **11.25 REG_BANK_SEL**
**Name: REG_BANK_SEL Address: 127 (7Fh) Type: Bank: 3 Serial IF: R/W Reset Value: 0x00**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|7:6|-|Reserved.|
|5:4|USER_BANK[1:0]|Use the following values in this bit-field to select a USER BANK.|
|||0: Select USER BANK 0.|
|||1: Select USER BANK 1.|
|||2: Select USER BANK 2.|
|||3: Select USER BANK 3.|
|3:0|-|Reserved.|
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## _**12 REGISTER MAP FOR MAGNETOMETER**_
The register map for the ICM-20948’s Magnetometer (AK09916) section is listed below.
|**NAME**<br>~~ee~~|**ADDRESS**<br>~~ee~~|**READ/WRITE**<br>~~ne nn~~|**DESCRIPTION**<br>~~nn~~|**BIT WIDTH**<br>~~I~~|**EXPLANATION**|
|---|---|---|---|---|---|
|WIA2<br>~~ee~~<br>~~————————_——————~~|01H<br>~~ee~~<br>~~————————_——————~~|READ<br>~~ne nn~~<br>~~————————_——————~~|Device ID<br>~~nn~~<br>~~————————_——————~~|8<br>~~I~~<br>~~————————_——————~~|~~————————_——————~~|
|ST1<br>~~————————_——————~~|10H<br>~~————————_——————~~|READ<br>~~————————_——————~~|Status 1<br>~~————————_——————~~|8<br>~~————————_——————~~|Data status<br>~~————————_——————~~|
|HXL<br>~~J~~|11H<br>~~J~~|READ<br>~~ee~~|Measurement data<br>~~|~~|8<br>~~—~~|X-axis data<br>~~—~~|
|HXH<br>~~J~~<br>~~ee~~|12H<br>~~J~~<br>~~ee~~|||8<br>~~—~~<br>~~|~~||
|HYL<br>~~J~~<br>~~ee~~|13H<br>~~J~~<br>~~ee~~|||8<br>~~—~~<br>~~|~~|Y-axis data<br>~~—~~<br>~~—~~|
|HYH<br>~~ee~~<br>~~—-—~~|14H<br>~~ee~~<br>~~—-—~~|||8<br>~~|~~<br>~~—~~||
|HZL<br>~~—-—~~|15H<br>~~—-—~~|||8<br>~~—~~|Z-axis data<br>~~—~~|
|HZH<br>~~—-—~~<br>~~es~~|16H<br>~~—-—~~<br>~~ns~~|||8<br>~~—~~||
|ST2<br>~~—-—~~<br>~~es~~|18H<br>~~—-—~~<br>~~ns~~|READ|Status 2|8<br>~~—~~|Data status<br>~~—~~|
|CNTL2<br>~~es~~<br>~~—~~|31H<br>~~ns~~|READ/WRITE|Control 2|8|Control Settings|
|CNTL3<br>~~—~~|32H|READ/WRITE|Control 3|8|Control Settings|
|TS1<br>~~—~~|33H|READ/WRITE|Test|8|DO NOT ACCESS|
|TS2<br>~~—~~|34H|READ/WRITE|Test|8|DO NOT ACCESS|
**Table 20. Register Table for Magnetometer**
Addresses 00h to 18h, 30h to 32h are compliant with automatic increment function of serial interface respectively. In other modes, read data is not correct. When the address is in 00h to 18h, the address is incremented 00h 01h 02h 03h 10h 11h ... 18h, and the address goes back to 00h after 18h. When the address is in 30h to 32h, the address goes back to 30h after 32h.
## **12.1 REGISTER MAP DESCRIPTION**
|**ADDR**<br>~~ee~~<br>~~_——————~~|**REGISTER NAME**<br>~~nn~~<br>~~_——————~~|**D7**<br>~~nn~~<br>~~_——————~~|**D6**<br>~~(n(n~~<br>~~_——————~~|**D5**<br>~~(n(n~~<br>~~_——————~~|**D4**<br>~~(I~~<br>|**D3**<br>~~I~~<br>~~a~~|**D2**<br>~~I~~<br>~~a~~|**D1**<br>~~I~~<br>~~a~~|**D0**<br>~~a~~|
|---|---|---|---|---|---|---|---|---|---|
|**READ-ONLY REGISTER**<br>~~ee~~<br>~~nn (n(n~~<br>~~(I~~<br>~~I I~~<br>~~I~~<br>~~_——————a~~||||||||||
|01H<br>~~_——————~~<br>~~es~~|WIA2<br>~~_——————~~<br>~~nD~~|0<br>~~_——————~~<br>~~nD~~|0<br>~~_——————~~<br>~~I~~|0<br>~~_——————~~<br>~~S(O~~|0<br><br>~~S(O~~|1<br>~~a~~<br>~~(OD~~|0<br>~~a~~<br>~~(~~|0<br>~~a~~|1<br>~~a~~|
|10H<br>~~_——————~~<br>~~es~~<br>~~————~~|ST1<br>~~_——————~~<br>~~nD~~<br>~~————~~|0<br>~~_——————~~<br>~~nD~~<br>|0<br>~~_——————~~<br>~~I~~<br>~~a~~|0<br>~~_—————— ~~<br>~~S(O~~<br>~~a~~|0<br> <br>~~S(O~~|0<br> ~~a~~<br>~~(OD~~|0<br>~~a~~<br>~~(~~|DOR<br>~~a~~|DRDY<br>~~a~~|
|11H<br>~~es~~<br>~~————~~|HXL<br>~~nD~~<br>~~————~~|HX7<br>~~nD ~~<br>|HX6<br> ~~I~~<br>~~a~~|HX5<br>~~S(O~~<br>~~a~~|HX4<br>~~S(O~~|HX3<br>~~(OD~~|HX2<br>~~(~~|HX1|HX0|
|12H<br>~~————~~|HXH<br>~~————~~|HX15<br>|HX14<br>~~a~~|HX13<br>~~a~~|HX12|HX11|HX10|HX9|HX8|
|13H<br>~~————~~<br>~~——~~|HYL<br>~~———— ~~<br>~~——~~|HY7<br>|HY6<br> ~~a~~|HY5<br>~~a~~|HY4|HY3|HY2|HY1|HY0|
|14H<br>~~——~~|HYH<br>~~——~~|HY15|HY14|HY13|HY12|HY11|HY10|HY9|HY8|
|15H<br>~~———~~|HZL<br>~~———~~|HZ7<br>~~———~~|HZ6<br>~~———~~|HZ5<br>~~———~~|HZ4<br>~~———~~|HZ3<br>~~———~~|HZ2<br>~~———~~|HZ1<br>~~———~~|HZ0<br>~~———~~|
|16H<br>~~———~~|HZH<br>~~———~~|HZ15<br>~~———~~|HZ14<br>~~———~~|HZ13<br>~~———~~|HZ12<br>~~———~~|HZ11<br>~~———~~|HZ10<br>~~———~~|HZ9<br>~~———~~|HZ8<br>~~———~~|
|18H<br>~~———~~<br>~~aS~~|ST2<br>~~———~~<br>~~aS~~|0<br>~~———~~<br>~~aS~~|RSV30<br>~~———~~<br>~~aS~~|RSV29<br>~~———~~|RSV28<br>~~———~~<br>~~SS~~|HOFL<br>~~———~~<br>~~SS~~|0<br>~~———~~<br>~~SS~~|0<br>~~———~~<br>~~SS~~|0<br>~~———~~|
|**WRITE/READ REGISTER**<br>~~aS~~<br>~~SS~~||||||||||
|31H<br>~~aS~~|CNTL2<br>~~aS~~|0<br>~~aS~~|0<br>~~aS~~|0|MODE4<br>~~SS~~|MODE3<br>~~SS~~|MODE2<br>~~SS~~|MODE1<br>~~SS~~|MODE0|
|32H<br>~~aS~~<br>~~———~~|CNTL3<br>~~aS~~<br>~~———~~|0<br>~~aS~~<br>~~———~~|0<br>~~aS~~<br>~~———~~|0<br>~~———~~|0<br>~~SS~~<br>~~———~~|0<br>~~SS~~<br>~~———~~|0<br>~~SS~~<br>~~———~~|0<br>~~SS~~<br>~~———~~|SRST<br>~~———~~|
|33H<br>~~———~~|TS1<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|
|34H<br>~~———~~|TS2<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|-<br>~~———~~|
When VDD is turned ON, POR function works and all registers of AK09916 are initialized.
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## _**13 DETAILED DESCRIPTIONS FOR MAGNETOMETER REGISTERS**_
This section details each register within the ICM-20948 Magnetometer section.
## **13.1 WIA: DEVICE ID**
|**ADDR**|**REGISTER NAME**|**D7**|**D6**|**D5**|**D4**|**D3**|**D2**|**D1**|**D0**|
|---|---|---|---|---|---|---|---|---|---|
|**READ-ONLY REGISTER**||||||||||
|01H|WIA|0|0|0|0|1|0|0|1|
Device ID of AK09916. It is described in one byte and fixed value.
09H: fixed
## **13.2 ST1: STATUS 1**
|**ADDR**|**REGISTER NAME**|**D7**|**D6**|**D5**|**D4**|**D3**|**D2**|**D1**|**D0**|
|---|---|---|---|---|---|---|---|---|---|
|**READ-ONLY REGISTER**||||||||||
|10H|ST1|0|0|0|0|0|0|DOR|DRDY|
|Reset||0|0|0|0|0|0|0|0|
DRDY: Data Ready
“0”: Normal
“1”: Data is ready
DRDY bit turns to “1” when data is ready in Single measurement mode, Continuous measurement mode 1, 2, 3, 4 or Self-test mode. It returns to “0” when any one of ST2 register or measurement data register (HXL to TMPS) is read.
DOR: Data Overrun
“0”: Normal
“1”: Data overrun
DOR bit turns to “1” when data has been skipped in Continuous measurement mode 1, 2, 3, 4. It returns to “0” when any one of ST2 register or measurement data register (HXL to TMPS) is read.
## **13.3 HXL TO HZH: MEASUREMENT DATA**
|**ADDR**<br>~~Po~~|**REGISTER NAME**<br>|**D7**<br>|**D6**<br>|**D5**<br><br>~~ee~~|**D4**<br><br>~~ee~~|**D3**<br><br>~~ee~~|**D2**<br><br>~~ee~~|**D1**<br>|**D0**<br>|
|---|---|---|---|---|---|---|---|---|---|
|**READ-ONLY REGISTER**<br>~~Poee~~<br>~~eeee~~||||||||||
|11H<br>~~ee~~|HXL<br>~~ee~~|HX7<br>~~ee~~|HX6<br>~~ee~~|HX5<br>~~ee~~<br>~~ee~~|HX4<br>~~ee~~<br>~~ee~~|HX3<br>~~ee~~<br>~~ee~~<br>~~ee~~|HX2<br>~~ee~~<br>~~ee~~<br>~~ee~~|HX1<br>~~ee~~|HX0<br>~~ee~~|
|12H<br>~~ee~~<br>~~ee~~|HXH<br>~~ee~~<br>~~ee~~|HX15<br>~~ee~~<br>~~ee~~|HX14<br>~~ee~~<br>~~ee~~|HX13<br>~~ee~~<br>~~ee~~<br>~~ee~~|HX12<br>~~ee~~<br>~~ee ~~<br>~~ee~~|HX11<br>~~ee~~<br> ~~ee~~<br>~~ee~~<br>~~ee~~|HX10<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|HX9<br>~~ee~~<br>~~ee~~|HX8<br>~~ee~~<br>~~ee~~|
|13H<br>~~ee~~|HYL<br>~~ee~~|HY7<br>~~ee~~|HY6<br>~~ee~~|HY5<br>~~ee~~|HY4<br>~~ee~~|HY3<br>~~ee~~<br>~~ee~~|HY2<br>~~ee~~<br>~~ee~~|HY1<br>~~ee~~|HY0<br>~~ee~~|
|14H<br>~~ee~~<br>~~a~~|HYH<br>~~ee~~<br>~~a~~|HY15<br>~~ee~~<br>~~a~~|HY14<br>~~ee~~<br>~~a~~|HY13<br>~~ee~~<br>~~a~~|HY12<br>~~ee~~<br>~~a~~|HY11<br>~~ee~~<br>~~ee~~<br>~~a~~|HY10<br>~~ee~~<br>~~ee~~<br>~~a~~|HY9<br>~~ee~~<br>~~a~~|HY8<br>~~ee~~<br>~~a~~|
|15H<br>~~a~~|HZL<br>~~a~~|HZ7<br>~~a~~|HZ6<br>~~a~~|HZ5<br>~~a~~|HZ4<br>~~a~~|HZ3<br>~~a~~|HZ2<br>~~a~~|HZ1<br>~~a~~|HZ0<br>~~a~~|
|16H<br>~~ee~~|HZH<br>~~ee~~|HZ15<br>~~ee~~|HZ14<br>~~ee~~|HZ13<br>~~ee~~|HZ12<br>~~ee~~|HZ11<br>~~ee~~|HZ10<br>~~ee~~|HZ9<br>~~ee~~|HZ8<br>~~ee~~|
|Reset<br>~~ee~~||0<br>~~ee~~|0<br>~~ee~~|0<br>~~ee~~|0<br>~~ee~~|0<br>~~ee~~|0<br>~~ee~~|0<br>~~ee~~|0<br>~~ee~~|
## Measurement data of magnetic sensor X-axis/Y-axis/Z-axis
HXL[7:0]: X-axis measurement data lower 8bit
HXH[15:8]: X-axis measurement data higher 8bit
HYL[7:0]: Y-axis measurement data lower 8bit
HYH[15:8]: Y-axis measurement data higher 8bit
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HZL[7:0]: Z-axis measurement data lower 8bit
HZH[15:8]: Z-axis measurement data higher 8bit
Measurement data is stored in two’s complement and Little Endian format. Measurement range of each axis is from --32752 to 32752 in 16-bit output.
|**MEASUREMENT DATA (EACH AXIS) [15:0]**|**MEASUREMENT DATA (EACH AXIS) [15:0]**|**MEASUREMENT DATA (EACH AXIS) [15:0]**|**MAGNETIC FLUX**<br>**DENSITY [µT]**|
|---|---|---|---|
|**TWO’S COMPLEMENT**|**HEX**|**DECIMAL**||
|0111 1111 1111 0000|7FF0|32752|4912(max.)|
|||||||||
|0000 0000 0000 0001|0001|1|0.15|
|0000 0000 0000 0000|0000|0|0|
|1111 1111 1111 1111|FFFF|-1|-0.15|
|||||||||
|1000 0000 0001 0000|8010|-32752|-4912(min.)|
**Table 22. Magnetometer Measurement Data Format**
## **13.4 ST2: STATUS 2**
|**ADDR**|**REGISTER NAME**|**D7**|**D6**|**D5**|**D4**|**D3**|**D2**|**D1**|**D0**|
|---|---|---|---|---|---|---|---|---|---|
|**READ-ONLY REGISTER**||||||||||
|18H|ST2|0|RSV30|RSV29|RSV28|HOFL|0|0|0|
|Reset||0|0|0|0|0|0|0|0|
ST2[6:4] bits: Reserved register for AKM.
HOFL: Magnetic sensor overflow
“0”: Normal
“1”: Magnetic sensor overflow occurred
In Single measurement mode, Continuous measurement mode 1, 2, 3, 4, and Self-test mode, magnetic sensor may overflow even though measurement data register is not saturated. In this case, measurement data is not correct and HOFL bit turns to “1”. When measurement data register is updated, HOFL bit is updated.
ST2 register has a role as data reading end register, also. When any of measurement data register (HXL to TMPS) is read in Continuous measurement mode 1, 2, 3, 4, it means data reading start and taken as data reading until ST2 register is read. Therefore, when any of measurement data is read, be sure to read ST2 register at the end.
## **13.5 CNTL2: CONTROL 2**
|**ADDR**|**REGISTER NAME**|**D7**|**D6**|**D5**|**D4**|**D3**|**D2**|**D1**|**D0**|
|---|---|---|---|---|---|---|---|---|---|
|**READ/WRITE REGISTER**||||||||||
|31H|CNTL2|0|0|0|MPDE4|MODE3|MODE2|MODE1|MODE0|
|Reset||0|0|0|0|0|0|0|0|
MODE[4:0] bits: Operation mode setting
“00000”: Power-down mode
“00001”: Single measurement mode
“00010”: Continuous measurement mode 1
“00100”: Continuous measurement mode 2
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“00110”: Continuous measurement mode 3
“01000”: Continuous measurement mode 4
“10000”: Self-test mode
Other code settings are prohibited
When each mode is set, AK09916 transits to the set mode.
## **13.6 CNTL3: CONTROL 3**
|**ADDR**|**REGISTER NAME**|**D7**|**D6**|**D5**|**D4**|**D3**|**D2**|**D1**|**D0**|
|---|---|---|---|---|---|---|---|---|---|
|**READ/WRITE REGISTER**||||||||||
|32H|CNTL3|0|0|0|0|0|0|0|SRST|
|Reset||0|0|0|0|0|0|0|0|
SRST: Soft reset
"0": Normal "1": Reset
When “1” is set, all registers are initialized. After reset, SRST bit turns to “0” automatically.
## **13.7 TS1, TS2: TEST 1, 2**
|**ADDR**|**REGISTER NAME**|**D7**|**D6**|**D5**|**D4**|**D3**|**D2**|**D1**|**D0**|
|---|---|---|---|---|---|---|---|---|---|
|**READ/WRITE REGISTER**||||||||||
|33H|TS1|-|-|-|-|-|-|-|-|
|34H|TS2|-|-|-|-|-|-|-|-|
|Reset||0|0|0|0|0|0|0|0|
TS1 and TS2 registers are test registers for shipment test. Do not use these registers.
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## _**14 USE NOTES**_
## **14.1 GYROSCOPE MODE TRANSITION**
When gyroscope is transitioning from low-power to low-noise mode, several unsettled output samples will be observed at the gyroscope output due to filter switching and settling. The number of unsettled gyroscope output samples depends on the filter and ODR settings.
## **14.2 POWER MANAGEMENT 1 REGISTER SETTING**
CLKSEL[2:0] has to be set to 001 to achieve the datasheet performance.
## **14.3 DMP MEMORY ACCESS**
Reading/writing DMP memory and FIFO through I[2] C in a multithreaded environment can cause wrong data being read. To avoid the issue, one may use SPI instead of I[2] C, or use I[2] C with mutexes.
## **14.4 TIME BASE CORRECTION**
The system clock frequency at room temperature in gyroscope mode and 6-Axis mode varies from part to part, and the clock rates specified in datasheet are the nominal values. The percentage of frequency deviation from the nominal values for each part is logged in register TIMEBASE_CORRECTION_PLL, and the range of the code is ±10% with each LSB representing a step of 0.079%. For example, if on one part TIMEBASE_CORRECTION_PLL = 0x0C = d’12, it means the clock frequency in gyroscope mode and 6-Axis mode is ~0.94% faster than the nominal value.
When operating in accelerometer-only mode, the system clock frequency at room temperature is the nominal frequency over parts, and it is independent of the value stored in TIMEBASE_CORRECTION_PLL register.
## **14.5 I[2] C MASTER CLOCK FREQUENCY**
I[2] C master clock frequency can be set by register I2C_MST_CLK as shown in Table 23. Due to temperature variation and part to part variation of system clock frequency in different power modes, I2C_MST_CLK should be set such that in all conditions the clock frequency will not exceed what a slave device can support. To achieve a targeted clock frequency of 400 kHz, MAX, it is recommended to set I2C_MST_CLK = 7 (345.6 kHz / 46.67% duty cycle).
|**I2C_MST_CLK**|**NOMINAL CLK**<br>**FREQUENCY [KHZ]**|**DUTY CYCLE**|
|---|---|---|
|0|370.29|50.00%|
|1|-|-|
|2|370.29|50.00%|
|3|432.00|50.00%|
|4|370.29|42.86%|
|5|370.29|50.00%|
|6|345.60|40.00%|
|7|345.60|46.67%|
|8|304.94|47.06%|
|9|432.00|50.00%|
|10|432.00|41.67%|
|11|432.00|41.67%|
|12|471.27|45.45%|
|13|432.00|50.00%|
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|**I2C_MST_CLK**|**NOMINAL CLK**<br>**FREQUENCY [KHZ]**|**DUTY CYCLE**|
|---|---|---|
|14|345.60|46.67%|
|15|345.60|46.67%|
**Table 23. I[2] C Master Clock Frequency**
## **14.6 CLOCKING**
The internal system clock sources include: (1) an internal relaxation oscillator, and (2) a PLL with MEMS gyroscope oscillator as the reference clock. With the recommended clock selection setting (CLKSEL = 1), the best clock source for optimum sensor performance and power consumption will be automatically selected based on the power mode. Specifically, the internal relaxation oscillator will be selected when operating in accelerometer only mode, while the PLL will be selected whenever gyroscope is on, which includes gyroscope and 6-axis modes.
As clock accuracy is critical to the preciseness of distance and angle calculations performed by DMP, it should be noted that the internal relaxation oscillator and PLL show different performances in some aspects. The internal relaxation oscillator is trimmed to have a consistent operating frequency at room temperature, while the PLL clock frequency varies from part to part. The PLL frequency deviation from the nominal value in percentage is captured in register TIMEBASE_CORRECTION_PLL, and users can factor it in during distance and angle calculations to not sacrifice accuracy. Other than that, PLL has better frequency stability and lower frequency variation over temperature than the internal relaxation oscillator.
## **14.7 LP_EN BIT-FIELD USAGE**
The LP_EN bit-field (User Bank 0, PWR_MGMT_1 register, bit [5] helps to reduce the digital current. The recommended setting for this bit-field is 1 to achieve the lowest possible current. However, when LP_EN is set to 1, user may not be able to write to the following registers. If it is desired to write to registers in this list, it is recommended to first set LP_EN=0, write the desired register(s), then set LP_EN=1 again:
- USER BANK 0: All registers except LP_CONFIG, PWR_MGMT_1, PWR_MGMT_2, INT_PIN_CFG, INT_ENABLE, FIFO_COUNTH, FIFO_COUNTL, FIFO_R_W, FIFO_CFG, REG_BANK_SEL
- USER BANK 1: All registers except REG_BANK_SEL
- USER BANK 2: All registers except REG_BANK_SEL
- USER BANK 3: All registers except REG_BANK_SEL
## **14.8 REGISTER ACCESS USING SPI INTERFACE**
Using the SPI interface, when the AP/user disables the gyroscope sensor (User Bank 0, PWR_MGMT_2 register, bits [2:0]=111) as part of a sequence of register read or write commands, the AP/user will be required to subsequently wait 22 µs prior to any of the following operations:
- (1) Writing to any of the following registers:
- USER BANK 0: All registers except LP_CONFIG, PWR_MGMT_1, PWR_MGMT_2, INT_PIN_CFG, INT_ENABLE, FIFO_COUNTH, FIFO_COUNTL, FIFO_R_W, FIFO_CFG, REG_BANK_SEL
- USER BANK 1: All registers except REG_BANK_SEL
- USER BANK 2: All registers except REG_BANK_SEL
- USER BANK 3: All registers except REG_BANK_SEL
- (2) Reading data from FIFO
- (3) Reading from memory
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## _**15 ORIENTATION OF AXES**_
Figure 12 and Figure 13 show the orientation of the axes of sensitivity and the polarity of rotation. Note the pin 1 identifier (•) in the figures.
**==> picture [91 x 106] intentionally omitted <==**
**----- Start of picture text -----**<br>
+Z<br>+Z +Y<br>+Y<br>+X +X<br>ICM-20948<br>**----- End of picture text -----**<br>
**Figure 12. Orientation of Axes of Sensitivity and Polarity of Rotation**
**==> picture [116 x 68] intentionally omitted <==**
**----- Start of picture text -----**<br>
+Y +X<br>+Z<br>ICM-20948<br>**----- End of picture text -----**<br>
**Figure 13. Orientation of Axes of Sensitivity for Magnetometer**
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## _**16 PACKAGE DIMENSIONS**_
This section provides package dimensions for the device. Information for the 24 Lead QFN 3.0x3.0x0.9 package is in Figure 14 and Table 24
**Figure 14. Package Dimensions**
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|**SYMBOLS**<br>~~ee cere~~<br>~~Ce~~|**DIMENSIONS IN MILLIMETERS**<br>~~cereeee Gee~~|**DIMENSIONS IN MILLIMETERS**<br>~~cereeee Gee~~|**DIMENSIONS IN MILLIMETERS**<br>~~cereeee Gee~~|
|---|---|---|---|
||**MIN.**<br>~~cere~~|**NOM.**<br>~~eee Gee~~|**MAX.**<br>~~Gee~~|
|A<br>~~ee cere~~<br>~~CeRs~~|0.95<br>~~cere ~~|1.00<br> ~~eee Gee~~|1.05<br>~~Gee~~|
|A1<br>~~CeRs~~<br>~~ed~~|0.00|0.02|0.05|
|b<br>~~Rs~~<br>~~ed~~<br>~~Rs nn~~|0.15<br>~~nn~~|0.20|0.25|
|c<br>~~ed~~<br>~~Rs nn~~<br>~~Rd~~|---<br>~~nn~~<br>~~QO~~|0.15 REF.<br>~~QO~~|---<br>~~QO~~|
|D<br>~~Rs nn~~<br>~~Rd~~<br>~~es~~|2.90<br>~~nn~~<br>~~QO~~<br>~~QO~~|3.00<br>~~QO~~<br>~~QO~~|3.10<br>~~QO~~<br>~~QO~~|
|D2<br>~~Rd~~<br>~~es~~<br>~~es~~|1.65<br>~~QO~~<br>~~QO~~<br>~~QO~~|1.70<br>~~QO~~<br>~~QO~~<br>~~QO~~|1.75<br>~~QO~~<br>~~QO~~<br>~~QO~~|
|E<br>~~es~~<br>~~es~~<br>~~Ce~~|2.90<br>~~QO~~<br>~~QO~~|3.00<br>~~QO~~<br>~~QO~~|3.10<br>~~QO~~<br>~~QO~~|
|E2<br>~~es~~<br>~~CeRd~~|1.49<br>~~QO~~|1.54<br>~~QO~~|1.59<br>~~QO~~|
|e<br>~~CeRd~~<br>~~Rs~~|---|0.40|---|
|K<br>~~Rd~~<br>~~Rs~~<br>~~rs~~|---|0.35 REF.|---|
|L<br>~~Rs~~<br>~~rs~~<br>~~es~~|0.25<br>~~QQ~~|0.30<br>~~QQ~~|0.35<br>~~QQ~~|
|R<br>~~rs~~<br>~~es~~<br>~~es~~|0.075<br>~~QQ~~<br>~~QO~~|REF.<br>~~QQ~~<br>~~QO~~|---<br>~~QQ~~<br>~~QO~~|
|s<br>~~es~~<br>~~es~~<br>~~rs~~|---<br>~~QQ~~<br>~~QO~~<br>~~QO~~|0.25 REF.<br>~~QQ~~<br>~~QO~~<br>~~QO~~|---<br>~~QQ~~<br>~~QO~~<br>~~QO~~|
|y<br>~~es~~<br>~~rs~~|0.00<br>~~QO~~<br>~~QO~~|---<br>~~QO~~<br>~~QO~~|0.075<br>~~QO~~<br>~~QO~~|
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## _**17 PART NUMBER PART MARKINGS**_
The part number part markings for ICM-20948 devices are summarized below:
**==> picture [483 x 42] intentionally omitted <==**
**----- Start of picture text -----**<br>
PART NUMBER PART NUMBER PART MARKING<br>ICM-20948 I2948<br>oaeeeememkemii<br>Table 25. Part Number Part Markings<br>**----- End of picture text -----**<br>
## **TOP VIEW**
**==> picture [221 x 115] intentionally omitted <==**
**----- Start of picture text -----**<br>
Part Number I2948<br>Lot Traceability Code X X X X X X<br> YYWW<br>Y Y = Year Code<br>W W = Work Week<br>**----- End of picture text -----**<br>
**Figure 15. Part Number Part Markings**
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## _**18 REFERENCES**_
Please refer to “InvenSense MEMS Handling Application Note (AN-IVS-0002A-00)” for the following information:
- Manufacturing Recommendations
- Assembly Guidelines and Recommendations
- PCB Design Guidelines and Recommendations
- MEMS Handling Instructions
- ESD Considerations
- Reflow Specification
- Storage Specifications
- Package Marking Specification
- Tape & Reel Specification
- Reel & Pizza Box Label
- Packaging
- Representative Shipping Carton Label
- Compliance
- Environmental Compliance
- DRC Compliance
- Compliance Declaration Disclaimer
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## _**19 DOCUMENT INFORMATION**_
## **19.1 REVISION HISTORY**
|**REVISION DATE**|**REVISION**||**DESCRIPTION**|
|---|---|---|---|
|12/07/2016|1.0|Initial Release||
|1/17/2017|1.1|Formatting fix||
|04/06/2017|1.2|Updated Section 4||
|06/02/2017|1.3|Updated Sections 3, 4||
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## **COMPLIANCE DECLARATION DISCLAIMER**
InvenSense believes the environmental and other compliance information given in this document to be correct but cannot guarantee accuracy or completeness. Conformity documents substantiating the specifications and component characteristics are on file. InvenSense subcontracts manufacturing and the information contained herein is based on data received from vendors and suppliers, which has not been validated by InvenSense.
This information furnished by InvenSense, Inc. (“InvenSense”) is believed to be accurate and reliable. However, no responsibility is assumed by InvenSense for its use, or for any infringements of patents or other rights of third parties that may result from its use. Specifications are subject to change without notice. InvenSense reserves the right to make changes to this product, including its circuits and software, in order to improve its design and/or performance, without prior notice. InvenSense makes no warranties, neither expressed nor implied, regarding the information and specifications contained in this document. InvenSense assumes no responsibility for any claims or damages arising from information contained in this document, or from the use of products and services detailed therein. This includes, but is not limited to, claims or damages based on the infringement of patents, copyrights, mask work and/or other intellectual property rights.
Certain intellectual property owned by InvenSense and described in this document is patent protected. No license is granted by implication or otherwise under any patent or patent rights of InvenSense. This publication supersedes and replaces all information previously supplied. Trademarks that are registered trademarks are the property of their respective companies. InvenSense sensors should not be used or sold in the development, storage, production or utilization of any conventional or mass-destructive weapons or for any other weapons or life threatening applications, as well as in any other life critical applications such as medical equipment, transportation, aerospace and nuclear instruments, undersea equipment, power plant equipment, disaster prevention and crime prevention equipment.
©2016—2017 InvenSense. All rights reserved. InvenSense, MotionTracking, MotionProcessing, MotionProcessor, MotionFusion, MotionApps, DMP, AAR, and the InvenSense logo are trademarks of InvenSense, Inc. The TDK logo is a trademark of TDK Corporation. Other company and product names may be trademarks of the respective companies with which they are associated.
©2016—2017 InvenSense. All rights reserved.
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Updated at April 17, 2026
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