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ICM-20602
MEMS Module, MotionTracking Series, 3-Axis Gyroscope/Accelerometer, ±16g, 1.71 V to 3.45 V, LGA-16
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: TDK INVENSENSE
- Product type: MEMS Modules
- MEMS Module Function:Tri-Axis Gyroscope, Tri-Axis Accelerometer; Supply Voltage Min:1.71V; Supply Voltage Max:3.45V; Sensor Case Style:LGA; No. of Pins:16Pins; Gyroscope Range:±
- MSL: MSL 3 - 168 hours
- SVHC: No SVHC (25-Jun-2025)
- No. of Pins: 16Pins
- Sensor Type: Accelerometer, Gyroscope
- Sensing Axis: X, Y, Z
- Product Range: -
- Output Interface: I2C, SPI
- Sensor Case Style: LGA
- Supply Voltage Max: 3.45V
- Supply Voltage Min: 1.71V
- MEMS Module Function: Tri-Axis Gyroscope, Tri-Axis Accelerometer
- Sensor Case / Package: LGA
- Operating Temperature Max: 85°C
- Operating Temperature Min: -40°C
- Sensing Range - Gyroscope: ± 250°/s, ± 500°/s, ± 1000°/s, ± 2000°/s
- Temperature Sensing Range: -
- Sensing Range - Accelerometer: ± 2g, ± 4g, ± 8g, ± 16g
| Delivery and price | |
|---|---|
| Units per pack | 500 |
| Price | 2.98 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
## _**ICM-20602**_
## Hi h Performance 6-Axis MEMS MotionTrackin ™ Device g g
## **General Description**
The ICM-20602 is a 6-axis MotionTracking device that combines a 3-axis gyroscope, 3-axis accelerometer, in a small 3 mm x 3 mm x 0.75 mm (16-pin LGA) package.
## **Applications**
- Smartphones and Tablets
- Wearable Sensors
- IoT Applications
- Motion-based game controllers
- High performance specs
- Gyroscope sensitivity error: ±1%
- Gyroscope noise: ±4 mdps/Hz
- Accelerometer noise: 100 µg/Hz
- Includes 1 KB FIFO to reduce traffic on the serial bus interface, and reduce power consumption by allowing the system processor to burst read sensor data and then go into a low-power mode
- EIS FSYNC support
ICM-20602 includes on-chip 16-bit ADCs, programmable digital filters, an embedded temperature sensor, and programmable interrupts. The device features an operating voltage range down to 1.71V. Communication ports include I[2] C and high speed SPI at 10 MHz.
## **Ordering Information**
|**PART**|**TEMP RANGE**|**PACKAGE**|
|---|---|---|
|ICM-20602†|−40°C to +85°C|16-Pin LGA|
- 3D remote controls for Internet connected DTVs and set top boxes, 3D mice
## **Features**
- 3-Axis Gyroscope with Programmable FSR of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps
- 3-Axis Accelerometer with Programmable FSR of ±2 _g_ , ±4 _g_ , ±8 _g_ , and ±16 _g_
- User-programmable interrupts
- Wake-on-motion interrupt for low power operation of applications processor
- 1 KB FIFO buffer enables the applications processor to read the data in bursts
- On-Chip 16-bit ADCs and Programmable Filters
- Host interface: 10 MHz SPI or 400 kHz Fast Mode I[2] C
- Digital-output temperature sensor
- VDD operating range of 1.71V to 3.45V
- MEMS structure hermetically sealed and bonded at wafer level
- RoHS and Green compliant
†Denotes RoHS and Green-Compliant Package
## **Typical Operating Circuit**
## **Block Diagram**
**==> picture [503 x 183] intentionally omitted <==**
**----- Start of picture text -----**<br>
1.71 – 3.45VDC<br>VDD<br>C2, 0.1 mF C4, 2.2 mF REGOUT<br>Ff 16 15 14<br>AP/HUB 1.71 – 3.45 VDC VDDIO GND T C1, 0.1 mF<br>M 1 13<br>SPI/I2C C3, 10 nF T SCLSDA SCL/SPCSDA/SDI 23 ICM-20602 1211 RESVRESV<br>S AD0 SA0/SDO 4 10 RESV<br>VDDIO CS 5 9 RESV<br>FSYNC for EIS<br>ICM-20602 6 7 8<br>Main PCB<br>RESV<br>INT RESV FSYNC<br>**----- End of picture text -----**<br>
**InvenSense Inc.**
InvenSense reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
1745 Technology Drive, San Jose, CA 95110 U.S.A +1(408) 988–7339
www.invensense.com
_**ICM-20602**_
## **TABLE OF CONTENTS**
||General Description ............................................................................................................................................. 1|General Description ............................................................................................................................................. 1|
|---|---|---|
||Ordering Information ........................................................................................................................................... 1||
||Block Diagram ...................................................................................................................................................... 1|Block Diagram ...................................................................................................................................................... 1|
||Applications ......................................................................................................................................................... 1||
||Features ............................................................................................................................................................... 1||
||Typical Operating Circuit ...................................................................................................................................... 1||
|1|Introduction ......................................................................................................................................................... 7||
||1.1|Purpose and Scope .................................................................................................................................... 7|
||1.2|Product Overview...................................................................................................................................... 7|
||1.3|Applications ............................................................................................................................................... 7|
|2|Features ............................................................................................................................................................... 8||
||2.1|Gyroscope Features .................................................................................................................................. 8|
||2.2|Accelerometer Features ............................................................................................................................ 8|
||2.3|Additional Features ................................................................................................................................... 8|
|3|Electrical Characteristics ...................................................................................................................................... 9||
||3.1|Gyroscope Specifications .......................................................................................................................... 9|
||3.2|Accelerometer Specifications .................................................................................................................. 10|
||3.3|Electrical Specifications ........................................................................................................................... 11|
||3.4|I2C Timing Characterization ..................................................................................................................... 14|
||3.5|SPI Timing Characterization .................................................................................................................... 15|
||3.6|Absolute Maximum Ratings .................................................................................................................... 16|
|4|Applications Information ................................................................................................................................... 17||
||4.1|Pin Out Diagram and Signal Description ................................................................................................. 17|
||4.2|Typical Operating Circuit ......................................................................................................................... 18|
||4.3|Bill of Materials for External Components .............................................................................................. 18|
||4.4|Block Diagram ......................................................................................................................................... 19|
||4.5|Overview ................................................................................................................................................. 19|
||4.6|Three-Axis MEMS Gyroscope with 16-bit ADCs and Signal Conditioning ............................................... 20|
||4.7|Three-Axis MEMS Accelerometer with 16-bit ADCs and Signal Conditioning ......................................... 20|
||4.8|I2C and SPI Serial Communication Interfaces .......................................................................................... 20|
||4.9|Self-Test................................................................................................................................................... 21|
||4.10|Clocking ............................................................................................................................................... 21|
||4.11|Sensor Data Registers ......................................................................................................................... 21|
||4.12|FIFO ..................................................................................................................................................... 22|
||4.13|Interrupts ............................................................................................................................................ 22|
||4.14|Digital-Output Temperature Sensor ................................................................................................... 22|
||4.15|Bias and LDOs ..................................................................................................................................... 22|
||4.16|Charge Pump ...................................................................................................................................... 22|
Page 2 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
|InvenSense|InvenSense|<br>**_ICM-20602_**<br>InvenSense|
|---|---|---|
||4.17|Standard Power Modes – Update the Power Modes ......................................................................... 22|
|5|Programmable Interrupts .................................................................................................................................. 23||
||5.1|Wake-on-Motion Interrupt ..................................................................................................................... 23|
|6|Digital Interface ................................................................................................................................................. 24||
||6.1|I2C and SPI Serial Interfaces .................................................................................................................... 24|
||6.2|I2C Interface ............................................................................................................................................. 24|
||6.3|I2C Communications Protocol ................................................................................................................. 24|
||6.4|I2C Terms ................................................................................................................................................. 26|
||6.5|SPI Interface ............................................................................................................................................ 26|
|7|Serial Interface Considerations .......................................................................................................................... 28||
||7.1|ICM-20602 Supported Interfaces ............................................................................................................ 28|
|8|Register Map ...................................................................................................................................................... 29||
|9|Register Descriptions ......................................................................................................................................... 32||
||9.1|Register Descriptions .............................................................................................................................. 32|
||9.2|Register 04 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register32|
||9.3|Register 05 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register32|
||9.4|Register 07 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register32|
||9.5|Register 08 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register33|
||9.6|Register 10 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register33|
||9.7|Register 11 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register33|
||9.8|Registers 13 to 15 Accelerometer Self-Test Registers ............................................................................ 34|
||9.9|Register 19 – X-Gyro Offset Adjustment Register: High Byte ................................................................. 34|
||9.10|Register 20 – X-Gyro Offset Adjustment Register: Low Byte .............................................................. 34|
||9.11|Register 21 – Y-Gyro Offset Adjustment Register: High Byte ............................................................. 35|
||9.12|Register 22 – Y-Gyro Offset Adjustment Register: Low Byte .............................................................. 35|
||9.13|Register 23 – Z-Gyro Offset Adjustment Register: High Byte ............................................................. 35|
||9.14|Register 24 – Z-Gyro Offset Adjustment Register: Low Byte .............................................................. 35|
||9.15|Register 25 – Sample Rate Divider ...................................................................................................... 36|
||9.16|Register 26 – Configuration ................................................................................................................ 36|
||9.17|Register 27 – Gyroscope Configuration .............................................................................................. 37|
||9.18|Register 28 – Accelerometer Configuration ....................................................................................... 37|
||9.19|Register 29 – Accelerometer Configuration 2..................................................................................... 38|
||9.20|Register 30 – Gyroscope Low Power Mode Configuration ................................................................. 39|
||9.21|Register 32 – Wake-on Motion Threshold: X-Axis Accelerometer ..................................................... 40|
||9.22|Register 33 – Wake-on Motion Threshold: Y-Axis Accelerometer...................................................... 40|
||9.23|Register 34 – Wake-on Motion Threshold: Z-Axis Accelerometer ...................................................... 40|
||9.24|Register 35 – FIFO Enable ................................................................................................................... 41|
||9.25|Register 54 – FSYNC Interrupt Status.................................................................................................. 41|
||9.26|Register 55 – INT/DRDY Pin / Bypass Enable Configuration ............................................................... 41|
Page 3 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
|InvenSense|InvenSense|<br>**_ICM-20602_**<br>InvenSense|
|---|---|---|
||9.27|Register 57 – FIFO Watermark Interrupt Status ................................................................................. 42|
||9.28|Register 58 – Interrupt Status ............................................................................................................. 42|
||9.29|Registers 59 to 64 – Accelerometer Measurements: X-Axis High Byte .............................................. 42|
||9.30|Registers 65 to 66 – Temperature Measurement............................................................................... 43|
||9.31|Registers 67 to 72 – Gyroscope Measurement................................................................................... 43|
||9.32|Register 80 to 82 – Gyroscope Self-Test Registers ............................................................................. 44|
||9.33|Register 96 to 97 – FIFO Watermark Threshold in Number of Bytes ................................................. 45|
||9.34|Register 104 – Signal Path Reset ......................................................................................................... 45|
||9.35|Register 105 – Accelerometer Intelligence Control ............................................................................ 45|
||9.36|Register 106 – User Control ................................................................................................................ 46|
||9.37|Register 107 – Power Management 1 ................................................................................................ 46|
||9.38|Register 108 – Power Management 2 ................................................................................................ 47|
||9.39|Register 112 – I2C Interface ................................................................................................................ 47|
||9.40|Register 114 and 115 – FIFO Count Registers ..................................................................................... 47|
||9.41|Register 116 – FIFO Read Write .......................................................................................................... 48|
||9.42|Register 117 – Who Am I .................................................................................................................... 48|
||9.43|Registers 119, 120, 122, 123, 125, 126 – Accelerometer Offset Registers ......................................... 49|
|10|Use Notes ........................................................................................................................................................... 50||
||10.1|Temperature Sensor Data ................................................................................................................... 50|
||10.2|Accelerometer-Only Low-Noise Mode ............................................................................................... 50|
||10.3|Accelerometer Low-Power Mode ....................................................................................................... 50|
||10.4|Sensor Mode Change .......................................................................................................................... 50|
||10.5|Temp Sensor during Gyroscope Standby Mode ................................................................................. 50|
||10.6|Gyroscope Mode Change.................................................................................................................... 50|
||10.7|Power Management 1 Register Setting .............................................................................................. 50|
||10.8|Unlisted Register Locations ................................................................................................................ 50|
||10.9|Clock Transition When Gyroscope is Turned Off ................................................................................ 50|
||10.10|Sleep Mode ......................................................................................................................................... 50|
||10.11|No special operation needed for FIFO read in low power mode........................................................ 50|
||10.12|Gyroscope Standby Procedure ........................................................................................................... 51|
|11|Assembly ............................................................................................................................................................ 52||
||11.1|Orientation of Axes ............................................................................................................................. 52|
||12.1|Package Dimensions ........................................................................................................................... 53|
|13|Part Number Package Marking .......................................................................................................................... 55||
|14|Revision History ................................................................................................................................................. 56|Revision History ................................................................................................................................................. 56|
|15|Environmental Compliance ................................................................................................................................ 57||
Page 4 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **LIST OF FIGURES**
|Figure 1. I|Figure 1. I2C Bus Timing Diagram ............................................................................................................................................................. 14|
|---|---|
|Figure 2. SPI Bus Timing Diagram ............................................................................................................................................................. 15|Figure 2. SPI Bus Timing Diagram ............................................................................................................................................................. 15|
|Figure 3. Pin out Diagram for ICM-20602 3 mm x 3 mm x 0.75 mm LGA ................................................................................................ 17|Figure 3. Pin out Diagram for ICM-20602 3 mm x 3 mm x 0.75 mm LGA ................................................................................................ 17|
|Figure 4. ICM-20602 Application Schematic ............................................................................................................................................ 18|Figure 4. ICM-20602 Application Schematic ............................................................................................................................................ 18|
|Figure 5. ICM-20602 Block Diagram ......................................................................................................................................................... 19|Figure 5. ICM-20602 Block Diagram ......................................................................................................................................................... 19|
|Figure 6. ICM-20602 Solution Using I|Figure 6. ICM-20602 Solution Using I2C Interface .................................................................................................................................... 20|
|Figure 7. ICM-20602 Solution Using SPI Interface ................................................................................................................................... 21|Figure 7. ICM-20602 Solution Using SPI Interface ................................................................................................................................... 21|
|Figure 8. START and STOP Conditions ...................................................................................................................................................... 24|Figure 8. START and STOP Conditions ...................................................................................................................................................... 24|
|Figure 9. Acknowledge on the I|Figure 9. Acknowledge on the I2C Bus ..................................................................................................................................................... 25|
|Figure 10. Complete I|Figure 10. Complete I2C Data Transfer ..................................................................................................................................................... 25|
|Figure 11. Typical SPI Master/Slave Configuration .................................................................................................................................. 27|Figure 11. Typical SPI Master/Slave Configuration .................................................................................................................................. 27|
|Figure 11. I/O Levels and Connections ..................................................................................................................................................... 28|Figure 11. I/O Levels and Connections ..................................................................................................................................................... 28|
|Figure 13. Orientation of Axes of Sensitivity and Polarity of Rotation .................................................................................................... 52|Figure 13. Orientation of Axes of Sensitivity and Polarity of Rotation .................................................................................................... 52|
|Figure 14. Package Dimensions................................................................................................................................................................ 53|Figure 14. Package Dimensions................................................................................................................................................................ 53|
|Figure 15. Part Number Package Marking ............................................................................................................................................... 55|Figure 15. Part Number Package Marking ............................................................................................................................................... 55|
Page 5 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **LIST OF TABLES**
|**LIST OF TABLES**|**LIST OF TABLES**|
|---|---|
|Table 1. Gyroscope Specifications ............................................................................................................................................................. 9|Table 1. Gyroscope Specifications ............................................................................................................................................................. 9|
|Table 2. Accelerometer Specifications ..................................................................................................................................................... 10|Table 2. Accelerometer Specifications ..................................................................................................................................................... 10|
|Table 4. D.C. Electrical Characteristics ..................................................................................................................................................... 11|Table 4. D.C. Electrical Characteristics ..................................................................................................................................................... 11|
|Table 5. A.C. Electrical Characteristics ..................................................................................................................................................... 12|Table 5. A.C. Electrical Characteristics ..................................................................................................................................................... 12|
|Table 6. Other Electrical Specifications .................................................................................................................................................... 13|Table 6. Other Electrical Specifications .................................................................................................................................................... 13|
|Table 7. I|Table 7. I2C Timing Characteristics ........................................................................................................................................................... 14|
|Table 7. SPI Timing Characteristics (10 MHz Operation) ......................................................................................................................... 15|Table 7. SPI Timing Characteristics (10 MHz Operation) ......................................................................................................................... 15|
|Table 8. Absolute Maximum Ratings ....................................................................................................................................................... 16|Table 8. Absolute Maximum Ratings ....................................................................................................................................................... 16|
|Table 9. Signal Descriptions ..................................................................................................................................................................... 17|Table 9. Signal Descriptions ..................................................................................................................................................................... 17|
|Table 10. Bill of Materials ........................................................................................................................................................................ 18|Table 10. Bill of Materials ........................................................................................................................................................................ 18|
|Table 11. Standard Power Modes for ICM-20602.................................................................................................................................... 22|Table 11. Standard Power Modes for ICM-20602.................................................................................................................................... 22|
|Table 12. Table of Interrupt Sources ........................................................................................................................................................ 23|Table 12. Table of Interrupt Sources ........................................................................................................................................................ 23|
|Table 13. Serial Interface ......................................................................................................................................................................... 24|Table 13. Serial Interface ......................................................................................................................................................................... 24|
|Table 14. I|Table 14. I2C Terms .................................................................................................................................................................................. 26|
|Table 15. Register Map ............................................................................................................................................................................ 30|Table 15. Register Map ............................................................................................................................................................................ 30|
|Table 16. Package Dimensions Table ....................................................................................................................................................... 54|Table 16. Package Dimensions Table ....................................................................................................................................................... 54|
Page 6 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## _**1 INTRODUCTION**_
## **1.1 PURPOSE AND SCOPE**
This document is a product specification, providing a description, specifications, and design related information on the ICM-20602™ MotionTracking device. The device is housed in a small 3 mm x 3 mm x 0.75 mm 16-pin LGA package.
## **1.2 PRODUCT OVERVIEW**
The ICM-20602 is a 6-axis MotionTracking device that combines a 3-axis gyroscope, 3-axis accelerometer, in a small 3 mm x 3 mm x 0.75 mm (16-pin LGA) package. It also features a 1 KB FIFO that can lower the traffic on the serial bus interface, and reduce power consumption by allowing the system processor to burst read sensor data and then go into a low-power mode. ICM20602, with its 6-axis integration, enables manufacturers to eliminate the costly and complex selection, qualification, and system level integration of discrete devices, guaranteeing optimal motion performance for consumers.
The gyroscope has a programmable full-scale range of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps. The accelerometer has a userprogrammable accelerometer full-scale range of ±2 _g_ , ±4 _g_ , ±8 _g_ , and ±16 _g_ . Factory-calibrated initial sensitivity of both sensors reduces production-line calibration requirements.
Other industry-leading features include on-chip 16-bit ADCs, programmable digital filters, an embedded temperature sensor, and programmable interrupts. The device features I[2] C and SPI serial interfaces,, a VDD operating range of 1.71V to 3.45V, and a separate digital IO supply, VDDIO from 1.71V to 3.45V.
Communication with all registers of the device is performed using either I[2] C at 400 kHz or SPI at 10 MHz.
By leveraging its patented and volume-proven CMOS-MEMS fabrication platform, which integrates MEMS wafers with companion CMOS electronics through wafer-level bonding, InvenSense has driven the package size down to a footprint and thickness of 3 mm x 3 mm x 0.75 mm (16-pin LGA), to provide a very small yet high performance low cost package. The device provides high robustness by supporting 20,000 _g_ shock reliability.
## **1.3 APPLICATIONS**
- Smartphones and Tablets
- Wearable Sensors
Page 7 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## _**2 FEATURES**_
## **2.1 GYROSCOPE FEATURES**
The triple-axis MEMS gyroscope in the ICM-20602 includes a wide range of features:
- Digital-output X-, Y-, and Z-axis angular rate sensors (gyroscopes) with a user-programmable full-scale range of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps and integrated 16-bit ADCs
- Digitally-programmable low-pass filter
- Low-power gyroscope operation
- Factory calibrated sensitivity scale factor
- Self-test
## **2.2 ACCELEROMETER FEATURES**
The triple-axis MEMS accelerometer in ICM-20602 includes a wide range of features:
- Digital-output X-, Y-, and Z-axis accelerometer with a programmable full scale range of ±2 _g_ , ±4 _g_ , ±8 _g_ , and ±16 _g_ and integrated 16-bit ADCs
- User-programmable interrupts
- Wake-on-motion interrupt for low power operation of applications processor
- Self-test
## **2.3 ADDITIONAL FEATURES**
The ICM-20602 includes the following additional features:
- Smallest and thinnest LGA package for portable devices: 3 mm x 3 mm x 0.75 mm (16-pin LGA)
- Minimal cross-axis sensitivity between the accelerometer and gyroscope axes
- 1 KB FIFO buffer enables the applications processor to read the data in bursts
- Digital-output temperature sensor
- User-programmable digital filters for gyroscope, accelerometer, and temp sensor
- 20,000 _g_ shock tolerant
- 400 kHz Fast Mode I[2] C for communicating with all registers
- 10 MHz SPI serial interface for communicating with all registers
- MEMS structure hermetically sealed and bonded at wafer level
- RoHS and Green compliant
Page 8 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## _**3 ELECTRICAL CHARACTERISTICS**_
## **3.1 GYROSCOPE SPECIFICATIONS**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**PARAMETER**<br>~~GC~~<br>~~On~~|**CONDITIONS**<br>~~GC~~<br>~~a~~|**MIN**<br>~~GC~~<br>~~OS~~|**TYP**<br>~~GC~~<br>~~CC~~|**MAX**<br>~~GC~~<br>~~CC~~|**UNITS**<br>~~GC~~|**NOTES**<br>~~GC~~|
|---|---|---|---|---|---|---|
|**GYROSCOPE SENSITIVITY**<br>~~Ona~~<br>~~OSCC~~|||||||
|Full-Scale Range<br>~~On ~~<br>~~a~~|FS_SEL=0<br>~~a~~|~~OS~~|±250<br>~~CC~~|~~CC~~|dps|3|
||FS_SEL=1<br> ~~a~~<br>~~OCC~~|~~OS~~<br>~~OCC~~|±500<br>~~CC~~<br>~~OCC~~|~~CC~~<br>~~OCC~~|dps<br>~~OCC~~|3<br>~~OCC~~|
||FS_SEL=2<br>~~OCC~~<br>|~~OCC~~<br>|±1000<br>~~OCC~~<br>~~CC~~<br>|~~OCC~~<br>~~CC~~<br>|dps<br>~~OCC~~<br>|3<br>~~OCC~~<br>|
||FS_SEL=3<br>~~a~~<br>|~~a~~<br>|±2000<br>~~a~~<br>~~CC~~<br>|~~a~~<br>~~CC~~<br>|dps<br>~~a~~<br>|3<br>~~a~~<br>|
|Gyroscope ADC Word Length<br>~~a ~~|||16<br>~~CC~~<br><br>~~CC~~|~~CC~~<br><br>~~CC~~|bits<br>|3<br>|
|Sensitivity Scale Factor<br> <br>~~a~~|FS_SEL=0<br> ~~a~~|~~a~~|131<br>~~a~~<br>~~CC~~<br>~~CC~~|~~a~~<br>~~CC~~<br>~~CC~~|LSB/(dps)<br>~~a~~|3<br>~~a~~|
||FS_SEL=1<br>~~a~~|~~a~~|65.5<br>~~CC~~<br>~~a~~<br>~~CC~~<br>~~CC~~|~~CC~~<br>~~a~~<br>~~CC~~<br>~~CC~~|LSB/(dps)<br>~~a~~|3<br>~~a~~|
||FS_SEL=2<br>~~a~~|~~a~~|32.8<br>~~CC~~<br>~~a~~<br>~~CC~~<br>~~OC~~|~~CC~~<br>~~a~~<br>~~CC~~<br>~~OC~~|LSB/(dps)<br>~~a~~|3<br>~~a~~|
||FS_SEL=3<br>~~aC~~|~~aC~~|16.4<br>~~CC~~<br>~~aC~~<br>~~OC~~|~~CC~~<br>~~aC~~<br>~~OC~~|LSB/(dps)<br>~~aC~~|3<br>~~aC~~|
|SensitivityScale Factor Initial Tolerance<br>~~a~~|25°C<br>~~GG~~|~~GG~~|±1<br>~~OC~~<br>~~GG~~|~~OC~~<br>~~GG~~|%<br>~~GG~~|1<br>~~GG~~|
|Sensitivity Scale Factor Variation Over<br>Temperature|-40°C to +85°C||±2||%|1|
|Nonlinearity<br>~~a~~|Best fit straight line; 25°C<br>~~a~~|~~a~~|±0.1<br>~~a~~|~~a~~|%<br>~~a~~|1<br>~~a~~|
|Cross-Axis Sensitivity<br>~~a~~|~~a~~|~~a~~|±1<br>~~a~~|~~a~~|%<br>~~a~~|1<br>~~a~~|
|**ZERO-RATE OUTPUT (ZRO)**<br>~~PC~~|||||||
|Initial ZRO Tolerance<br>~~a~~|25°C<br>~~a~~|~~a~~|±1<br>~~a~~|~~a~~|dps<br>~~a~~|1<br>~~a~~|
|ZRO Variation vs. Temperature<br>~~a~~|-40°C to +85°C<br>~~a~~|~~a~~|±0.01<br>~~a~~|~~a~~|dps/ºC<br>~~a~~|1<br>~~a~~|
|**OTHER PARAMETERS**<br>~~TT~~|||||||
|Rate Noise Spectral Density<br>~~TT~~<br>~~a~~|@ 10 Hz<br>~~TT~~<br>~~GG~~|~~TT~~<br>~~GG~~|0.004<br>~~TT~~<br>~~GG~~|~~TT~~<br>~~GG~~|dps /√Hz<br>~~TT~~<br>~~GG~~|1, 4<br>~~TT~~<br>~~GG~~|
|Total RMS Noise<br>~~a~~<br>~~a~~|Bandwidth = 100 Hz<br>~~GG~~<br>~~OG~~|~~GG~~<br>~~OG~~|0.04<br>~~GG~~<br>~~OG~~|~~GG~~<br>~~OG~~|dps -rms<br>~~GG~~<br>~~OG~~|1, 4<br>~~GG~~<br>~~OG~~|
|Gyroscope Mechanical Frequencies<br>~~a~~<br>~~a~~|~~OG~~<br>~~OG~~|25<br>~~OG~~<br>~~OG~~|27<br>~~OG~~<br>~~OG~~|29<br>~~OG~~<br>~~OG~~|KHz<br>~~OG~~<br>~~OG~~|2<br>~~OG~~<br>~~OG~~|
|Low Pass Filter Response<br>~~a~~<br>~~a~~|Programmable Range<br>~~OG~~<br>~~OG~~|5<br>~~OG~~<br>~~OG~~|~~OG~~<br>~~OG~~<br>~~GG~~|250<br>~~OG~~<br>~~OG~~<br>~~GG~~|Hz<br>~~OG~~<br>~~OG~~<br>~~CO~~|3<br>~~OG~~<br>~~OG~~|
|Gyroscope Start-UpTime<br>~~a~~<br>~~GG~~<br>~~pp~~|Time fromgyro enable togyro drive ready<br>~~OG~~<br>~~GG~~<br>~~pp~~|~~OG~~<br>~~GG~~<br>~~pp~~|35<br>~~OG~~<br>~~GG~~<br>~~GG~~<br>~~pp~~|100<br>~~OG~~<br>~~GG~~<br>~~GG~~<br>~~pp~~|ms<br>~~OG~~<br>~~GG~~<br>~~CO~~<br>~~op~~|1<br>~~OG~~<br>~~GG~~<br>~~op~~|
|Output Data Rate<br>~~GG~~<br>~~pp~~<br>~~po~~|Low-Noise mode<br>~~GG~~<br>~~pp~~<br>~~po~~|3.91<br>~~GG~~<br>~~pp~~|~~GG~~<br>~~GG~~<br>~~pp~~|8000<br>~~GG~~<br>~~GG~~<br>~~pp~~|Hz<br>~~GG~~<br>~~CO~~<br>~~op~~|3<br>~~GG~~<br>~~op~~|
||Low Power Mode<br>~~pp~~<br>~~po~~|3.91<br>~~pp~~|~~pp~~|333.33<br>~~pp~~|Hz<br>~~op~~|3<br>~~op~~|
## **Table 1. Gyroscope Specifications**
## **Notes:**
1. Derived from validation or characterization of parts, not guaranteed in production.
2. Tested in production.
3. Guaranteed by design.
4. Noise specifications shown are for low-noise mode.
Page 9 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **3.2 ACCELEROMETER SPECIFICATIONS**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**PARAMETER**<br>~~PO~~|**CONDITIONS**<br>~~PO~~|**CONDITIONS**<br>~~PO~~|**MIN**<br>~~PO~~|**TYP**<br>~~PO~~|**MAX**<br>~~PO~~|**UNITS**<br>~~PO~~|**NOTES**<br>~~PO~~|
|---|---|---|---|---|---|---|---|
|**ACCELEROMETER SENSITIVITY**||||||||
|Full-Scale Range|AFS_SEL=0<br>~~GC~~||~~GC~~|±2<br>~~GC~~|~~GC~~|_g_<br>~~GC~~|2<br>~~GC~~|
||AFS_SEL=1<br>~~a~~||~~a~~|±4<br>~~a~~|~~a~~|_g_<br>~~a~~|2<br>~~a~~|
||AFS_SEL=2<br>~~a~~||~~a~~|±8<br>~~a~~|~~a~~|_g_<br>~~a~~|2<br>~~a~~|
||AFS_SEL=3<br>~~a~~||~~a~~<br>~~GO~~|±16<br>~~a~~<br>~~GO~~|~~a~~<br>~~GO~~|_g_<br>~~a~~|2<br>~~a~~|
|ADC Word Length<br>~~GC~~|Output in two’s complement format<br>~~GC~~||~~GC~~|16<br>~~GC~~|~~GC~~|bits<br>~~GC~~|2<br>~~GC~~|
|Sensitivity Scale Factor|AFS_SEL=0<br>~~GO~~||~~GO~~|16,384<br>~~GO~~|~~GO~~|LSB/_g_<br>~~GO~~|2<br>~~GO~~|
||AFS_SEL=1<br>~~PS~~||~~PS~~|8,192<br>~~PS~~|~~PS~~|LSB/_g_<br>~~PS~~|2<br>~~PS~~|
||AFS_SEL=2<br>~~a~~||~~GC~~|4,096<br>~~GC~~|~~GC~~|LSB/_g_|2|
||AFS_SEL=3<br>~~GC~~||~~GC~~|2,048<br>~~GC~~|~~GC~~|LSB/_g_<br>~~GC~~|2<br>~~GC~~|
|SensitivityScale Factor Initial Tolerance<br>~~a~~|Component-level<br>~~a~~|||±1<br>~~(OO~~|~~C~~<br>~~(OO~~|%<br>~~I~~|1|
|Sensitivity Change vs. Temperature<br>~~OD~~<br>~~a~~|-40°C to +85°C<br>~~OD~~<br>~~SY~~||~~OD~~<br>~~SY~~|±1.5<br>~~OD~~<br>~~(OO~~|~~OD~~<br>~~(OO~~|%<br>~~OD~~<br>~~I~~|1<br>~~OD~~|
|Nonlinearity<br>~~OD~~<br>~~PC~~<br>~~a~~|Best Fit Straight Line<br>~~OD~~<br>~~PC~~<br>~~SY~~||~~OD~~<br>~~PC~~<br>~~SY~~|±0.3<br>~~OD~~<br>~~(OO~~<br>~~PC~~|~~OD~~<br>~~(OO~~<br>~~PC~~|%<br>~~OD~~<br>~~I~~<br>~~PC~~|1<br>~~OD~~<br>~~PC~~|
|Cross-Axis Sensitivity<br>~~PC~~<br>~~a~~|~~PC~~<br>~~SY~~<br>~~GC~~||~~PC~~<br>~~SY~~<br>~~GC~~|±1<br>~~PC~~<br>~~GC~~|~~PC~~<br>~~GC~~|%<br>~~PC~~<br>~~GC~~|1<br>~~PC~~<br>~~GC~~|
|**ZERO-G OUTPUT**<br>~~OOOO~~||||||||
|Initial Tolerance<br>~~a~~|Component-level, all axes|||±25||m_g_|1|
||Board-level, all axes<br>~~a~~<br>~~ee~~||~~a~~<br>~~ee~~|±40<br>~~a~~<br>~~ee~~|~~a~~|m_g_<br>~~a~~<br>~~ee~~|1<br>~~a~~<br>~~ee~~|
|Zero-G Level Change vs. Temperature<br>~~a~~|-40°C to +85°C<br>~~ee~~|X and Y axes<br>~~ee~~|~~ee~~|±0.5<br>~~ee~~||m_g/_ºC<br>~~ee~~|1<br>~~ee~~|
|||Z axis<br>~~ee~~<br>~~a~~|~~ee~~|±1<br>~~ee~~||m_g/_ºC<br>~~ee~~|1<br>~~ee~~|
|**OTHER PARAMETERS**<br>~~a~~<br>~~ee ee~~<br>~~ee~~<br>~~a~~<br>~~ns~~||||||||
|Power Spectral Density<br>~~ns~~<br>~~a~~|@ 10 Hz<br>~~ns~~<br>~~GO~~||~~ns~~<br>~~GO~~<br>~~GO~~|100<br>~~ns~~<br>~~GO~~<br>~~GO~~|~~ns~~<br>~~GO~~<br>~~GO~~|µ_g_/√Hz<br>~~ns~~<br>~~GO~~|1, 3<br>~~ns~~<br>~~GO~~|
|RMS Noise<br>~~a~~<br>~~a~~|Bandwidth = 100 Hz<br>~~GO~~<br>~~a~~||~~GO~~<br>~~a~~<br>~~GO~~|1.0<br>~~GO~~<br>~~a~~<br>~~GO~~<br>~~CS~~|~~GO~~<br>~~a~~<br>~~GO~~<br>~~CS~~|mg-rms<br>~~GO~~<br>~~a~~|1, 3<br>~~GO~~<br>~~a~~|
|Low-Pass Filter Response<br>~~a~~|Programmable Range<br>~~a~~||5<br>~~GO~~<br>~~a~~|~~GO~~<br>~~a~~<br>~~CS~~|218<br>~~GO~~<br>~~a~~<br>~~CS~~<br>~~GO~~|Hz<br>~~a~~<br>~~(O~~|2<br>~~a~~|
|Accelerometer StartupTime<br>~~GOO~~|From sleepmode to valid data<br>~~GOO~~||~~GOO~~|10<br>~~CS~~<br>~~GOO~~|20<br>~~CS~~<br>~~GOO~~<br>~~GO~~|ms<br>~~GOO~~<br>~~(O~~|2<br>~~GOO~~|
|Output Data Rate<br>~~GOO~~<br>~~——EEe~~|Low-Noise mode<br>~~GOO~~<br>~~——EEe~~||3.91<br>~~GOO~~<br>~~——EEe~~|~~GOO~~<br>~~——EEe~~|4000<br>~~GOO~~<br>~~GO~~<br>~~——EEe~~|Hz<br>~~GOO~~<br>~~(O~~<br>~~——EEe~~|2<br>~~GOO~~<br>~~——EEe~~|
||Low Power Mode<br>~~——EEe~~<br>~~a~~||3.91<br>~~——EEe~~<br>~~a~~|~~——EEe~~<br>~~a~~|500<br>~~——EEe~~<br>~~a~~|Hz<br>~~——EEe~~<br>~~a~~||
## **Notes:**
2. Guaranteed by design.
3. Noise specifications shown are for low-noise mode.
Page 10 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **3.3 ELECTRICAL SPECIFICATIONS**
## **D.C. Electrical Characteristics**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**PARAMETER**|**CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|**NOTES**|
|---|---|---|---|---|---|---|
|**SUPPLY VOLTAGES**<br>~~|~~<br>~~™~—CTTT~~<br>~~[|~~<br>~~™~—C.....COOrr~~|||||||
|VDD<br>~~™~—CTTT~~<br>~~[|~~|~~[|~~<br>~~™~—C.....CO~~|1.71<br>~~Orr~~|1.8<br>~~Orr~~|3.45<br>~~Orr~~|V<br>~~Orr~~|1<br>~~Orr~~|
|VDDIO<br>~~™~—CTTT~~<br>~~[|~~<br>~~eG~~|~~[|~~<br>~~™~—C.....CO ~~<br>~~eG~~|1.71<br> ~~Orr~~<br>~~eG~~|1.8<br>~~Orr~~<br>~~eG~~|3.45<br>~~Orr~~<br>~~eG~~|V<br>~~Orr~~<br>~~eG~~|1<br>~~Orr~~<br>~~eG~~|
|**SUPPLY CURRENTS**<br>~~|~~|||||||
|Low-Noise Mode|6-Axis Gyroscope + Accelerometer<br>~~ee~~|~~ee~~|2.79<br>~~ee~~|~~ee~~|mA<br>~~ee~~|1<br>~~ee~~|
||3-Axis Accelerometer<br>~~es~~|~~es~~|321<br>~~es~~|~~es~~|µA<br>~~es~~|1<br>~~es~~|
||3-Axis Gyroscope<br>~~es~~|~~es~~|2.55<br>~~es~~|~~es~~|mA<br>~~es~~|1<br>~~es~~|
|Accelerometer Low -Power Mode<br>(Gyroscope disabled)<br>~~es~~|100 Hz ODR, 1x averaging<br>~~es~~|~~es~~|40<br>~~es~~|~~es~~|µA<br>~~es~~|1<br>~~es~~|
|Gyroscope Low-Power Mode<br>(Accelerometer disabled)<br>~~eG~~|100 Hz ODR, 1x averaging<br>~~eG~~|~~eG~~|1.08<br>~~eG~~|~~eG~~|mA<br>~~eG~~|1<br>~~eG~~|
|6-Axis Low-Power Mode (Gyroscope<br>Low-Power Mode; Accelerometer Low-<br>Noise Mode)|100 Hz ODR, 1x averaging||1.33||mA|1|
|Full-ChipSleepMode<br>~~a~~|At 25ºC<br>~~CC~~|~~CC~~|6<br>~~CC~~|~~CC~~|µA<br>~~CC~~|1<br>~~CC~~|
|~~|~~<br>~~ee~~<br>~~Gs~~|||||||
|Specified Temperature Range<br>~~ee~~|Performance parameters are not applicable<br>beyond Specified Temperature Range<br>~~Gs~~|-40<br>~~Gs~~||+85|°C|1|
## **Table 3. D.C. Electrical Characteristics**
## **Notes:**
1. Derived from validation or characterization of parts, not guaranteed in production.
Page 11 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **A.C. Electrical Characteristics**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**PARAMETER**|**CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|**NOTES**|
|---|---|---|---|---|---|---|
|**SUPPLIES**<br>~~es~~<br>~~Ge~~|||||||
|Supply Ramp Time<br>~~es~~<br>~~es~~|Monotonic ramp. Ramp rate is 10% to 90% of<br>the final value<br>~~Ge~~<br>~~ee~~|0.01<br>~~Ge~~<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~es~~|3<br>~~ee~~|ms<br>~~ee~~|1<br>~~ee~~|
|Power Supply Noise<br>~~es~~<br>~~es~~|~~Ge~~<br>~~ee~~|~~Ge~~<br>~~ee~~<br>~~ee~~|10<br>~~ee~~<br>~~es~~|~~ee~~|mV peak-<br>peak<br>~~ee~~|1<br>~~ee~~|
|**TEMPERATURE SENSOR**<br>~~esee~~<br>~~ee~~<br>~~es~~|||||||
|OperatingRange<br>~~a~~<br>~~a~~|Ambient<br>~~CO~~<br>|-40<br>~~CO~~<br>|~~CO~~<br>|85<br>~~CO~~<br>|°C<br>~~CO~~<br>~~OO~~<br>|1<br>~~CO~~<br>|
|25°C Output<br>~~CO~~<br>~~a~~|~~CO~~<br>|~~CO~~<br>|0<br>~~CO~~<br>|~~CO~~<br>|LSB<br>~~CO~~<br>~~OO~~<br>|3<br>~~CO~~<br>|
|ADC Resolution<br>~~a ~~<br>~~CO~~|~~**COO**~~<br>|~~**COO**~~<br>|16<br>~~**COO**~~<br>|~~**COO**~~<br>|bits<br>~~OO~~<br>~~**COO**~~<br><br>~~———~~|2<br>~~**COO**~~<br><br>~~———~~|
|ODR<br> <br>~~CO~~|Without Filter<br> ~~**COO**~~<br>~~—————~~|~~**COO**~~<br>~~—————~~|8000<br>~~**COO**~~<br>~~—————~~|~~**COO**~~<br>~~—————~~|Hz<br>~~**COO**~~<br>~~—————~~<br>~~———~~|2<br>~~**COO**~~<br>~~—————~~<br>~~———~~|
||With Filter<br> ~~**COO**~~<br>~~—————~~<br>~~a~~|3.91<br>~~**COO**~~<br>~~—————~~<br>~~a~~|~~**COO**~~<br>~~—————~~<br>~~a~~|1000<br>~~**COO**~~<br>~~—————~~<br>~~a~~|Hz<br>~~**COO**~~<br>~~—————~~<br>~~———~~<br>~~a~~|2<br>~~**COO**~~<br>~~—————~~<br>~~———~~<br>~~a~~|
|Room Temperature Offset<br> <br>~~CO~~<br>~~a~~|25°C<br> ~~**COO**~~<br>|-15<br>~~**COO**~~<br>|~~**COO**~~<br>|15<br>~~**COO**~~<br>|°C<br>~~**COO**~~<br><br>~~——— ~~|3<br>~~**COO**~~<br><br> ~~———~~|
|Stabilization Time<br>~~a~~||||14000|µs|2|
|Sensitivity<br>~~a~~<br>~~————————————————~~|Untrimmed<br>~~CO~~<br>~~————————————————~~|~~CO~~<br>~~————————————————~~|326.8<br>~~CO~~<br>~~————————————————~~|~~CO~~<br>~~————————————————~~|LSB/°C<br>~~CO~~<br>~~————————————————~~|1<br>~~CO~~|
|SensitivityError<br>~~————————————————~~|~~————————————————~~|-2.5<br>~~————————————————~~|~~————————————————~~|+2.5<br>~~————————————————~~|%<br>~~————————————————~~|1|
|**Power-On RESET**<br>~~————————————————~~<br>~~—————————————————————~~|||||||
|Start-uptime for register read/write<br>~~————————————————~~<br>~~—————————————————————~~|Frompower-up<br>~~————————————————~~<br>~~—————————————————————~~|~~————————————————~~<br>~~—————————————————————~~|~~————————————————~~<br>~~—————————————————————~~|2<br>~~————————————————~~<br>~~—————————————————————~~|ms<br>~~————————————————~~<br>~~—————————————————————~~|1<br>~~—————————————————————~~|
|**I2C ADDRESS**<br>~~—————————————————————~~|||||||
|**I2C ADDRESS**<br>~~—————————————————————~~|SA0 = 0<br>SA0 = 1<br>~~—————————————————————~~|~~—————————————————————~~|1101000<br>1101001<br>~~—————————————————————~~|~~—————————————————————~~|~~—————————————————————~~|~~—————————————————————~~|
|**DIGITAL INPUTS(FSYNC, SA0, SPC, SDI, CS)**<br>|<br>~~——~~<br>~~eeeeeeol~~|||||||
|VIH, High Level Input Voltage<br>~~GG~~<br>~~——~~|~~GG~~<br>~~ee~~|0.7*VDDIO<br>~~GG~~<br>~~ee~~|~~GG~~<br>~~ee~~|~~GG~~<br>~~ol~~|V<br>~~GG~~<br>~~ol~~|1<br>~~ol~~|
|VIL, Low Level Input Voltage<br>~~——~~<br>~~es~~|~~ee~~<br>~~Qe~~|~~ee~~<br>~~Qe~~|~~ee~~<br>~~Qe~~|0.3*VDDIO<br>~~ol~~|V<br>~~ol~~||
|CI, Input Capacitance<br>~~——~~<br>~~es~~|~~ee~~<br>~~Qe~~|~~ee~~<br>~~Qe~~|< 10<br>~~ee~~<br>~~Qe~~|~~ol~~|pF<br>~~ol~~||
|**DIGITAL OUTPUT(SDO, INT, DRDY)**<br>~~——~~<br>~~ee ee ee ol~~<br>~~es~~<br>~~Qe~~|||||||
|VOH, High Level Output Voltage<br>~~GG~~<br>~~ee~~|RLOAD=1MΩ;<br>~~GG~~<br>~~ee~~|0.9*VDDIO<br>~~GG~~<br>~~ee~~|~~GG~~<br>~~ee~~|~~GG~~<br>~~ee~~|V<br>~~GG~~<br>~~ee~~|1<br>~~ee~~|
|VOL1, LOW-Level Output Voltage<br>~~GG~~<br>~~ee~~|RLOAD=1MΩ;<br>~~GG~~<br>~~ee~~|~~GG~~<br>~~ee~~|~~GG~~<br>~~ee~~|0.1*VDDIO<br>~~GG~~<br>~~ee~~|V<br>~~GG~~<br>~~ee~~||
|VOL.INT, INT Low-Level Output Voltage<br>~~ee~~|OPEN=1, 0.3mA sink<br>Current<br>~~ee~~|~~ee~~|~~ee~~|0.1<br>~~ee~~|V<br>~~ee~~||
|Output Leakage Current<br>~~ee~~<br>~~GG~~<br>~~rs a~~|OPEN=1<br>~~ee~~<br>~~GG~~<br>~~a~~|~~ee~~<br>~~GG~~<br>~~a~~|100<br>~~ee~~<br>~~GG~~|~~ee~~<br>~~GG~~|nA<br>~~ee~~<br>~~GG~~||
|tINT, INT Pulse Width<br>~~ee~~<br>~~rs a~~|LATCH_INT_EN=0<br>~~ee~~<br>~~a~~|~~ee~~<br>~~a~~|50<br>~~ee~~|~~ee~~|µs<br>~~ee~~||
|**I2C I/O (SCL, SDA)**<br>~~rs a~~<br>~~a~~|||||||
|VIL, LOW Level Input Voltage<br>~~rs a~~<br>~~GG~~<br>~~**e**~~|~~a~~<br>~~GG~~<br>~~**e**G~~|-0.5V<br>~~a~~<br>~~GG~~<br>~~G~~|~~GG~~<br>~~G~~|0.3*VDDIO<br>~~GG~~<br>~~G~~|V<br>~~GG~~<br>~~G~~|1<br>7|
|VIH, HIGH-Level Input Voltage<br>~~eG~~<br>~~**e**~~|~~eG~~<br>~~**e**G~~|0.7*VDDIO<br>~~eG~~<br>~~G~~|~~eG~~<br>~~G~~|VDDIO + 0.5V<br>~~eG~~<br>~~G~~|V<br>~~eG~~<br>~~G~~||
|Vhys, Hysteresis<br>~~eG~~<br>~~**e**~~|~~eG~~<br>~~**e**G~~|~~eG~~<br>~~G~~|0.1*VDDIO<br>~~eG~~<br>~~G~~|~~eG~~<br>~~G~~|V<br>~~eG~~<br>~~G~~||
|VOL, LOW-Level Output Voltage<br>~~**e**~~|3mA sink current<br>~~**e**G~~|0<br>~~G~~|~~G~~|0.4<br>~~G~~|V<br>~~G~~||
|IOL, LOW-Level Output Current<br>~~**e**~~|VOL=0.4V<br>VOL=0.6V<br>~~**e**G~~|~~G~~|3<br>6<br>~~G~~|~~G~~|mA<br>mA<br>~~G~~||
|Output Leakage Current<br>~~**e**~~<br>~~GO~~|~~**e**G~~<br>~~GO~~<br>~~re~~|~~G~~<br>~~GO~~|100<br>~~G~~<br>~~GO~~|~~G~~<br>~~GO~~|nA<br>~~G~~<br>~~GO~~||
|tof, Output Fall Time from VIHmaxto VILmax<br>~~**e**~~|Cbbus capacitance in pf<br>~~**e**G~~<br>~~s~~<br>~~re~~|20+0.1Cb<br>~~G~~<br>~~s~~|~~G~~<br>~~s~~|300<br>~~G~~<br>~~s~~|ns<br>~~G~~<br>~~s~~||
|**INTERNAL CLOCK SOURCE**<br>~~re~~|||||||
|Sample Rate<br>~~PE~~<br>~~ee~~|FCHOICE_B=1,2,3; SMPLRT_DIV=0<br>~~PE~~|~~PE~~|32<br>~~PE~~|~~PE~~|kHz<br>~~PE~~|2<br>~~PE~~|
||FCHOICE_B=0;<br>DLPFCFG=0 or 7<br>SMPLRT_DIV=0<br>~~PE~~|~~PE~~|8<br>~~PE~~|~~PE~~|kHz<br>~~PE~~|2<br>~~PE~~|
||FCHOICE_B=0;<br>DLPFCFG=1,2,3,4,5,6;<br>SMPLRT_DIV=0<br>~~PE~~|~~PE~~<br>~~ooo~~|1<br>~~PE~~<br>~~ooo~~|~~PE~~<br>~~ooo~~|kHz<br>~~PE~~<br>~~ooo~~|2<br>~~PE~~<br>~~ooo~~|
|Clock Frequency Initial Tolerance<br>~~PE~~<br>~~ee~~|CLK_SEL=0, 6 or gyro inactive; 25°C<br>~~PE~~|-3<br>~~PE~~<br>~~ooo~~|~~PE~~<br>~~ooo~~|+3<br>~~PE~~<br>~~ooo~~|%<br>~~PE~~<br>~~ooo~~|1<br>~~PE~~<br>~~ooo~~|
||CLK_SEL=1,2,3,4,5 and gyro active; 25°C<br>~~GG~~|-1<br>~~ooo~~<br>~~GG~~|~~ooo~~<br>~~GG~~|+1<br>~~ooo~~<br>~~GG~~|%<br>~~ooo~~<br>~~GG~~|1<br>~~ooo~~<br>~~GG~~|
|Frequency Variation over Temperature<br>~~ee~~<br>~~ie~~|CLK_SEL=0,6 or gyro inactive. (-40°C to +85°C)<br>~~GG~~<br>~~ie~~|~~ooo~~<br>~~GG~~<br>~~ie~~|~~ooo~~<br>~~GG~~<br>~~ie~~|±2<br>~~ooo~~<br>~~GG~~<br>~~ie~~|%<br>~~ooo~~<br>~~GG~~<br>~~ie~~|1<br>~~ooo~~<br>~~GG~~<br>~~ie~~|
||CLK_SEL=1,2,3,4,5 and gyro active<br>~~ie~~<br>~~GG~~|~~ie~~<br>~~GG~~|~~ie~~<br>~~GG~~|±2<br>~~ie~~<br>~~GG~~|%<br>~~ie~~<br>~~GG~~|1<br>~~ie~~<br>~~GG~~|
## **Table 4. A.C. Electrical Characteristics**
- **Notes:** 1. Derived from validation or characterization of parts, not guaranteed in production.
2. Guaranteed by design.
3. Production tested.
Page 12 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **Other Electrical Specifications**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**PARAMETER**|**CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|**NOTES**|**NOTES**|
|---|---|---|---|---|---|---|---|
|**SERIAL INTERFACE**||||||||
|SPI Operating Frequency, All Registers<br>Read/Write|Low Speed Characterization|100|100 ±10%||kHz||1,3|
||High Speed Characterization|0.2|1|10|MHz||1, 2, 3|
|SPI Modes|||0 and 3|||||
|I2C Operating Frequency|All registers, Fast-mode|100||400|kHz||1|
||All registers, Standard-mode|||100|kHz||1|
## **Table 5. Other Electrical Specifications**
## **Notes:**
1. Derived from validation or characterization of parts, not guaranteed in production.
2. SPI clock duty cycle between 45% and 55% should be used for 10-MHz operation.
3. Minimum SPI/I[2] C clock rate is dependent on ODR. If ODR is below 4 kHz, minimum clock rate is 100 kHz. If ODR is greater than 4 kHz, minimum clock rate is 200 kHz.
Page 13 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## InvenSense _**ICM-20602**_ **I[[2]] C TIMING CHARACTERIZATION** Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted. A=25°C, unless otherwise noted. =25°C, unless otherwise noted. ~~a~~ **Parameters Conditions Min Typical Max Units Notes**
## **3.4 I[[2]] C TIMING CHARACTERIZATION**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted. A=25°C, unless otherwise noted. =25°C, unless otherwise noted.
|**Parameters**<br>~~a~~|**Conditions**<br>~~a~~|**Min**<br>~~a~~|**Typicalypicalical**<br>~~a~~|**Max**<br>~~a~~|**Units**<br>~~a~~|**Notes**<br>~~a~~|
|---|---|---|---|---|---|---|
|**I2C TIMING**<br>~~a~~|**I2C FAST-MODE**<br>~~a~~|~~a~~|~~a~~|~~a~~|~~a~~|~~a~~|
|fSCL, SCL Clock Frequency<br>~~a~~|~~a~~|100<br>~~a~~|~~a~~|400<br>~~a~~|kHz<br>~~a~~|1<br>~~a~~|
|tHD.STA, (Repeated) START Condition Hold Time<br>~~a~~|~~a~~|0.6<br>~~a~~|~~a~~|~~a~~|µs<br>~~a~~|1<br>~~a~~|
|tLOW, SCL Low Period<br>~~a~~|~~a~~|1.3<br>~~a~~|~~a~~|~~a~~|µs<br>~~a~~|1<br>~~a~~|
|tHIGH, SCL High Period<br>~~a~~|~~a~~|0.6<br>~~a~~|~~a~~|~~a~~|µs<br>~~a~~|1<br>~~a~~|
|tSU.STA, Repeated START Condition Setup Time<br>~~a~~|~~a~~|0.6<br>~~a~~|~~a~~|~~a~~|µs<br>~~a~~|1<br>~~a~~|
|tHD.DAT, SDA Data Hold Time<br>~~a~~|~~a~~|0<br>~~a~~|~~a~~|~~a~~|µs<br>~~a~~|1<br>~~a~~|
|tSU.DAT, SDA Data SetupTime<br>~~a~~|~~a~~|100<br>~~a~~|~~a~~|~~a~~|ns<br>~~a~~|1<br>~~a~~|
|tr, SDA and SCL Rise Time<br>~~a~~|Cbbus cap. from 10 to 400pF<br>~~a~~|20+0.1Cb<br>~~a~~|~~a~~|300<br>~~a~~|ns<br>~~a~~|1<br>~~a~~|
|tf, SDA and SCL Fall Time<br>~~a~~|Cbbus cap. from 10 to 400pF<br>~~a~~|20+0.1Cb<br>~~a~~|~~a~~|300<br>~~a~~|ns<br>~~a~~|1<br>~~a~~|
|tSU.STO, STOP Condition Setup Time<br>~~OO~~|~~OO~~|0.6<br>~~OO~~|~~OO~~|~~OO~~|µs<br>~~OO~~|1<br>~~OO~~|
|tBUF, Bus Free Time Between STOP and START<br>Condition||1.3|||µs|1|
|Cb, Capacitive Load for each Bus Line<br>~~a~~|~~a~~|~~a~~|< 400<br>~~a~~|~~a~~|pF<br>~~a~~|1<br>~~a~~|
|tVD.DAT, Data Valid Time<br>~~a~~<br>~~a~~|~~a~~<br>~~a~~|~~a~~<br>~~a~~|~~a~~<br>~~a~~|0.9<br>~~a~~<br>~~a~~|µs<br>~~a~~<br>~~a~~|1<br>~~a~~<br>~~a~~|
|tVD.ACK, Data Valid Acknowledge Time<br>~~a~~<br>~~a~~|~~a~~<br>~~a~~|~~a~~<br>~~a~~|~~a~~<br>~~a~~|0.9<br>~~a~~<br>~~a~~|µs<br>~~a~~<br>~~a~~|1<br>~~a~~<br>~~a~~|
## **Notes:**
1. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets
**==> picture [470 x 144] intentionally omitted <==**
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tf tr tSU.DAT<br>SDA 70% 70%<br>30% 30%<br>tf continued below at A<br>tr tVD.DAT<br>SCL 70% tHD.DAT 70%<br>30% 30%<br>tHD.STA 1/fSCL tLOW 9 [th] clock cycle<br>S 1 [st] clock cycle tHIGH<br>tBUF<br>SDA 70%<br>A 30%<br>tSU.STA tHD.STA tVD.ACK tSU.STO<br>SCL 70%<br>30%<br>Sr 9 [th] clock cycle P S<br>**----- End of picture text -----**<br>
**Figure 1. I[2] C Bus Timing Diagram**
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **3.5 SPI TIMING CHARACTERIZATION**
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Units**|**Notes**|
|---|---|---|---|---|---|---|
|**SPI TIMING**|||||||
|fSPC, SPC Clock Frequency||||10|MHz|1|
|tLOW, SPC Low Period||45|||ns|1|
|tHIGH, SPC High Period||45|||ns|1|
|tSU.CS, CS Setup Time||2|||ns|1|
|tHD.CS, CS Hold Time||63|||ns|1|
|tSU.SDI, SDI Setup Time||3|||ns|1|
|tHD.SDI, SDI Hold Time||7|||ns|1|
|tVD.SDO, SDO Valid Time|Cload= 20pF|||40|ns|1|
|tDIS.SDO, SDO Output Disable Time||||20|ns|1|
**Table 7. SPI Timing Characteristics (10 MHz Operation)**
**Notes:**
1. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets
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CS 70%<br>30%<br>tHD;CS<br>ee tSU;CS tHIGH 1/fCLK<br>SCLK 70%<br>30%<br>tSU;SDI tHD;SDI tLOW<br>SDI 70% MSB IN LSB IN<br>30%<br>tVD;SDO tDIS;SDO<br>SDO 70%<br>MSB OUT LSB OUT<br>30%<br>$F>HO—>HE<br>**----- End of picture text -----**<br>
**Figure 2. SPI Bus Timing Diagram**
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **3.6 ABSOLUTE MAXIMUM RATINGS**
Stress above those listed as “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to the absolute maximum ratings conditions for extended periods may affect device reliability.
|**Parameter**|**Rating**|
|---|---|
|Supply Voltage, VDD|-0.5V to +4V|
|Supply Voltage, VDDIO|-0.5V to +4V|
|REGOUT|-0.5V to 2V|
|Input Voltage Level (SA0, FSYNC, SCL, SDA)|-0.5V to VDDIO + 0.5V|
|Acceleration (Any Axis, unpowered)|20,000g for 0.2 ms|
|Operating Temperature Range|-40°C to +85°C|
|Storage Temperature Range|-40°C to +125°C|
|Electrostatic Discharge (ESD) Protection|2 kV (HBM);<br>250V (MM)|
|Latch-up|JEDEC Class II (2),125°C<br>±100 mA|
**Table 8. Absolute Maximum Ratings**
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## _**4 APPLICATIONS INFORMATION**_
## **4.1 PIN OUT DIAGRAM AND SIGNAL DESCRIPTION**
|**Pin Number**<br>~~|ee~~|**Pin Name**<br>~~Ge~~|**Pin Description**<br>~~Ge~~|
|---|---|---|
|1<br>~~ee~~<br>~~ee~~|VDDIO<br>~~Ge~~<br>~~Ge~~|Digital I/O supply voltage<br>~~Ge~~<br>~~Ge~~|
|2<br>~~ee~~<br>~~ee~~<br>~~ee~~|SCL/SPC<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|I2C serial clock (SCL); SPI serial clock (SPC)<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|
|3<br>~~ee~~<br>~~ee~~<br>~~ee~~|SDA/SDI<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|I2C serial data (SDA); SPI serial data input (SDI)<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|
|4<br>~~ee~~<br>~~ee~~<br>~~ee~~|SA0/SDO<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|I2C slave address LSB (SA0); SPI serial data output (SDO)<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|
|5<br>~~ee~~<br>~~ee~~<br>~~ee~~|CS<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|Chip select (0 = SPI mode; 1 = I2C mode)<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|
|6<br>~~ee~~<br>~~ee~~<br>~~ee~~|INT<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|Interrupt digital output (totem pole or open-drain)<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|
|7<br>~~ee~~<br>~~ee~~<br>~~ee~~|RESV<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|Reserved. Do not connect.<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|
|8<br>~~ee~~<br>~~ee~~<br>~~ee~~|FSYNC<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|Synchronization digital input (optional). Connect to GND if unused.<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|
|9<br>~~ee~~<br>~~ee~~<br>~~ee~~|RESV<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|Reserved. Connect to GND.<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|
|10<br>~~ee~~<br>~~ee~~<br>~~ee~~|RESV<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|Reserved. Connect to GND.<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|
|11<br>~~ee~~<br>~~ee~~<br>~~ee~~|RESV<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|Reserved. Connect to GND.<br>~~Ge~~<br>~~Ge~~<br>~~Ge~~|
|12<br>~~ee~~<br>~~ee~~|RESV<br>~~Ge~~<br>~~Ge~~|Reserved. Connect to GND.<br>~~Ge~~<br>~~Ge~~|
|13<br>~~ee~~<br>~~a~~|GND<br>~~Ge~~<br>|Connect to GND<br>~~Ge~~<br>|
|14<br>~~ee~~<br>~~es~~|REGOUT<br>~~ee~~<br>~~ee~~|Regulator filter capacitor connection<br>~~ee~~|
|15<br>~~es~~<br>~~es~~|RESV<br>~~ee~~|Reserved. Connect to GND.|
|16<br>~~es~~<br>~~es~~|VDD<br>~~ee~~|Power Supply|
**Table 9. Signal Descriptions**
**Note:** Power up with SCL/SPC and CS pins held low is not a supported use case. In case this power up approach is used, software reset is required using the PWR_MGMT_1 register, prior to initialization.
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16 15 14<br>VDDIO 1 13 GND<br>SCL/SPC 2 12 RESV<br>SDA/SDI 3 ICM-20602 11 RESV<br>SA0/SDO 4 10 RESV<br>CS 5 9 RESV<br>6 7 8<br>VDD RESV REGOUT<br>INT RESV FSYNC<br>**----- End of picture text -----**<br>
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+Z<br>2 12 RESV<br>Ss .<br>3 ICM-20602 11 RESV<br>4 10 RESV<br>5 9 RESV<br>+Y +X<br>6 7 8<br>LGA Package (Top View)<br>16-pin, 3mm x 3mm x 0.75mm Orientation of Axes of Sensitivity and Polarity of Rotation<br>Typical Footprint and thickness<br>ICM-20602<br>INT RESV FSYNC<br>**----- End of picture text -----**<br>
**Figure 3. Pin out Diagram for ICM-20602 3 mm x 3 mm x 0.75 mm LGA**
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **4.2 TYPICAL OPERATING CIRCUIT**
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1.71 – 3.45VDC 1.8 – 3.3VDC<br>VDD<br>C2, 0.1 mF C4, 2.2 mF<br>REGOUT<br>16 15 14<br>VDDIO GND i C1, 0.1 mF<br>1.71 – 3.45VDC 1.8 – 3.3 VDC [To] 1 [L] 13<br>C3, 10 nF SCL/SPC RESV<br>| SCLSDA SDA/SDI 23 ICM-20602 1211 RESV<br>AD0 SA0/SDO 4 10 RESV<br>VDDIO<br>CS RESV<br>5 9<br>6 7 8<br>|<br>RESV<br>INT RESV FSYNC<br>**----- End of picture text -----**<br>
**Figure 4. ICM-20602 Application Schematic**
**Note:** I[2] C lines are open drain and pullup resistors (e.g. 10 kΩ) are required.
## **4.3 BILL OF MATERIALS FOR EXTERNAL COMPONENTS**
|**Component**|**Label**|**Specification**|**Quantity**|
|---|---|---|---|
|REGOUT Capacitor|C1|X7R, 0.1 µF ±10%|1|
|VDD Bypass Capacitors|C2<br>C4|X7R, 0.1 µF ±10%<br>X7R, 2.2 µF ±10%|1<br>1|
|VDDIO Bypass Capacitor|C3|X7R, 10 nF ±10%|1|
**Table 10. Bill of Materials**
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_**ICM-20602**_
## **4.4 BLOCK DIAGRAM**
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ICM-20602<br>INT<br>Self<br>X Accel ADC<br>test Interrupt<br>Status<br>Register<br>CS<br>Self test Y Accel ADC Slave I2C and SA0 / SDO<br>LIS = o SPI Serial e |<br>FIFO<br>Interface SCL / SPC<br>Self SDA / SDI<br>test Z Accel ADC User & Config<br>Registers<br>aLS) == == FSYNC<br>Self<br>test X Gyro AD C Sensor<br>Registers<br>Self<br>test Y Gyro ADC<br>= Self test W Z Gyro s AD C<br>| = =<br>Temp Sensor ADC<br>[ UL<br>Charge Bias & LDOs<br>Pump<br>VDD GND REGOUT<br>Signal Conditioning<br>**----- End of picture text -----**<br>
**Figure 5. ICM-20602 Block Diagram**
## **4.5 OVERVIEW**
The ICM-20602 is comprised of the following key blocks and functions:
- Three-axis MEMS rate gyroscope sensor with 16-bit ADCs and signal conditioning
- Three-axis MEMS accelerometer sensor with 16-bit ADCs and signal conditioning
- I[2] C and SPI serial communications interface
- Self-Test
- Clocking
- Sensor Data Registers
- FIFO
- Interrupts
- Digital-Output Temperature Sensor
- Bias and LDOs
- Charge Pump
- Standard Power Modes
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **4.6 THREE-AXIS MEMS GYROSCOPE WITH 16-BIT ADCS AND SIGNAL CONDITIONING**
The ICM-20602 consists of three independent vibratory MEMS rate gyroscopes, which detect rotation about the X-, Y-, and Z- Axes. When the gyros are rotated about any of the sense axes, the Coriolis Effect causes a vibration that is detected by a capacitive pickoff. The resulting signal is amplified, demodulated, and filtered to produce a voltage that is proportional to the angular rate. This voltage is digitized using individual on-chip 16-bit Analog-to-Digital Converters (ADCs) to sample each axis. The full-scale range of the gyro sensors may be digitally programmed to ±250, ±500, ±1000, or ±2000 degrees per second (dps). The ADC sample rate is programmable from 8,000 samples per second, down to 3.9 samples per second, and user-selectable low-pass filters enable a wide range of cut-off frequencies.
## **4.7 THREE-AXIS MEMS ACCELEROMETER WITH 16-BIT ADCS AND SIGNAL CONDITIONING**
The ICM-20602’s 3-Axis accelerometer uses separate proof masses for each axis. Acceleration along a particular axis induces displacement on the corresponding proof mass, and capacitive sensors detect the displacement differentially. The ICM-20602’s architecture reduces the accelerometers’ susceptibility to fabrication variations as well as to thermal drift. When the device is placed on a flat surface, it will measure 0 _g_ on the X- and Y-axes and +1 _g_ on the Z-axis. The accelerometers’ scale factor is calibrated at the factory and is nominally independent of supply voltage. Each sensor has a dedicated sigma-delta ADC for providing digital outputs. The full scale range of the digital output can be adjusted to ±2 _g_ , ±4 _g_ , ±8 _g_ , or ±16 _g_ .
## **4.8 I[2] C AND SPI SERIAL COMMUNICATION INTERFACES**
The ICM-20602 communicates to a system processor using either a SPI or an I[2] C serial interface. The ICM-20602 always acts as a slave when communicating to the system processor. The LSB of the I[2] C slave address is set by pin 4 (SA0).
## **ICM-20602 Solution Using I[2] C Interface**
In Figure 6, the system processor is an I[2] C master to the ICM-20602.
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Interrupt Status INT Isensor data from MPU [2] C Processor Bus: for reading all<br>Register<br>ICM-20602 SA0<br>VDDIO or GND<br>Slave I [2] C<br>or SPI SCL SCL<br>Serial System<br>Interface SDA SDA Processor<br>FIFO<br>User & Config<br>Registers<br>Sensor<br>Register<br>Factory<br>Calibration<br>Bias & LDOs<br>VDD GND REGOUT<br>**----- End of picture text -----**<br>
**Figure 6. ICM-20602 Solution Using I[2] C Interface**
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **ICM-20602 Solution Using SPI Interface**
In the figure below, the system processor is an SPI master to the ICM-20602. Pins 2, 3, 4, and 5 are used to support the SPC, SDI, SDO, and CS signals for SPI communications.
**==> picture [282 x 230] intentionally omitted <==**
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Processor SPI Bus: for reading all<br>data from MPU and for configuring<br>MPU<br>Interrupt<br>Status INT<br>Register<br>CS nCS<br>ICM-20602 SDO SDI<br>Slave SPI Serial SPC SPC ProcessorSystem<br>Interface SDI SDO<br>FIFO<br>Config<br>Register<br>Sensor<br>Register<br>Factory<br>Calibration<br>Bias & LDOs<br>VDD GND REGOUT<br>**----- End of picture text -----**<br>
**Figure 7. ICM-20602 Solution Using SPI Interface**
## **4.9 SELF-TEST**
Self-test allows for the testing of the mechanical and electrical portions of the sensors. The self-test for each measurement axis can be activated by means of the gyroscope and accelerometer self-test registers (registers 27 and 28).
When the self-test is activated, the electronics cause the sensors to be actuated and produce an output signal. The output signal is used to observe the self-test response.
The self-test response is defined as follows:
SELF-TEST RESPONSE = SENSOR OUTPUT WITH SELF-TEST ENABLED – SENSOR OUTPUT WITH SELF-TEST DISABLED
The self-test response for each gyroscope axis is defined in the gyroscope specification table, while that for each accelerometer axis is defined in the accelerometer specification table.
When the value of the self-test response is within the specified min/max limits of the product specification, the part has passed selftest. When the self-test response exceeds the min/max values, the part is deemed to have failed self-test. For further information on Self-Test please refer to sections 8 and 9 of this document.
## **4.10 CLOCKING**
The ICM-20602 has a flexible clocking scheme, allowing a variety of internal clock sources to be used for the internal synchronous circuitry. This synchronous circuitry includes the signal conditioning and ADCs, and various control circuits and registers. An on-chip PLL provides flexibility in the allowable inputs for generating this clock.
Allowable internal sources for generating the internal clock are:
- a) An internal relaxation oscillator
- b) Auto-select between internal relaxation oscillator and gyroscope MEMS oscillator to use the best available source
- The only setting supporting specified performance in all modes is option b). It is recommended that option b) be used.
## **4.11 SENSOR DATA REGISTERS**
The sensor data registers contain the latest gyroscope, accelerometer, and temperature measurement data. They are read-only registers, and are accessed via the serial interface. Data from these registers may be read anytime.
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_**ICM-20602**_
## **4.12 FIFO**
The ICM-20602 contains a 1 KB FIFO (FIFO depth 1008 bytes) register that is accessible via the Serial Interface. The FIFO configuration register determines which data is written into the FIFO. Possible choices include gyro data, accelerometer data, temperature readings, and FSYNC input. A FIFO counter keeps track of how many bytes of valid data are contained in the FIFO. The FIFO register supports burst reads. The interrupt function may be used to determine when new data is available.
The ICM-20602 allows FIFO read in low-power accelerometer mode. A programmable FIFO watermark is included, with data-ready interrupt triggered when the watermark is reached.
## **4.13 INTERRUPTS**
Interrupt functionality is configured via the Interrupt Configuration register. Items that are configurable include the INT and DRDY pins configuration, the interrupt latching and clearing method, and triggers for the interrupt. Items that can trigger an interrupt are (1) Clock generator locked to new reference oscillator (used when switching clock sources); (2) new data is available to be read (from the FIFO and Data registers); (3) accelerometer event interrupts; (4) FIFO watermark; (5) FIFO overflow. The interrupt status can be read from the Interrupt Status register.
For further information regarding interrupts, please refer to sections 8 and 9 of this document.
## **4.14 DIGITAL-OUTPUT TEMPERATURE SENSOR**
An on-chip temperature sensor and ADC are used to measure the ICM-20602 die temperature. The readings from the ADC can be read from the FIFO or the Sensor Data registers.
## **4.15 BIAS AND LDOS**
The bias and LDO section generates the internal supply and the reference voltages and currents required by the ICM-20602. Its two inputs are an unregulated VDD and a VDDIO logic reference supply voltage. The LDO output is bypassed by a capacitor at REGOUT. For further details on the capacitor, please refer to the Bill of Materials for External Components.
## **4.16 CHARGE PUMP**
An on-chip charge pump generates the high voltage required for the MEMS oscillator.
## **4.17 STANDARD POWER MODES – UPDATE THE POWER MODES**
The following table lists the user-accessible power modes for ICM-20602.
|**Mode**|**Name**|**Gyro**|**Accel**|
|---|---|---|---|
|1|SleepMode|Off|Off|
|2|StandbyMode|Drive On|Off|
|3|Accelerometer Low-Power Mode|Off|Duty-Cycled|
|4|Accelerometer Low-Noise Mode|Off|On|
|5|Gyroscope Low-Power Mode|Duty-Cycled|Off|
|6|Gyroscope Low-Noise Mode|On|Off|
|7|6-Axis Low-Noise Mode|On|On|
|8|6-Axis Low-Power Mode|Duty-Cycled|On|
**Table 11. Standard Power Modes for ICM-20602**
**Notes:** Power consumption for individual modes can be found in section 0
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_**ICM-20602**_
## _**5 PROGRAMMABLE INTERRUPTS**_
The ICM-20602 has a programmable interrupt system which can generate an interrupt signal on the INT and DRDY pins. Status flags indicate the source of an interrupt. Interrupt sources may be enabled and disabled individually.
|**Interrupt Name**|**Module**|
|---|---|
|Motion Detection|Motion|
|FIFO Overflow|FIFO|
|FIFO Watermark|FIFO|
|Data Ready|Sensor Registers|
## **Table 12. Table of Interrupt Sources**
For information regarding the interrupt enable/disable registers and flag registers, please refer to sections 11 and 12 of this document. Some interrupt sources are explained below.
## **5.1 WAKE-ON-MOTION INTERRUPT**
The ICM-20602 provides motion detection capability. A qualifying motion sample is one where the high passed sample from any axis has an absolute value exceeding a user-programmable threshold. The following steps explain how to configure the Wake-on-Motion Interrupt.
## _**Step 1: Ensure that Accelerometer is running**_
- In PWR_MGMT_1 register (0x6B) set CYCLE = 0, SLEEP = 0, and GYRO_STANDBY = 0
- In PWR_MGMT_2 register (0x6C) set STBY_XA = STBY_YA = STBY_ZA = 0, and STBY_XG = STBY_YG = STBY_ZG = 1
## _**Step 2: Accelerometer Configuration**_
- In ACCEL_CONFIG2 register (0x1D) set ACCEL_FCHOICE_B = 1 and A_DLPF_CFG[2:0] = 1 (b001)
## _**Step 3: Enable Motion Interrupt**_
- In INT_ENABLE register (0x38) set WOM_X_INT_EN = WOM_Y_INT_EN = WOM_Z_INT_EN = 1 to enable motion interrupt for X, Y, and Z axis
## _**Step 4: Set Motion Threshold**_
- Set the motion threshold for X-axis in ACCEL_WOM_X_THR register (0x20)
- Set the motion threshold for Y-axis in ACCEL_WOM_Y_THR register (0x21)
- Set the motion threshold for Z-axis in ACCEL_WOM_Z_THR register (0x22)
## _**Step 5: Set Interrupt Mode**_
- In ACCEL_INTEL_CTRL register (0x69) clear bit 0 (WOM_TH_MODE) to select the motion interrupt as an OR of the enabled interrupts for X, Y, Z-axes and set bit 0 to make the interrupt an AND of the enabled interrupts for X, Y, Z axes
## _**Step 6: Enable Accelerometer Hardware Intelligence**_
- In ACCEL_INTEL_CTRL register (0x69) set ACCEL_INTEL_EN = ACCEL_INTEL_MODE = 1
## _**Step 7: Set Frequency of Wake-Up**_
- In SMPLRT_DIV register (0x19) set SMPLRT_DIV[7:0] = 3.9Hz – 500Hz
## _**Step 8: Enable Cycle Mode (Accelerometer Low-Power Mode)**_
- In PWR_MGMT_1 register (0x6B) set CYCLE = 1
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_**ICM-20602**_
## _**6 DIGITAL INTERFACE**_
## **6.1 I[2] C AND SPI SERIAL INTERFACES**
The internal registers and memory of the ICM-20602 can be accessed using either I[2] C at 400 kHz or SPI at 10MHz. SPI operates in four-wire mode.
|**Pin Number**|**Pin Name**|**Pin Description**|
|---|---|---|
|2|SCL / SPC|I2C serial clock (SCL); SPI serial clock (SPC)|
|3|SDA / SDI|I2C serial data (SDA); SPI serial data input (SDI)|
|4|SA0 / SDO|I2C Slave Address LSB (SA0); SPI serial data output (SDO)|
|5|CS|Chip select (0 = SPI mode)|
## **Table 13. Serial Interface**
**Note:** To prevent switching into I2C mode when using SPI, the I2C interface should be disabled by setting the _I2C_IF_DIS_ configuration bit at I2C_IF. Setting this bit should be performed immediately after waiting for the time specified by the “Start-Up Time for Register Read/Write” in Section 3.3.2. For further information regarding the _I2C_IF_DIS_ bit at I2C_IF register, please refer to sections 10 and 11 of this document.
## **6.2 I[2] C INTERFACE**
I[2] C is a two-wire interface comprised of the signals serial data (SDA) and serial clock (SCL). In general, the lines are open-drain and bidirectional. In a generalized I[2] C interface implementation, attached devices can be a master or a slave. The master device puts the slave address on the bus, and the slave device with the matching address acknowledges the master.
The ICM-20602 always operates as a slave device when communicating to the system processor, which thus acts as the master. SDA and SCL lines typically need pull-up resistors to VDD. The maximum bus speed is 400 kHz.
The slave address of the ICM-20602 is b110100X which is 7 bits long. The LSB bit of the 7 bit address is determined by the logic level on pin SA0. This allows two ICM-20602s to be connected to the same I[2] C bus. When used in this configuration, the address of one of the devices should be b1101000 (pin SA0 is logic low) and the address of the other should be b1101001 (pin SA0 is logic high).
## **6.3 I[2] C COMMUNICATIONS PROTOCOL**
## _START (S) and STOP (P) Conditions_
Communication on the I[2] C bus starts when the master puts the START condition (S) on the bus, which is defined as a HIGH-to-LOW transition of the SDA line while SCL line is HIGH (see figure below). The bus is considered to be busy until the master puts a STOP condition (P) on the bus, which is defined as a LOW to HIGH transition on the SDA line while SCL is HIGH (see figure below). Additionally, the bus remains busy if a repeated START (Sr) is generated instead of a STOP condition.
**==> picture [365 x 84] intentionally omitted <==**
**----- Start of picture text -----**<br>
SDA<br>|<br>SCL<br>S P<br>START condition STOP condition<br>**----- End of picture text -----**<br>
**Figure 8. START and STOP Conditions**
## _Data Format / Acknowledge_
I[2] C data bytes are defined to be 8-bits long. There is no restriction to the number of bytes transmitted per data transfer. Each byte transferred must be followed by an acknowledge (ACK) signal. The clock for the acknowledge signal is generated by the master, while the receiver generates the actual acknowledge signal by pulling down SDA and holding it low during the HIGH portion of the acknowledge clock pulse.
If a slave is busy and cannot transmit or receive another byte of data until some other task has been performed, it can hold SCL LOW, thus forcing the master into a wait state. Normal data transfer resumes when the slave is ready, and releases the clock line (refer to the following figure).
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_**ICM-20602**_
**==> picture [414 x 162] intentionally omitted <==**
**----- Start of picture text -----**<br>
DATA OUTPUT BY<br>TRANSMITTER (SDA)<br>h w ae ee a ee a<br>not acknowledge<br>DATA OUTPUT BY<br>RECEIVER (SDA)<br>acknowledge<br>SCL FROM<br>1 2 8 9<br>MASTER<br>clock pulse for<br>START acknowledgement<br>condition<br>**----- End of picture text -----**<br>
**Figure 9. Acknowledge on the I[2] C Bus**
## _Communications_
After beginning communications with the START condition (S), the master sends a 7-bit slave address followed by an 8[th] bit, the read/write bit. The read/write bit indicates whether the master is receiving data from or is writing to the slave device. Then, the master releases the SDA line and waits for the acknowledge signal (ACK) from the slave device. Each byte transferred must be followed by an acknowledge bit. To acknowledge, the slave device pulls the SDA line LOW and keeps it LOW for the high period of the SCL line. Data transmission is always terminated by the master with a STOP condition (P), thus freeing the communications line. However, the master can generate a repeated START condition (Sr), and address another slave without first generating a STOP condition (P). A LOW to HIGH transition on the SDA line while SCL is HIGH defines the stop condition. All SDA changes should take place when SCL is low, with the exception of start and stop conditions.
**==> picture [402 x 115] intentionally omitted <==**
**----- Start of picture text -----**<br>
SDA<br>SCL 1 – 7 8 9 1 – 7 8 9 1 – 7 8 9<br>S P<br>START ADDRESS R/W ACK DATA ACK DATA ACK STOP<br>condition condition<br>**----- End of picture text -----**<br>
**Figure 10. Complete I[2] C Data Transfer**
To write the internal ICM-20602 registers, the master transmits the start condition (S), followed by the I[2] C address and the write bit (0). At the 9[th] clock cycle (when the clock is high), the ICM-20602 acknowledges the transfer. Then the master puts the register address (RA) on the bus. After the ICM-20602 acknowledges the reception of the register address, the master puts the register data onto the bus. This is followed by the ACK signal, and data transfer may be concluded by the stop condition (P). To write multiple bytes after the last ACK signal, the master can continue outputting data rather than transmitting a stop signal. In this case, the ICM20602 automatically increments the register address and loads the data to the appropriate register. The following figures show single and two-byte write sequences.
_Single-Byte Write Sequence_
**==> picture [282 x 29] intentionally omitted <==**
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_**ICM-20602**_
_Burst Write Sequence_ Master S AD+W RA DATA DATA P Slave ACK ACK ACK ACK ~~SSE~~ To read the internal ICM-20602 registers, the master sends a start condition, followed by the I ~~EEE EEE~~[2] C address and a write bit, and then the register address that is going to be read. Upon receiving the ACK signal from the ICM-20602, the master transmits a start signal followed by the slave address and read bit. As a result, the ICM-20602 sends an ACK signal and the data. The communication ends with a not acknowledge (NACK) signal and a stop bit from master. The NACK condition is defined such that the SDA line remains high at the 9[th] clock cycle. The following figures show single and two-byte read sequences.
|_Single-Byte Read Sequence_<br>_Burst Read Sequence_<br>Master<br>S<br>Slave<br>~~as ~~|_Single-Byte Read Sequence_<br>_Burst Read Sequence_<br>Master<br>S<br>Slave<br>~~as ~~|_Single-Byte Read Sequence_<br>_Burst Read Sequence_<br>Master<br>S<br>Slave<br>~~as ~~|_Single-Byte Read Sequence_<br>_Burst Read Sequence_<br>Master<br>S<br>Slave<br>~~as ~~|_Single-Byte Read Sequence_<br>_Burst Read Sequence_<br>Master<br>S<br>Slave<br>~~as ~~|_Single-Byte Read Sequence_<br>_Burst Read Sequence_<br>Master<br>S<br>Slave<br>~~as ~~|AD+W<br>ACK<br> ~~es~~|RA|ACK|S||AD+R<br>ACK|DATA||NACK|||P|||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|Master<br>S<br>AD+W<br>RA<br>S<br>AD+R<br>ACK<br>NACK<br>P<br>Slave<br>ACK<br>ACK<br>ACK<br>DATA<br>DATA<br>~~SESE~~||||||||||||||||||||
|**6.4 I2C TERMS**||||||||||||||||||||
|||||**Signal**||**Description**||||||||||||||
|||||S||Start Condition: SDAgoes from high to low while SCL is hi|||||h to low while SCL is high|||||||||
|||||AD|AD|Slave I2C address||||||||||||||
|||||W|W|Write bit(0)||||||||||||||
|||||R||Read bit(1)||||||||||||||
|||||ACK||Acknowledge: SDA line is low while the SCL line is high at the 9thclock cycle||||||||||||||
|||||NACK||Not-Acknowledge: SDA line stays high at the 9||||h at the 9thclock cycle||||||||||
|||||RA|RA|ICM-20602 internal register address||||||||||||||
|||||DATA||Transmit or received data||||||||||||||
|||||P||Stopcondition: SDAgoingfrom low to high while SCL is high||||||||||||||
**Table 14. I[2] C Terms**
## **6.5 SPI INTERFACE**
SPI is a 4-wire synchronous serial interface that uses two control lines and two data lines. The ICM-20602 always operates as a Slave device during standard Master-Slave SPI operation.
With respect to the Master, the Serial Clock output (SPC), the Serial Data Output (SDO) and the Serial Data Input (SDI) are shared among the Slave devices. Each SPI slave device requires its own Chip Select (CS) line from the master.
CS goes low (active) at the start of transmission and goes back high (inactive) at the end. Only one CS line is active at a time, ensuring that only one slave is selected at any given time. The CS lines of the non-selected slave devices are held high, causing their SDO lines to remain in a high-impedance (high-z) state so that they do not interfere with any active devices. _SPI Operational Features_
1. Data is delivered MSB first and LSB last
2. Data is latched on the rising edge of SPC
3. Data should be transitioned on the falling edge of SPC
4. The maximum frequency of SPC is 10MHz
5. SPI read and write operations are completed in 16 or more clock cycles (two or more bytes). The first byte contains the SPI Address, and the following byte(s) contain(s) the SPI data. The first bit of the first byte contains the Read/Write bit and indicates the Read (1) or Write (0) operation. The following 7 bits contain the Register Address. In cases of multiplebyte Read/Writes, data is two or more bytes:
_SPI Address format_ **MSB LSB** R/W A6 A5 A4 A3 A2 A1 A0 ~~EERFES oo~~ Document Number: DS-000176 Page 26 of 57 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## _SPI Data format_
|_SPI Data format_|_SPI Data format_|||||||
|---|---|---|---|---|---|---|---|
|**MSB**|||||||**LSB**|
|D7|D6|D5|D4|D3|D2|D1|D0|
6. Supports Single or Burst Read/Writes.
**==> picture [190 x 126] intentionally omitted <==**
**----- Start of picture text -----**<br>
SPC<br>SDI<br>SPI Master SDO SPI Slave 1<br>CS1 CS<br>CS2<br>SPC<br>SDI<br>SDO<br>SPI Slave 2<br>CS<br>**----- End of picture text -----**<br>
**Figure 11. Typical SPI Master/Slave Configuration**
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_**ICM-20602**_
## _**7 SERIAL INTERFACE CONSIDERATIONS**_
## **7.1 ICM-20602 SUPPORTED INTERFACES**
The ICM-20602 supports I[2] C communications on its serial interface **.** The ICM-20602’s I/O logic levels are set to be VDDIO.
The figure below depicts a sample circuit of ICM-20602. It shows the relevant logic levels and voltage connections.
**==> picture [425 x 223] intentionally omitted <==**
**----- Start of picture text -----**<br>
VDDIO<br>VDD_IO<br>(0V - VDDIO) SYSTEM BUS<br>System<br>VDD Processor IO<br>VDDIO<br>|<br>VDD INT (0V - VDDIO)<br>(0V - VDDIO)<br>SDA<br>(0V - VDDIO)<br>(0V - VDDIO) SCL<br>SYNC<br>VDDIO ICM-20731AICM-20602<br>| VDDIO<br>(0V, VDDIO)<br>AD0<br>**----- End of picture text -----**<br>
**Figure 12. I/O Levels and Connections**
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_**ICM-20602**_
## _**8 REGISTER MAP**_
The following table lists the register map for the ICM-20602. Note that all registers are accessible in all modes of device operation.
|**Addr**<br>**(Hex)**<br>~~ee~~|**Addr**<br>**(Dec.)**<br>~~ee~~|**Register Name**<br>~~ee~~|**Serial**<br>**I/F**<br>~~ee~~|**Bit7**<br>~~ee~~|**Bit6**<br>~~ee~~|**Bit5**<br>~~ee~~|**Bit4**<br>~~ee~~|**Bit3**<br>~~ee~~|**Bit2**<br>~~ee~~|**Bit1**<br>~~ee~~|**Bit0**<br>~~ee~~|
|---|---|---|---|---|---|---|---|---|---|---|---|
|04<br>~~ee~~<br>~~ee~~|04<br>~~ee~~<br>~~ee~~|XG_OFFS_TC_H<br>~~ee~~<br>~~ee~~|READ/<br>WRITE<br>~~ee~~<br>~~ee~~|XG_OFFS_LP[5:0]<br>~~ee~~<br>~~ee~~||||||XG_OFFS_TC_H [9:8]<br>~~ee~~<br>~~ee~~||
|05<br>~~aee~~|05<br>~~aee~~|XG_OFFS_TC_L<br>~~ee~~|READ/<br>WRITE<br>~~ee ee~~|XG_OFFS_TC_L [7:0]<br>~~ee~~||||||||
|07<br>~~ee~~<br>~~ee~~|07<br>~~ee~~<br>~~ee~~|YG_OFFS_TC_H<br>~~ee~~<br>~~ee~~|READ/<br>WRITE<br>~~ee ee~~<br>~~ee~~|YG_OFFS_LP[5:0]<br>~~ee~~<br>~~ee~~||||||YG_OFFS_TC_H [9:8]<br>~~ee~~||
|08<br>~~ee~~<br>~~ee~~|08<br>~~ee~~<br>~~ee~~|YG_OFFS_TC_L<br>~~ee~~<br>~~ee~~|READ/<br>WRITE<br>~~ee ee~~<br>~~ee~~|YG_OFFS_TC_L [7:0]<br>~~ee~~<br>~~ee~~||||||||
|0A<br>~~ee~~<br>~~a~~<br>~~ee~~|10<br>~~ee~~<br>~~a~~<br>~~ee~~|ZG_OFFS_TC_H<br>~~ee~~<br>~~ee~~<br>~~ee~~|READ/<br>WRITE<br>~~ee~~<br>~~ee~~<br>~~ee~~|ZG_OFFS_LP[5:0]<br>~~ee~~<br>~~ee~~<br>~~ee~~||||||ZG_OFFS_TC_H [9:8]<br>~~ee~~<br>~~ee~~<br>~~ee~~||
|0B<br>~~ee~~|11<br>~~ee~~|ZG_OFFS_TC_L<br>~~ee~~|READ/<br>WRITE<br>~~ee~~|ZG_OFFS_TC_L [7:0]<br>~~ee~~||||||||
|0D<br>~~ee~~|13<br>~~ee~~|SELF_TEST_X_ACCEL<br>~~ee~~|READ/<br>WRITE<br>~~ee~~|XA_ST_DATA[7:0]<br>~~ee~~||||||||
|0E<br>~~ee~~|14<br>~~ee~~|SELF_TEST_Y_ACCEL<br>~~ee~~|READ/<br>WRITE<br>~~ee~~|YA_ST_DATA[7:0]<br>~~ee~~||||||||
|0F<br>~~ee~~<br>~~a~~|15<br>~~ee~~<br>~~a~~|SELF_TEST_Z_ACCEL<br>~~ee~~|READ/<br>WRITE<br>~~ee~~|ZA_ST_DATA[7:0]<br>~~ee~~||||||||
|13<br>~~Os~~|19<br>~~Os~~|XG_OFFS_USRH|READ/<br>WRITE|X_OFFS_USR [15:8]||||||||
|14<br>~~Os~~|20<br>~~Os~~|XG_OFFS_USRL|READ/<br>WRITE|X_OFFS_USR [7:0]||||||||
|15<br>~~Os~~|21<br>~~Os~~|YG_OFFS_USRH|READ/<br>WRITE|Y_OFFS_USR [15:8]||||||||
|16<br>~~Os~~|22<br>~~Os~~|YG_OFFS_USRL<br>|READ/<br>WRITE<br>|Y_OFFS_USR [7:0]<br>||||||||
|17<br>~~ee~~|23<br>~~ee~~|ZG_OFFS_USRH<br>~~ee~~|READ/<br>WRITE<br>~~ee~~|Z_OFFS_USR [15:8]<br>~~ee~~||||||||
|18<br>~~Oe~~|24|ZG_OFFS_USRL|READ/<br>WRITE|Z_OFFS_USR [7:0]||||||||
|19<br>~~Oe~~<br>~~Oe~~|25<br>|SMPLRT_DIV<br>|READ/<br>WRITE<br>|SMPLRT_DIV[7:0]<br>||||||||
|1A<br>~~Oe~~<br>~~Oe~~<br>~~Os~~|26<br><br>~~Os~~|CONFIG<br><br>|READ/<br>WRITE<br><br>|-<br><br>~~ee~~<br>|FIFO_<br>MODE<br><br>~~ee~~<br>|EXT_SYNC_SET[2:0]<br><br>~~ee~~<br>|||DLPF_CFG[2:0]<br><br>~~ee~~<br>|||
|1B<br>~~OeOe~~<br>~~Os~~|27<br>~~Oe~~<br>~~Os~~|GYRO_CONFIG<br>~~Oe~~<br>|READ/<br>WRITE<br>~~Oe~~<br>|XG_ST<br>~~Oe~~<br>~~ee~~<br>|YG_ST<br>~~Oe~~<br>~~ee~~<br>|ZG_ST<br>~~Oe~~<br>|FS_SEL [1:0]<br>~~Oe~~<br>~~ee~~<br>||-<br>~~Oe~~<br>~~ee~~<br>|FCHOICE_B[1:0]<br>~~Oe~~<br>||
|1C<br>~~Os~~|28<br>~~Os~~|ACCEL_CONFIG<br>|READ/<br>WRITE<br>|XA_ST<br>~~ee~~<br>|YA_ST<br>~~ee~~<br>|ZA_ST<br>|ACCEL_FS_SEL[1:0]<br>~~ee~~<br>||-<br>~~ee~~<br>|||
|1D<br>~~Oe~~|29<br>~~Oe~~|ACCEL_CONFIG 2<br>~~Oe~~|READ/<br>WRITE<br>~~Oe~~|-<br>~~Oe~~||DEC2_CFG<br>~~Oe~~||ACCEL_FCH<br>OICE_B<br>~~Oe~~|A_DLPF_CFG<br>~~Oe~~|||
|1E<br>~~ee~~|30<br>~~ee~~|LP_MODE_CFG<br>~~ee~~|READ/<br>WRITE<br>~~ee~~|GYRO_CYC<br>LE<br>~~ee~~|G_AVGCFG[2:0]<br>~~ee~~|||-<br>~~ee~~||||
|20<br>~~Oe~~<br>~~—f~~|32<br>~~Oe~~<br>~~—f|}~~|ACCEL_WOM_X_THR<br>~~Oe~~<br>~~|}~~|READ/<br>WRITE<br>~~Oe~~<br>~~|}~~|WOM_X_TH[7:0]<br>~~Oe~~<br>||||||||
|21<br>~~—f~~|33<br>~~—f|}~~|ACCEL_WOM_Y_THR<br>~~|}~~|READ/<br>WRITE<br>~~|}fp~~|WOM_Y_TH[7:0]<br>~~fp~~||||||||
|22<br>~~—f~~<br>~~a~~|34<br>~~—f |}~~<br>~~a~~|ACCEL_WOM_Z_THR<br>~~|}~~<br>|READ/<br>WRITE<br>~~|}fp~~<br>|WOM_Z_TH[7:0]<br>~~fp~~<br>||||||||
|23<br>~~a~~|35<br>~~a~~|FIFO_EN<br>|READ/<br>WRITE<br>|-<br>|||GYRO_FIFO_EN<br>|ACCEL_FIF<br>O_EN<br>|-<br>|||
|36<br>|54<br>|FSYNC_INT<br>|READ to<br>CLEAR<br>|FSYNC_INT<br>|-<br>|||||||
|37<br>~~ee~~<br>~~ee~~|55<br>~~ee~~<br>~~ee~~|INT_PIN_CFG<br>~~ee~~<br>~~ee~~|READ/<br>WRITE<br>~~ee~~<br>~~ee~~|INT_LEVEL<br>~~ee~~<br>~~ee~~|INT_OPEN<br>~~ee~~<br>~~ee~~|LATCH<br>_INT_EN<br>~~ee~~<br>~~eee~~|INT_RD<br>_CLEAR<br>~~ee~~<br>~~eee~~|FSYNC_INT<br>_LEVEL<br>~~ee~~<br>~~eee~~|FSYNC<br>_INT_MODE<br>_EN<br>~~ee~~<br>~~eee~~|-<br>~~ee~~<br>~~eee~~||
|38<br>~~ee~~|56<br>~~ee~~|INT_ENABLE<br>~~ee~~|READ/<br>WRITE<br>~~ee~~|WOM_X_I<br>NT_EN<br>~~ee~~|WOM_Y_INT<br>_EN<br>~~ee~~|WOM_Z_INT<br>_EN<br>~~eee~~|FIFO<br>_OFLOW<br>_EN<br>~~eee~~|FSYNC_INT<br>_EN<br>~~eee~~|GDRIVE_INT<br>_EN<br>~~eee~~|-<br>~~eee~~|DATA_RDY_IN<br>T_EN<br>~~eee~~|
|39<br>~~ee~~<br>~~a~~|57<br>~~ee~~<br>~~a~~|FIFO_WM_INT_STATUS<br>~~ee ~~<br>~~ee~~|READ to<br>CLEAR<br> ~~ee~~<br>~~ee ~~|-<br>~~ee~~<br> ~~ee~~|FIFO_WM_IN<br>T<br>~~ee ~~<br>~~eeee~~|-<br> ~~eeeeee~~<br>~~ee~~||||||
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_**ICM-20602**_
|**Addr**<br>**(Hex)**<br>~~a~~|**Addr**<br>**(Dec.)**<br>~~a~~|**Register Name**<br>~~a~~|**Serial**<br>**I/F**|**Bit7**|**Bit6**|**Bit5**|**Bit4**|**Bit3**|**Bit2**|**Bit1**<br>~~PT~~|**Bit0**<br>~~PT~~|
|---|---|---|---|---|---|---|---|---|---|---|---|
|3A<br>~~a~~|58<br>~~a~~|INT_STATUS<br>~~a~~|READ to<br>CLEAR|WOM_X_I<br>NT|WOM_Y_INT|WOM_Z_INT|FIFO<br>_OFLOW<br>_INT|-|GDRIVE_INT|-<br>~~PT~~|DATA<br>_RDY_INT<br>~~PT~~|
|3B<br>~~a~~|59<br>~~a~~|ACCEL_XOUT_H|READ|ACCEL_XOUT[15:8]||||||||
|3C<br>~~a~~|60<br>~~a~~|ACCEL_XOUT_L|READ|ACCEL_XOUT[7:0]||||||||
|3D<br>~~a~~|61<br>~~a~~|ACCEL_YOUT_H|READ|ACCEL_YOUT[15:8]||||||||
|3E<br>~~a~~|62<br>~~a~~|ACCEL_YOUT_L|READ|ACCEL_YOUT[7:0]||||||||
|3F<br>~~a~~|63<br>~~a~~|ACCEL_ZOUT_H|READ|ACCEL_ZOUT[15:8]||||||||
|40<br>~~a~~|64<br>~~a~~|ACCEL_ZOUT_L|READ|ACCEL_ZOUT[7:0]||||||||
|41<br>~~a~~|65<br>~~a~~|TEMP_OUT_H|READ|TEMP_OUT[15:8]||||||||
|42<br>~~a~~|66<br>~~a~~|TEMP_OUT_L|READ|TEMP_OUT[7:0]||||||||
|43<br>~~a~~|67<br>~~aa~~|GYRO_XOUT_H|READ|GYRO_XOUT[15:8]||||||||
|44<br>~~a~~|68|GYRO_XOUT_L|READ|GYRO_XOUT[7:0]||||||||
|45<br>~~a ~~|69<br> ~~a~~|GYRO_YOUT_H<br>|READ<br>|GYRO_YOUT[15:8]<br>||||||||
|46<br>~~eG~~<br>~~RR~~|70<br>~~eG~~<br>|GYRO_YOUT_L<br>~~eG~~<br>|READ<br>~~eG~~<br>|GYRO_YOUT[7:0]<br>~~eG~~<br>||||||||
|47<br>~~RR~~|71<br>|GYRO_ZOUT_H<br>|READ<br>|GYRO_ZOUT[15:8]<br>||||||||
|48<br>~~RRDG~~<br>~~ee~~|72<br>~~DG~~<br>~~ee~~|GYRO_ZOUT_L<br>~~DG~~<br>~~ee ee~~|READ<br>~~DG~~<br>~~ee~~|GYRO_ZOUT[7:0]<br>~~DG~~<br>~~ee~~||||||||
|50<br>~~ee~~|80<br>~~ee~~|SELF_TEST_X_GYRO<br>~~ee ee~~|READ/<br>WRITE<br>~~ee~~|XG_ST_DATA[7:0]<br>~~ee~~||||||||
|51<br>~~ee~~<br>~~——~~<br>~~pp~~|81<br>~~ee~~<br>~~——~~<br>~~ppfp~~|SELF_TEST_Y_GYRO<br>~~ee ee~~<br>~~——~~<br>~~fp~~|READ/<br>WRITE<br>~~ee~~<br>~~——~~<br>~~fp~~|YG_ST_DATA[7:0]<br>~~ee~~<br>~~fp~~||||||||
|52<br>~~ee~~<br>~~pp~~|82<br>~~ee~~<br>~~ppfp~~|SELF_TEST_Z_GYRO<br>~~ee ee~~<br>~~fp~~|READ/<br>WRITE<br>~~ee~~<br>~~fp~~|ZG_ST_DATA[7:0]<br>~~ee~~<br>~~fp~~||||||||
|60<br>~~pp~~<br>~~——~~|96<br>~~ppfp~~<br>~~——~~|FIFO_WM_TH1<br>~~fp~~<br>~~——~~|READ/<br>WRITE<br>~~fp~~<br>~~——~~|-<br>~~fp~~||||||FIFO_WM_TH[9:8]||
|61<br>~~pp~~<br>~~—~~|97<br>~~ppfp~~<br>~~—~~|FIFO_WM_TH2<br>~~fp~~<br>~~—~~|READ/<br>WRITE<br>~~fp~~|FIFO_WM_TH[7:0]<br>~~fp~~||||||||
|68<br>~~|~~|104<br>~~|~~<br>~~|~~|SIGNAL_PATH_RESET<br>~~|~~<br>~~|~~|READ/<br>WRITE|-<br>~~pe~~||||||ACCEL<br>_RST|TEMP<br>_RST|
|69<br>~~a~~|105<br>~~|~~<br>~~a~~|ACCEL_INTEL_CTRL<br>~~|~~<br>~~a~~|READ/<br>WRITE|ACCEL_INT<br>EL_EN|ACCEL_INTEL<br>_MODE<br>~~pe~~|-<br>~~pe~~||||OUTPUT_LIMI<br>T|WOM_TH_MO<br>DE|
|6A<br>~~a~~<br>~~ee~~|106<br>~~|~~<br>~~a~~<br>~~ee~~|USER_CTRL<br>~~|~~<br>~~a~~<br>~~ee~~|READ/<br>WRITE<br>~~ee~~|-<br>~~ee~~|FIFO_EN<br>~~pe~~<br>~~ee~~|-<br>~~pe~~<br>~~ee~~|||FIFO<br>_RST<br>~~ee~~|-|SIG_COND<br>_RST|
|6B<br>~~ee~~<br>~~**{|**~~|107<br>~~|~~<br>~~ee~~<br>~~**{||**~~|PWR_MGMT_1<br>~~|~~<br>~~ee~~<br>~~|~~|READ/<br>WRITE<br>~~ee~~|DEVICE_RE<br>SET<br>~~ee~~|SLEEP<br>~~pe~~<br>~~ee~~<br>~~es~~|CYCLE<br>~~pe~~<br>~~ee~~|GYRO_<br>STANDBY<br>~~pe~~<br>~~ee~~<br>~~ee~~|TEMP_DIS<br>~~ee~~<br>~~ee~~|CLKSEL[2:0]<br>~~ee~~<br>~~ee~~|||
|6C<br>~~ee~~<br>~~**{|**~~|108<br>~~ee~~<br>~~**{||**~~|PWR_MGMT_2<br>~~ee~~<br>~~|~~<br>~~|~~|READ/<br>WRITE<br>~~ee~~<br>~~|~~|-<br>~~ee~~<br>~~es~~||STBY_XA<br>~~ee~~|STBY_YA<br>~~ee~~<br>~~ee~~|STBY_ZA<br>~~ee~~<br>~~ee~~|STBY_XG<br>~~ee~~<br>~~ee~~|STBY_YG<br>~~ee~~|STBY_ZG|
|70<br>~~ee~~<br>~~**{|**~~|112<br>~~ee~~<br>~~**{||**~~|I2C_IF<br>~~ee~~<br>~~|~~<br>~~|~~|READ/<br>WRITE<br>~~ee~~<br>~~|~~|-<br>~~ee~~|I2C_IF_DIS<br>~~ee~~<br>~~es~~|-<br>~~ee~~<br>~~ee~~||||||
|72<br>~~**{|**~~<br>~~I eG~~|114<br>~~**{|** ~~~~**|**~~<br>~~eG~~|FIFO_COUNTH<br>~~|~~<br>~~|~~<br>~~eG~~|READ<br>~~|~~<br>~~eG~~|FIFO_COUNT[15:8]<br>~~es~~<br>~~ee~~<br>~~eG~~||||||||
|73<br>~~I eG~~<br>~~a~~<br>~~_|~~|115<br>~~eG~~<br>~~_|~~<br>~~|~~|FIFO_COUNTL<br>~~eG~~<br>~~|~~|READ<br>~~eG~~|FIFO_COUNT[7:0]<br>~~eG~~||||||||
|74<br>~~_|~~|116<br>~~_|~~<br>~~|~~|FIFO_R_W<br>~~|~~|READ/<br>WRITE|FIFO_DATA[7:0]||||||||
|75<br>~~_|~~<br>~~aee~~|117<br>~~_|~~<br>~~|~~<br>~~ee~~|WHO_AM_I<br>~~|~~<br>~~ee~~|READ<br>~~ee~~|WHOAMI[7:0]<br>~~ee~~||||||||
|77<br>~~ee~~<br>~~**e**~~|119<br>~~ee~~<br>~~**e**~~|XA_OFFSET_H<br>~~ee~~<br>~~**e**~~|READ/<br>WRITE<br>~~ee~~<br>~~**e**~~|XA_OFFS [14:7]<br>~~a~~<br>~~ee~~<br>~~**e**e|~~||||||||
|78<br>~~ee~~<br>~~**e**~~|120<br>~~ee~~<br>~~**e**~~|XA_OFFSET_L<br>~~ee~~<br>~~**e**~~<br>~~**e**~~|READ/<br>WRITE<br>~~ee~~<br>~~**e**~~|XA_OFFS [6:0]<br>~~a~~<br>~~ee~~<br>~~**e**e~~|||||||-<br>~~a~~<br>~~|~~|
|7A<br>~~ee~~<br>~~**e**~~|122<br>~~ee~~<br>~~**e**~~|YA_OFFSET_H<br>~~ee~~<br>~~**e**~~<br>~~**e**~~|READ/<br>WRITE<br>~~ee~~<br>~~**e**~~|YA_OFFS [14:7]<br>~~ee~~<br>~~**e**e|~~||||||||
|7B<br>~~**e**~~|123<br>~~**e**~~|YA_OFFSET_L<br>~~**e**~~<br>~~**e**~~|READ/<br>WRITE<br>~~**e**~~|YA_OFFS [6:0]<br>~~**e**e ~~|||||||-<br> ~~|~~|
|7D<br>~~ee~~<br>~~—[~~|125<br>~~ee~~<br>~~—[~~<br>~~|~~|ZA_OFFSET_H<br>~~**e**~~<br>~~ee~~<br>~~|~~|READ/<br>WRITE<br>~~|~~|ZA_OFFS [14:7]||||||||
|7E<br>~~—[~~|126<br>~~—[~~<br>~~|~~|ZA_OFFSET_L<br>~~|~~|READ/<br>WRITE<br>~~|~~|ZA_OFFS [6:0]|||||||-<br>~~|~~|
## **Table 15. Register Map**
**Note:** Register Names ending in _H and _L contain the high and low bytes, respectively, of an internal register value.
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The reset value is 0x00 for all registers other than the registers below, also the self-test registers contain pre-programmed values and will not be 0x00 after reset.
- Register 26 (0x80) CONFIG
- Register 107 (0x41) Power Management 1
- Register 117 (0x12) WHO_AM_I
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## _**9 REGISTER DESCRIPTIONS**_
This section describes the function and contents of each register within the ICM-20602. **Note** : The device will come up in sleep mode upon power-up.
## **9.1 REGISTER DESCRIPTIONS**
Reset values are “0” for all registers, unless otherwise specified
- **9.2 REGISTER 04 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET TEMPERATURE COMPENSATION (TC) REGISTER**
**Register Name: XG_OFFS_TC_H**
**Register Type: READ/WRITE**
**Register Address: 04 (Decimal); 04 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:2]**|XG_OFFS_LP[5:0]|Stores the offset shift in the gyroscope output from low noise mode to<br>low power mode to be implemented as a correction in the customer<br>software. 2’s complement digital code, 0.125 dps/LSB from +3.875dps<br>to -4dps.|
|**[1:0]**|XG_OFFS_TC_H[9:8]|Bits 9 and 8 of the 10-bit offset of Xgyroscope(2’s complement)|
- **9.3 REGISTER 05 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET TEMPERATURE COMPENSATION (TC) REGISTER**
**Register Name: XG_OFFS_TC_L Type: READ/WRITE Register Address: 05 (Decimal); 05 (Hex)**
**BIT NAME FUNCTION** ~~e~~ **[7:0]** XG ~~eEEeEOEE~~ _OFFS_TC_L[7:0]] ~~EEE~~ Bits 7 to 0 of the 10-bit offset of X ~~EE EE~~ gyroscope (2’s com ~~ee~~ plement) **Description:**
The temperature compensation (TC) registers are used to reduce gyro offset variation due to temperature change. The TC feature is always enabled. However, the compensation only happens when a TC coefficient is programed during factory trim which gets loaded into these registers at power up or after a _DEVICE_RESET_ . If these registers contain a value of zero, temperature compensation has no effect on the offset of the chip. The TC registers have a 10-bit magnitude and sign adjustment in all full scale modes with a resolution of 2.52 mdps/C steps.
If these registers contain a non-zero value after power up, the user may write zeros to them to see the offset values without TC with temperature variation. Note that doing so may result in offset values that exceed data sheet “Initial ZRO Tolerance” in other than normal ambient temperature (~25°C). The TC coefficients maybe restored by the user with a power up or a _DEVICE_RESET_ .
The above description also applies to registers 7-8 and 10-11.
- **9.4 REGISTER 07 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET TEMPERATURE COMPENSATION (TC) REGISTER**
**Register Name: YG_OFFS_TC_H Register Type: READ/WRITE Register Address: 07 (Decimal); 07 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:2]**|YG_OFFS_LP[5:0]|Stores the offset shift in the gyroscope output from low noise mode to low power mode to be<br>implemented as a correction in the customer software. 2’s complement digital code,<br>0.125dps/LSB from +3.875dps to -4dps.|
|**[1:0]**|YG_OFFS_TC_H[9:8]|Bits 9 and 8 of the 10-bit offset of Ygyroscope(2’s complement)|
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- **9.5 REGISTER 08 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET TEMPERATURE COMPENSATION (TC) REGISTER**
**Register Name: YG_OFFS_TC_L Register Type: READ/WRITE Register Address: 08 (Decimal); 08 (Hex)**
**BIT NAME FUNCTION** ~~ee~~ **[7:0]** YG_OFFS_TC_L[7:0]] Bits 7 to 0 of the 10-bit offset of Y gyroscope (2’s complement)
- **9.6 REGISTER 10 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET TEMPERATURE COMPENSATION (TC) REGISTER**
**Register Name: ZG_OFFS_TC_H Register Type: READ/WRITE Register Address: 10 (Decimal); 0A (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:2]**|ZG_OFFS_LP[5:0]|Stores the offset shift in the gyroscope output from low noise mode to low power mode<br>to be implemented as a correction in the customer software. 2’s complement digital<br>code,0.125dps/LSB from +3.875dps to -4dps.|
|**[1:0]**|ZG_OFFS_TC_H[9:8]|Bits 9 and 8 of the 10-bit offset of Zgyroscope(2’s complement)|
- **9.7 REGISTER 11 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET TEMPERATURE COMPENSATION (TC) REGISTER**
**Register Name: ZG_OFFS_TC_L Register Type: READ/WRITE Register Address: 11 (Decimal); 0B (Hex)**
**BIT NAME FUNCTION** ~~ee~~ **[7:0]** ZG_OFFS_TC_L[7:0]] Bits 7 to 0 of the 10-bit offset of Z gyroscope (2’s complement)
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## **9.8 REGISTERS 13 TO 15 ACCELEROMETER SELF-TEST REGISTERS**
**Register Name: SELF_TEST_X_ACCEL, SELF_TEST_Y_ACCEL, SELF_TEST_Z_ACCEL Type: READ/WRITE**
**Register Address: 13, 14, 15 (Decimal); 0D, 0E, 0F (Hex)**
|**REGISTER**|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|---|
|SELF_TEST_X_ACCEL|**[7:0]**|XA_ST_DATA[7:0]|The value in this register indicates the self-test output generated<br>during manufacturing tests. This value is to be used to check<br>against subsequent self-test outputs performed by the end user.|
|SELF_TEST_Y_ACCEL|**[7:0]**|YA_ST_DATA[7:0]|The value in this register indicates the self-test output generated<br>during manufacturing tests. This value is to be used to check<br>against subsequent self-test outputs performed by the end user.|
|SELF_TEST_Z_ACCEL|**[7:0]**|ZA_ST_DATA[7:0]|The value in this register indicates the self-test output generated<br>during manufacturing tests. This value is to be used to check<br>against subsequent self-test outputs performed by the end user.|
The equation to convert self-test codes in OTP to factory self-test measurement is:
**==> picture [210 x 13] intentionally omitted <==**
where ST_OTP is the value that is stored in OTP of the device, FS is the Full Scale value, and ST_code is based on the Self-Test value (ST_ FAC) determined in InvenSense’s factory final test and calculated based on the following equation:
**==> picture [249 x 31] intentionally omitted <==**
## **9.9 REGISTER 19 – X-GYRO OFFSET ADJUSTMENT REGISTER: HIGH BYTE**
**Register Name: XG_OFFS_USRH Register Type: READ/WRITE Register Address: 19 (Decimal); 13 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:0]**|X_OFFS_USR[15:8]|Bits 15 to 8 of the 16-bit offset of X gyroscope (2’s complement). This register is used to<br>remove DC bias from the sensor output. The value in this register is added to the<br>gyroscope sensor value beforegoinginto the sensor register.|
## **9.10 REGISTER 20 – X-GYRO OFFSET ADJUSTMENT REGISTER: LOW BYTE**
**Register Name: XG_OFFS_USRL Register Type: READ/WRITE Register Address: 20 (Decimal); 14 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:0]**|X_OFFS_USR[7:0]|Bits 7 to 0 of the 16-bit offset of X gyroscope (2’s complement). This register is used to<br>remove DC bias from the sensor output. The value in this register is added to the<br>gyroscope sensor value before going into the sensor register.|
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## **9.11 REGISTER 21 – Y-GYRO OFFSET ADJUSTMENT REGISTER: HIGH BYTE**
**Register Name: YG_OFFS_USRH Register Type: READ/WRITE**
**Register Address: 21 (Decimal); 15 (Hex) BIT NAME FUNCTION** Bits 15 to 8 of the 16-bit offset of Y gyroscope (2’s complement). This register is **[7:0]** Y_OFFS_USR[15:8] used to remove DC bias from the sensor output. The value in this register is added to the gyroscope sensor value before going into the sensor register. **REGISTER 22 – Y-GYRO OFFSET ADJUSTMENT REGISTER: LOW BYTE** ~~a~~
## **9.12 REGISTER 22 – Y-GYRO OFFSET ADJUSTMENT REGISTER: LOW BYTE**
|**Register Name: YG_OFFS_USRL**||
|---|---|
|**Register Type: READ/WRITE**||
|**Register Address: 22 (Decimal); 16 (Hex)**||
|**BIT**<br>**NAME**<br>**FUNCTION**<br>**[7:0]**<br>Y_OFFS_USR[7:0]<br>Bits 7 to 0 of the 16-bit offset of Y gyroscope (2’s complement). This<br>register is used to remove DC bias from the sensor output. The value<br>in this register is added to the gyroscope sensor value before going<br>into the sensor register.<br>**REGISTER 23 – Z-GYRO OFFSET ADJUSTMENT REGISTER: HIGH BYTE**<br>~~a~~||
## **9.13 REGISTER 23 – Z-GYRO OFFSET ADJUSTMENT REGISTER: HIGH BYTE**
|**Register Name: ZG_OFFS_USRH**||
|---|---|
|**Register Type: READ/WRITE**||
|**Register Address: 23 (Decimal); 17 (Hex)**||
|**BIT**<br>**NAME**<br>**FUNCTION**<br>**[7:0]**<br>Z_OFFS_USR[15:8]<br>Bits 15 to 8 of the 16-bit offset of Z gyroscope (2’s complement). This<br>register is used to remove DC bias from the sensor output. The value<br>in this register is added to the gyroscope sensor value before going<br>into the sensor register.<br>**REGISTER 24 – Z-GYRO OFFSET ADJUSTMENT REGISTER: LOW BYTE**<br>~~a~~||
## **9.14 REGISTER 24 – Z-GYRO OFFSET ADJUSTMENT REGISTER: LOW BYTE**
**Register Name: ZG_OFFS_USRL Register Type: READ/WRITE Register Address: 24 (Decimal); 18 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:0]**|Z_OFFS_USR[7:0]|Bits 7 to 0 of the 16-bit offset of Z gyroscope (2’s<br>complement). This register is used to remove DC bias from<br>the sensor output. The value in this register is added to the<br>gyroscope sensor value before going into the sensor<br>register.|
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## **9.15 REGISTER 25 – SAMPLE RATE DIVIDER**
**Register Name: SMPLRT_DIV Register Type: READ/WRITE Register Address: 25 (Decimal); 19 (Hex)**
**BIT NAME FUNCTION** Divides the internal sample rate (see register CONFIG) to generate the sample rate that controls sensor data output rate, FIFO sample rate. **NOTE** : This register is only effective when FCHOICE_B register bits are 2’b00, and **[7:0]** SMPLRT_DIV[7:0] (0 < DLPF_CFG < 7). This is the update rate of the sensor register: SAMPLE_RATE = INTERNAL_SAMPLE_RATE / (1 + SMPLRT_DIV) Where INTERNAL_SAMPLE_RATE = 1 kHz **REGISTER 26 – CONFIGURATION Register Name: CONFIG Register Type: READ/WRITE Register Address: 26 (Decimal); 1A (Hex)** ~~sD~~ **BIT NAME FUNCTION [7]** - Default configuration value is 1. User should set it to 0. **[6]** FIFO_MODE When set to ‘1’, when the FIFO is full, additional writes will not be written to FIFO. When set to ‘0’, when the FIFO is full, additional writes will be written to the FIFO, replacing the oldest data. **[5:3]** EXT_SYNC_SET[2:0] Enables the FSYNC pin data to be sampled. **EXT_SYNC_SET FSYNC bit location** 0 function disabled 1 TEMP_OUT_L[0] 2 GYRO_XOUT_L[0] 3 GYRO_YOUT_L[0] 4 GYRO_ZOUT_L[0] 5 ACCEL_XOUT_L[0] 6 ACCEL_YOUT_L[0] 7 ACCEL_ZOUT_L[0] FSYNC will be latched to capture short strobes. This will be done such that if FSYNC toggles, the latched value toggles, but won’t toggle again until the new latched value is captured by the sample rate strobe. **[2:0]** DLPF_CFG[2:0] For the DLPF to be used, FCHOICE_B[1:0] is 2’b00. ~~es~~ See the table below. ~~ies~~ The DLPF is configured by _DLPF_CFG,_ when _FCHOICE_B_ [1:0] = 2b’00. The gyroscope and temperature sensor are filtered according to the value of _DLPF_CFG_ and _FCHOICE_B_ as shown in the table below.
## **9.16 REGISTER 26 – CONFIGURATION**
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|FCHOICE_B|FCHOICE_B|DLPF_CFG|Gyroscope|Gyroscope|Gyroscope|Temperature<br>Sensor|
|---|---|---|---|---|---|---|
|<1>|<0>||3-dB BW<br>(Hz)|Noise BW<br>(Hz)|Rate<br>(kHz)|3-dB BW (Hz)|
|X<br>~~se~~|1<br>~~se~~|X<br>~~se~~|8173<br>~~se~~|8595.1<br>~~se~~|32<br>~~se~~|4000<br>~~se~~|
|1<br>~~sO~~|0<br>~~sO~~|X<br>~~sO~~|3281<br>~~sO~~|3451.0<br>~~sO~~|32<br>~~sO~~|4000<br>~~sO~~|
|0<br>~~sO~~<br>~~ns~~|0<br>~~sO~~|0<br>~~sO~~|250<br>~~sO~~|306.6<br>~~sO~~|8<br>~~sO~~|4000<br>~~sO~~|
|0<br>~~ns~~<br>~~ns~~|0<br>|1<br>|176<br>|177.0<br>|1<br>|188<br>|
|0<br>~~ns~~<br>~~ns~~|0<br>|2<br>|92<br>|108.6<br>|1<br>|98<br>|
|0<br>~~nsse~~|0<br>~~se~~|3<br>~~se~~|41<br>~~se~~|59.0<br>~~se~~|1<br>~~se~~|42<br>~~se~~|
|0<br>~~sO~~|0<br>~~sO~~|4<br>~~sO~~|20<br>~~sO~~|30.5<br>~~sO~~|1<br>~~sO~~|20<br>~~sO~~|
|0<br>~~sO~~<br>~~ns~~|0<br>~~sO~~<br>|5<br>~~sO~~<br>|10<br>~~sO~~<br>|15.6<br>~~sO~~<br>|1<br>~~sO~~<br>|10<br>~~sO~~<br>|
|0<br>~~ns~~|0<br>|6<br>|5<br>|8.0<br>|1<br>|5<br>|
|0<br>~~nssO~~|0<br>~~sO~~|7<br>~~sO~~|3281<br>~~sO~~|3451.0<br>~~sO~~|8<br>~~sO~~|4000<br>~~sO~~|
## **9.17 REGISTER 27 – GYROSCOPE CONFIGURATION**
**Register Name: GYRO_CONFIG Register Type: READ/WRITE Register Address: 27 (Decimal); 1B (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7]**|XG_ST|X Gyro self-test|
|**[6]**|YG_ST|Y Gyro self-test|
|**[5]**|ZG_ST|Z Gyro self-test|
|**[4:3]**|FS_SEL[1:0]|Gyro Full Scale Select:<br>00 = ±250 dps<br>01= ±500 dps<br>10 = ±1000 dps<br>11 = ±2000 dps|
|**[2]**|-|Reserved|
|**[1:0]**|FCHOICE_B[1:0]|Used to bypass DLPF as shown in table 1 above.|
## **9.18 REGISTER 28 – ACCELEROMETER CONFIGURATION**
**Register Name: ACCEL_CONFIG Register Type: READ/WRITE Register Address: 28 (Decimal); 1C (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7]**|XA_ST|X Accel self-test|
|**[6]**|YA_ST|Y Accel self-test|
|**[5]**|ZA_ST|Z Accel self-test|
|**[4:3]**|ACCEL_FS_SEL[1:0]|Accel Full Scale Select:<br>±2g (00),±4g (01),±8g (10),±16g (11)|
|**[2:0]**|-|Reserved|
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## **9.19 REGISTER 29 – ACCELEROMETER CONFIGURATION 2**
**Register Name: ACCEL_CONFIG2 Register Type: READ/WRITE Register Address: 29 (Decimal); 1D (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[5:4]**|DEC2_CFG[1:0]|Averaging filter settings for Low Power Accelerometer mode:<br>0 = Average 4 samples<br>1 = Average 8 samples<br>2 = Average 16 samples<br>3 = Average 32 samples|
|**[3]**|ACCEL_FCHOICE_B|Used to bypass DLPF as shown in the table below.|
|**[2:0]**|A_DLPF_CFG|Accelerometer lowpass filter settingas shown in table 2 below.|
## **Accelerometer Data Rates and Bandwidths (Low-Noise Mode)**
|ACCEL_FCHOICE_B<br>~~a ~~|A_DLPF_CFG<br> ~~eee~~|Accelerometer<br>~~eee~~|Accelerometer<br>~~eee~~|Accelerometer<br>~~eee~~|
|---|---|---|---|---|
|||3-dB BW<br>(Hz)<br>~~eee~~|Noise BW<br>(Hz)<br>~~eee~~|Rate<br>(kHz)<br>~~eee~~|
|1<br>~~a~~|X<br>~~eC~~|1046.0<br>~~eC~~|1100.0<br>~~eC~~|4<br>~~eC~~|
|0<br>~~a ~~<br>~~a~~|0<br> ~~eC~~|218.1<br>~~eC~~|235.0<br>~~eC~~|1<br>~~eC~~|
|0<br>~~a~~|1|218.1|235.0|1|
|0<br>~~a~~|2|99.0|121.3|1|
|0<br>~~es~~|3<br>~~es~~|44.8<br>~~es~~|61.5<br>~~es~~|1<br>~~es~~|
|0<br>~~es~~<br>~~a~~|4<br>~~es~~|21.2<br>~~es~~|31.0<br>~~es~~|1<br>~~es~~|
|0<br>~~a~~<br>~~a~~|5|10.2|15.5|1|
|0<br>~~a~~|6|5.1|7.8|1|
|0<br>~~se~~|7<br>~~se~~|420.0<br>~~se~~|441.6<br>~~se~~|1<br>~~se~~|
The data output rate of the DLPF filter block can be further reduced by a factor of 1/(1+SMPLRT_DIV), where SMPLRT_DIV is an 8-bit integer. Following is a small subset of ODRs that are configurable for the accelerometer in the low-noise mode in this manner (Hz):
## 3.91, 7.81, 15.63, 31.25, 62.50, 125, 250, 500, 1K
The following table lists the approximate accelerometer filter bandwidths available in the low-power mode of operation for some example ODRs.
In the low-power mode of operation, the accelerometer is duty-cycled. The following table shows some example configurations for accelerometer low power mode.
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||~~a~~|~~ee~~|~~ee~~||||
|---|---|---|---|---|---|---|
||**Averages**<br>~~a~~<br>~~a~~|1x<br>~~ee~~<br>~~ee~~|4x<br>~~ee~~<br>~~es~~|8x|16x|32x|
||**ACCEL_FCHOICE_B**<br>~~a~~<br>~~a~~<br>~~a~~|1<br>~~ee~~<br>~~ee~~<br>~~ee~~|0<br>~~ee~~<br>~~es~~|0|0|0|
||**DEC2_CFG**<br>~~a~~<br>~~a~~<br>~~a~~|X<br>~~ee~~<br>~~ee~~<br>~~es~~|0<br>~~es~~|1|2|3|
||**A_DLPF_CFG**<br>~~a~~<br>~~a~~<br>~~a~~|X<br>~~ee~~<br>~~es~~<br>~~es~~|7|7|7|7|
||**Ton (ms)**<br>~~a~~<br>~~a~~<br>~~a~~|1.084<br>~~es~~<br>~~es~~<br>~~es~~|1.84|2.84|4.84|8.84|
||**NBW (Hz)**<br>~~a~~<br>~~a~~<br>~~a~~|1100<br>~~es~~<br>~~es~~<br>~~es~~|442|236|122|62|
||**3-dB BW (Hz)**<br>~~a~~<br>~~a~~|1046<br>~~es~~<br>~~es~~|420|219|111|56|
||**Noise TYP**<br>**(mg-rms)**<br>~~a~~|3.3<br>~~es~~|2.1|1.5|1.1|0.79|
|**SMPLRT_DIV**<br>~~ee~~|**ODR**<br>**(Hz)**|**Low-Power Accelerometer Mode Current Consumption (µA)**|||||
|255<br>~~ee~~|3.91|9.4|10.2|11.5|13.8|18.5|
|127<br>~~ee~~<br>~~ee~~<br>~~ee~~|7.81<br>~~ee~~<br>~~s~~|10.7<br>~~ee~~<br>~~s~~|12.4<br>~~ee~~|14.7<br>~~ee~~|19.6<br>~~ee~~|28.9<br>~~ee~~|
|99<br>~~ee~~<br>~~ee~~|10<br>~~ee~~<br>~~s~~|11.4<br>~~ee~~<br>~~s~~|13.7<br>~~ee~~|16.6<br>~~ee~~|22.6<br>~~ee~~|34.7<br>~~ee~~|
|63<br>~~ee~~<br>~~GG~~|15.63<br>~~s~~<br>~~GG~~|13.3<br>~~s~~<br>~~GG~~|16.7<br>~~GG~~|21.5<br>~~GG~~|30.8<br>~~GG~~|49.7<br>~~GG~~|
|31<br>~~ee~~|31.25<br>~~ee~~|18.3<br>~~ee~~|25.4<br>~~ee~~|34.8<br>~~ee~~|53.6<br>~~ee~~|91.2<br>~~ee~~|
|19<br>~~ee~~<br>~~GG~~|50<br>~~ee~~<br>~~GG~~|24.4<br>~~ee~~<br>~~GG~~|35.8<br>~~ee~~<br>~~GG~~|50.8<br>~~ee~~<br>~~GG~~|80.8<br>~~ee~~<br>~~GG~~|141.1<br>~~ee~~<br>~~GG~~|
|15<br>~~ee~~|62.5<br>~~ee~~|28.4<br>~~ee~~|42.7<br>~~ee~~|61.5<br>~~ee~~|99.0<br>~~ee~~|174.3<br>~~ee~~|
|9<br>~~ee~~<br>~~GG~~|100<br>~~ee~~<br>~~GG~~|40.7<br>~~ee~~<br>~~GG~~|63.5<br>~~ee~~<br>~~GG~~|93.6<br>~~ee~~<br>~~GG~~|153.7<br>~~ee~~<br>~~GG~~|303.3<br>~~ee~~<br>~~GG~~|
|7<br>~~a~~<br>~~ee~~|125|48.8|77.4|114.8|190.1|N/A|
|4<br>~~ee~~<br>~~ee~~|200|73.4|118.8|178.9|299.3||
|3<br>~~ee~~<br>~~ee~~|250|89.6|146.5|221.6|N/A||
|1<br>~~ee~~<br>~~ee~~|500<br>~~ee~~|171.1<br>~~ee~~|284.9<br>~~ee~~|N/A|||
- **9.20 REGISTER 30 – GYROSCOPE LOW POWER MODE CONFIGURATION**
## **Register Name: LP_MODE_CFG Register Type: READ/WRITE Register Address: 30 (Decimal); 1E (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7]**|GYRO_CYCLE|When set to ‘1’ low-powergyroscope mode is enabled. Default settingis ‘0’|
|**[6:4]**|G_AVGCFG[2:0]|Averagingfilter configuration for low-powergyroscope mode. Default settingis ‘000’|
|**[3:0]**|-|Reserved|
To operate in gyroscope low-power mode or 6-axis low-power mode, GYRO_CYCLE should be set to ‘1.’ Gyroscope filter configuration is determined by G_AVGCFG[2:0] that sets the averaging filter configuration. It is not dependent on DLPF_CFG[2:0].
The following table shows some example configurations for gyroscope low power mode.
Page 39 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
|~~|~~|**Averages**|**1x**<br>~~ss~~|**2x**<br>~~ss~~|**4x**<br>~~ss~~|**8x**<br>~~ss~~|**16x**<br>~~ss~~|**32x**<br>~~ss~~|**64x**<br>~~ss~~|**128x**<br>~~ss~~|
|---|---|---|---|---|---|---|---|---|---|
|~~|~~<br>~~fF~~|**G_AVGCFG**|0<br>~~ss~~<br>~~es~~|1<br>~~ss~~|2<br>~~ss~~|3<br>~~ss~~|4<br>~~ss~~|5<br>~~ss~~|6<br>~~ss~~|7<br>~~ss~~|
|~~|~~<br>~~fF~~<br>~~|~~|**NBW(Hz)**|650.8<br>~~ss~~<br>~~es~~<br>~~Re~~|407.1<br>~~ss~~<br>~~Re~~|224.2<br>~~ss~~<br>~~ss~~|117.4<br>~~ss~~<br>~~ss~~|60.2<br>~~ss~~<br>~~ss~~|30.6<br>~~ss~~|15.6<br>~~ss~~|8.0<br>~~ss~~|
|~~fF~~<br>~~|~~|**3-dB BW(Hz)**|622<br>~~es~~<br>~~Re~~|391<br>~~Re~~|211<br>~~ss~~|108<br>~~ss~~|54<br>~~ss~~|27|14|7|
|~~|~~|**Noise TYP**<br>**(dps-rms)**|0.10<br>~~Re~~|0.08<br>~~Re ~~|0.06<br> ~~ss~~|0.04<br>~~ss~~|0.03<br>~~ss~~|0.02|0.016|0.011|
|**SMPLRT_DIV**<br>~~eo~~|**ODR(Hz)**|**Low-Power Gyroscope Mode Current Consumption(mA)**<br>~~C(O~~||||||||
|255<br>~~ee~~<br>~~eo~~|3.9<br>~~ee ~~|0.79<br> ~~GQ~~|0.80<br>~~GQ~~|0.80<br>~~GQ~~|0.82<br>~~GQ~~|0.85<br>~~GQ~~<br>~~C(O~~|0.90<br>~~GQ~~<br>~~C(O~~|1.01<br>~~GQ~~|1.23<br>~~GQ~~|
|99<br>~~eo~~<br>~~ee~~<br>~~pO~~|10.0<br>~~PG~~|0.81<br>~~PG~~|0.82<br>~~PG~~|0.84<br>~~PG~~<br>~~QQ~~|0.87<br>~~PG~~<br>~~QQ~~|0.95<br>~~C(O~~<br>~~PG~~<br>~~QQ~~|1.09<br>~~C(O~~<br>~~PG~~<br>~~QO~~|1.37<br>~~PG~~|1.94<br>~~PG~~|
|65<br>~~eo~~<br>~~ee~~<br>~~pO~~|15.2<br>~~PG~~|0.83<br>~~PG~~|0.84<br>~~PG~~|0.87<br>~~PG~~<br>~~QQ~~|0.92<br>~~PG~~<br>~~QQ~~|1.03<br>~~C(O~~<br>~~PG~~<br>~~QQ~~|1.24<br>~~C(O~~<br>~~PG~~<br>~~QO~~|1.67<br>~~PG~~|2.53<br>~~PG~~|
|64<br>~~ee~~<br>~~pO~~<br>~~pO~~|15.4<br>~~PG~~|0.83<br>~~PG~~|0.84<br>~~PG~~|0.87<br>~~PG~~<br>~~QQ~~|0.92<br>~~PG~~<br>~~QQ~~|1.03<br>~~PG~~<br>~~QQ~~|1.25<br>~~PG~~<br>~~QO~~|1.69<br>~~PG~~|N/A<br>~~PG~~|
|33<br>~~pO~~<br>~~pO~~|29.4|0.87|0.90|0.95<br>~~QQ~~|1.05<br>~~QQ~~|1.26<br>~~QQ~~|1.68<br>~~QO~~|2.51|N/A|
|32<br>~~pO~~<br>~~se~~<br>~~po~~|30.3<br>~~se~~<br>~~po~~|0.87<br>~~Ge~~|0.90<br>~~Ge ~~|0.95<br> ~~GC~~|1.06<br>~~GC~~|1.28|1.70|N/A|N/A|
|19<br>~~po~~<br>~~es~~|50.0<br>~~po~~<br>~~QQ~~|0.93<br>~~QQ~~|0.98<br>~~QQ~~|1.06<br>~~QQ~~|1.24<br>~~QQ~~|1.60<br>~~QQ~~|2.30<br>~~QQ~~|N/A|N/A|
|17<br>~~po~~<br>~~es~~<br>~~es~~|55.6<br>~~po~~<br>~~QQ~~<br>~~eG~~|0.95<br>~~QQ~~<br>~~eG~~|1.00<br>~~QQ~~<br>~~eG~~|1.10<br>~~QQ~~<br>~~eG~~|1.29<br>~~QQ~~<br>~~eG~~|1.69<br>~~QQ~~<br>~~eG~~|2.47<br>~~QQ~~|N/A|N/A|
|16<br>~~es~~<br>~~es~~<br>~~eG~~|58.8<br>~~QQ~~<br>~~eG~~<br>~~eG~~|0.96<br>~~QQ~~<br>~~eG~~<br>~~Qe~~|1.01<br>~~QQ~~<br>~~eG~~<br>~~Qe~~|1.11<br>~~QQ~~<br>~~eG~~<br>~~CO~~|1.32<br>~~QQ~~<br>~~eG~~<br>~~CO~~|1.74<br>~~QQ~~<br>~~eG~~|N/A<br>~~QQ~~|N/A|N/A|
|9<br>~~es~~<br>~~eG~~<br>~~es~~|100.0<br>~~eG~~<br>~~eG~~<br>~~es~~|1.08<br>~~eG~~<br>~~Qe~~|1.17<br>~~eG~~<br>~~Qe~~|1.35<br>~~eG~~<br>~~CO~~|1.70<br>~~eG~~<br>~~CO~~|2.41<br>~~eG~~|N/A|N/A|N/A|
|7<br>~~eG~~<br>~~es~~<br>~~es~~|125.0<br>~~eG~~<br>~~es~~<br>~~es~~|1.16<br>~~Qe~~|1.27<br>~~Qe~~|1.49<br>~~CO~~|1.93<br>~~CO~~|N/A|N/A|N/A|N/A|
|6<br>~~es~~<br>~~es~~<br>~~es~~|142.9<br>~~es~~<br>~~es~~<br>~~es~~|1.21|1.34|1.59|2.09|N/A|N/A|N/A|N/A|
|4<br>~~es~~<br>~~es~~<br>~~es~~|200.0<br>~~es~~<br>~~es~~<br>~~ee~~|1.38|1.56|1.91|N/A|N/A|N/A|N/A|N/A|
|3<br>~~es~~<br>~~es~~|250.0<br>~~es~~<br>~~ee~~<br>~~ee~~|1.53|1.75|2.19|N/A|N/A|N/A|N/A|N/A|
|2<br>~~es~~<br>~~ee~~|333.3<br>~~ee~~<br>~~ee~~<br>~~ee~~|1.78<br>~~ee~~|2.07<br>~~ee~~|N/A|N/A|N/A|N/A|N/A|N/A|
## **9.21 REGISTER 32 – WAKE-ON MOTION THRESHOLD: X-AXIS ACCELEROMETER**
**Register Name: ACCEL_WOM_X_THR Register Type: READ/WRITE Register Address: 32 (Decimal); 20 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:0]**|WOM_X_TH[7:0]|This register holds the threshold value for the Wake on Motion Interrupt for X-axis<br>accelerometer.|
## **9.22 REGISTER 33 – WAKE-ON MOTION THRESHOLD: Y-AXIS ACCELEROMETER**
**Register Name: ACCEL_WOM_Y_THR Register Type: READ/WRITE Register Address: 33 (Decimal); 21 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:0]**|WOM_Y_TH[7:0]|This register holds the threshold value for the Wake on Motion Interrupt for Y-axis<br>accelerometer.|
## **9.23 REGISTER 34 – WAKE-ON MOTION THRESHOLD: Z-AXIS ACCELEROMETER**
**Register Name: ACCEL_WOM_Z_THR Register Type: READ/WRITE Register Address: 34 (Decimal); 22 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:0]**|WOM_Z_TH[7:0]|This register holds the threshold value for the Wake on Motion Interrupt for Z-axis<br>accelerometer.|
Page 40 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **9.24 REGISTER 35 – FIFO ENABLE**
**Register Name: FIFO_EN Register Type: READ/WRITE**
**Register Address: 35 (Decimal); 23 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:5]**|-|Reserved|
|**[4]**|GYRO_FIFO_EN|1 – write TEMP_OUT_H, TEMP_OUT_L, GYRO_XOUT_H, GYRO_XOUT_L, GYRO_YOUT_H,<br>GYRO_YOUT_L, GYRO_ZOUT_H, and GYRO_ZOUT_L to the FIFO at the sample rate; If<br>enabled, buffering of data occurs even if data path is in standby.<br>0 – function is disabled|
|**[3]**|ACCEL_FIFO_EN|1 – write ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H, ACCEL_YOUT_L,<br>ACCEL_ZOUT_H, ACCEL_ZOUT_L, TEMP_OUT_H, and TEMP_OUT_L to the FIFO at the<br>sample rate;<br>0 – function is disabled|
|**[2:0]**|-|Reserved|
**NOTE** : If both GYRO_FIFO_EN And ACCEL_FIFO_EN are 1, write ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H, ACCEL_YOUT_L, ACCEL_ZOUT_H, ACCEL_ZOUT_L, TEMP_OUT_H, TEMP_OUT_L, GYRO_XOUT_H, GYRO_XOUT_L, GYRO_YOUT_H, GYRO_YOUT_L, GYRO_ZOUT_H, and GYRO_ZOUT_L to the FIFO at the sample rate.
## **9.25 REGISTER 54 – FSYNC INTERRUPT STATUS**
**Register Name: FSYNC_INT Register Type: READ to CLEAR Register Address: 54 (Decimal); 36 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7]**|FSYNC_INT|This bit automatically sets to 1 when a FSYNC interrupt has been generated. The bit clears<br>to 0 after the register has been read.|
## **9.26 REGISTER 55 – INT/DRDY PIN / BYPASS ENABLE CONFIGURATION**
**Register Name: INT_PIN_CFG Register Type: READ/WRITE Register Address: 55 (Decimal); 37 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7]**|INT_LEVEL|1 – The logic level for INT/DRDY pin is active low.<br>0 – The logic level for INT/DRDYpin is active high.|
|**[6]**|INT_OPEN|1 – INT/DRDY pin is configured as open drain.<br>0 – INT/DRDYpin is configured aspush-pull.|
|**[5]**|LATCH_INT_EN|1 – INT/DRDY pin level held until interrupt status is cleared.<br>0 – INT/DRDYpin indicates interruptpulse’s width is 50us.|
|**[4]**|INT_RD_CLEAR|1 – Interrupt status is cleared if any read operation is performed.<br>0 – Interrupt status is cleared onlybyreadingINT_STATUS register|
|**[3]**|FSYNC_INT_LEVEL|1 – The logic level for the FSYNC pin as an interrupt is active low.<br>0 – The logic level for the FSYNCpin as an interrupt is active high.|
|**[2]**|FSYNC_INT_MODE_EN|When this bit is equal to 1, the FSYNC pin will trigger an interrupt when it transitions to the<br>level specified by F_SYNC_INT_LEVEL_. When this bit is equal to 0, the FSYNC pin is disabled<br>from causingan interrupt.|
|**[1:0]**|-|Reserved.|
Page 41 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **9.27 REGISTER 57 – FIFO WATERMARK INTERRUPT STATUS**
**Register Name: FIFO_WM_INT_STATUS Register Type: READ to CLEAR Register Address: 57 (Decimal); 39 (Hex) BIT NAME FUNCTION [6]** FIFO_WM_INT FIFO Watermark interrupt status. Cleared on Read. ~~a~~
## **9.28 REGISTER 58 – INTERRUPT STATUS**
**Register Name: INT_STATUS Register Type: READ to CLEAR Register Address: 58 (Decimal); 3A (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7]**|WOM_X_INT|X-axis accelerometer WoM interrupt status. Cleared on Read.|
|**[6]**|WOM_Y_INT|Y-axis accelerometer WoM interrupt status. Cleared on Read.|
|**[5]**|WOM_Z_INT|Z-axis accelerometer WoM interrupt status. Cleared on Read.|
|**[4]**|FIFO_OFLOW_INT|This bit automatically sets to 1 when a FIFO buffer overflow has been generated. The bit<br>clears to 0 after the register has been read.|
|**[3]**|-|Reserved.|
|**[2]**|GDRIVE_INT|Gyroscope Drive System Readyinterrupt|
|**[1]**|-|Reserved|
|**[0]**|DATA_RDY_INT|This bit automatically sets to 1 when a Data Ready interrupt is generated. The bit clears to<br>0 after the register has been read.|
## **9.29 REGISTERS 59 TO 64 – ACCELEROMETER MEASUREMENTS: X-AXIS HIGH BYTE**
**Register Name: ACCEL_XOUT_H Register Type: READ only Register Address: 59 (Decimal); 3B (Hex) BIT NAME FUNCTION** ~~EeE—cAEeer~~ **[7:0]** ACCEL_XOUT[15:8] High byte of accelerometer x-axis data. ~~SS s—'~~ **Register Name: ACCEL_XOUT_L Register Type: READ only Register Address: 60 (Decimal); 3C (Hex) BIT NAME FUNCTION [7:0]** ACCEL_XOUT[7:0] Low byte of accelerometer x-axis data. ~~EE EEOe~~
**Register Name: ACCEL_YOUT_H Register Type: READ only Register Address: 61 (Decimal); 3D (Hex) BIT NAME FUNCTION** ~~—anmvnanVe~~ **[7:0]** ACCEL_YOUT[15:8] High byte of accelerometer y-axis data. ~~SS emis—~~ **Register Name: ACCEL_YOUT_L Register Type: READ only Register Address: 62 (Decimal); 3E (Hex)**
**BIT NAME FUNCTION** ~~ar~~ **[7:0]** ACCEL_YOUT[7:0] Low byte of accelerometer y ~~ON~~ -axis data. ~~“—ms'~~
Page 42 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
**Register Name: ACCEL_ZOUT_H Register Type: READ only**
**Register Address: 63 (Decimal); 3F (Hex)**
**BIT NAME FUNCTION [7:0]** ACCEL_ZOUT[15:8] High byte of accelerometer z-axis data. ~~SE~~
**Register Name: ACCEL_ZOUT_L**
**Register Type: READ only Register Address: 64 (Decimal); 40 (Hex) BIT NAME FUNCTION [7:0]** ACCEL_ZOUT[7:0] Low byte of accelerometer z-axis data. ~~eS~~
## **9.30 REGISTERS 65 TO 66 – TEMPERATURE MEASUREMENT**
**Register Name: TEMP_OUT_H Register Type: READ only Register Address: 65 (Decimal); 41 (Hex)**
**BIT NAME FUNCTION** ~~a~~ **[7:0]** TEMP_OUT[15:8] Low byte of the temperature sensor output
**Register Name: TEMP_OUT_L Register Type: READ only Register Address: 66 (Decimal); 42 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:0]**|TEMP_OUT[7:0]|High byte of the temperature sensor output<br>**TEMP_degC**<br>= (TEMP_OUT[15:0]/Temp_Sensitivity) +<br>RoomTemp_Offset<br>where Temp_Sensitivity = 326.8 LSB/ºC and<br>RoomTemp_Offset = 25ºC|
## **9.31 REGISTERS 67 TO 72 – GYROSCOPE MEASUREMENT**
**Register Name: GYRO_XOUT_H Register Type: READ only Register Address: 67 (Decimal); 43 (Hex)**
**BIT NAME FUNCTION** ~~ee~~ **[7:0]** GYRO_XOUT[15:8] High byte of the X-Axis gyroscope output
**Register Name: GYRO_XOUT_L Register Type: READ only Register Address: 68 (Decimal); 44 (Hex)**
**BIT NAME FUNCTION** Low byte of the X-Axis gyroscope output **GYRO_XOUT =** Gyro_Sensitivity * X_angular_rate **[7:0]** GYRO_XOUT[7:0] Nominal FS_SEL = 0 Conditions Gyro_Sensitivity = 131 LSB/(º/s)
**Register Name: GYRO_YOUT_H Register Type: READ only Register Address: 69 (Decimal); 45 (Hex)**
**BIT NAME FUNCTION** ~~eT~~ **[7:0]** GYRO_YOUT[15:8] High byte of the Y-Axis gyroscope output
Page 43 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
**Register Name: GYRO_YOUT_L Register Type: READ only Register Address: 70 (Decimal); 46 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:0]**|GYRO_YOUT[7:0]|Low byte of the Y-Axis gyroscope output<br>**GYRO_YOUT =**<br>Gyro_Sensitivity * Y_angular_rate<br>Nominal<br>Conditions<br>FS_SEL = 0<br>Gyro_Sensitivity= 131 LSB/(º/s)|
**Register Name: GYRO_ZOUT_H Register Type: READ only Register Address: 71 (Decimal); 47 (Hex)**
**BIT NAME FUNCTION [7:0]** GYRO_ZOUT[15:8] High byte of the Z-Axis gyroscope output ~~eSJaQ &A'V.tuuu_—’”~~ **Register Name: GYRO_ZOUT_L Register Type: READ only Register Address: 72 (Decimal); 48 (Hex)**
~~ee~~ **BIT NAME FUNCTION** Low byte of the Z-Axis gyroscope output **[7:0]** GYRO_ZOUT[7:0] **GYRO_ZOUT =** Gyro_Sensitivity * Z_angular_rate Nominal FS_SEL = 0 ~~|-——a~~ Conditions Gyro_Sensitivity = 131 LSB/(º/s)
## **9.32 REGISTER 80 TO 82 – GYROSCOPE SELF-TEST REGISTERS**
**Register Name: SELF_TEST_X_GYRO, SELF_TEST_Y_GYRO, SELF_TEST_Z_GYRO Type: READ/WRITE**
**Register Address: 80, 81, 82 (Decimal); 50, 51, 52 (Hex)**
|**REGISTER**|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|---|
|SELF_TEST_X_GYRO|[7:0]|XG_ST_DATA[7:0]|The value in this register indicates the self-test output generated during<br>manufacturing tests. This value is to be used to check against<br>subsequent self-test outputsperformed bythe end user.|
|SELF_TEST_Y_GYRO|[7:0]|YG_ST_DATA[7:0]|The value in this register indicates the self-test output generated during<br>manufacturing tests. This value is to be used to check against<br>subsequent self-test outputsperformed bythe end user.|
|SELF_TEST_Z_GYRO|[7:0]|ZG_ST_DATA[7:0]|The value in this register indicates the self-test output generated during<br>manufacturing tests. This value is to be used to check against<br>subsequent self-test outputsperformed bythe end user.|
The equation to convert self-test codes in OTP to factory self-test measurement is:
_ST_ OTP_ (2620 / 2 _FS_ ) *.101( _ST_ code_ 1) (lsb)
where ST_OTP is the value that is stored in OTP of the device, FS is the Full Scale value, and ST_code is based on the Self-Test value (ST_ FAC) determined in InvenSense’s factory final test and calculated based on the following equation:
**==> picture [249 x 31] intentionally omitted <==**
Page 44 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **9.33 REGISTER 96 TO 97 – FIFO WATERMARK THRESHOLD IN NUMBER OF BYTES**
**Register Name: FIFO_WM_TH1 Register Type: READ/WRITE Register Address: 96 (Decimal); 60 (Hex)**
**BIT NAME FUNCTION** FIFO watermark threshold in number of bytes. Watermark interrupt is **[1:0]** FIFO_WM_TH[9:8] disabled if the threshold is set to “0”. Default value is 00000000.
**Register Name: FIFO_WM_TH2 Register Type: READ/WRITE Register Address: 97 (Decimal); 61 (Hex)**
**BIT NAME FUNCTION** FIFO watermark threshold in number of bytes. Watermark interrupt is **[7:0]** FIFO_WM_TH[7:0] disabled if the threshold is set to “0”. Default value is 00000000. ~~a~~ The register FIFO_WM_TH[9:0] sets the FIFO watermark threshold level (0 - 1023). User should ensure that bit 7 of register 0x1A is set to 0 before using this feature. When the FIFO count is at or above the watermark level (FIFO_COUNT[15:0] ≥ FIFO_WM_TH[9:0]) and the system is not in the middle of a FIFO read, an interrupt is triggered. The interrupt will set the FIFO watermark interrupt status register field FIFO_WM_INT = 1, and the INT pin will issue a pulse if configured in pulse mode, or set to the active level if configured in latch mode. Register bit FIFO_WM_INT is not read-to-clear, unlike the other interrupts. Rather, whenever FIFO_R_W register is read, FIFO_WM_INT status bit is cleared automatically. At the same time, the INT pin will be cleared as well if it is configured in latch mode.
The FIFO watermark interrupt and the INT pin are cleared upon the first read (and only the first read) of the FIFO. If, at the end of the FIFO read, the FIFO count is at or above the watermark level, the interrupt status bit and INT pin will again be set. If the INT pin is configured for latched operation, it will wait until the host completes the read to set to the active level.
## **9.34 REGISTER 104 – SIGNAL PATH RESET**
**Register Name: SIGNAL_PATH_RESET Register Type: READ/WRITE Register Address: 104 (Decimal); 68 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:2]**|-|Reserved|
|**[1]**|ACCEL_RST|Reset accel digital signal path.**NOTE**: Sensor registers are not cleared. Use SIG_COND_RST to<br>clear sensor registers.|
|**[0]**|TEMP_RST|Reset temp digital signal path.**NOTE**:Sensor registers are not cleared. Use SIG_COND_RST to<br>clear sensor registers.|
## **9.35 REGISTER 105 – ACCELEROMETER INTELLIGENCE CONTROL**
**Register Name: ACCEL_INTEL_CTRL Register Type: READ/WRITE**
**Register Address: 105 (Decimal); 69 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7]**|ACCEL_INTEL_EN|This bit enables the Wake-on-Motion detection logic|
|**[6]**|ACCEL_INTEL_MODE|0 – Do not use<br>1 – Compare the current sample with theprevious sample|
|**[5:2]**|-|Reserved|
|**[1]**|OUTPUT_LIMIT|To avoid limiting sensor output to less than 0x7FFF, set this bit to 1. This should be done<br>everytime the ICM-20602 ispowered up.|
|**[0]**|WOM_TH_MODE|0 – Set WoM interrupt on the OR of all enabled accelerometer thresholds<br>1 – Set WoM interrupt on the AND of all enabled accelerometer threshold<br>Default settingis 0|
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **9.36 REGISTER 106 – USER CONTROL**
**Register Name: USER_CTRL Register Type: READ/WRITE Register Address: 106 (Decimal); 6A (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7]**|-|Reserved|
|**[6]**|FIFO_EN|1 – Enable FIFO operation mode.<br>0 – Disable FIFO access from serial interface.|
|**[5]**|-|Reserved|
|**[4]**|-|Reserved|
|**[3]**|-|Reserved|
|**[2]**|FIFO_RST|1 – Reset FIFO module. Reset is asynchronous. This bit auto clears after one clock cycle of<br>the internal 20 MHz clock.|
|**[1]**|-|Reserved|
|**[0]**|SIG_COND_RST|1 – Reset all gyro digital signal path, accel digital signal path, and temp digital signal path.<br>This bit also clears all the sensor registers.|
## **9.37 REGISTER 107 – POWER MANAGEMENT 1**
**Register Name: PWR_MGMT_1 Register Type: READ/WRITE Register Address: 107 (Decimal); 6B (Hex)**
|**BIT**|**NAME**|**FUNCTION**|**FUNCTION**|**FUNCTION**|**FUNCTION**|
|---|---|---|---|---|---|
|**[7]**|DEVICE_RESET|1 – Reset the internal registers and restores the default settings. The bit automatically clears<br>to 0 once the reset is done.||||
|**[6]**|SLEEP|When set to 1,the chipis set to sleepmode.||||
|**[5]**|CYCLE|When set to 1, and SLEEP and STANDBY are not set to 1, the chip will cycle between sleep<br>and taking a single accelerometer sample at a rate determined by SMPLRT_DIV<br>**NOTE**: When all accelerometer axes are disabled via PWR_MGMT_2 register bits and cycle is enabled,<br>the chip will wake up at the rate determined by the respective registers above, but will not take any<br>samples.||||
|**[4]**|GYRO_STANDBY|When set, the gyro drive and pll circuitry are enabled, but the sense paths are disabled. This<br>is a lowpower mode that allowsquick enablingof thegyros.||||
|**[3]**|TEMP_DIS|When set to 1,this bit disables the temperature sensor.||||
|**[2:0]**|CLKSEL[2:0]||**Code**|**Clock Source**||
||||0|Internal 20 MHz oscillator||
||||1|Auto selects the best available clock source – PLL if ready, else use the Internal<br>oscillator||
||||2|Auto selects the best available clock source – PLL if ready, else use the Internal<br>oscillator||
||||3|Auto selects the best available clock source – PLL if ready, else use the Internal<br>oscillator||
||||4|Auto selects the best available clock source – PLL if ready, else use the Internal<br>oscillator||
||||5|Auto selects the best available clock source – PLL if ready, else use the Internal<br>oscillator||
||||6|Internal 20 MHz oscillator||
||||7|Stops the clock and keeps timing generator in reset||
**NOTE** : The default value of CLKSEL[2:0] is 001. It is required that CLKSEL[2:0] be set to 001 to achieve full gyroscope performance.
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_**ICM-20602**_
## **9.38 REGISTER 108 – POWER MANAGEMENT 2**
**Register Name: PWR_MGMT_2 Register Type: READ/WRITE**
**Register Address: 108 (Decimal); 6C (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7]**|-|Reserved|
|**[6]**|-|Reserved|
|**[5]**|STBY_XA|1 – X accelerometer is disabled<br>0 – X accelerometer is on|
|**[4]**|STBY_YA|1 – Y accelerometer is disabled<br>0 – Y accelerometer is on|
|**[3]**|STBY_ZA|1 – Z accelerometer is disabled<br>0 – Z accelerometer is on|
|**[2]**|STBY_XG|1 – X gyro is disabled<br>0 – Xgyro is on|
|**[1]**|STBY_YG|1 – Y gyro is disabled<br>0 – Ygyro is on|
|**[0]**|STBY_ZG|1 – Z gyro is disabled<br>0 – Zgyro is on|
## **9.39 REGISTER 112 – I[2] C INTERFACE**
**Register Name: I2C_IF Register Type: READ/WRITE Register Address: 112 (Decimal); 70 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7]**|-|Reserved|
|**[6]**|I2C_IF_DIS|1 – Disable I2C Slave module andput the serial interface in SPI mode only.|
|**[5:0]**|-|Reserved|
## **9.40 REGISTER 114 AND 115 – FIFO COUNT REGISTERS**
**Register Name: FIFO_COUNTH Register Type: READ Only Register Address: 114 (Decimal); 72 (Hex) BIT NAME FUNCTION** High Bits, count indicates the number of written bytes in the FIFO. **[7:0]** FIFO_COUNT[15:8] Reading this byte latches the data for both FIFO_COUNTH, and FIFO_COUNTL. ~~a~~ **Register Name: FIFO_COUNTL Register Type: READ Only Register Address: 115 (Decimal); 73 (Hex) BIT NAME FUNCTION** Low Bits, count indicates the number of written bytes in the FIFO. **NOTE** : Must read **[7:0]** FIFO_COUNT[7:0] FIFO_COUNTL to latch new data for both FIFO_COUNTH and FIFO_COUNTL. ~~a~~
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_**ICM-20602**_
## **9.41 REGISTER 116 – FIFO READ WRITE**
**Register Name: FIFO_R_W Register Type: READ/WRITE Register Address: 116 (Decimal); 74 (Hex)**
**BIT NAME FUNCTION [7:0]** FIFO_DATA[7:0] Read/Write command provides Read or Write operation for the FIFO.
## **Description:**
This register is used to read and write data from the FIFO buffer.
Data is written to the FIFO in order of register number (from lowest to highest). If all the FIFO enable flags (see below) are enabled, the contents of registers 59 through 72 will be written in order at the Sample Rate.
The contents of the sensor data registers (Registers 59 to 72) are written into the FIFO buffer when their corresponding FIFO enable flags are set to 1 in FIFO_EN (Register 35).
If the FIFO buffer has overflowed, the status bit _FIFO_OFLOW_INT_ is automatically set to 1. This bit is located in INT_STATUS (Register 58). When the FIFO buffer has overflowed, the oldest data will be lost and new data will be written to the FIFO unless register 26 CONFIG, bit[6] FIFO_MODE = 1.
If the FIFO buffer is empty, reading register FIFO_DATA will return a unique value of 0xFF until new data is available. Normal data is precluded from ever indicating 0xFF, so 0xFF gives a trustworthy indication of FIFO empty.
## **9.42 REGISTER 117 – WHO AM I**
**Register Name: WHO_AM_I Register Type: READ only Register Address: 117 (Decimal); 75 (Hex)**
|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|**[7:0]**|WHOAMI|Register to indicate to user which device is beingaccessed.|
This register is used to verify the identity of the device. The contents of _WHOAMI_ is an 8-bit device ID. The default value of the register is 0x12. This is different from the I[2] C address of the device as seen on the slave I[2] C controller by the applications processor. The I[2] C address of the ICM-20602 is 0x68 or 0x69 depending upon the value driven on AD0 pin.
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **9.43 REGISTERS 119, 120, 122, 123, 125, 126 – ACCELEROMETER OFFSET REGISTERS**
**Register Name: XA_OFFSET_H Register Type: READ/WRITE**
**Register Address: 119 (Decimal); 77 (Hex)**
**BIT NAME FUNCTION** Upper bits of the X accelerometer offset cancellation. ±16g Offset cancellation in all Full **[7:0]** XA_OFFS[14:7] ~~————_——~~ Scale modes, 15 bit 0.98-mg steps **Register Name: XA_OFFSET_L Register Type: READ/WRITE Register Address: 120 (Decimal); 78 (Hex) BIT NAME FUNCTION** Lower bits of the X accelerometer offset cancellation. ±16g Offset cancellation in all Full **[7:1]** XA_OFFS[6:0] Scale modes, 15 bit 0.98-mg steps **[0]** - Reserved. ~~a~~ **Register Name: YA_OFFSET_H Register Type: READ/WRITE Register Address: 122 (Decimal); 7A (Hex)**
**BIT NAME FUNCTION** Upper bits of the Y accelerometer offset cancellation. ±16g Offset cancellation in all Full **[7:0]** YA_OFFS[14:7] ~~—_——~~ Scale modes, 15 bit 0.98-mg steps **Register Name: YA_OFFSET_L Register Type: READ/WRITE Register Address: 123 (Decimal); 7B (Hex) BIT NAME FUNCTION** Lower bits of the Y accelerometer offset cancellation. ±16g Offset cancellation in all Full **[7:1]** YA_OFFS[6:0] Scale modes, 15 bit 0.98-mg steps **[0]** - Reserved. ~~a~~ **Register Name: ZA_OFFSET_H Register Type: READ/WRITE**
**Register Address: 125 (Decimal); 7D (Hex)**
**BIT NAME FUNCTION** Upper bits of the Z accelerometer offset cancellation. ±16g Offset cancellation in all Full **[7:0]** ZA_OFFS[14:7] ~~—_—__—~~ Scale modes, 15 bit 0.98-mg steps **Register Name: ZA_OFFSET_L Register Type: READ/WRITE Register Address: 126 (Decimal); 7E (Hex) BIT NAME FUNCTION** Lower bits of the Z accelerometer offset cancellation. ±16g Offset cancellation in all Full **[7:1]** ZA_OFFS[6:0] Scale modes, 15 bit 0.98-mg steps **[0]** - Reserved. ~~a~~
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## _**10 USE NOTES**_
## **10.1 TEMPERATURE SENSOR DATA**
Temperature sensor data goes into the FIFO whenever the FIFO is enabled and there is a sensor active unless the temperature is explicitly disabled.
## **10.2 ACCELEROMETER-ONLY LOW-NOISE MODE**
The first output sample in Accelerometer-Only Low-Noise Mode after wake up from sleep always has 1 ms delay, independent of ODR.
## **10.3 ACCELEROMETER LOW-POWER MODE**
Changing the value of SMPLRT_DIV register in Accelerometer Low-Power mode will take effect after up to one sample at the old ODR.
## **10.4 SENSOR MODE CHANGE**
When switching from low-power modes to low-noise modes, unsettled output samples may be observed at the gyroscope or accelerometer outputs due to filter switching and settling. The number of unsettled output samples depends on the filter and ODR settings. The number of unsettled output samples is minimized by selecting the widest low-noise-mode filter bandwidth consistent with the chosen ODR.
## **10.5 TEMP SENSOR DURING GYROSCOPE STANDBY MODE**
During transition from Gyro Low power mode (GYRO_CYCLE=1), to Gyro Standby mode, in addition to the Gyro axis (axes) being turned off, the Temp Sensor will also be turned off if the Accel is disabled. In order to keep the temp sensor on during Gyroscope standby mode when Accel is disabled, the following procedure should be followed:
- Set GYRO_CYCLE = 0 at least one ODR cycle prior to entering Standby mode
- At least one of the Gyro axis is ON prior to entering Standby mode
- Set GYRO_STANDBY = 1
## **10.6 GYROSCOPE MODE CHANGE**
Gyroscope will take one ODR clock period to switch from Low-Noise to Low-Power mode after GYRO_CYCLE bit is set. If GYRO_CYCLE is set to 1 prior to turning on the gyroscope, the first sample will be from low-noise mode, which may not be a settled value. It is therefore recommended to ignore the first reading in this case.
## **10.7 POWER MANAGEMENT 1 REGISTER SETTING**
It is required to set CLKSEL[2:0] to 001 (auto-select) for full performance.
## **10.8 UNLISTED REGISTER LOCATIONS**
Do not read unlisted register locations in Sleep mode as this may cause the device to hang up, requiring power cycle to restore operation.
## **10.9 CLOCK TRANSITION WHEN GYROSCOPE IS TURNED OFF**
When the gyroscope is on, the on-chip master clock source will be the gyroscope clock (assuming CLKSEL[2:0] = 001 for auto-select mode); otherwise, the master clock source will be the internal oscillator as long as the part is not in Sleep mode. During a power mode transition, whenever the gyroscope is disabled and the part enters a mode other than Sleep, the on-chip master clock source will transition from the gyroscope clock to the internal oscillator. It will take about 20 µs for this transition to complete.
## **10.10 SLEEP MODE**
The part will only enter Sleep mode when the SLEEP bit in PWR_MGMT_2 is set to ‘1’. If SLEEP bit is ‘0’ and bit STBY_[X,Y,Z]A and STBY_[X,Y,Z]G are all set to ‘1’, accelerometer and gyroscope will be turned off, but the on-chip master clock will still be running and consuming power.
## **10.11 NO SPECIAL OPERATION NEEDED FOR FIFO READ IN LOW POWER MODE**
The use of FIFO is enabled in all modes including low power mode.
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_**ICM-20602**_
## **10.12 GYROSCOPE STANDBY PROCEDURE**
The follow precaution and procedure must be followed while using the Gyroscope Standby mode: Precaution to follow while entering Standby Mode:
- The user will ensure that at least one gyro axis is ON when setting gyro_standby = 1.
## Procedure to transition from Gyro Standby to Gyro off:
- The user should set gyro_standby = 0 first
- Next, turn off gyro x/y/z.
Page 51 of 57
Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## _**11 ASSEMBLY**_
This section provides general guidelines for assembling InvenSense Micro Electro-Mechanical Systems (MEMS) gyros packaged in LGA package.
## **11.1 ORIENTATION OF AXES**
The diagram below shows the orientation of the axes of sensitivity and the polarity of rotation. Note the pin 1 identifier (•) in the Figure 13.
**==> picture [147 x 120] intentionally omitted <==**
**----- Start of picture text -----**<br>
+Z<br>+Z +Y<br>+Y<br>+X +X<br>12<br>ICM-20602<br>**----- End of picture text -----**<br>
**Figure 13. Orientation of Axes of Sensitivity and Polarity of Rotation**
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## **12.1 PACKAGE DIMENSIONS**
16 Lead LGA (3x3x0.75) mm NiAu pad finish
**Figure 14. Package Dimensions**
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_**ICM-20602**_
|~~ee~~<br>~~a~~|**SYMBOLS**<br>~~ee~~<br>~~a~~|**DIMENSIONS IN MILLIMETERS**<br>~~pO~~|**DIMENSIONS IN MILLIMETERS**<br>~~pO~~|**DIMENSIONS IN MILLIMETERS**<br>~~pO~~|
|---|---|---|---|---|
|||**MIN**<br>~~pO~~<br>~~a~~|**NOM**<br>~~pO~~<br>~~ee~~|**MAX**<br>~~pO~~<br>~~ee~~|
|**Total Thickness**<br>~~ee~~<br>~~a~~|**A**<br>~~ee~~<br>~~a~~|0.7<br>~~pO~~<br>~~a~~|0.75<br>~~pO~~<br>~~ee~~|0.8<br>~~pO~~<br>~~ee~~|
|**Substrate Thickness**<br>~~ee~~<br>~~eG~~|**A1**<br>~~ee~~<br>~~eG~~|0.105 REF<br>~~pO~~<br>~~eG~~|||
|**Mold Thickness**<br>~~pr~~|**A2**<br>~~pr~~|0.63 REF<br>~~pr~~|||
|**Body Size**<br>~~——~~<br>~~es~~|**D**<br>~~——~~<br>~~ee~~<br>|2.9<br>~~ee~~|3<br>~~ee~~|3.1<br>~~——~~|
||**E**<br>~~——~~<br>~~ee~~<br>~~ee~~|2.9<br>~~ee~~|3<br>~~ee~~<br>~~J~~|3.1<br>~~——~~<br>~~J~~|
|**Lead Width**<br>~~es~~|**W**<br>~~ee~~<br>~~ee~~|0.2<br>~~ee~~|0.25<br>~~ee~~<br>~~J~~|0.3<br>~~——~~<br>~~J~~|
|**Lead Length**<br>~~es~~<br>~~es~~|**L**<br>~~ee ~~<br>~~ee~~<br>~~es~~|0.3<br> ~~ee~~<br>~~es~~|0.35<br>~~ee~~<br>~~J~~|0.4<br>~~——~~<br>~~J~~|
|**Lead Pitch**<br>~~oo~~|**e**<br>~~a~~<br>~~oo~~|0.5 BSC<br>~~oo~~|||
|**Lead Count**<br>~~oo~~|**n**<br>~~oo~~|16<br>~~oo~~|||
|**Edge Ball Center to Center**<br>~~a~~<br>~~**ee**~~|**D1**<br>~~a~~|2 BSC|||
||**E1**<br>~~a~~<br>~~P|~~<br>~~es~~<br>~~es~~|1 BSC<br>~~es~~<br>~~eee~~|||
|**Body Center to Contact Ball**<br>~~**ee**~~|**SD**<br>~~es~~<br>~~es~~|---<br>~~es~~<br>~~eee~~|||
||**SE**<br>~~es~~<br>~~es~~|---<br>~~es~~<br>~~eee~~|||
|**Ball Width**<br>~~**ee**~~<br>~~—~~|**b**<br>~~es~~<br>~~es~~<br>~~po~~|---<br>~~es~~<br>~~eee~~<br>~~po~~|---<br>~~es~~<br>~~eee~~<br>~~po~~|---<br>~~es~~<br>~~eee~~<br>~~po~~|
|**Ball Diameter**<br>~~**ee**~~<br>~~—~~<br>~~$$~~|~~es~~<br>~~es ~~<br>~~po~~|---<br>~~es~~<br> ~~eee~~<br>~~po~~<br>~~IT~~|||
|**Ball Opening**<br>~~—~~<br>~~$$~~|~~po~~|---<br>~~po~~<br>~~IT~~|||
|**Ball Pitch**<br>~~$$~~<br>~~BY~~<br>~~Po~~|**e1**<br>~~BY~~|---<br>~~IT~~<br>~~[|~~<br>~~a~~|||
|**Ball Count**<br>~~$$~~<br>~~BY~~<br>~~Po~~|**n1**<br>~~BY~~|---<br>~~IT~~<br>~~[|~~<br>~~a~~|||
|**Pre-Solder**<br>~~$$~~<br>~~BY~~<br>~~Po~~<br>~~—————————~~<br>~~——~~|~~BY~~<br>~~—————————~~<br>|---<br>~~IT~~<br>~~a~~<br>~~—————————~~<br>|---<br>~~IT~~<br>~~—————————~~<br>|---<br>~~IT~~<br>~~[|~~<br>~~—————————~~<br>|
|**Package Edge Tolerance**<br>~~BY~~<br>~~Po~~<br>~~—————————~~<br>~~——~~|**aaa**<br>~~BY~~<br>~~—————————~~<br>|0.1<br>~~[|~~<br>~~a~~<br>~~—————————~~<br>|||
|**Mold Flatness**<br>~~——a~~<br>~~ee~~|**bbb**<br>~~a~~|0.2<br>~~TTT~~<br>~~TT~~|||
|**Coplanarity**<br>~~——a~~<br>~~ee~~<br>~~$$~~|**ddd**<br>~~a~~|0.08<br>~~TTT~~<br>~~TT~~<br>~~es~~|||
|**Ball Offset(Package)**<br>~~——a~~<br>~~ee~~<br>~~$$~~<br>~~ee~~|**eee**<br>~~a~~<br>~~eee~~|---<br>~~TTT~~<br>~~TT~~<br>~~es~~<br>~~eee~~|||
|**Ball Offset(Ball)**<br>~~a~~<br>~~ee~~<br>~~$$~~<br>~~ee~~|**fff**<br>~~a ~~<br>~~eee~~|---<br> ~~TTT~~<br>~~TT~~<br>~~es~~<br>~~eee~~|||
|**Lead Edge to Package Edge **<br>~~ee~~<br>~~$$~~<br>~~ee~~<br>~~Po~~|**M**<br>~~eee~~|0.05<br>~~TT~~<br>~~eee~~|0.1<br>~~TT~~<br>~~es~~<br>~~eee~~|0.15<br>~~TT~~|
**Table 16. Package Dimensions Table**
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_**ICM-20602**_
## _**13 PART NUMBER PACKAGE MARKING**_
The part number package marking for ICM-20608 devices is summarized below:
|**PART NUMBER**||||**PART NUMBER PACKAGE MARKING**|
|---|---|---|---|---|
|ICM-20602||||I62|
||**TOP VIEW**||||
||I62|||Part Number|
||X X X X|||Lot Traceability Code|
||AWW||||
|A = Assembly Sublot Number|||||
|WW = Work Week|||||
**Figure 15. Part Number Package Marking**
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_**ICM-20602**_
## _**14 REVISION HISTORY**_
|**REVISION DATE**|**REVISION**|**DESCRIPTION**|
|---|---|---|
|10/03/2016|1.0|Initial Release|
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
_**ICM-20602**_
## _**15 ENVIRONMENTAL COMPLIANCE**_
The ICM-20602 is RoHS and Green compliant. The ICM-20602 is in full environmental compliance as evidenced in report HS-ICM20602A, Materials Declaration Data Sheet.
## **Environmental Declaration Disclaimer:**
InvenSense believes this environmental information to be correct but cannot guarantee accuracy or completeness. Conformity documents for the above component constitutes are on file. InvenSense subcontracts manufacturing and the information contained herein is based on data received from vendors and suppliers, which has not been validated by InvenSense.
This information furnished by InvenSense is believed to be accurate and reliable. However, no responsibility is assumed by InvenSense for its use, or for any infringements of patents or other rights of third parties that may result from its use. Specifications are subject to change without notice. InvenSense reserves the right to make changes to this product, including its circuits and software, in order to improve its design and/or performance, without prior notice. InvenSense makes no warranties, neither expressed nor implied, regarding the information and specifications contained in this document. InvenSense assumes no responsibility for any claims or damages arising from information contained in this document, or from the use of products and services detailed therein. This includes, but is not limited to, claims or damages based on the infringement of patents, copyrights, mask work and/or other intellectual property rights.
Certain intellectual property owned by InvenSense and described in this document is patent protected. No license is granted by implication or otherwise under any patent or patent rights of InvenSense. This publication supersedes and replaces all information previously supplied. Trademarks that are registered trademarks are the property of their respective companies. InvenSense sensors should not be used or sold in the development, storage, production or utilization of any conventional or mass-destructive weapons or for any other weapons or life threatening applications, as well as in any other life critical applications such as medical equipment, transportation, aerospace and nuclear instruments, undersea equipment, power plant equipment, disaster prevention and crime prevention equipment.
©2016 InvenSense, Inc. All rights reserved. InvenSense, Sensing Everything, MotionTracking, MotionProcessing, MotionProcessor, MotionFusion, MotionApps, Digital Motion Processor, and the InvenSense logo are trademarks of InvenSense, Inc. Other company and product names may be trademarks of the respective companies with which they are associated.
©2016 InvenSense, Inc. All rights reserved.
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Document Number: DS-000176 Revision: 1.0 Revision Date: 10/03/2016
Updated at April 17, 2026
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