ICE40UP5K-SG48I
FPGA, iCE40 UltraPlus, PLL39 I/O, 133 MHz, 5280 Cells, 1.14 V to 1.26 V, QFN-48
- Manufacturer: LATTICE SEMICONDUCTOR
- Product type: FPGAs
- MSL: MSL 3 - 168 hours
- SVHC: No SVHC (25-Jun-2025)
- FPGA Type: SRAM based FPGA
- FPGA Family: iCE40 UltraPlus
- IC Mounting: Surface Mount
- No. of Pins: 48Pins
- Speed Grade: -
- No. of I/O's: 39I/O's
- Product Range: iCE40 UltraPlus iCE40UP
- Qualification: -
- Total RAM Bits: 120Kbit
- No.of User I/Os: 39I/O's
- Clock Management: PLL
- Logic Case Style: QFN
- IC Case / Package: QFN
- No. of Macrocells: 5280Macrocells
- I/O Supply Voltage: 3.46V
- No. of Logic Cells: 5280Logic Cells
- Process Technology: 40nm (CMOS)
- No. of Logic Blocks: 5280
- Core Supply Voltage Max: 1.26V
- Core Supply Voltage Min: 1.14V
- Operating Frequency Max: 133MHz
- Operating Temperature Max: 100°C
- Operating Temperature Min: -40°C
| Delivery and price | |
|---|---|
| Units per pack | 100 |
| Price | 8.98 € |
| Current stock | 10+ |
| Lead time | 30 days |
Updated at April 17, 2026
Lattice Semiconductor is a premier developer of low-power, programmable design solutions, specializing in Field-Programmable Gate Arrays (FPGAs) and Programmable Logic Devices (PLDs). Recognized for driving innovation in cost-effective and power-efficient architectures, the company provides essential semiconductor components for consumer, mobile, and industrial design applications. Our selection of Lattice Semiconductor products is focused on their highly regarded FPGA integrated circuits. Devices from industry-leading families like the iCE40, MachXO, and LatticeECP series offer designers an exceptional combination of high system integration and industry-low power consumption. These FPGAs are engineered to handle complex tasks such as sensor management, custom connectivity, and advanced video processing while minimizing overall board footprint. To ensure seamless integration from concept to production, Lattice backs its hardware with a comprehensive support ecosystem. Engineers can accelerate their development cycles utilizing intuitive tools like the Lattice Diamond design software, paired with flexible IP cores and reference designs that reduce design risk and increase system reliability.
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