# Power MOSFET, N Channel, 55 V, 75 A, 6000 µohm, TO-220AB, Through Hole ![Product image](https://novapart.co/image/farnell:9845755/) **URL**: https://novapart.co/products/HUF75345P3/power-mosfet-n-channel-55-v-75-a-6000-ohm-to-220ab **SKU**: HUF75345P3 **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €1.0800 **Stock**: 200+ **Lead Time**: 134 days (indicative) ## Description Transistor Polarity:N Channel; Continuous Drain Current Id:75A; Drain Source Voltage Vds:55V; On Resistance Rds(on):0.006ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Power Dissipation P ## Specifications | Parameter | Value | |---|---| | Msl | - | | Svhc | Lead (25-Jun-2025) | | No. Of Pins | 3Pins | | Channel Type | N Channel | | Product Range | - | | Qualification | - | | Power Dissipation | 215W | | Transistor Mounting | Through Hole | | Rds(On) Test Voltage | 10V | | Transistor Case Style | TO-220AB | | Drain Source Voltage Vds | 55V | | Operating Temperature Max | 175°C | | Continuous Drain Current Id | 75A | | Drain Source On State Resistance | 6000µohm | | Gate Source Threshold Voltage Max | 4V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:9845755/) ## **Is Now Part of** **To learn more about ON Semiconductor, please visit our website at www.onsemi.com** ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. _**HUF75345G3, HUF75345P3, HUF75345S3S**_ ## _**Data Sheet**_ ## _**October 20 13**_ ## _**N-Channel UltraFET Power MOSFET 55 V, 75 A, 7 m**_ Ω These N-Channel power MOSFETs are manufactured using the innovative UltraFET process. This advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where power efficiency is important, such as switching regulators, switching converters, motor drivers, relay drivers, low-voltage bus switches, and power management in portable and battery-operated products. ## _**Features**_ - 75A, 55V - Simulation Models - Temperature Compensated PSPICE® and SABER™ Models - Thermal Impedance SPICE and SABER Models Available on the WEB at: www.fairchildsemi.com - Peak Current vs Pulse Width Curve - UIS Rating Curve - Related Literature - TB334, “Guidelines for Soldering Surface Mount Components to PC Boards” Formerly developmental type TA75345. ## _**Ordering Information**_ |**PART NUMBER**|**PACKAGE**|**BRAND**| |---|---|---| |HUF75345G3|TO-247|75345G| |HUF75345P3|TO-220AB|75345P| |HUF75345S3ST|TO-263AB|75345S| **==> picture [43 x 12] intentionally omitted <==** **----- Start of picture text -----**
Symbol
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**==> picture [36 x 64] intentionally omitted <==** **----- Start of picture text -----**
D
G
S
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## _**Packaging**_ **==> picture [123 x 128] intentionally omitted <==** **----- Start of picture text -----**
JEDEC STYLE TO-247
ree
DRAIN
(TAB)
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**==> picture [307 x 197] intentionally omitted <==** **----- Start of picture text -----**
JEDEC TO-220AB
SOURCE SOURCE
DRAIN DRAIN
GATE
GATE
DRAIN
(FLANGE)
*
JEDEC TO-263AB
DRAIN
GATE (FLANGE)
SOURCE ~ ~
**----- End of picture text -----**
**Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html For severe environments, see our Automotive HUFA series. All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.** ©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. C0 ## _**HUF75345G3, HUF75345P3, HUF75345S3S**_ **Absolute Maximum Ratings** TC = 25[o] C, Unless Otherwise Specified |**Absolute Maximum Ratings** TC = 25C = 25= 25[o]C, Unless Otherwise Specified||| |---|---|---| |||**UNITS**| |Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS|55|V| |Drain to Gate Voltage (RGS= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR|55|V| |Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS|±20|V| |Drain Current||| |Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID|75|A| |Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM|Figure 4|| |Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS|Figure 6|| |Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD|325|W| |Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .|2.17|W/oC| |Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG|-55 to 175|oC| |Maximum Temperature for Soldering||| |Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL|300|oC| |Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg|260|oC| _CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied._ NOTE: 1. TJ = 25[o] C to 150[o] C. |**Electrical Specifications**
TC= 25oC, Unless Otherwise Specified|C, Unless Otherwise Specified|C, Unless Otherwise Specified|C, Unless Otherwise Specified||||| |---|---|---|---|---|---|---|---| |**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**||**MIN**|**TYP**|**MAX**|**UNITS**| |**OFF STATE SPECIFICATIONS**|||||||| |Drain to Source Breakdown Voltage|BVDSS|ID= 250µA, VGS= 0V (Figure 11)||55|-|-|V| |Zero Gate Voltage Drain Current|IDSS|VDS= 50V, VGS= 0V||-|-|1|µA| |||VDS= 45V, VGS= 0V, TC= 150oC||-|-|250|µA| |Gate to Source Leakage Current|IGSS|VGS=±20V||-|-|±100|nA| |**ON STATE SPECIFICATIONS**|||||||| |Gate to Source Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250µA (Figure 10)||2|-|4|V| |Drain to Source On Resistance|rDS(ON)|ID= 75A, VGS= 10V (Figure 9)||-|0.006|0.007|Ω| |**THERMAL SPECIFICATIONS**|||||||| |Thermal Resistance Junction to Case|RθJC|(Figure 3)||-|-|0.46|oC/W| |Thermal Resistance Junction to Ambient|RθJA|TO-247||-|-|30|oC/W| |||TO-220, TO-263||-|-|62|oC/W| |**SWITCHING SPECIFICATIONS** (VGS= 10V)|||||||| |Turn-On Time|tON|VDD= 30V, ID≅75A,
RL= 0.4Ω, VGS=10V,
RGS= 2.5Ω||-|-|195|ns| |Turn-On Delay Time|td(ON)|||-|14|-|ns| |Rise Time|tr|||-|118|-|ns| |Turn-Off Delay Time|td(OFF)|||-|42|-|ns| |Fall Time|tf|||-|26|-|ns| |Turn-Off Time|tOFF|||-|-|98|ns| |**GATE CHARGE SPECIFICATIONS**|||||||| |Total Gate Charge|Qg(TOT)|VGS= 0V to 20V|VDD= 30V,
ID≅75A,
RL= 0.4Ω
Ig(REF)= 1.0mA
(Figure 13)|-|220|275|nC| |Gate Charge at 10V|Qg(10)|VGS= 0V to 10V||-|125|165|nC| |Threshold Gate Charge|Qg(TH)|VGS= 0V to 2V||-|6.8|10|nC| |Gate to Source Gate Charge|Qgs|||-|14|-|nC| |Gate to Drain “Miller” Charge|Qgd|||-|58|-|nC| ©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. C0 _**HUF75345G3, HUF75345P3, HUF75345S3S**_ ## **Electrical Specifications** TC = 25[o] C, Unless Otherwise Specified **(Continued)** |**Electrical Specifications**
TC = 25C = 25= 25[o]C, Unless Otherwise Specified|C, Unless Otherwise Specified|C, Unless Otherwise Specified **(Continued)**||||| |---|---|---|---|---|---|---| |**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**| |**CAPACITANCE SPECIFICATIONS**||||||| |Input Capacitance|CISS|VDS= 25V, VGS= 0V,
f = 1MHz
(Figure 12)|-|4000|-|pF| |Output Capacitance|COSS||-|1450|-|pF| |Reverse Transfer Capacitance|CRSS||-|450|-|pF| ## **Source to Drain Diode Specifications** |**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**| |---|---|---|---|---|---|---| |Source to Drain Diode Voltage|VSD|ISD= 75A|-|-|1.25|V| |Reverse Recovery Time|trr|ISD= 75A, dISD/dt = 100A/µs|-|-|55|ns| |Reverse Recovered Charge|QRR|ISD= 75A, dISD/dt = 100A/µs|-|-|80|nC| ## _**Typical Performance Curves**_ **==> picture [496 x 383] intentionally omitted <==** **----- Start of picture text -----**
1.2 80
1.0
PET TTT) = 60 =6FPrTah
0.8 PIN
Tt tt
0.6 IN 40
CoN C ULT [EEE]
0.4 IN
Poe NX 20 OE
0.2
0 pititiii 0
0 25 50 75 100 125 150 N 175 25 50 75 100 125 150 175
cores} = ELE
TC, CASE TEMPERATURE ( [o] C) TC, CASE TEMPERATURE ( [o] C)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE
2
DUTY CYCLE - DESCENDING ORDER
1 0.5
0.2 ——EEE———————————
0.1
0.05
0.02
0.01
P DM
Se aan
0.1
ee ee ee ee
t 1
t 2
cs A a ee NOTES:
DUTY FACTOR: D = t 1 /t 2
Deer SINGLE PULSE Pt PEAK TJ = PDM x Z θ JC x R θ JC + TC
0.01 ae |
10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 10 [0] 10 [1]
t, RECTANGULAR PULSE DURATION (s)
, DRAIN CURRENT (A)
ID
POWER DISSIPATION MULTIPLIER
, NORMALIZED
JC
θ
Z
THERMAL IMPEDANCE
**----- End of picture text -----**
**FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE** ©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. C0 _**HUF75345G3, HUF75345P3, HUF75345S3S**_ ## _**Typical Performance Curves**_ **(Continued)** **==> picture [496 x 576] intentionally omitted <==** **----- Start of picture text -----**
2000
TC = 25 [o] C FOR TEMPERATURES
ABOVE 25 [o] C DERATE PEAK
1000 CURRENT AS FOLLOWS:
I = I25 175 - T C
V GS = 20V 150
\ eeei
VGS = 10V
TRANSCONDUCTANCE FHSS
MAY LIMIT CURRENT
100
IN THIS REGION
50
10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 10 [0] 10 [1]
t, PULSE WIDTH (s)
FIGURE 4. PEAK CURRENT CAPABILITY
1000
1000 If R = 0
TJ = MAX RATED t AV = (L)(I AS )/(1.3*RATED BV DSS - V DD )
TC = 25 [o] C If R ≠ 0
tAV = (L/R)ln[(IAS * R)/(1.3 * RATED BVDSS - VDD) +1]
100 100 µ s
100
1ms STARTING TJ = 25 [o] C
10
OPERATION IN THIS 10ms
AREA MAY BELIMITED BY r DS(ON) STARTING TJ = 150 [o] C
VDSS(MAX) = 55V
1 HoH 10 COIS RN
1 10 100 200 0.01 0.1 1 10 100
VDS, DRAIN TO SOURCE VOLTAGE (V) tAV, TIME IN AVALANCHE (ms)
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
150 150
VGS = 20V PULSE DURATION = 80 µ s
VGS = 10V DUTY CYCLE = 0.5% MAX
120
VGS = 7V VGS = 5V 120
V GS = 6V
90 |),Biz ee 90 ee ae
60 We 60 Sn
25 [o] C
30 30
PULSE DURATION = 80 µ s
DUTY CYCLE = 0.5% MAX 175 [o] C
0 fpPo TC = 25 [o] C 0 ie,_A ie -55 [o] C | VDD = 15V |
0 1 2 3 4 0 1.5 3.0 4.5 6.0 7.5
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)
, PEAK CURRENT (A)
IDM
, DRAIN CURRENT (A)
ID , AVALANCHE CURRENT (A)IAS
, DRAIN CURRENT (A)ID , DRAIN CURRENT (A)ID
**----- End of picture text -----**
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322. **FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY** **FIGURE 7. SATURATION CHARACTERISTICS** **FIGURE 8. TRANSFER CHARACTERISTICS** ©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. C0 _**HUF75345G3, HUF75345P3, HUF75345S3S**_ ## _**Typical Performance Curves**_ **(Continued)** **==> picture [496 x 375] intentionally omitted <==** **----- Start of picture text -----**
2.5 1.2
PULSE DURATION = 80 µ s, VGS = 10V, ID = 75A VGS = VDS, ID = 250 µ A
DUTY CYCLE = 0.5% MAX
2.0 1.0
1.5 0.8
1.0 0.6
0.5 0.4
-80 -40 0 40 80 120 160 200 -80 -40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE ( [o] C) TJ, JUNCTION TEMPERATURE ( [o] C)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
RESISTANCE vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE
1.3 7000
ID = 250 µ A VGS = 0V, f = 1MHz
6000 CISS = CGS + CGD
1.2 . [TT] CRSS = CGD
5000 Qo COSS ≈ CDS + CGD
CISS
1.1
4000 AS
3000
1.0 PA
A
2000
COSS
0.9
1000 Nee
CRSS
0.8 0 ee
-80 -40 0 40 80 120 160 200 0 10 20 30 40 50 60
TJ, JUNCTION TEMPERATURE ( [o] C) VDS, DRAIN TO SOURCE VOLTAGE (V)
ON RESISTANCE
NORMALIZED GATE
THRESHOLD VOLTAGE
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE C, CAPACITANCE (pF)
NORMALIZED DRAIN TO SOURCE
**----- End of picture text -----**
**FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN** **FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE** **VOLTAGE vs JUNCTION TEMPERATURE** **==> picture [229 x 162] intentionally omitted <==** **----- Start of picture text -----**
10
VDD = 30V
8 pi)| | TA
6
_|| [A
4
WAVEFORMS IN
DESCENDING ORDER:
2 I D = 75A
ID = 55A
ID = 35A
ID = 20A
0 f o o
0 25 50 75 100 125
Qg, GATE CHARGE (nC)
, GATE TO SOURCE VOLTAGE (V)
GS
V
**----- End of picture text -----**
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260. **FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT** ©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. C0 _**HUF75345G3, HUF75345P3, HUF75345S3S**_ ## _**Test Circuits and Waveforms**_ **==> picture [220 x 129] intentionally omitted <==** **----- Start of picture text -----**
VDS
L
VARY tP TO OBTAIN +
REQUIRED PEAK IAS RG VDD
VGS -
DUT
tP
0V IAS
0.01 Ω
**----- End of picture text -----**
**==> picture [210 x 126] intentionally omitted <==** **----- Start of picture text -----**
BVDSS
tP
VDS
IAS
VDD
0
tAV
**----- End of picture text -----**
**FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT** **FIGURE 15. UNCLAMPED ENERGY WAVEFORMS** **==> picture [481 x 155] intentionally omitted <==** **----- Start of picture text -----**
VDS
RL VDD Qg(TOT)
VDS
VGS = 20V
VGS + Qg(10)
- VDD VGS VGS = 10V
DUT VGS = 2V
IG(REF) 0 Qg(TH)
Qgs Qgd
Ig(REF)
0
| i
**----- End of picture text -----**
**FIGURE 16. GATE CHARGE TEST CIRCUIT** **FIGURE 17. GATE CHARGE WAVEFORM** **==> picture [482 x 142] intentionally omitted <==** **----- Start of picture text -----**
VDS tON tOFF
td(ON) td(OFF)
RL tr tf
VDS
90% 90%
+
VGS
VDD 10% 10%
- 0
DUT 90%
RGS
VGS 50% 50%
PULSE WIDTH
VGS 0 10%
**----- End of picture text -----**
**FIGURE 18. SWITCHING TIME TEST CIRCUIT** **FIGURE 19. RESISTIVE SWITCHING WAVEFORMS** ©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. C0 _**HUF75345G3, HUF75345P3, HUF75345S3S**_ ## _**PSPICE Electrical Model**_ .SUBCKT HUF75345 2 1 3 ; rev 3 Feb 99 CA 12 8 5.55e-9 CB 15 14 5.55e-9 CIN 6 8 3.45e-9 **==> picture [498 x 315] intentionally omitted <==** **----- Start of picture text -----**
CIN 6 8 3.45e-9 LDRAIN
DPLCAP 5 DRAIN
2
10
DBODY 7 5 DBODYMOD RLDRAIN
DBREAK 5 11 DBREAKMOD RSLC1
DPLCAP 10 5 DPLCAPMOD 51 DBREAK
RSLC2
5
51 ESLC 11
EBREAK 11 7 17 18 56.7
EDS 14 8 5 8 1EGS 13 8 6 8 1ESG 6 10 6 8 1 ESG - 6 RDRAIN50 EBREAK +1718 DBODY
EVTHRES 6 21 19 8 1 8 -
EVTEMP 20 6 18 22 1 + EVTHRES+ 19 - 21 16 MWEAK
LGATE EVTEMP 8
IT 8 17 1 GATE1 RGATE + 1822 - 6 MMED
9 20
MSTRO
LDRAIN 2 5 1e-9 RLGATE
LGATE 1 9 2.6e-9 LSOURCE
LSOURCE 3 7 1.1e-9KGATE LSOURCE LGATE 0.0085 CIN 8 7 SOURCE3
RSOURCE
MMED 16 6 8 8 MMEDMOD RLSOURCE
MSTRO 16 6 8 8 MSTROMOD S1A S2A
MWEAK 16 21 8 8 MWEAKMOD 12 13 14 15 RBREAK
17 18
8 13
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 1e-4 S1B S2B RVTEMP
RGATE 9 20 0.36 13 CB 19
CA
RLDRAIN 2 5 10 + + 14 IT on -
RLGATE 1 9 26 6 5 VBAT
RLSOURCE 3 7 11 EGS 8 EDS 8 +
RSLC1 5 51 RSLCMOD 1e-6RSLC2 5 50 1e3 - - 8
22
RSOURCE 8 7 RSOURCEMOD 3.15e-3
RVTHRES
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
+
-
**----- End of picture text -----**
S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 22 19 DC 1 ## ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*500),3.5))} .MODEL DBODYMOD D (IS = 6e-12 RS = 1.4e-3 IKF = 20 XTI = 5 TRS1 = 2.75e-3 TRS2 = 5.0e-6 CJO = 5.5e-9 TT = 5.9e-8 M = 0.5 VJ = 0.75) .MODEL DBREAKMOD D (RS = 2.8e-2 IKF = 30 TRS1 = -4.0e-3 TRS2 = 1.0e-6) .MODEL DPLCAPMOD D (CJO = 6.75e-9 IS = 1e-30 M = 0.88 VJ = 1.45 FC = 0.5) .MODEL MMEDMOD NMOS (VTO = 2.93 KP = 13.75 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 0.36) .MODEL MSTROMOD NMOS (VTO = 3.23 KP = 96 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u Lambda = 0.06) .MODEL MWEAKMOD NMOS (VTO = 2.35 KP =0.02 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 3.6) .MODEL RBREAKMOD RES (TC1 = 8.0e-4 TC2 = 4.0e-6) .MODEL RDRAINMOD RES (TC1 = 1.5e-1 TC2 = 6.5e-4) .MODEL RSLCMOD RES (TC1 = 1.0e-4 TC2 = 1.05e-6) .MODEL RSOURCEMOD RES (TC1 = 1.0e-3 TC2 = 0) .MODEL RVTHRESMOD RES (TC1 = -1.5e-3 TC2 = -2.6e-5) .MODEL RVTEMPMOD RES (TC1 = -2.75e-3 TC2 = 1.45e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -9.00 VOFF= -4.00) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.00 VOFF= -9.00) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.00 VOFF= 0.50) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.50 VOFF= 0.00) ## .ENDS NOTE: For further discussion of the PSPICE model, consult **A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options** ; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. ©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. C0 _**HUF75345G3, HUF75345P3, HUF75345S3S**_ ## _**SABER Electrical Model**_ REV 3 February 1999 template huf75345 n2, n1, n3 electrical n2, n1, n3 { var i iscl d..model dbodymod = (is = 6e-12, xti = 5, cjo = 5.5e-9, tt = 5.9e-8, m=0.5, vj=0.75) d..model dbreakmod = () d..model dplcapmod = (cjo = 6.75e-9, is = 1e-30, m = 0.88, vj = 1.45,fc=0.5) m..model mmedmod = (type=_n, vto = 2.93, kp = 13.75, is = 1e-30, tox = 1) **==> picture [498 x 329] intentionally omitted <==** **----- Start of picture text -----**
m..model mstrongmod = (type=_n, vto = 3.23, kp = 96, is=1e-30,tox=1,
lambda = 0.06) LDRAIN
m..model mweakmod = (type=_n, vto = 2.35, kp = 0.02, is = 1e-30, tox = 1) DPLCAP 5 DRAIN2
sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -9, voff = -4) 10
sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = -4, voff = -9) RLDRAIN
sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = 0, voff = 0.5)sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0.5, voff = 0) 51RSLC1 RDBREAK
RSLC2
c.ca n12 n8 = 5.55e-9 ISCL 72 RDBODY
c.cb n15 n14 = 5.55e-9
c.cin n6 n8 = 3.45e-9 - 50 DBREAK
6 RDRAIN 71
ESG 11
d.dbody n7 n71 = model=dbodymod 8
d.dbreak n72 n11 = model=dbreakmod + EVTHRES 16
d.dplcap n10 n5 = model=dplcapmod LGATE EVTEMP + 198 - 21 MWEAK DBODY
i.it n8 n17 = 1 GATE1 9RGATE20+ 1822 - 6 MMED EBREAK+
l.ldrain n2 n5 = 1e-9 RLGATE MSTRO 17
18
l.lgate n1 n9 = 2.6e-9l.lsource n3 n7 = 1.1e-9k.k1 i(l.lgate) i(l.lsource) = l(l.lgate), l(l.lsource), 0.0085 LY CIN 8 - [ 7 LSOURCE SOURCE3
RSOURCE
m.mmed n16 n6 n8 n8 = model=mmedmod, l = 1u, w = 1u RLSOURCE
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l = 1u, w = 1um.mweak n16 n21 n8 n8 = model=mweakmod, l = 1u, w = 1u 12S1A13 14S2A 15 17 RBREAK 18
8 13
res.rbreak n17 n18 = 1, tc1 = 8e-4, tc2 = 4e-6 S1B S2B RVTEMP
res.rdbody n71 n5 = 1.4e-3, tc1 = 2.75e-3, tc2 = 5e-6 13 CB 19
res.rdbreak n72 n5 = 2.8e-2, tc1 = -4e-3, tc2 = 1e-6res.rdrain n50 n16 = 1e-4, tc1 = 1.5e-1, tc2 = 6.5e-4 CA ea + + 14 l IT -
res.rgate n9 n20 = 0.36res.rldrain n2 n5 = 10 EGS 68 EDS 58 + VBAT
res.rlgate n1 n9 = 26 - - 8
res.rlsource n3 n7 = 11 22
res.rslc1 n5 n51 = 1e-6, tc1 = 1e-4, tc2 = 1.05e-6 RVTHRES
res.rslc2 n5 n50 = 1e3
res.rsource n8 n7 = 3.15e-3, tc1 = 1e-3, tc2 = 0
res.rvtemp n18 n19 = 1, tc1 = -2.75e-3, tc2 = 1.45e-6
res.rvthres n22 n8 = 1, tc1 = -1.5e-3, tc2 = -2.6e-5
**----- End of picture text -----**
spe.ebreak n11 n7 n17 n18 = 56.7 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc = 1 equations { i (n51->n50) + = iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/500))** 3.5)) } } ©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. C0 _**HUF75345G3, HUF75345P3, HUF75345S3S**_ ## _**SPICE Thermal Model**_ **th JUNCTION** REV 5 February 1999 HUF75345 CTHERM1 th 6 6.3e-3 **RTHERM1 CTHERM1** CTHERM2 6 5 1.5e-2 CTHERM3 5 4 2.0e-2 CTHERM4 4 3 3.0e-2 **6** CTHERM5 3 2 8.0e-2 CTHERM6 2 tl 1.5e-1 RTHERM1 th 6 5.0e-3 **RTHERM2 CTHERM2** RTHERM2 6 5 1.8e-2 RTHERM3 5 4 5.0e-2 RTHERM4 4 3 8.5e-2 **5** RTHERM5 3 2 1.0e-1 RTHERM6 2 tl 1.1e-1 **RTHERM3 CTHERM3** _**SABER Thermal Model**_ SABER thermal model HUF75345 **4** template thermal_model th tl thermal_c th, tl { **RTHERM4 CTHERM4** ctherm.ctherm1 th 6 = 6.3e-3 ctherm.ctherm2 6 5 = 1.5e-2 ctherm.ctherm3 5 4 = 2.0e-2 ctherm.ctherm4 4 3 = 3.0e-2 **3** ctherm.ctherm5 3 2 = 8.0e-2 ctherm.ctherm6 2 tl = 1.5e-1 **RTHERM5 CTHERM5** rtherm.rtherm1 th 6 = 5.0e-3 rtherm.rtherm2 6 5 = 1.8e-2 rtherm.rtherm3 5 4 = 5.0e-2 rtherm.rtherm4 4 3 = 8.5e-2 **2** rtherm.rtherm5 3 2 = 1.0e-1 rtherm.rtherm6 2 tl = 1.1e-1 } **RTHERM6 CTHERM6 tl CASE** ©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. C0 _**HUF75345G3, HUF75345P3, HUF75345S3S**_ ## **Mechanical Dimensions** ## TO-220 3L ## **Figure 20. TO-220, Molded, 3Lead, Jedec Variation AB** Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: _http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT220-003_ Dimension in Millimeters ©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. C0 _**HUF75345G3, HUF75345P3, HUF75345S3S**_ ## **TRADEMARKS** The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. **==> picture [435 x 196] intentionally omitted <==** **----- Start of picture text -----**
||||||||| |---|---|---|---|---|---|---|---| |AccuPower™|F-PFS™|Sync-Lock™| |AX-CAP|[®]|*|FRFET|[®]|tm|[®]|®*| |BitSiC™|Global Power Resource|[SM]|PowerTrench|[®]| |E|GENERALSYSTEM| |Build it Now™|GreenBridge™|PowerXS™| |CorePLUS™|Green FPS™|Programmable Active Droop™|TinyBoost|[®]| |CorePOWER™|Green FPS™ e-Series™|QFET|[®]|TinyBuck|[®]| |CROSSVOLT|™|G|max|™|QS™|TinyCalc™| |CTL™|GTO™|Quiet Series™|TinyLogic|[®]| |TINYOPTO™| |Current Transfer Logic™|IntelliMAX™|RapidConfigure™| |DEUXPEED|[®]|ISOPLANAR™|™|TinyPower™| |Dual Cool™|Marking Small Speakers Sound Louder|)|TinyPWM™| |EcoSPARK|[®]|and Better™|Saving our world, 1mW/W/kW at a time™|TinyWire™TranSiC™| |EfficentMax™|MegaBuck™|SignalWise™|TriFault Detect™| |ESBC™|MICROCOUPLER™|SmartMax™|TRUECURRENT|[®]|*| |®|MicroFET™MicroPak™|SMART START™Solutions for Your Success™|SerDes™| |Fairchild|[®]|MicroPak2™|SPM|[®]| |Fairchild Semiconductor|[®]|MillerDrive™|STEALTH™|124...| |FACT Quiet Series™|MotionMax™|SuperFET|[®]|UHC|[®]| |FACT|[®]|mWSaver|[®]|SuperSOT™-3|Ultra FRFET™| |FAST|[®]|OptoHiT™|SuperSOT™-6|UniFET™| |FastvCore™|OPTOLOGIC|[®]|SuperSOT™-8|VCX™| |FETBench™|OPTOPLANAR|[®]|SupreMOS|[®]|VisualMax™| |FPS™|SyncFET™|VoltagePlus™| |XS™| **----- End of picture text -----**
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|||| |---|---|---| |Datasheet Identification|Product Status|Definition| |Advance Information|Formative / In Design|Datasheet contains the design specifications for product development. Specifications| |may change in any manner without notice.| |Datasheet contains preliminary data; supplementary data will be published at a later| |Preliminary|First Production|date. Fairchild Semiconductor reserves the right to make changes at any time without| |notice to improve design.| |No Identification Needed|Full Production|Datasheet contains final specifications. Fairchild Semiconductor reserves the right to| |make changes at any time without notice to improve the design.| |Obsolete|Not In Production|Datasheet contains specifications on a product that is discontinued by Fairchild| |Semiconductor. The datasheet is for reference information only.| **----- End of picture text -----**
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