# RF / Pin Diode, Single, 3 ohm, 100 V, SOT-23, 3 Pin, 0.35 pF

![Product image](https://novapart.co/image/farnell:1056823RL/)

**URL**: https://novapart.co/products/HSMP-3810-TR1G/rf-pin-diode-single-3-ohm-100-v-sot-23-035-pf
**SKU**: HSMP-3810-TR1G
**Manufacturer**: BROADCOM
**Category**: Semiconductors - Discretes || Diodes & Rectifiers || RF / Pin Diodes
**Price**: €0.2300
**Stock**: 10+

## Description

Diode Configuration:Single; Resistance @ If:3ohm; Breakdown Voltage Vbr:100V; Diode Case Style:SOT-23; No. of Pins:3 Pin; Total Capacitance Ct:0.35pF; Forward Current If(AV):1A; Operating Temperat

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (12-Jan-2017) |
| Product Range | HSMP |
| Diode Mounting | Surface Mount |
| Forward Voltage | - |
| Power Dissipation | - |
| Operating Temperature Max | 150°C |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1056823RL/)

**HSMP-381x, 481x** Surface Mount RF PIN Low Distortion  Attenuator Diodes 

## **Data Sheet** 

## **Description/Applications** 

The HSMP-381x series is specifically designed for low distortion attenuator applications. The HSMP-481x products feature ultra low parasitic inductance in the SOT-23 and SOT-323 packages. They are specifically designed for use at frequencies which are much higher than the upper limit for conventional diodes. 

A SPICE model is not available for PIN diodes as SPICE does not provide for a key PIN diode characteristic, carrier lifetime. 

## **Features** 

- Diodes Optimized for: 

- Low Distortion Attenuating 

- Microwave Frequency Operation 

- Surface Mount Packages 

- Single and Dual Versions 

- Tape and Reel Options Available 

- Low Failure in Time (FIT) Rate[[1]] 

- Lead free 

## **Note:** 

1. For more information see the Surface Mount PIN Reliability Data Sheet. 

## **Package Lead Code Identification, SOT-23 (Top View)** 

## **Package Lead Code Identification, SOT-323** 

## **(Top View)** 

**==> picture [393 x 205] intentionally omitted <==**

**----- Start of picture text -----**<br>
SINGLE SERIES SINGLE SERIES<br>AA 1 3 2 1 3 2 OA B C<br>#0 #2<br>COMMON COMMON COMMON COMMON<br>ANODE CATHODE ANODE CATHODE<br>a) 1 3 2 Ge 1 3 2 ex) E Fe F<br>#3 #4<br>DUAL CATHODE DUAL CATHODE<br>3<br>“4 1 2 oa<br>4810 481B<br>**----- End of picture text -----**<br>


## **Absolute Maximum Ratings[[1]] TC = +25°C** 

|**Symbol**|**Parameter**|**Unit**|**SOT-23**|**SOT-323**|
|---|---|---|---|---|
|If|Forward Current (1µs Pulse)|Amp|1|1|
|PIV|Peak Inverse Voltage|V|Same as VBR|Same as VBR|
|Tj|Junction Temperature|°C|150|150|
|Tstg|Storage Temperature|°C|-65 to 150|-65 to 150|
|qjc|Thermal Resistance[2]|°C/W|500|150|



Notes: 

1. Operation in excess of any one of these conditions may result in permanent damage to the device. 

2. TC = +25°C, where TC is defined to be the temperature at the package pins where contact is made to the circuit board. 

## **Electrical Specifications TC = +25°C (Each Diode) Conventional Diodes** 

|**Part**<br>**Number**<br>**HSMP-**|**Package**<br>**Marking**<br>**Code**|**Lead**<br>**Code**|**Confguration**|**Minimum**<br>**Breakdown**<br>**Voltage VBR**<br>**(V)**|**Maximum**<br>**Total**<br>**Capacitance**<br>**CT (pF)**|**Minimum**<br>**Resistance**<br>**at**<br>**IF = 0.01mA,**<br>**RH (Ω)**|**Maximum**<br>**Resistance**<br>**at**<br>**IF = 20mA,**<br>**RL (Ω)**|**Maximum**<br>**Resistance**<br>**at**<br>**IF = 100mA,**<br>**RT (Ω)**|**Resistance**<br>**at**<br>**IF = 1mA,**<br>**RM (Ω)**|
|---|---|---|---|---|---|---|---|---|---|
|3810|E0|0|Single|100|0.35|1500|10|3.0|48 to 70|
|3812|E2|2|Series|||||||
|3813|E3|3|Common Anode|||||||
|3814|E4|4|Common Cathode|||||||
|381B|E0|B|Single|||||||
|381C|E2|C|Series|||||||
|381E|E3|E|Common Anode|||||||
|381F|E4|F|Common Cathode|||||||
|Test Conditions||||VR= VBR<br>Measure<br>IR≤ 10uA|VR= 50V<br>f = 1MHz|IF= 0.01mA<br>f = 100MHz|IF= 20mA<br>f = 100MHz|IF= 100mA<br>f = 100MHz|IF= 1mA<br>f = 100MHz|



## **High Frequency (Low Inductance, 500 MHz – 3 GHz) PIN Diodes** 

|||||**Minimum**|**Maximum**|**Series**|**Typical**|**Maximum**|**Typical**|
|---|---|---|---|---|---|---|---|---|---|
|**Part**|**Package**|||**Breakdown**|**Series**|**Resistance**|**Total**|**Total**|**Total**|
|**Number**<br>**HSMP-**|**Marking**<br>**Code**|**Lead**<br>**Code**|**Confguration**|**Voltage**<br>**VBR (V)**|**Resistance**<br>**RS (Ω)**|**IF = 1mA,**<br>**RM (Ω)**|**Capacitance**<br>**CT (pF)**|**Capacitance**<br>**CT (pF)**|**Inductance**<br>**LT (nH)**|
|4810|EB|B|Dual Cathode|||||||
|||||100|3|48 - 70|0.35|0.4|1|
|481B|EB|B|Dual Cathode|||||||
|Test Conditions||||VR= VBR|IF= 100mA|IF= 1mA|VR= 50V|VR= 50V|f =|
|||||Measure|f =|f = 100MHz|f = 1MHz|f = 1MHz|500MHz|
|||||IR≤ 10μA|100MHz||||- 3GHz|



2 

## **Typical Parameters at TC = 25°C** 

|**Part Number**|**Series Resistance**|**Carrier Lifetime**|**Reverse Recovery Time**|**Total**<br>**Capacitance**|
|---|---|---|---|---|
|**HSMP-**|**RS (Ω)**|τ**(ns)**|**Trr (ns)**|**CT (pF)**|
|381x|53|1500|300|0.27 @ 50 V|
|Test Conditions|IF= 1 mA<br>f = 100 MHz|IF= 50 mA<br>IR= 250 mA|VR= 10 V<br>IF= 20 mA<br>90% Recovery|f = 1 MHz|



## **Typical Parameters at TC = 25°C (unless otherwise noted), Single Diode** 

**==> picture [484 x 359] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.45 10000 120<br>Diode Mounted as a<br>TA = +85 C 110 Series Attenuator<br>0.40 TA = +25 C in a 50 Ohm Microstrip<br>1000 TA = –55 C 100 and Tested at 123 MHz<br>0.35<br>90<br>1 MHz<br>0.30 100 80<br>70<br>0.25 30 MHz<br>10 60<br>0.20<br>frequency>100 MHz 50<br>0.15 1 40<br>0 2 4 6 8 10 12 14 16 18 20 0.01 0.1 1 10 100 1000 100 10<br>REVERSE VOLTAGE (V) IF – FORWARD BIAS CURRENT (mA) DIODE RF RESISTANCE (OHMS)<br>Figure 1.  RF Capacitance vs. Reverse  Figure 2. RF Resistance vs. Forward  Figure 3.  2nd Harmonic Input<br>Bias. Bias Current, f = 100MHz Intercept Point vs. Diode RF<br>Resistance.<br>100 Typical Applications for Multiple Diode Products<br>VARIABLE BIAS<br>10<br>1<br>INPUT RF IN/OUT<br>0.1<br>125 C 25 C –50 C<br>0.01<br>0 0.2 0.4 0.6 0.8 1.0 1.2<br>VF – FORWARD VOLTAGE (mA)<br>Figure 4. Forward Current vs. Forward<br>FIXED<br>Voltage. BIAS<br>VOLTAGE<br>TOTAL CAPACITANCE (pF) RF RESISTANCE (OHMS)<br>INPUT INTERCEPT POINT (dBm)<br> – FORWARD CURRENT (mA)<br>IF<br>**----- End of picture text -----**<br>


**Figure 5. Four Diode** π **Attenuator. See Application Note 1048 for Details.** 

Notes: 

3. Typical values were derived using limited samples during initial product characterization and may not be representative of the overall distribution. 

3 

## **Typical Applications for HSMP-481x Low Inductance Series** 

## **Microstrip Series Connection for HSMP-481x Series** 

In order to take full advantage of  the low inductance of the HSMP-481x series when using them in series applications, both lead 1 and lead 2 should be connected together, as shown in Figure 7. 

**==> picture [65 x 73] intentionally omitted <==**

**----- Start of picture text -----**<br>
3<br>1 2<br>HSMP-481x<br>**----- End of picture text -----**<br>


**Figure 6. Internal Connections.** 

**==> picture [184 x 66] intentionally omitted <==**

**Figure 7. Circuit Layout.** 

## **Microstrip Shunt Connections for HSMP-481x Series** 

In Figure 8, the center conductor of the microstrip line is interrupted and leads 1 and 2 of the HSMP-481x series diode are placed across the resulting gap. This forces the 1.5 nH lead inductance of leads 1 and 2 to appear as part of a low pass filter, reducing the shunt 

parasitic inductance and increasing the maximum available attenuation. The 0.3 nHof shunt inductance external to the diode is created by the via holes, and is a good  estimate for  0.032" thick material. 

**==> picture [109 x 117] intentionally omitted <==**

**----- Start of picture text -----**<br>
50 OHM MICROSTRIP LINES<br>PAD CONNECTED TO<br>GROUND BY TWO<br>VIA HOLES<br>**----- End of picture text -----**<br>


**Figure 8. Circuit Layout.** 

**==> picture [162 x 142] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.5 nH 1.5 nH<br>Rj 0.3 pF<br>0.3 nH<br>[0.08]<br>Rj Ib0.9+ 2.5 0.3 nH<br>**----- End of picture text -----**<br>


**Figure 9. Equivalent Circuit.** 

4 

## **Typical Applications for HSMP-481x Low Inductance Series (continued)** 

## **Co-Planar Waveguide Shunt Connection for  HSMP-481x Series** 

Co-Planar waveguide, with ground on the top side of the printed circuit board, is shown in Figure 10. Since it eliminates the need for via holes to ground, it offers lower shunt parasitic inductance and higher maximum attenuation when compared to microstrip circuit. 

**==> picture [111 x 101] intentionally omitted <==**

**==> picture [68 x 41] intentionally omitted <==**

**----- Start of picture text -----**<br>
Co-Planar Waveguide<br>Groundplane<br>Center Conductor<br>Groundplane<br>**----- End of picture text -----**<br>


## **Equivalent Circuit Model HSMP-381x Chip*** 

**==> picture [157 x 116] intentionally omitted <==**

**----- Start of picture text -----**<br>
Rs Rj<br>2.5  Ω<br>Cj<br>RT = 2.5 + Rj<br>CT = CP + Cj 0.18 pF*<br>* Measured at -20 V<br>[ 80 ]<br>Rj = [ I][0.9] [Ω]<br>I = Forward Bias Current in mA<br>*See AN1124 for package models.<br>**----- End of picture text -----**<br>


**Figure 10. Circuit Layout.** 

**==> picture [162 x 88] intentionally omitted <==**

**----- Start of picture text -----**<br>
Rj 0.3 pF<br>0.75 nH<br>**----- End of picture text -----**<br>


**Figure 11. Equivalent Circuit.** 

5 

## **Assembly Information SOT-323 PCB Footprint** 

A recommended PCB pad layout for the miniature SOT-323 (SC-70) package is shown in Figure 12 (dimensions are in inches). This layout provides ample allowance for package placement by automated assembly equipment without adding parasitics that could impair the performance. 

**==> picture [93 x 121] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.026<br>0.079<br>0.039<br>0.022<br>Dimensions in inches<br>**----- End of picture text -----**<br>


**Figure 12.  Recommended PCB Pad Layout for Avago’s SC70 3L/SOT-323 Products.** 

## **SOT-23 PCB Footprint** 

**==> picture [123 x 140] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.039<br>0.039 1<br>1<br>0.079<br>2.0<br>0.035<br>0.9<br>0.031<br>0.8<br>Dimensions in  [inches]<br>mm<br>**----- End of picture text -----**<br>


## **SMT Assembly** 

Reliable assembly of surface mount components is a complex process that involves many material, process, and equipment factors, including: method of heating (e.g., IR or vapor phase reflow, wave soldering, etc.) circuit board material, conductor thickness and pattern, type of solder alloy, and the thermal conductivity and thermal mass of components. Components with a low mass, such as the SOT-323/-23 package, will reach solder reflow temperatures faster than those with a greater mass. 

After ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste) passes through one or more preheat zones. The preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporating solvents from the solder paste. The reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder. 

The rates of change of temperature for the ramp-up and cool-down zones are chosen to be low enough to not cause deformation of the board or damage to components due to thermal shock. The maximum temperature in the reflow zone (TMAX) should not exceed 260°C. 

These parameters are typical for a surface mount assembly process for Avago diodes. As a general guideline, the circuit board and components should be exposed only to the minimum temperatures and times necessary to achieve a uniform reflow of solder. 

**Figure 13.  Recommended PCB Pad Layout for Avago’s SOT-23 Products.** 

6 

## **Package Dimensions** 

## **Outline 23 (SOT-23)** 

**==> picture [206 x 249] intentionally omitted <==**

**----- Start of picture text -----**<br>
e2<br>e1<br>E XXX E1<br>e L<br>B C<br>D DIMENSIONS (mm)<br>SYMBOL MIN. MAX.<br>A 0.79 1.20<br>A1 0.000 0.100<br>A B 0.30 0.54<br>C 0.08 0.20<br>D 2.73 3.13<br>A1<br>E1 1.15 1.50<br>e 0.89 1.02<br>e1 1.78 2.04<br>Notes: e2 0.45 0.60<br>XXX-package marking E 2.10 2.70<br>Drawings are not to scale L 0.45 0.69<br>**----- End of picture text -----**<br>


## **Outline SOT-323 (SC-70)** 

**==> picture [205 x 219] intentionally omitted <==**

**----- Start of picture text -----**<br>
e1<br>E XXX E1<br>e L<br>B C<br>D DIMENSIONS (mm)<br>SYMBOL MIN. MAX.<br>A 0.80 1.00<br>A A1 0.00 0.10<br>B 0.15 0.40<br>C 0.08 0.25<br>A1 D 1.80 2.25<br>E1 1.10 1.40<br>e 0.65 typical<br>Notes: e1 1.30 typical<br>XXX-package marking E 1.80 2.40<br>Drawings are not to scale L 0.26 0.46<br>**----- End of picture text -----**<br>


## **Package Characteristics** 

Lead Material .................................................... Copper (SOT-323); Alloy 42 (SOT-23) Lead Finish .........................................................................Tin 100% (Lead-free option) Maximum Soldering Temperature ............................................ 260°C for 5 seconds Minimum Lead Strength ...........................................................................2 pounds pull Typical Package Inductance ...................................................................................... 2 nH Typical Package Capacitance ..............................................0.08 pF (opposite leads) 

## **Ordering Information** 

Specify part number followed by option. For example: 

HSMP - 381x    - XXX 

Bulk or Tape and Reel Option Part Number; x = Lead Code Surface Mount PIN 

## **Option Descriptions** 

- -BLKG = Bulk, 100 pcs. per antistatic bag 

- -TR1G = Tape and Reel, 3000 devices per 7" reel 

- -TR2G = Tape and Reel, 10,000 devices per 13" reel 

Tape and Reeling conforms to Electronic Industries RS-481, “Taping of Surface Mounted Components for Automated Placement.” 

7 

## **Device Orientation For Outlines SOT-23/323** 

**==> picture [378 x 128] intentionally omitted <==**

**----- Start of picture text -----**<br>
TOP VIEW END VIEW<br>REEL<br>4 mm<br>8 mm<br>ABC ABC ABC ABC<br>CARRIER<br>TAPE<br>USER Note: "AB" represents package marking code.<br>FEED             "C" represents date code.<br>DIRECTION<br>COVER TAPE<br>**----- End of picture text -----**<br>


## **Tape Dimensions and Product Orientation For Outline SOT-23** 

**==> picture [350 x 201] intentionally omitted <==**

**----- Start of picture text -----**<br>
P D P2<br>E<br>P0<br>F<br>W<br>t1 D1<br>9� MAX Ko 8� MAX 13.5� MAX<br>A0 B0<br>**----- End of picture text -----**<br>


|**DESCRIPTION**|**DESCRIPTION**|**SYMBOL**|**SIZE (mm)**|**SIZE (INCHES)**|
|---|---|---|---|---|
|**CAVITY**|**LENGTH**<br>**WIDTH**<br>**DEPTH**<br>**PITCH**<br>**BOTTOM HOLE DIAMETE**|**R**<br>**A0**<br>**B0**<br>**K0**<br>**P**<br>**D1**|**3.15**±**0.10**<br>**2.77**±**0.10**<br>**1.22**±**0.10**<br>**4.00**±**0.10**<br>**1.00 +  0.05**|**0.124**±**0.004**<br>**0.109**±**0.004**<br>**0.048**±**0.004**<br>**0.157**±**0.004**<br>**0.039**±**0.002**|
|**PERFORATION**|**DIAMETER**<br>**PITCH**<br>**POSITION**|**D**<br>**P0**<br>**E**|**1.50 + 0.10**<br>**4.00**±**0.10**<br>**1.75**±**0.10**|**0.059 + 0.004**<br>**0.157**±**0.004**<br>**0.069**±**0.004**|
|**CARRIER TAPE**|**WIDTH**<br>**THICKNESS**|**W**<br>**t1**|**8.00 + 0.30 - 0.10**<br>**0.229**±**0.013**|**0.315 + 0.012 - 0.004**<br>**0.009**±**0.0005**|
|**DISTANCE**<br>**BETWEEN**<br>**CENTERLINE**|**CAVITY TO PERFORATIO**<br>**(WIDTH DIRECTION)**<br>**CAVITY TO PERFORATIO**<br>**(LENGTH DIRECTION)**|**N**<br>**N**<br>**F**<br>**P2**|**3.50**±**0.05**<br>**2.00**±**0.05**|**0.138**±**0.002**<br>**0.079**±**0.002**|



8 

## **Tape Dimensions and Product Orientation For Outline SOT-323** 

**==> picture [466 x 456] intentionally omitted <==**

**----- Start of picture text -----**<br>
P D P2<br>P0<br>E<br>F<br>W<br>C<br>D1<br>t1 (CARRIER TAPE THICKNESS) Tt (COVER TAPE THICKNESS)<br>An K0 An<br>A0 B0<br>DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)<br>CAVITY LENGTH A0 2.40  ± � 0.10 0.094  ± � 0.004<br>WIDTH B0 2.40  ± � 0.10 0.094  ± � 0.004<br>DEPTH K0 1.20  ± � 0.10 0.047  ± � 0.004<br>PITCH P 4.00  ± � 0.10 0.157  ± � 0.004<br>BOTTOM HOLE DIAMETER D1 1.00 + 0.25 0.039 + 0.010<br>PERFORATION DIAMETER D 1.55  ± � 0.05 0.061  ± � 0.002<br>PITCH P0 4.00  ± � 0.10 0.157  ± � 0.004<br>POSITION E 1.75  ± � 0.10 0.069  ± � 0.004<br>CARRIER TAPE WIDTH W 8.00  ± � 0.30 0.315  ± � 0.012<br>THICKNESS t1 0.254  ± � 0.02 0.0100  ± � 0.0008<br>COVER TAPE WIDTH C 5.4  ± � 0.10 0.205  ± � 0.004<br>TAPE THICKNESS Tt 0.062  ± � 0.001 0.0025  ± � 0.00004<br>DISTANCE CAVITY TO PERFORATION F 3.50  ± � 0.05 0.138  ± � 0.002<br>(WIDTH DIRECTION)<br>CAVITY TO PERFORATION P2 2.00  ± � 0.05 0.079  ± � 0.002<br>(LENGTH DIRECTION)<br>ANGLE FOR SOT-323 (SC70-3 LEAD) An 8�C MAX<br>FOR SOT-363 (SC70-6 LEAD) 10�C MAX<br>**----- End of picture text -----**<br>


For product information and a complete list of distributors, please go to our web site: **www.avagotech.com** 

Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change.  Copyright © 2005-2009 Avago Technologies. All rights reserved. Obsoletes AV01-0378EN AV02-0402EN - June 2, 2009 



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