# MOSFET MODULES

![Product image](https://novapart.co/image/farnell:3617526/)

**URL**: https://novapart.co/products/FTCO3V85A1/mosfet-modules
**SKU**: FTCO3V85A1
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || Intelligent Power Modules
**Price**: €20.0100
**Stock**: 10+
**Lead Time**: 99 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3617526/)

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## 3-Phase Automotive Power Module for DC-DC Converter FTCO3V85A1 

## **General Description** 

The FTCO3V85A1 is an 80 V low Rds(on) automotive qualified power module, featuring a 3−phase MOSFET bridge optimized for Automotive 48 V−12 V interleaved DC−DC converter system, it includes a precision shunt resistor for current sensing, an NTC for temperature sensing, and an RC snubber circuit. 

The module utilizes ON’s trench MOSFET technology and it is designed to provide a very compact and high efficiency solution for DC−DC converter system. The Power module is 100% lead free, RoHS and UL compliant. 

## **Features** 

- 3−Phase 1.5 kW 48 V−12 V Interleaved DC−DC Converter 

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19LD, APM, PDD STD 9<br>(APM19−CBC)<br>CASE MODCD<br>**----- End of picture text -----**<br>


## **MARKING DIAGRAM** 

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$Y =  onsemi  Logo<br>&Z = Assembly Plant Code<br>&3 = Data Code (Year & Week)<br>&K = Lot<br>FTCO3V85A1 = Specific Device Code<br>**----- End of picture text -----**<br>


- 80 V−125 A Trench MOSFET’s for High−Side 80 V−160 A Trench MOSFET for Low−Side 

- Precise Shunt Current Sensing 

- Temperature Sensing 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information on page 13 of this data sheet. 

- DBC Substrate 

- 100% Lead Free and RoHS Compliant 2000/53/C Directive 

- UL94V−0 Compliant 

- Isolation Rating of 2500 Vrms/min 

- Mounting Through Screws 

- Automotive Qualified 

## **Benefits** 

- Low Junction−Sink Thermal Resistance 

- Low Power Loss for High Efficiency in DC−DC System Design 

- Low Electrical Resistance 

- Compact DC−DC Converter Design 

- Highly Integrated Compact Design 

- Better EMI and Electrical Isolation 

- Easy and Reliable Installation 

- High Current Handling 

- Improved Overall System Reliability 

## **Applications** 

- DC−DC Converter 

Publication Order Number: **FTCO3V85A1/D** 

**1** 

© Semiconductor Components Industries, LLC, 2017 **September, 2024 − Rev. 5** 

**FTCO3V85A1** 

**Figure 1. Pin Configuration** 

**Table 1. PIN DESC** 

|~~es~~|~~es~~||
|---|---|---|
|**Pin No.**<br>~~es~~<br>~~es~~|**Pin Number**<br>~~es~~<br>~~es~~|**Pin Description**|
|1<br>~~es ~~<br>~~es~~<br>~~a~~|TEMP 1<br> ~~es~~<br>~~es~~<br>~~es~~|NTC Thermistor Terminal 1|
|2<br>~~es ~~<br>~~a~~<br>~~es~~|TEMP 2<br> ~~es~~<br>~~es~~<br>~~Rs~~|NTC Thermistor Terminal 2|
|3<br>~~a ~~<br>~~es~~<br>~~ee~~|PHASE 3 SENSE<br> ~~es~~<br>~~Rs~~<br>~~rs~~|Source of Q3 and Drain of Q6|
|4<br>~~es~~<br>~~ee~~<br>~~ee~~|GATE 3<br>~~Rs~~<br>~~rs~~<br>~~es~~|Gate of Q3, high side Phase 3 MOSFET|
|5<br>~~ee~~<br>~~ee~~<br>~~ee~~|GATE 6<br>~~rs~~<br>~~es~~<br>~~es~~|Gate of Q6, low side Phase 3 MOSFET|
|6<br>~~ee~~<br>~~ee~~<br>~~a~~|PHASE 2 SENSE<br>~~es~~<br>~~es~~<br>~~ns~~|Source of Q2 and Drain of Q5<br>~~nn~~|
|7<br>~~ee~~<br>~~a~~<br>~~a~~|GATE 2<br>~~es~~<br>~~ns~~<br>~~ns~~|Gate of Q2, high side Phase 2 MOSFET<br>~~nn~~|
|8<br>~~a~~<br>~~a~~<br>~~a~~|GATE 5<br>~~ns~~<br>~~ns~~<br>~~rs~~|Gate of Q5, low side Phase 2 MOSFET<br>~~nn~~|
|9<br>~~a~~<br>~~a~~<br>~~es~~|PHASE 1 SENSE<br>~~ns~~<br>~~rs~~<br>~~es~~|Source of Q1 and Drain of Q4|
|10<br>~~a~~<br>~~es~~<br>~~es~~|GATE 1<br>~~rs~~<br>~~es~~<br>~~nd~~|Gate of Q1, high side Phase 1 MOSFET|
|11<br>~~es ~~<br>~~es~~<br>~~a~~|VBAT SENSE<br> ~~es~~<br>~~nd~~<br>~~es~~|Sense pin for battery voltage and Drain of high side MOSFETs|
|12<br>~~es~~<br>~~a~~<br>~~es~~|GATE 4<br>~~nd~~<br>~~es~~<br>~~es~~|Gate of Q4, low side Phase 1 MOSFET|
|13<br>~~a~~<br>~~es~~<br>~~a~~|SHUNT P<br>~~es~~<br>~~es~~<br>~~ns~~|Positive CSR sense pin and source connection for low side MOSFETs|
|14<br>~~es ~~<br>~~a~~<br>~~es~~|SHUNT N<br> ~~es~~<br>~~ns~~<br>~~es~~|Negative CSR sense pin and sense pin for battery return|
|15<br>~~a~~<br>~~es~~<br>~~es~~|VBAT<br>~~ns~~<br>~~es~~|Battery voltage power lead|
|16<br>~~es ~~<br>~~es~~<br>~~a~~|GND<br> ~~es~~<br>~~es~~|Battery return power lead|
|17<br>~~es~~<br>~~a~~<br>~~ee~~|PHASE 1<br>~~es~~<br>~~es~~|Phase 1 power lead|
|18<br>~~a~~<br>~~ee~~|PHASE 2<br>~~es~~<br>~~es~~|Phase 2 power lead|
|19<br>~~ee~~<br>~~a~~|PHASE 3<br>~~es~~|Phase 3 power lead|



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**FTCO3V85A1** 

**Figure 2. Internal Equivalent Circuit** 

## **Flammability Information** 

All materials present in the power module meet UL flammability rating class 94V−0 or higher. 

## **Compliance to RoHS** 

The Power Module is 100% lead free and RoHS compliant with the 2000/53/C directive. 

## **Solder** 

Solder used is a lead free SnAgCu alloy. 

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## **FTCO3V85A1** 

**ABSOLUTE MAXIMUM RATINGS** (TC = 25 ° C, Unless otherwise specified) 

|**ABSOLUTE MAXIMUM RATINGS**|**ABSOLUTE MAXIMUM RATINGS**(TC = 25C = 25= 25°C, Unless otherwise specified)|||
|---|---|---|---|
|**Symbol**|**Parameter**|**FTCO3V85A1**|**Unit**|
|VDS(Q1∼Q6)|Drain to Source Voltage|80|V|
|VGS(Q1∼Q6)|Gate to Source Voltage|±20|V|
|ID(high−side)|Drain Current Continuous (TC= 25°C, TJ= 175°C, VGS= 10 V) (Note 1)|125|A|
|ID(low−side)|Drain Current Continuous (TC= 25°C, TJ= 175°C, VGS= 10 V) (Note 1)|160|A|
|EAS(Q1∼Q3)|Single Pulse Avalanche Energy (Note 2)|190|mJ|
|EAS(Q4∼Q6)|Single Pulse Avalanche Energy (Note 2)|324|mJ|
|PD(high−side)|Power dissipation (TC= 25°C, TJ= 175°C)|115|W|
|PD(low−side)|Power dissipation (TC= 25°C, TJ= 175°C)|135|W|
|TJ|Maximum Junction Temperature|175|°C|
|TSTG|Storage Temperature|125|°C|



## **THERMAL RESISTANCE** 

|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|
|Rthjc Thermal<br>Resistance<br>Junction to<br>case, Single<br>FET, (Note 3)|Q1 Thermal Resistance J −C|−|1.0|1.3|°C/W|
||Q2 Thermal Resistance J −C|−|1.0|1.3|°C/W|
||Q3 Thermal Resistance J −C|−|1.0|1.3|°C/W|
||Q4 Thermal Resistance J −C|−|0.8|1.1|°C/W|
||Q5 Thermal Resistance J −C|−|0.8|1.1|°C/W|
||Q6 Thermal Resistance J −C|−|0.8|1.1|°C/W|
|TJ|Maximum Junction Temperature|−||175|°C|
|TS|Operating Sink Temperature|−40||120|°C|
|TSTG|Storage Temperature|−40||125|°C|



1. Max value not to exceed Tj=175 ° C based on max limitation of Rthjc thermal limitation and Rdson. Defined by design, not subject production testing. 

2. For Q1−Q3: Starting TJ = 25 ° C, L = 0.08mH, IAS = 69 A, VDD = 80 V during inductor charging and VDD = 0 V during time in avalanche. For Q4−Q6: Starting TJ = 25 ° C, L = 0.08 mH, IAS = 90 A, VDD = 80 V during inductor charging and VDD = 0 V during time in avalanche. 

3. Test method compliant with MIL STD 883−1012.1. 

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## **FTCO3V85A1** 

**ELECTRICAL CHARACTERISTICS** (TC = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS**|**ELECTRICAL CHARACTERISTICS**(TC = 25C = 25= 25°C unless otherwise noted)|C unless otherwise noted)|||||
|---|---|---|---|---|---|---|
|**Symbol**<br>~~a~~<br>|**Parameter**<br>~~a~~<br>~~a~~<br>~~ee~~|**Test Conditions**<br>~~a~~<br>~~ee~~|**Min.**|**Typ.**|**Max.**|**Unit**|
|BVDSS<br>~~a~~|D−S Breakdown Voltage<br>(Inverter MOSFETs)<br>~~aee~~|VGS = 0V, ID = 250<br>A<br>~~ee~~|80|−|−|V|
|VGS<br><br>~~a~~|Gate to Source Voltage<br>(Inverter MOSFETs)<br>~~ee~~<br>|Gate−to−Source Voltage<br>~~ee~~<br>~~ee~~|−20|−|20|V|
|VTH<br>~~a~~<br>~~a~~|Threshold Voltage (Q1−Q6)<br>~~ee~~<br>|VGS = VDS, ID = 250<br>A, TJ = 25°C<br>~~ee~~<br>~~ee~~|2<br>~~ee~~|3<br>~~ee~~|4<br>~~ee~~|V<br>~~ee~~|
|VSD<br>~~a ~~<br>~~a~~|MOSFET Body Diode Forward Voltage<br> ~~a~~<br>~~ee~~|VGS = 0 V, IS = 80 A, TJ = 25°C<br>~~ee~~<br>~~ee~~|−|−|1|V|
|RDS(ON)Q1<br>~~a~~<br>~~a~~|Inverter High Side MOSFETs Q1<br>(See Note 4)<br>~~ee~~<br>~~ee~~|VGS = 10 V, ID = 80 A, TJ = 25°C<br>~~ee~~<br>~~ee~~|−<br>~~ee~~|2.4<br>~~ee~~|3.5<br>~~ee~~|m<br>~~ee~~|
|RDS(ON)Q2<br>~~a~~<br>~~a~~|Inverter High Side MOSFETs Q2<br>(See Note 4)<br>~~ee~~<br>~~ee~~|VGS = 10 V, ID = 80 A, TJ = 25°C<br>~~ee~~<br>~~ee~~|−<br>~~ee~~|2.4<br>~~ee~~|3.5<br>~~ee~~|m<br>~~ee~~|
|RDS(ON)Q3<br>~~a ~~<br>~~a~~<br>~~a~~|Inverter High Side MOSFETs Q3<br>(See Note 4)<br> ~~ee~~<br>~~ee~~<br>~~ee~~|VGS = 10 V, ID = 80 A, TJ = 25°C<br>~~ee~~<br>~~ee~~<br>~~ee~~|−<br>~~ee~~<br>~~ee~~<br>~~ee~~|2.5<br>~~ee~~<br>~~ee~~<br>~~ee~~|3.7<br>~~ee~~<br>~~ee~~<br>~~ee~~|m<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|RDS(ON)Q4<br>~~a~~<br>~~a~~|Inverter Low Side MOSFETs Q4<br>(See Note 4)<br>~~ee~~<br>~~a~~|VGS = 10 V, ID = 80 A, TJ = 25°C<br>~~ee~~<br>~~ee ee~~|−<br>~~ee~~<br>~~ee~~|1.9<br>~~ee~~<br>~~ee~~|2.6<br>~~ee~~<br>~~ee~~|m<br>~~ee~~<br>~~ee~~|
|RDS(ON)Q5<br>~~a~~<br>~~a~~<br>~~a~~|Inverter Low Side MOSFETs Q5<br>(See Note 4)<br>~~ee~~<br>~~a~~<br>~~ee~~|VGS = 10 V, ID = 80 A, TJ = 25°C<br>~~ee~~<br>~~ee ee~~<br>~~ee~~|−<br>~~ee~~<br>~~ee~~|2.1<br>~~ee~~<br>~~ee~~|2.8<br>~~ee~~<br>~~ee~~|m<br>~~ee~~<br>~~ee~~|
|RDS(ON)Q6<br>~~a ~~<br>~~a~~|Inverter Low Side MOSFETs Q6<br>(See Note 4)<br> ~~a~~<br>~~ee~~|VGS = 10 V, ID = 80 A, TJ = 25°C<br>~~ee ee~~<br>~~ee~~|−<br>~~ee~~|2.4<br>~~ee~~|3.1<br>~~ee~~|m<br>~~ee~~|
|IGSS<br>~~a~~|Inverter MOSFETs<br>(UH,UL,VH,VL,WH,WL)<br>~~ee~~|VGS =±20 V, VDS = 0 V, TJ = 25°C<br>~~ee~~|−|−|±100|nA|
|IDSS<br>~~ee~~|Inverter MOSFETs<br>Drain to Source Leakage Current<br>~~ee~~|VGS = 0 V, VDS = 80 V, TJ = 25°C<br>~~ee~~|−<br>~~ee~~|−<br>~~ee~~|2<br>~~ee~~|A<br>~~ee~~|
|Total loop resistance VLINK(+) − V0 (−)<br>~~a~~||VGS = 10 V, ID = 80 A, TJ = 25°C<br>~~a~~|−<br>~~a~~|5.9<br>~~a~~|7.5<br>~~a~~|m<br>~~a~~|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

4. High side Q1,Q2,Q3 have same die size and Rdson, Low side Q4,Q5,Q6 have same die size and Rdson. For lowest power loss, High and Low side MOSFETs have different die size and Rdson. The different Rdson values listed in the datasheet are due to the different access points available inside the module for Rdson measurement. While the high side MOSFETs (Q1, Q2, Q3) have source sense wire bonds, the low side MOSFETs (Q4, Q5, Q6) do not have source sense wire bonds, thus resulting in higher Rdson values. 

## **TEMPERATURE SENSE (NTC THERMISTOR)** 

|**Symbol**|**Test Conditions**<br>**Min.**|**Typ.**||**Max.**<br>**Unit**|
|---|---|---|---|---|
|Voltage|Current = 1 mA, Temperature = 25°C<br>7.5|−||12<br>V|
|**CURRENT SENSE RESISTOR**|**CURRENT SENSE RESISTOR**||||
|**Symbol**<br>**Test Conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Unit**<br>~~a~~<br>~~a~~|||||
|Voltage<br>Current sense resistor current = 80 A (Note 5)<br>0.47<br>~~a~~||−||0.51<br>m|
|1<br>~~eS~~<br>~~a~~|**Components**<br>**Spec**<br>MOSFET<br>PT7 80 V,bare die Rdson 2.25 m typical|**Quantity**<br>3ea (Q1−Q3)||**Size**<br>195 mil x 95 mil|
|2<br>~~a~~|MOSFET<br>PT7 80 V,bare die Rdson 1.35 m typical|3ea (Q4−Q6)||200 mil x 145 mil|
|3<br>~~a~~|Resistor<br>1  0.5 W|1ea||142 mil x 55 mil|
|4<br>~~a~~|Capacitor<br>0.022 F 100 V|1ea||79 mil x 49 mil|
|5<br>CSR<br>1% tolerance, 0.5 m<br>1ea<br>250 mil x 120 mil<br>~~aa~~|||||
|6<br>~~a~~|NTC<br>1% tolerance, 10 k|1ea||63 mil x 32 mil|



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**FTCO3V85A1** 

## **DYNAMIC CHARACTERISTIC** 

|**Symbol**<br>~~a ~~<br>~~rs~~|**Parameter**<br> ~~a~~|**Min**|**Test Conditions**|**Min.**<br>~~ee~~|**Typ.**<br>~~ee~~|**Max.**<br>~~ee~~|**Unit**<br>~~ee~~|
|---|---|---|---|---|---|---|---|
|Ciss<br>~~rs~~<br>~~re~~|Input Capacitance|VDS= 40 V, VGS= 0 V,<br>f = 1 MHZfor Q1−Q3<br>(High side MOSFET)||−<br>~~ee~~<br>~~re~~|6320<br>~~ee~~|−<br>~~ee~~|pF<br>~~ee~~|
|Coss<br>~~rs~~<br>~~re~~|Output Capacitance|||−<br>~~ee~~<br>~~re~~|1030<br>~~ee~~|−<br>~~ee~~|pF<br>~~ee~~|
|Crss<br>~~re~~<br>~~a~~<br>~~rs~~|Reverse Transfer Capacitance|||−<br>~~re~~<br>~~i~~<br>~~ee~~|32<br>~~ee~~|−<br>~~ee~~|pF<br>~~ee~~|
|Ciss<br>~~rs~~<br>~~re~~|Input Capacitance|VDS= 40 V, VGS= 0 V,<br>f = 1 MHZfor Q4−Q6<br>(Low side MOSFET)||−<br>~~ee~~<br>~~re~~|10000<br>~~ee~~<br>~~ee~~|−<br>~~ee~~|pF<br>~~ee~~|
|Coss<br>~~rs~~<br>~~re~~|Output Capacitance|||−<br>~~ee~~<br>~~re~~|1400<br>~~ee~~<br>~~ee~~|−<br>~~ee~~|pF<br>~~ee~~|
|Crss<br>~~re~~|Reverse Transfer Capacitance|||−<br>~~re ~~|95<br> ~~ee~~|−|pF|
|RG<br>~~ee~~|Gate Resistance<br>~~ee~~|VGS= 0V, f = 1MHZfor Q1−Q3<br>(High side MOSFET)<br>~~ee~~||−<br>~~ee~~|2.1<br>~~ee~~|−<br>~~ee~~|~~ee~~|
|RG|Gate Resistance|VGS= 0V, f = 1MHZfor Q4−Q6<br>(Low side MOSFET)||−|3.3|−||
|Qg(TOT)<br>~~a~~<br>~~a~~|Total Gate Charge at 10 V|VGS = 0 to 10 V|VDD= 64 V<br>ID= 80 A<br>Ig= 1 mA|−<br>~~ee~~<br>~~re~~|86<br>~~ee~~|112<br>~~ee~~|nC<br>~~ee~~|
|Qg(TH)<br>~~a~~|Threshold Gate Charge|VGS = 0 to 2 V||−<br>~~re~~|12|18|nC|
|Qgs<br>~~a~~<br>~~i~~<br>~~rs~~|Gate to Source Gate Charge|For Q1−Q3<br>(High side<br>MOSFET)||−<br>~~re~~<br>~~ee~~<br>~~en~~|30<br>~~ee~~<br>~~en~~|−<br>~~ee~~<br>~~en~~|nC<br>~~ee~~<br>~~en~~|
|Qgd<br>~~rs~~|Gate to Drain “Miller” Charge|||−<br>~~en~~|18<br>~~en~~|−<br>~~en~~|nC<br>~~en~~|
|Qg(TOT)<br>~~rs~~<br>~~a~~<br>~~a~~|Total Gate Charge at 10 V|VGS= 0 to 10 V|VDD= 64 V<br>ID= 80 A<br>Ig= 1 mA|−<br>~~en~~<br>~~ee~~|131<br>~~en~~|150<br>~~en~~|nC<br>~~en~~|
|Qg(TH)<br>~~a~~<br>~~a~~<br>~~re~~|Threshold Gate Charge<br>~~ee~~|VGS= 0 to 2 V<br>~~ee~~||−<br>~~ee~~<br>~~a~~|18<br>~~a~~|21<br>~~a~~|nC<br>~~a~~|
|Qgs<br>~~a~~<br>~~re~~|Gate to Source Gate Charge<br>~~ee~~|For Q4−Q6<br>(Low side<br>MOSFET)<br>~~ee~~||−<br>~~ee~~<br>~~a~~|47<br>~~a~~|−<br>~~a~~|nC<br>~~a~~|
|Qgd<br>~~re~~|Gate to Drain “Miller” Charge<br>~~ee~~|||−<br>~~a~~<br>~~ee~~|24<br>~~a~~<br>~~ee~~|−<br>~~a~~<br>~~ee~~|nC<br>~~a~~<br>~~ee~~|



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## **TYPICAL CHARACTERISTICS** 

(The dynamic, switching characteristics and Graphs are in reference to the FDBL86366_F085 (TOLL) Datasheet (High side MOSFET) 

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1.2 250<br>CURRENT LIMITED VGS = 10V<br>1.0 BY SILICON<br>fi | tt 200 wt<br>0.8<br>CN 150 EST<br>0.6<br>jf iIN Lt 100 TINE<br>0.4<br>ae aNee :<br>50<br>0.2 TPN aaeeeNe<br>0.0 | Et E ER 0 EEL LY<br>0 25 50 75 100 125 150 175 25 50 75 100 125 150 175 200<br>TC, CASE TEMPERATURE( [o] C) TC, CASE TEMPERATURE( [o] C)<br>Figure 3. Normalized Power Dissipation vs. Figure 4. Maximum Continuous Drain<br>Case Temperature Current vs. Case Temperature<br>, DRAIN CURRENT (A)<br>ID<br>POWER DISSIPATION MULTIPLIER<br>**----- End of picture text -----**<br>


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2<br>DUTY CYCLE − DESCENDING ORDER<br>1<br>D = 0.50<br>   0.20 P DM<br>   0.10<br>   0.05<br>   0.02 t1<br>0.1 : Pee    0.01 t2 =<br>ee ee eee NOTES: ee aH<br>eeHt DUTY FACTOR: D = t 1/t2 HH<br>SINGLE PULSE PEAK T J  = P DM  x Z q JA  x R q JA  + T A<br>immerse eee ees a<br>A<br>0.01<br>10−5 10−4 10−3 10−2 10−1 100 101<br>t, RECTANGULAR  PULSE DURATION(s)<br>Figure 5. Normalized Maximum Transient Thermal Impedance<br>10000<br>VGS = 10V T C  = 25 [o] C<br>FOR TEMPERATURES<br>ABOVE 25 [o] C DERATE PEAK<br>CURRENT AS FOLLOWS:<br>1000 SETICO CC I = I 2 175 − T C<br>150<br>a eT<br>100<br>RR<br>SINGLE PULSE<br>10<br>10−5 10−4 10−3 10−2 10−1 100 101<br>t, RECTANGULAR PULSE DURATION(s)<br>JC<br> q<br>IMPEDANCE, Z<br>NORMALIZED THERMAL<br>PEAK CURRENT (A)<br>,<br>IDM<br>**----- End of picture text -----**<br>


**Figure 6. Peak Current Capability** 

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## **TYPICAL CHARACTERISTICS** 

(The dynamic, switching characteristics and Graphs are in reference to the FDBL86366_F085 (TOLL) Datasheet (High side MOSFET) (Continued) 

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**----- Start of picture text -----**<br>
1000 1000<br>If R = 0<br>tAV = (L)(IAS)/(1.3*RATED BVDSS − VDD)<br>If R  0<br>tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS − VDD) +1]<br>100<br>100<br>100us<br>10<br>OPERATION IN THIS AREA MAY BE  STARTING TJ = 25 [o] C<br>LIMITED BY r DS(on) 10<br>1<br>SINGLE PULSE 1ms<br>T J = MAX RATED 10ms STARTING TJ = 150 [o] C<br>TC = 25 [o] C 100ms<br>0.1 ii=a Cea 1 S tC aaR<br>0.1 1 10 100 500 0.001 0.01 0.1 1 10 100 1000<br>VDS, DRAIN TO SOURCE VOLTAGE (V) t AV, TIME IN AVALANCHE (ms)<br>Figure 7. Forward Bias Safe Operating Area Figure 8. Unclamped Inductive Switching<br>Capability<br>300 300<br>PULSE DURATION = 80<br>250 DUTY CYCLE = 0.5% MAX 100 VGS = 0 V<br>COCO VDD= 5V OY<br>200<br>TIP 10 ff TJ = 175 [o] C<br>150<br>TJ = 25 [o] C TJ = 25 [ o] C<br>100 iN A fe<br>1<br>TJ = 175 [o] C<br>50  /<br>TJ = −55 [o] C<br>0 Le 0.1 ff<br>2 3 4 5 6 7 8 0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 9. Transfer Characteristics Figure 10. Forward Diode Characteristics<br>300 300<br>VGS VGS<br>15V  Top 15V  Top<br>250 eae 10V 250 /7an 10V<br>8V 8V<br>7V 7V<br>200 aa 6V 200 mw /Aaa 6V<br>80 s PULSE WIDTH 5.5V 5V     Bottom 5V     Bottom 5.5V<br>150 Tj=25 [o] C 150<br>via MY |<br>100 100<br>50 Vii 50 |<br>80 s PULSE WIDTH<br>0 po 0 |AnZa Tj=175 [o] C<br>0 1 2 3 4 5 0 1 2 3 4 5<br>VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>D<br> I , AVALANCHE CURRENT (A)<br>IAS<br>, DRAIN CURRENT (A)<br>ID , REVERSE DRAIN CURRENT (A)<br>IS<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>**----- End of picture text -----**<br>


**Figure 11. Saturation Characteristics** 

**Figure 12. Saturation Characteristics** 

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## **TYPICAL CHARACTERISTICS** 

(The dynamic, switching characteristics and Graphs are in reference to the FDBL86366_F085 (TOLL) Datasheet (High side MOSFET) (Continued) 

**==> picture [446 x 537] intentionally omitted <==**

**----- Start of picture text -----**<br>
50 2.4<br>ID  = 80A PULSE DURATION = 80 PULSE DURATION = 80<br>DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX<br>40 TP 2.0 Sanennn<br>30 Tt 1.6 Saccene<br>TJ = 25 [o] C<br>20 1.2<br>a CCCP<br>TJ = 175 [o] C<br>10 0.8  ID = 80AD = 80A = 80A<br>VGS = 10VGS = 10V = 10V<br>0 _TW SS 0.4 Bannanapzanee<br>4 6 8 10 −80 −40 0 40 80 120 160 200<br>VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATUREJ, JUNCTION TEMPERATURE, JUNCTION TEMPERATURE [[(][o]][[o]] C))<br>Figure 13. RDSON vs. Gate Voltage Figure 14. Normalized RDSON vs.DSON vs. vs.<br>Junction Temperature<br>1.5 1.10<br>VGS  = V DS ID = 5mAD = 5mA = 5mA<br>ID = 250<br>1.2<br>TTL 1.05 5<br>0.9<br>Pesce 1.00 tp<br>0.6<br>COLAC SS<br>0.95<br>0.3 CECE NG pZannnn<br>0.0 PEE EEE 0.90 EEE EEL<br>−80 −40 0 40 80 120 160 200 −80 −40 0 40 80 120 160<br>TJ, JUNCTION TEMPERATURE( [o] C) TJ, JUNCTION TEMPERATURE (o C)J, JUNCTION TEMPERATURE (o C), JUNCTION TEMPERATURE (o C)o C) C)<br>Figure 15. Normalized Gate Threshold Figure 16. Normalized Drain to Source<br>Voltage vs. Temperature Breakdown Voltage vs. Junction Temperature<br>10000 10<br>ID = 80A<br>Ciss VDD = 40V<br>8<br>1000 VDD =32V VDD = 48V<br>6<br>Coss<br>=e 4 and<br>100<br>Crss 2<br>f = 1MHz<br>V GS  = 0V<br>10 Risiiian 0 Za<br>0.1 1 10 100 0 20 40 60 80 100<br>VDS, DRAIN TO SOURCE VOLTAGE (V) Qg ,  GATE CHARGE(nC)<br>) W<br>m<br>, DRAIN TO SOURCE<br>NORMALIZED<br>ON−RESISTANCE (<br>DS(on)<br>r<br> DRAIN TO SOURCE ON−RESISTANCE<br>NORMALIZED GATE<br>THRESHOLD VOLTAGE<br>BREAKDOWN VOLTAGE<br>NORMALIZED DRAIN TO SOURCE<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE(V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**==> picture [205 x 340] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.4<br>PULSE DURATION = 80<br>DUTY CYCLE = 0.5% MAX<br>2.0 Sanennn<br>1.6 Saccene<br>1.2<br>CCCP<br>0.8  ID = 80AD = 80A = 80A<br>VGS = 10VGS = 10V = 10V<br>0.4 apzaneeBannanapzanee<br>−80 −40 0 40 80 120 160 200<br>TJ, JUNCTION TEMPERATUREJ, JUNCTION TEMPERATURE, JUNCTION TEMPERATURE [[(][o]][[o]] C))<br>Figure 14. Normalized RDSON vs.DSON vs. vs.<br>Junction Temperature<br>1.10<br>ID = 5mAD = 5mA = 5mA<br>1.05 5<br>1.00 tp<br>SS<br>0.95<br>pZannnn<br>0.90 EEE EEL<br>−80 −40 0 40 80 120 160 20<br>TJ, JUNCTION TEMPERATURE (o C)J, JUNCTION TEMPERATURE (o C), JUNCTION TEMPERATURE (o C)o C) C)<br>NORMALIZED<br> DRAIN TO SOURCE ON−RESISTANCE<br>BREAKDOWN VOLTAGE<br>NORMALIZED DRAIN TO SOURCE<br>**----- End of picture text -----**<br>


**Figure 16. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature** 

**Figure 17. Capacitance vs. Drain to Source Voltage** 

**Figure 18. Gate Charge vs. Gate to Source Voltage** 

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## **TYPICAL CHARACTERISTICS** 

(The dynamic, switching characteristics and Graphs are in reference to the FDBL86363_F085 (TOLL) Datasheet (Low side MOSFET) (Continued) 

**==> picture [439 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.2 350<br>CURRENT LIMITED VGS = 10V<br>1.0 BY SILICON<br>pt tT tT Tt 280 [|<br>0.8<br>NO 210 ety<br>NI yy | |<br>0.6<br>SH PT UNA<br>140<br>nN<br>0.4<br>aN CLEA<br>70<br>0.2 TT TEN BaaeeNe<br>0.0 et ee EEN 0 Bae<br>0 25 50 75 100 125 150 175 25 50 75 100 125 150 175 200<br>TC, CASE TEMPERATURE( [o] C) TC, CASE TEMPERATURE( [o] C)<br>, DRAIN CURRENT (A)<br>ID<br>POWER DISSIPATION MULTIPLIER<br>**----- End of picture text -----**<br>


**Figure 19. Normalized Power Dissipation vs. Case Temperature** 

**Figure 20. Maximum Continuous Drain Current vs. Case Temperature** 

**==> picture [419 x 367] intentionally omitted <==**

**----- Start of picture text -----**<br>
2<br>DUTY CYCLE − DESCENDING ORDER<br>1<br>SS D = 0.50 a ye<br>   0.20 P DM<br>   0.10<br>=| 2aSSS FH<br>—    0.05 2 ee ee ee LU<br>0.1 oor    0.02    0.01 et t1 t2 ill<br>NOTES:<br>aac aor ao ao DUTY FACTOR: D = t 1/t2 FHF<br>SINGLE PULSE PEAK T  J  = P DM  x Z q JA  x R q JA  + T A<br>0.01 Sn eatCOOCOIul<br>10−5 10−4 10−3 10−2 10−1 100 101<br>t, RECTANGULAR  PULSE DURATION(s)<br>Figure 21. Normalized Maximum Transient Thermal Impedance<br>10000<br>VGS = 10V TC = 25 [o] C<br>FOR TEMPERATURES<br>ABOVE 25 [o] C DERATE PEAK<br>FAMILIE<br>CURRENT AS FOLLOWS:<br>1000 I = I 2 175 − T C<br>150<br>S S aee | |<br>100 SF a<br>Teee ee |<br>SINGLE PULSE<br>10 WL EET EEEEET<br>10−5 10−4 10−3 10−2 10−1 100 101<br>t, RECTANGULAR PULSE DURATION(s)<br>JC<br> q<br>IMPEDANCE, Z<br>NORMALIZED THERMAL<br> PEAK CURRENT (A)IDM ,<br>**----- End of picture text -----**<br>


**Figure 22. Peak Current Capability** 

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## **TYPICAL CHARACTERISTICS** 

(The dynamic, switching characteristics and Graphs are in reference to the FDBL86363_F085 (TOLL) Datasheet (Low side MOSFET) (Continued) 

**==> picture [440 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000 2000<br>1000 t If R  AV =  = 0 (L)(I AS)/(1.3*RATED BV DSS − VDD)<br>If R  0<br>tAV = (L/R)ln[(I AS * R)/(1.3 * RATED BV DSS − VDD) +1]<br>100<br>100<br>100us<br>10<br>OPERATION IN THIS  STARTING TJ = 25 [o] C<br>AREA MAY BE<br>LIMITED BY r DS(on)<br>10<br>1 1ms<br>SINGLE PULSE<br>T J = MAX RATED 10ms STARTING TJ = 150 [o] C<br>TC = 25 [o] C 100ms<br>0.1 [Co ant | H 1 a<br>0.1 1 10 100 500 0.001 0.01 0.1 1 10 100 1000<br>VDS, DRAIN TO SOURCE VOLTAGE (V) tAV, TIME IN AVALANCHE (ms)<br>, DRAIN CURRENT (A)<br>D<br> I<br>, AVALANCHE CURRENT (A)<br>IAS<br>**----- End of picture text -----**<br>


**Figure 23. Forward Bias Safe Operating Area** 

**Figure 24. Unclamped Inductive Switching Capability** 

**==> picture [437 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
350 400<br>PULSE DURATION = 80 s<br>300 DUTY CYCLE = 0.5% MAX y | | a VGS = 0 V a<br>VDD= 5V 100<br>250<br>200 TJ = 25 [o] C 10 T J = 175 [o] C<br>150 TJ = 25 [ o] C<br>100 ff 1<br>TJ = 175 [o] C TJ = −55 [o] C<br>50<br>Tie ff fo<br>0 7 ae 0.1 ff<br>2 3 4 5 6 7 8 0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 25. Transfer Characteristics Figure 26. Forward Diode Characteristics<br>, DRAIN CURRENT (A)<br>ID , REVERSE DRAIN CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**==> picture [194 x 148] intentionally omitted <==**

**----- Start of picture text -----**<br>
350<br>VGS<br>300 a 15V  Top<br>10V<br>8V<br>250 m= 7V<br>6V<br>5.5V<br>200 aT 5V     Bottom<br>150<br>100 oT 80 Tj=25 s PULSE WIDTH [o] C<br>50<br>0 An<br>0 1 2 3 4 5<br>VDS, DRAIN TO SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**==> picture [194 x 148] intentionally omitted <==**

**----- Start of picture text -----**<br>
350<br>VGS<br>300 7 /Aa 15V  Top<br>10V<br>8V<br>250 a 7V<br>6V<br>5.5V<br>200 ZT 5V     Bottom<br>150<br>100 | 80 s PULSE WIDTH<br>Tj=175 [o] C<br>50<br>0 An<br>0 1 2 3 4 5<br>VDS, DRAIN TO SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 27. Saturation Characteristics** 

**Figure 28. Saturation Characteristics** 

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## **TYPICAL PERFORMANCE CHARACTERISTICS** 

(The dynamic, switching characteristics and Graphs are in reference to the FDBL86363_F085 (TOLL) Datasheet (Low side MOSFET) (Continued) 

**==> picture [207 x 347] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.4<br>PULSE DURATION = 80 s<br>DUTY CYCLE = 0.5% MAX<br>2.0 ft<br>1.6 aa<br>1.2<br>ERE 2a<br>0.8  ID = 80AD = 80A = 80A<br>VGS = 10VGS = 10V = 10V<br>0.4 epTitty.Titty. fl<br>−80 −40 0 40 80 120 160 200<br>TJ , JUNCTION TEMPERATURE(J , JUNCTION TEMPERATURE( , JUNCTION TEMPERATURE(( [[o]] C))<br>Figure 30. Normalized RDSON vs.DSON vs. vs.<br>Junction Temperature<br>1.10<br>ID = 5mAD = 5mA = 5mA<br>1.05 ttteeee<br>1.00<br>|derder<br>pa<br>0.95<br>ALLL<br>0.90 PLE ELL ELL<br>−80 −40 0 40 80 120 160 200<br>TJJ , JUNCTION TEMPERATURE ( [[o]] C)<br>NORMALIZED<br> DRAIN TO SOURCE ON−RESISTANCE<br>BREAKDOWN VOLTAGE<br>NORMALIZED DRAIN TO SOURCE<br>**----- End of picture text -----**<br>


**==> picture [435 x 578] intentionally omitted <==**

**----- Start of picture text -----**<br>
50 2.4<br>ID  = 80A PULSE DURATION = 80 s PULSE DURATION = 80 s<br>DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX<br>40 ttt 2.0 ft<br>30 ttt 1.6 aa<br>TJ = 175 [o] C TJ = 25 [o] C<br>20 1.2<br>ite ERE 2a<br>10 0.8  ID = 80AD = 80A = 80A<br>VGS = 10VGS = 10V = 10V<br>0 tue| Met ft 0.4 epTitty.Titty.<br>2 4 6 8 10 −80 −40 0 40 80 120 160<br>VGS, GATE TO SOURCE VOLTAGE (V) TJ , JUNCTION TEMPERATURE(J , JUNCTION TEMPERATURE( , JUNCTION TEMPERATURE(( [[o]] C))<br>Figure 29. RDSON vs. Gate Voltage Figure 30. Normalized RDSON vs.DSON vs. vs.<br>Junction Temperature<br>1.5 1.10<br>VGS  = V DS ID = 5mAD = 5mA = 5mA<br>ID = 250 A<br>1.2<br>pf] ppt 1.05<br>0.9<br>St ttteeee<br>1.00<br>0.6 PTTL |derder<br>NL, pa<br>0.95<br>0.3 ON ALLL<br>0.0 PEE LLL 0.90 PLE ELL ELL<br>−80 −40 0 40 80 120 160 200 −80 −40 0 40 80 120 160<br>TJ, JUNCTION TEMPERATURE( [o] C) TJJ , JUNCTION TEMPERATURE ( [[o]] C)<br>Figure 31. Normalized Gate Threshold Figure 32. Normalized Drain to Source<br>Voltage vs. Temperature Breakdown Voltage vs. Junction Temperature<br>100000 10<br>ID = 80AD = 80A = 80A<br>Ciss 8 VDD = 32VDD = 32V = 32V<br>10000  40V<br> 48V<br>Coss 6<br>1000<br>4<br>100 C rss<br>2<br>f = 1MHz<br>V GS = 0V<br>10 0<br>0.1 1 10 100 0 30 60 90 120 150<br>VDS , DRAIN TO SOURCE VOLTAGE  (V) Qgg ,  GATE CHARGE(nC)<br>Figure 33. Capacitance vs. Drain to Source Figure 34. Gate Charge vs. Gate to Source<br>Voltage Voltage<br>) W<br>m<br>, DRAIN TO SOURCE<br>NORMALIZED<br>ON−RESISTANCE (<br>DS(on)<br>r<br> DRAIN TO SOURCE ON−RESISTANCE<br>NORMALIZED GATE<br>THRESHOLD VOLTAGE<br>BREAKDOWN VOLTAGE<br>NORMALIZED DRAIN TO SOURCE<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE(V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 32. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature** 

**==> picture [186 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
10<br>ID = 80AD = 80A = 80A<br>8 VDD = 32VDD = 32V = 32V<br> 40V<br> 48V<br>6<br>4<br>2<br>0<br>0 30 60 90 120 150<br>Qgg ,  GATE CHARGE(nC)<br>, GATE TO SOURCE VOLTAGE(V)<br>GS<br>V<br>**----- End of picture text -----**<br>


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## **Table 2. MECHANICAL CHARACTERISTICS AND RATINGS** 

|**Parameter**<br>**Condition**<br>**Limits**<br>**Units**<br>**Min.**<br>**Typ.**<br>**Max.**<br>Device Flatness<br>Note Fig. 15<br>0<br>−<br>+150<br>m<br>~~ee~~<br>~~ee~~<br>~~a ee~~<br>~~ee~~<br>~~a~~|
|---|
|Mounting Torque<br>Mounting Screw: −M3, Recommended 0.7N.m<br>0.4<br>−<br>0.8<br>N.m<br>Weight<br>−<br>20<br>−<br>g<br>~~a~~<br>~~ee~~|
|40.00|
|(LULU|
|9)<br>1®<br>®<br>cc)|
|aa<br>><br>S<br>€<br>PKG CENTER<br>=°<br>w<br>‘<br>‘ ¥<br>©<br>O|
|a<br>LULU LULU<br>a|
|FLATNESS<br>:<br>MAX. 150um|
|—,<br>MEASURING AT<br>INDICATING<br>POINTS|
|1,<br>2,<br>3, AND 4 (BASED ON 0”)|
|**Table 3. PACKAGE MARKING AND ORDERING INFORMATION**|
|**Device Marking**<br>**Packing Type**<br>**Quantity**<br>ÁÁÁÁÁÁÁÁÁÁÁÁ<br>FTCO3V85A1<br>ÁÁÁÁÁÁÁÁÁÁÁÁ<br>Tube<br>ÁÁÁÁÁÁÁÁÁÁÁ<br>11|
|ÁÁÁÁÁÁÁÁÁÁÁÁ<br>ÁÁÁÁÁÁÁÁÁÁÁÁ<br>ÁÁÁÁÁÁÁÁÁÁÁ|



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MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

**19LD, APM, PDD STD (APM19−CBC)** CASE MODCD ISSUE O 

DATE 30 NOV 2016 

**==> picture [78 x 62] intentionally omitted <==**

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**----- Start of picture text -----**<br>
Electronic versions are uncontrolled except when accessed directly from the Document Repository.<br>DOCUMENT NUMBER: 98AON13505G Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red.<br>DESCRIPTION: 19LD, APM, PDD STD (APM19−CBC) PAGE 1 OF 1<br>**----- End of picture text -----**<br>


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