# Power MOSFET, N Channel, 60 V, 24 A, 0.039 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:1505062/)

**URL**: https://novapart.co/products/FQD30N06LTM/power-mosfet-n-channel-60-v-24-a-0039-ohm-to-252
**SKU**: FQD30N06LTM
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.2770
**Stock**: 10+

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:24A; Drain Source Voltage Vds:60V; On Resistance Rds(on):0.039ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.5V; Power Dissipati

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 44W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 60V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 24A |
| Drain Source On State Resistance | 0.039ohm |
| Gate Source Threshold Voltage Max | 2.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1505062/)

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May 2001<br>QFET TM<br>**----- End of picture text -----**<br>


## **FQD30N06L / FQU30N06L** 

**60V LOGIC N-Channel MOSFET** 

## **General Description** 

## **Features** 

These N-Channel enhancement mode power field effect • 24A, 60V, RDS(on) = 0.039Ω @ VGS = 10V transistors are produced using Fairchild’s proprietary, • Low gate charge ( typical 15 nC) planar stripe, DMOS technology. • Low Crss ( typical  50 pF) This advanced technology has been especially tailored to • Fast switching minimize on-state resistance, provide superior switching • 100% avalanche tested performance, and withstand high energy pulse in the • Improved dv/dt capability avalanche and commutation mode. These devices are well • 150[o] C maximum junction temperature rating suited for low voltage applications such as automotive, DC/ • Low level gate drive requirements allowing direct DC converters, and high efficiency switching for power operation form logic drivers management in portable and battery operated products. 

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D<br>D !<br>"<br>! "<br> D-PAK  I-PAK G ! ""<br>G S<br>FQD Series G D S FQU Series !<br>S<br>Absolute Maximum Ratings    TC = 25°C unless otherwise noted<br>Symbol a Parameter FQD30N06L / FQR30N06L Units<br>VDSS pe Drain-Source Voltage 60 V<br>ID Drain Current - Continuous (TC = 25°C) po 24 A<br>- Continuous (TC = 100°C) po 15 A<br>IDM a Drain Current - Pulsed (Note 1) 96 A<br>VGSS a Gate-Source Voltage ± 20 V<br>EAS a Single Pulsed Avalanche Energy (Note 2) 400 mJ<br>IAR a Avalanche Current (Note 1) 24 A<br>EAR a Repetitive Avalanche Energy (Note 1) 4.4 mJ<br>dv/dt a Peak Diode Recovery dv/dt (Note 3) 7.0 V/ns<br>PD a Power Dissipation (TA = 25°C) * 2.5 W<br>Power Dissipation (TC = 25°C) Po 44 W<br>- Derate above 25°C po 0.35 W/°C<br>TJ, TSTG a Operating and Storage Temperature Range -55 to +150 °C<br>Maximum lead temperature for soldering purposes,<br>TL 1/8" from case for 5 seconds 300 °C<br>Thermal Characteristics<br>Symbol Parameter Typ Max Units<br>RθJC Thermal Resistance, Junction-to-Case -- 2.85 °C / W<br>RθJA Thermal Resistance, Junction-to-Ambient * -- 50 °C / W<br>RθJA Thermal Resistance, Junction-to-Ambient -- 110 °C / W<br>* When mounted on the minimum pad size recommended (PCB Mount)<br>**----- End of picture text -----**<br>


©2001 Fairchild Semiconductor Corporation 

Rev. A1. May 2001 

|**Electrical Characteristics**TA= 25°C|**Electrical Characteristics**TA= 25°C|unless otherwise noted|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Min**|**Typ**|**Max**|**Units**|
|**Off Characteristics**|||||||
|BVDSS|Drain-Source Breakdown Voltage|VGS= 0 V, ID= 250µA|60|--|--|V|
|∆BVDSS<br>/∆TJ|Breakdown Voltage Temperature<br>Coefficient|ID= 250µA, Referenced to 25°C|--|0.07|--|V/°C|
|IDSS|Zero Gate Voltage Drain Current|VDS= 60 V, VGS= 0 V|--|--|1|µA|
|||VDS= 48 V, TC= 125°C|--|--|10|µA|
|IGSSF|Gate-Body Leakage Current, Forward|VGS= 20 V, VDS= 0 V|--|--|100|nA|
|IGSSR|Gate-Body Leakage Current, Reverse|VGS= -20 V, VDS= 0 V|--|--|-100|nA|
|**On Characteristics**|||||||
|VGS(th)|Gate Threshold Voltage|VDS= 5 V, ID= 250µA|1.0|--|2.5|V|
|RDS(on)|Static Drain-Source<br>On-Resistance|VGS= 10 V, ID= 12 A<br>VGS= 5 V, ID= 12 A|--<br>--|0.031<br>0.038|0.039<br>0.047|Ω|
|gFS|Forward Transconductance|VDS= 25 V, ID= 12 A<br>(Note 4)|--|23|--|S|
|**Dynamic Characteristics**|||||||
|Ciss|Input Capacitance|VDS= 25 V, VGS= 0 V,<br>f = 1.0 MHz|--|800|1040|pF|
|Coss|Output Capacitance||--|270|350|pF|
|Crss|Reverse Transfer Capacitance||--|50|65|pF|
|**Switching Characteristics**|||||||
|td(on)|Turn-On Delay Time|VDD= 30 V, ID= 16 A,<br>RG= 25Ω<br>(Note 4, 5)|--|15|40|ns|
|tr|Turn-On Rise Time||--|210|430|ns|
|td(off)|Turn-Off Delay Time||--|55|120|ns|
|tf|Turn-Off Fall Time||--|110|230|ns|
|Qg|Total Gate Charge|VDS= 48 V, ID= 32 A,<br>VGS= 5 V<br>(Note 4, 5)|--|15|20|nC|
|Qgs|Gate-Source Charge||--|3.5|--|nC|
|Qgd|Gate-Drain Charge||--|8.5|--|nC|
|**Drain-Source Diode Characteristics and Maximum Ratings**|||||||
|IS|Maximum Continuous Drain-Source Diode Forward Current||--|--|24|A|
|ISM|Maximum Pulsed Drain-Source Diode Forward Current||--|--|96|A|
|VSD|Drain-Source Diode Forward Voltage|VGS= 0 V, IS= 24 A|--|--|1.5|V|
|trr|Reverse Recovery Time|VGS= 0 V, IF= 32 A,<br>dIF/ dt = 100 A/µs<br>(Note 4)|--|55|--|ns|
|Qrr|Reverse Recovery Charge||--|80|--|nC|
|**Notes:**|||||||



1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 0.8mH, IAS = 24A, VDD = 25V, RG = 25 Ω, Starting  TJ = 25°C 

3. ISD ≤ 32A, di/dt ≤ 300A/us, VDD ≤ BVDSS, Starting  TJ = 25°C 

4. Pulse Test : Pulse width ≤ 300us, Duty cycle ≤ 2% 

5. Essentially independent of operating temperature 

©2001 Fairchild Semiconductor Corporation 

Rev. A1. May 2001 

## **Typical Characteristics** 

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                    VTop :       10.0 VGS<br>                  8.0 V<br>                  6.0 V<br>                  5.0 V<br>                  4.5 V<br>                  4.0 V<br>                  3.5 V<br>Bottom :  3.0 V<br>101 101<br>150℃<br>25℃<br>※ Notes : ※ Notes :<br>   1. 250   2. TC = 25μ s Pulse Test℃ -55℃    1. V   2. 250DS = 25Vμ s Pulse Test<br>10010-1 100 101 100 0 2 4 6 8 10<br>VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V]<br>Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics<br>80<br>60<br>VGS = 10V<br>VGS = 5V<br>40 101<br>20<br>※ Note : TJ = 25℃ 150℃ 25℃ ※   1. V   2. 250 Notes :GS = 0Vμ s Pulse Test<br>0 0 20 40 60 80 100 120 100<br>0.4 0.6 0.8 1.0 1.2 1.4<br>ID, Drain Current [A] VSD, Source-Drain voltage [V]<br>Figure 3. On-Resistance Variation  vs. Figure 4. Body Diode Forward Voltage<br>Drain Current and Gate Voltage Variation vs. Source Current and<br>Temperature<br>2000 12<br>Ciss = Cgs + Cgd (Cds = shorted)<br>Coss = Cds + Cgd<br>Crss = Cgd 10<br>1500 Coss VDS = 30V<br>Ciss 8 VDS = 48V<br>※ Notes :<br>1000    2. f = 1 MHz   1. VGS = 0 V 6<br>Crss 4<br>500<br>2<br>※ Note : ID = 32A<br>0<br>010-1 100 101 0 5 10 15 20 25 30<br>VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]<br>, Drain Current [A]ID , Drain Current [A]ID<br>],<br>Ω<br>  [m<br>DS(ON)<br>R<br>, Reverse Drain Current [A]<br>Drain-Source On-Resistance IDR<br>Capacitance [pF]<br>, Gate-Source Voltage [V]<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 5. Capacitance Characteristics** 

**Figure 6. Gate Charge Characteristics** 

©2001 Fairchild Semiconductor Corporation 

Rev. A1. May 2001 

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Typical Characteristics      (Continued)<br>1.2 2.5<br>2.0<br>1.1<br>1.5<br>1.0<br>1.0<br>0.9 ※ Notes :<br>   1. VGS = 0 V 0.5 ※ Notes :<br>   2. ID = 250 μ A    1. VGS = 10 V<br>   2. ID = 12 A<br>0.8 0.0<br>-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200<br>TJ, Junction Temperature [oC] TJ, Junction Temperature [oC]<br>Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation<br>vs. Temperature vs. Temperature<br>25<br>Operation in This Area<br>is Limited by R DS(on)<br>102 20<br>100 µs<br>1 ms 15<br>101 10 ms<br>DC<br>10<br>100<br>※ Notes :<br>   2. T   3. Single Pulse   1. TCJ = 150  = 25 oCoC 5<br>10-110-1 100 101 102 025 50 75 100 125 150<br>VDS, Drain-Source Voltage [V] TC, Case Temperature [℃]<br>Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current<br>vs. Case Temperature<br>D = 0 .5<br>1 0 0<br>0 .2 ※  N o t e s  :<br>   1 . Z θ J C [(t ) =  2 .8 5  ][℃] [/W  M a x .]<br>0 .1    2 . D u t y  F a c t o r , D = t 1 /t 2<br>   3 . T J M  - T C  =  P D M  *  Z θ J C [(t )]<br>0 .0 5<br>1 0 -1 0 .0 2 PDM<br>0 .0 1 s in g le  p u ls e t1 t2<br>1 0 -5 1 0 -4 1 0 -3 1 0 -2 1 0 -1 1 0 0 1 0 1<br>t 1 ,  S q u a r e  W a v e  P u ls e  D u r a t io n  [ s e c ]<br>Figure 11. Transient Thermal Response Curve<br>, (Normalized)  , (Normalized)<br> DSS DS(ON)<br>BV R<br>Drain-Source On-Resistance<br>Drain-Source Breakdown Voltage<br>, Drain Current [A]ID , Drain Current [A]ID<br>e s p o n s e<br>a l R<br>( t) , T h e r m<br>J C<br>Z θ<br>**----- End of picture text -----**<br>


©2001 Fairchild Semiconductor Corporation 

Rev. A1. May 2001 

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**----- Start of picture text -----**<br>
 Gate Charge Test Circuit & Waveform<br>VGS<br>Same Type<br>50KΩ as DUT Qg<br>12V 200nF 300nF 5V<br>VGS VDS Qgs Qgd<br>DUT<br>3mA<br>Charge<br> Resistive Switching Test Circuit & Waveforms<br>VDS RL VDS 90%<br>VGS VDD<br>RG<br>10%<br>5V DUT VGS<br>td(on) tr td(off) tf<br>t on t off<br> Unclamped Inductive Switching Test Circuit & Waveforms<br>VDS L EAS = ----12 L IAS2 --------------------BVBVDSSDSS- VDD<br>I D BVDSSIAS<br>RG VDD ID (t)<br>10V DUT VDD VDS (t)<br>t p t p Time<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
FQD30N06L / FQU30N06L<br>**----- End of picture text -----**<br>


©2001 Fairchild Semiconductor Corporation 

Rev. A1. May 2001 

## **Peak Diode Recovery dv/dt Test Circuit & Waveform** 

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**----- Start of picture text -----**<br>
DUT +<br>VDS<br>_<br>I SD<br>L<br>Driver<br>RG<br>Same Type<br>as DUT VDD<br>VGS • dv/dt controlled by  RG<br>• ISD controlled by pulse period<br>Gate Pulse Width<br>VGS D = --------------------------Gate Pulse Period 10V<br>( Driver )<br>IFM , Body Diode Forward Current<br>I SD<br>( DUT ) di/dt<br>IRM<br>Body Diode Reverse Current<br>VDS<br>( DUT ) Body Diode Recovery dv/dt<br>VSD VDD<br>Body Diode<br>Forward Voltage Drop<br>**----- End of picture text -----**<br>


©2001 Fairchild Semiconductor Corporation 

Rev. A1. May 2001 

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**----- Start of picture text -----**<br>
Package Dimensions<br>DPAK<br>6.60 ±0.20<br>5.34 ±0.30<br>2.30 ±0.10<br>(0.50) (4.34) (0.50) 0.50 ±0.10<br>MAX0.96 0.76 ±0.10<br>0.50 ±0.10<br>2.30TYP 2.30TYP 1.02 ±0.20<br>[2.30±0.20] [2.30±0.20] 2.30 ±0.20<br>6.60 ±0.20<br>(5.34)<br>(5.04)<br>(1.50)<br>(2XR0.25)<br>0.76 ±0.10<br>0.20<br>±<br>0.70<br>0.20<br>±<br>0.20<br>±<br>0.60  0.20± 0.30± 0.10±<br>6.10<br>2.70  9.50  0.91<br>0.20<br>±<br>MIN0.55<br>0.80<br>0.10<br>±<br>0.89<br>(0.70) (0.90) (1.00)<br>0.20<br>±<br>(3.05)<br>0.30± 0.20±<br>6.10<br>9.50  2.70<br>(0.10)<br>**----- End of picture text -----**<br>


©2001 Fairchild Semiconductor Corporation 

Rev. A1. May 2001 

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**----- Start of picture text -----**<br>
Package Dimensions   (Continued)<br>IPAK<br>6.60 ±0.20 2.30 ±0.20<br>5.34 ±0.20<br>(0.50) (4.34) (0.50) 0.50 ±0.10<br>MAX0.96<br>0.76 ±0.10<br>0.50 ±0.10<br>2.30TYP 2.30TYP<br>[2.30±0.20] [2.30±0.20]<br>0.20<br>±<br>0.20<br>± 0.20<br>±<br>0.60<br>0.70<br>6.10<br>0.10<br>± 0.30<br>0.80  ±<br>0.20± 0.30 16.10<br>±<br>1.80<br>9.30<br>**----- End of picture text -----**<br>


©2001 Fairchild Semiconductor Corporation 

Rev. A1. May 2001 

## **TRADEMARKS** 

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 

|ACEx™|FAST®|OPTOPLANAR™|SuperSOT™-3|
|---|---|---|---|
|Bottomless™|FASTr™|PACMAN™|SuperSOT™-6|
|CoolFET™|FRFET™|POP™|SuperSOT™-8|
|CROSSVOLT™|GlobalOptoisolator™|PowerTrench®|SyncFET™|
|DenseTrench™|GTO™|QFET™|TinyLogic™|
|DOME™|HiSeC™|QS™|UHC™|
|EcoSPARK™|ISOPLANAR™|QT Optoelectronics™|UltraFET®|
|E2CMOS™|LittleFET™|Quiet Series™|VCX™|
|EnSigna™|MicroFET™|SLIENT SWITCHER®||
|FACT™|MICROWIRE™|SMART START™||
|FACT Quiet Series™|OPTOLOGIC™|Stealth™||



## **DISCLAIMER** 

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 

## **LIFE SUPPORT POLICY** 

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. 

As used herein: 

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 

## **PRODUCT STATUS DEFINITIONS** 

## **Definition of Terms** 

|**Datasheet Identification**|**Product Status**|**Definition**|
|---|---|---|
|Advance Information|Formative or In<br>Design|This datasheet contains the design specifications for<br>product development. Specifications may change in<br>any manner without notice.|
|Preliminary|First Production|This datasheet contains preliminary data, and<br>supplementary data will be published at a later date.<br>Fairchild Semiconductor reserves the right to make<br>changes at any time without notice in order to improve<br>design.|
|No Identification Needed|Full Production|This datasheet contains final specifications. Fairchild<br>Semiconductor reserves the right to make changes at<br>any time without notice in order to improve design.|
|Obsolete|Not In Production|This datasheet contains specifications on a product<br>that has been discontinued by Fairchild semiconductor.<br>The datasheet is printed for reference information only.|



©2001 Fairchild Semiconductor Corporation 

Rev. H2 



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