# Power MOSFET, P Channel, 40 V, 50 A, 0.0135 ohm, DFN, Surface Mount

![Product image](https://novapart.co/image/farnell:2895726/)

**URL**: https://novapart.co/products/FDWS9510L-F085/power-mosfet-p-channel-40-v-50-a-00135-ohm-dfn
**SKU**: FDWS9510L-F085
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.5120
**Stock**: 10+

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:-50A; Drain Source Voltage Vds:-40V; On Resistance Rds(on):0.011ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs:-1.8

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (15-Jan-2018) |
| No. Of Pins | 8Pins |
| Channel Type | P Channel |
| Product Range | PowerTrench |
| Qualification | AEC-Q101 |
| Power Dissipation | 75W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | DFN |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 50A |
| Drain Source On State Resistance | 0.0135ohm |
| Gate Source Threshold Voltage Max | 1.8V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2895726/)

**DATA SHEET www.onsemi.com** ~~ee~~ 

## MOSFET – P-Channel, Logic Level, POWERTRENCH-40 V, -50 A, 13.5 m ° 

## -40 V, -50 A, 13.5 m 

## FDWS9510L-F085 

## **Features** 

- Typ RDS(on) = 11 m at VGS = −10 V; ID = −50 A 

- Typ Qg(tot) = 28 nC at VGS = −10 V; ID = −50 A 

- UIS Capability 

- Wettable Flanks for Automatic Optical Inspection (AOI) 

- AEC−Q101 Qualified 

**==> picture [193 x 155] intentionally omitted <==**

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VDSS RDS(ON) MAX ID MAX<br>−40 V 13.5 m  @ −10 V −50 A<br>[-—a a= ++ +<br>D (5,6,7,8)<br>G (4)<br>S (1,2,3)<br>**----- End of picture text -----**<br>


**P−Channel MOSFET** 

- These Devices are Pb−Free and are RoHS Compliant 

## **Applications** 

- Automotive Engine Control 

- Powertrain Management 

- Solenoid and Motor Drivers 

- Electronic Steering 

- Integrated Starter/Alternator 

- Distributed Power Architectures and VRM 

**==> picture [187 x 88] intentionally omitted <==**

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Top Bottom<br>D<br>D<br>D<br>D<br>G<br>S<br>oG + S aa<br>S<br>\ Pin 1<br>DFNW8<br>CASE 507AU<br>**----- End of picture text -----**<br>


- Primary Switch for 12 V Systems 

## **MARKING DIAGRAM** 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) 

|**MAXIMUM RATINGS**(TJ = 25J = 25= 25°C unless otherwise noted)|**MAXIMUM RATINGS**(TJ = 25J = 25= 25°C unless otherwise noted)|C unless otherwise noted)|||
|---|---|---|---|---|
|**Parameter**<br>~~CT~~||**Symbol**|**Value**|**Unit**|
|Drain−to−Source Voltage<br>~~CTOO~~||VDSS|−40|V|
|Gate−to−Source Voltage<br>~~CTOO~~||VGS|±16|V|
|Continuous Drain Current<br>(VGS= 10 V) (Note 1)<br>~~OO~~|TC= 25°C<br>~~OO~~|ID|−50|A|
|Pulsed Drain Current<br>~~a~~|TC= 25°C<br>~~a~~||See<br>Figure 4<br>ee||
|Single Pulse Avalanche Energy (Note 2)<br>~~ee~~||EAS|32|mJ|
|Power Dissipation<br>~~ee~~||PD|75|W|
|Derate above 25°C<br>~~ee~~|||0.5|W/°C|
|Operating and Storage Temperature<br>~~ee~~<br>~~eo~~||TJ, TSTG<br>~~eo~~|−55 to<br>+175<br>~~eo~~|°C<br>~~eo~~|
|Thermal Resistance (Junction−to−Case)<br>~~PoC“~~||R JC<br>~~PoC“~~|2<br>~~PoC“~~|°C/W<br>~~PoC“~~|
|Maximum Thermal Resistance<br>(Junction−to−Ambient) (Note 3)<br>~~et~~||R JA<br>~~et~~|50<br>~~et~~|°C/W<br>~~et~~|



1. Current is limited by wirebond configuration 

2. Starting Tj = 25 ° C, L = 40 H, IAS = −40 A, VDD = −40 V during inductor charging and VDD = 0 V during time in avalanche 

3. R JA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R JC is guaranteed by design while R JA is determined by the user’s board design. The maximum rating presented here is based on mounting on a 1 in[2] pad of 2 oz copper. 

**==> picture [50 x 29] intentionally omitted <==**

**----- Start of picture text -----**<br>
ON AYWWWL<br>FDWS<br>9510L<br>**----- End of picture text -----**<br>


A = Assembly Location Y = Year WW = Work Week WL = Assembly Lot FDWS = Device Code 9510L = Device Code 

(Note: Microdot may be in either location) 

## **ORDERING INFORMATION** 

|**Device**<br>**Package**<br>**Shipping**†|
|---|
|FDWS9510L−F085<br>DFNW8<br>(Power56)<br>(Pb−Free)<br>3000 /<br>Tape & Reel|
|†For information on tape and reel specifications,<br>including part orientation and tape sizes, please<br>refer to our Tape and Reel Packaging Specification<br>Brochure, BRD8011/D.|



Publication Order Number: **FDWS9510L−F085/D** 

**1** 

© Semiconductor Components Industries, LLC, 2018 **October, 2021 − Rev. 2** 

**FDWS9510L−F085** 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRIC**|**AL CHARACTERISTICS**(TJ= 25°C|unless otherwise specified)|unless otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|BVDSS|Drain−to−Source Breakdown Voltage|ID= −250�A, VGS= 0 V||−40|−|−|V|
|IDSS|Drain−to−Source Leakage Current|VDS= −40 V,<br>VGS= 0 V|TJ= 25°C|−|−|1|�A|
||||TJ= 175°C (Note 4)|−|−|1|mA|
|IGSS|Gate−to−Source Leakage Current|VGS|=±16 V|−|−|±100|nA|
|**ON CHARACTERISTICS**||||||||
|VGS(th)|Gate−to−Source Threshold Voltage|VGS= VDS, ID= −250�A||−1|−1.8|−3|V|
|RDS(on)|Drain−to−Source On−Resistance|ID= −25 A, VGS= −4.5 V||−|18|23|m�|
|||ID= −50 A<br>VGS= −10 V|TJ= 25°C|−|11|13.5|m�|
||||TJ= 175°C (Note 4)|−|18.8|23||
|**DYNAMIC CHARACTERISTICS**||||||||
|Ciss|Input Capacitance|VDS= −20 V, VGS= 0 V, f = 1 MHz||−|2320|−|pF|
|Coss|Output Capacitance|||−|811|−||
|Crss|Reverse Transfer Capacitance|||−|38|−||
|Rg|Gate Resistance|VGS= 0.5 V, f = 1 MHz||−|23|−|�|
|Qg(tot)|Total Gate Charge|VGS= 0 to −10 V||−|28|37|nC|
|Qg(th)|Threshold Gate Charge|VGS= 0 to −1 V||−|4|−||
|Qgs|Gate−to−Source Gate Charge|||−|7|−||
|Qgd|Gate−to−Drain “Miller” Charge|||−|4|−||
|**SWITCHING CHARACTERISTICS**||||||||
|ton|Turn−On Time|VDD= −20 V, ID= −50 A,<br>VGS= −10 V, RGEN= 6�||−|−|20|ns|
|td(on)|Turn−On Delay Time|||−|10|−||
|tr|Turn−On Rise Time|||−|4|−||
|td(off)|Turn−Off Delay Time|||−|110|−||
|tf|Turn−Off Fall Time|||−|37|−||
|toff|Turn−Off Time|||−|−|222||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|VSD|Source−to−Drain Diode Voltage|ISD= −50 A, VGS= 0 V||−|−1|−1.25|V|
|||ISD= −25 A, VGS= 0 V||−|−0.9|−1.2||
|Trr|Reverse Recovery Time|IF= −50 A, dISD/dt = 100 A/�s||−|44|62|ns|
|Qrr|Reverse Recovery Charge|||−|31|47|nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. The maximum value is specified by design at TJ = 175 ° C. Product is not tested to this condition in production 

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**2** 

**FDWS9510L−F085** 

## **TYPICAL CHARACTERISTICS** 

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1.2 60<br>Current Limited<br>1.0 50 by Package<br>0.8 40<br>0.6 30<br>0.4 20<br>0.2 10 VGS = 10 V<br>0 0<br>0 25 50 75 100 125 150 175 25 50 75 100 125 150 175<br>TC, CASE TEMPERATURE ( ° C) TC, CASE TEMPERATURE ( ° C)<br>Figure 1. Normalized Power Dissipation vs. Figure 2. Maximum Continuous Drain Current<br>Case Temperature vs. Case Temperature<br>2<br>1<br>50% Duty Cycle<br>20%<br>P DM<br>10%<br>0.1 5%<br>2% t1<br>1% t2<br>DUTY CYCLE, D = t1/t2<br>Single Pulse Peak T J  = P DM  X Z �JC  X R �JC  + T C<br>0.01<br>0.00001 0.0001 0.001 0.01 0.1 1 10<br>t, RECTANGULAR PULSE DURATION (s)<br>Figure 3. Normalized Maximum Transient Thermal Impedance<br>1000<br>VGS = −10 V TC = 25 ° C<br>For temperatures above 25 ° C<br>derate peak current as follows:<br>175  � T<br>I  � I C<br>25 � 150<br>100 � �<br>Single Pulse<br>10<br>0.00001 0.0001 0.001 0.01 0.1 1 10<br>t, RECTANGULAR PULSE DURATION (s)<br>, DRAIN CURRENT (A)<br>ID<br>POWER DISSIPATION MULTIPLIER<br>, NORMALIZED THERMAL IMPEDANCE<br>JC<br>�<br>Z<br>, PEAK CURRENT (A)<br>IDM<br>**----- End of picture text -----**<br>


**Figure 4. Peak Current Capability** 

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**3** 

**FDWS9510L−F085** 

## **TYPICAL CHARACTERISTICS** 

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1K<br>Operation in this area may<br>be limited by package<br>100<br>100  � s<br>10<br>TC = 25 ° C<br>TJ = Max Rated<br>Single Pulse 1 ms<br>1<br>10 ms<br>Operation in this area may 100 ms<br>be limited by RDS(on)<br>0.1<br>0.1 1 10 100<br>−VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 5. Forward Bias Safe Operating Area** 

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120<br>Pulse Duration = 250  � s<br>Duty Cycle = 0.5% Max<br>90<br>VDS = 5 V<br>60<br>TJ = 25 ° C<br>30<br>TJ = 175 ° C<br>TJ = −55 ° C<br>0<br>1 2 3 4 5 6<br>VGS, GATE−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 7. Transfer Characteristics** 

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100<br>Starting TJ = 25 ° C<br>10 Starting TJ = 150 ° C<br>If R = 0<br>tAV=(L)(IAS)/(1.3*Rated BVDSS− VDD)<br>If R  ≠  0<br>1 tAV=(L/R)In[(IAS*R)/(1.3*Rated BVDSS− VDD)+1]<br>0.001 0.01 0.1 1 10 100<br>, AVALANCHE CURRENT (A)<br>IAS<br>**----- End of picture text -----**<br>


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tAV, TIME IN AVALANCHE (mS)<br>**----- End of picture text -----**<br>


**Figure 6. Unclamped Inductive Switching Capability** 

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100 VGS = 0 V<br>10<br>1<br>0.1<br>TJ = 175 ° C<br>0.01<br>TJ = 25 ° C TJ = −55 ° C<br>0.001<br>0 0.2 0.4 0.6 0.8 1.0 1.2<br>VSD, BODY DIODE FORWARD VOLTAGE (V)<br>, REVERSE DRAIN CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 8. Forward Diode Characteristics** 

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150<br>250  � s Pulse Width 7.0 V<br>TJ = 25 ° C<br>5.0 V<br>VGS = 10 V<br>100<br>4.5 V<br>4.0 V<br>50<br>3.5 V<br>0<br>0 1 2 3 4 5<br>VDS, DRAIN−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 9. Saturation Characteristics** 

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150<br>250 TJ = 175 � s Pulse Width ° C VGS = 10 V 7.0 V<br>5.0 V<br>100<br>4.5 V<br>4.0 V<br>50<br>3.5 V<br>0<br>0 1 2 3 4 5<br>VDS, DRAIN−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 10. Saturation Characteristics** 

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**4** 

**FDWS9510L−F085** 

## **TYPICAL CHARACTERISTICS** 

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120 1.8<br>Pulse Duration = 250  � s ID = −50 A<br>100 Duty Cycle = 0.5% Max 1.6 VGS = −10 V<br>80 1.4<br>ID = −50 A<br>60 1.2<br>40 1.0<br>TJ = 175 ° C<br>20 0.8 Pulse Duration = 250  � s<br>TJ = 25 ° C Duty Cycle = 0.5% Max<br>0 0.6<br>3 4 5 6 7 8 9 10 −80 −40 0 40 80 120 160 200<br>VGS, GATE−TO−SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( ° C)<br>Figure 11. RDS(on) vs. Gate Voltage Figure 12. Normalized RDS(on) vs. Junction<br>Temperature<br>1.2 1.10<br>VIDGS = −250  = VDS � A ID = 5 mA<br>1.0 1.05<br>0.8 1.00<br>0.6 0.95<br>0.4 0.90<br>−80 −40 0 40 80 120 160 200 −80 −40 0 40 80 120 160 200<br>TJ, JUNCTION TEMPERATURE ( ° C) TJ, JUNCTION TEMPERATURE ( ° C)<br>Figure 13. Normalized Gate Threshold Voltage Figure 14. Normalized Drain−to−Source<br>vs. Temperature Breakdown Voltage vs. Junction Temperature<br>10K 10<br>ID = −50 A VDD = −16 V<br>8<br>C ISS<br>VDD = −24 V<br>1K<br>6<br>COSS<br>VDD = −20 V<br>4<br>100<br>f = 1 MHz 2<br>VGS = 0 V<br>CRSS<br>10 0<br>0.1 1 10 100 0 6 12 18 24 30<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC)<br>) �<br>, ON−RESISTANCE (m ON−RESISTANCE<br>DS(on)<br>R NORMALIZED DRAIN−SOURCE<br>BREAKDOWN VOLTAGE<br>NORMALIZED DRAIN−TO−SOURCE<br>NORMALIZED GATE THRESHOLD VOLTAGE<br>CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 15. Capacitance vs. Drain−to−Source Voltage** 

**Figure 16. Gate Charge vs. Gate−to−Source Voltage** 

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**5** 

**FDWS9510L−F085** 

## **PACKAGE DIMENSIONS** 

**DFNW8 5.2x6.3, 1.27P** CASE 507AU ISSUE A 

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**6** 

**FDWS9510L−F085** 

POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. 

**onsemi** , , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **onsemi** owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of **onsemi** ’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. **onsemi** reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and **onsemi** makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using **onsemi** products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by **onsemi** . “Typical” parameters which may be provided in **onsemi** data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. **onsemi** does not convey any license under any of its intellectual property rights nor the rights of others. **onsemi** products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use **onsemi** products for any such unintended or unauthorized application, Buyer shall indemnify and hold **onsemi** and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that **onsemi** was negligent regarding the design or manufacture of the part. **onsemi** is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

**LITERATURE FULFILLMENT** : **TECHNICAL SUPPORT Email Requests to:** orderlit@onsemi.com **North American Technical Support: Europe, Middle East and Africa Technical Support:** Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 00421 33 790 2910 **onsemi Website:** www.onsemi.com Phone: 011 421 33 790 2910 For additional information, please contact your local Sales Representative 

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