# Power MOSFET, P Channel, 40 V, 65 A, 0.008 ohm, DFN, Surface Mount

![Product image](https://novapart.co/image/farnell:2895712/)

**URL**: https://novapart.co/products/FDWS9509L-F085/power-mosfet-p-channel-40-v-65-a-0008-ohm-dfn
**SKU**: FDWS9509L-F085
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.9310
**Stock**: 10+

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:-65A; Drain Source Voltage Vds:-40V; On Resistance Rds(on):0.0063ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs:-1.

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (15-Jan-2018) |
| No. Of Pins | 8Pins |
| Channel Type | P Channel |
| Product Range | PowerTrench |
| Qualification | AEC-Q101 |
| Power Dissipation | 107W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | DFN |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 65A |
| Drain Source On State Resistance | 0.008ohm |
| Gate Source Threshold Voltage Max | 1.7V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2895712/)

**==> picture [309 x 319] intentionally omitted <==**

**----- Start of picture text -----**<br>
www.onsemi.com<br>ON<br>-<br>FDWS9509L F085<br>(Note1)<br>P-Channel Logic Level Power Trench® MOSFET<br>- 40 V, - 65 A, 8.0 m <br>Features Top<br> Typical RDS(on) = 6.3 m at VGS = -10V, ID = -65 A<br> Typical Qg(tot) = 48 nC at VGS = -10V, ID = -65 A<br> UIS Capability<br> RoHS Compliant<br> Qualified to AEC Q101<br> Wettable flanks for automatic optical inspection (AOI)<br>Applications<br>  Automotive Engine Control<br>  PowerTrain Management<br>  Solenoid and Motor Drivers<br>  Electronic Steering<br>goHs<br>  Integrated Starter/Alternator ssas °<br>  Distributed Power Architectures and VRM 2<br>=<br>  Primary Switch for 12V Systems ( de=we<br>MOSFET Maximum Ratings   TJ = 25°C unless otherwise noted.<br>**----- End of picture text -----**<br>


|**Symbol**<br>**Parameter**<br>VDSS<br>Drain-to-Source Voltage<br>VGS<br>Gate-to-Source Voltage|e||**Ratings**<br>**Units**<br>-40<br>V<br>±16<br>V|**Ratings**<br>**Units**<br>-40<br>V<br>±16<br>V|**Ratings**<br>**Units**<br>-40<br>V<br>±16<br>V|
|---|---|---|---|---|---|
|ID<br>Drain Current - Continuous(VGS=10) (Note 2)T<br>Pulsed Drain Current                                                      T|TC= 25°C<br>Pulsed Drain Current                                                      TC= 25°C|= 25°C|See Fi|-65<br>A<br>See Figure 4||
|EAS<br>Single Pulse Avalanche Energy|(Note 3)|||84|mJ|
|PD<br>Power Dissipation<br>Derate Above 25oC||||107<br>W<br>0.71<br>W/oC||
|TJ, TSTG<br>Operatingand Storage Temperature|||-55 to + 175|-55 to + 175|-55 to + 175<br>oC|
|RJC<br>Thermal Resistance, Junction to Case||||1.4|oC/W|
|RJA<br>Maximum Thermal Resistance, Junction to Ambient|Maximum Thermal Resistance, Junction to Ambient(Note 4)|||50|oC/W|
|**Package Marking and Ordering Information**||||||
|**Device Marking**<br>**Device**<br>**Package**|**Reel Size**|**Tape Width**|||**Quantity**|
|FDWS9509L<br>FDWS9509L-F085<br>Power 56|13”||12mm||3000 units|
|**Notes:**||||||
|1:  Due to system integration constraints between Fairchild and ON semiconductor, as of November 1, 2017 any product part number with a||||1:  Due to system integration constraints between Fairchild and ON semiconductor, as of November 1, 2017 any product part number with a||
|underscore will be replaced with a dash. This is a notification.||||||



## **Package Marking and Ordering Information** 

- 2:  Current is limited by bondwire configuration. 

- 3:  Starting TJ = 25°C, L = 50H, IAS = 56A, VDD = -40V during inductor charging and VDD = 0V during time in avalanche. 

- 4:  RJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins.  RJC is guaranteed by design, while RJAis determined by the board design.  The maximum rating presented here is based on mounting on a 1 in[2 ] pad of 2oz copper. 

September, 2017, Rev. 1.0                                                                                                                                                              FDWS9509L-F085/D 

Semiconductor Components Industries, LLC, 2017                                                                                                    Publication Order Number: 

**1** 

**Electrical Characteristics** TJ 

|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>BVDSS<br>Drain-to-Source Breakdown Voltage<br>ID= -250A, VGS= 0V<br>-40<br>-<br>-<br>V<br>IDSS<br>Drain-to-Source Leakage Current<br>VDS= -40V, TJ= 25oC<br>-<br>-<br>1<br>A<br>VGS= 0V<br>TJ= 175oC (Note 5)<br>-<br>-<br>1<br>mA<br>IGSS<br>Gate-to-Source Leakage Current<br>VGS= ±16V<br>-<br>-<br>±100<br>nA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS, ID= -250A<br>-1<br>-1.7<br>-3<br>V<br>RDS(on)<br>Drain to Source On Resistance<br>ID= -65A, VGS= -4.5V<br>-<br>10.7<br>15.3<br>ID= -65A,<br>VGS= -10V<br>TJ= 25oC<br>-<br>6.3<br>8.0<br>m<br>TJ= 175oC(Note 5)<br>-<br>10.6<br>13.0<br>m<br>Ciss<br>Input Capacitance<br>VDS= -20V, VGS= 0V,<br>f = 1MHz<br>-<br>3360<br>-<br>pF<br>Coss<br>Output Capacitance<br>-<br>1230<br>-<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>-<br>38<br>-<br>pF<br>Rg<br>Gate Resistance<br>VGS= 0.5V, f = 1MHz<br>-<br>21<br>-<br><br>Qg(ToT)<br>Total Gate Charge<br>VGS= 0 to -10V<br>VDD= -20V<br>ID= -65A<br>-<br>48<br>67<br>nC<br>Qg(th)<br>Threshold Gate Charge<br>VGS= 0 to -2V<br>-<br>7<br>-<br>nC<br>Qgs<br>Gate-to-Source Gate Charge<br>-<br>12<br>-<br>nC<br>Qgd<br>Gate-to-Drain “Miller“ Charge<br>-<br>6<br>-<br>nC<br>**Switching Characteristics**<br>ton<br>Turn-On Time<br>VDD= -20V, ID= -65A,<br>VGS= -10V, RGEN= 6<br>-<br>-<br>22<br>ns<br>td(on)<br>Turn-On Delay<br>-<br>10<br>-<br>ns<br>tr<br>Rise Time<br>-<br>5<br>-<br>ns<br>td(off)<br>Turn-Off Delay<br>-<br>198<br>-<br>ns<br>tf<br>Fall Time<br>-<br>71<br>-<br>ns<br>toff<br>Turn-Off Time<br>-<br>-<br>405<br>ns<br>~~Oo~~<br>~~a~~<br>~~———==—~~<br>~~———" ae~~<br>~~SEE~~|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>BVDSS<br>Drain-to-Source Breakdown Voltage<br>ID= -250A, VGS= 0V<br>-40<br>-<br>-<br>V<br>IDSS<br>Drain-to-Source Leakage Current<br>VDS= -40V, TJ= 25oC<br>-<br>-<br>1<br>A<br>VGS= 0V<br>TJ= 175oC (Note 5)<br>-<br>-<br>1<br>mA<br>IGSS<br>Gate-to-Source Leakage Current<br>VGS= ±16V<br>-<br>-<br>±100<br>nA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS, ID= -250A<br>-1<br>-1.7<br>-3<br>V<br>RDS(on)<br>Drain to Source On Resistance<br>ID= -65A, VGS= -4.5V<br>-<br>10.7<br>15.3<br>ID= -65A,<br>VGS= -10V<br>TJ= 25oC<br>-<br>6.3<br>8.0<br>m<br>TJ= 175oC(Note 5)<br>-<br>10.6<br>13.0<br>m<br>Ciss<br>Input Capacitance<br>VDS= -20V, VGS= 0V,<br>f = 1MHz<br>-<br>3360<br>-<br>pF<br>Coss<br>Output Capacitance<br>-<br>1230<br>-<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>-<br>38<br>-<br>pF<br>Rg<br>Gate Resistance<br>VGS= 0.5V, f = 1MHz<br>-<br>21<br>-<br><br>Qg(ToT)<br>Total Gate Charge<br>VGS= 0 to -10V<br>VDD= -20V<br>ID= -65A<br>-<br>48<br>67<br>nC<br>Qg(th)<br>Threshold Gate Charge<br>VGS= 0 to -2V<br>-<br>7<br>-<br>nC<br>Qgs<br>Gate-to-Source Gate Charge<br>-<br>12<br>-<br>nC<br>Qgd<br>Gate-to-Drain “Miller“ Charge<br>-<br>6<br>-<br>nC<br>**Switching Characteristics**<br>ton<br>Turn-On Time<br>VDD= -20V, ID= -65A,<br>VGS= -10V, RGEN= 6<br>-<br>-<br>22<br>ns<br>td(on)<br>Turn-On Delay<br>-<br>10<br>-<br>ns<br>tr<br>Rise Time<br>-<br>5<br>-<br>ns<br>td(off)<br>Turn-Off Delay<br>-<br>198<br>-<br>ns<br>tf<br>Fall Time<br>-<br>71<br>-<br>ns<br>toff<br>Turn-Off Time<br>-<br>-<br>405<br>ns<br>~~Oo~~<br>~~a~~<br>~~———==—~~<br>~~———" ae~~<br>~~SEE~~|
|---|---|
|**Drain-Source Diode Characteristics**||
|**Note:**<br>VSD<br>Source-to-Drain Diode Voltage<br>ISD= -65A, VGS = 0V<br>-<br>1.0<br>-1.25<br>V<br>ISD= -32.5A, VGS = 0V<br>-<br>0.9<br>-1.2<br>V<br>trr<br>Reverse-RecoveryTime<br>IF= -65A, dISD/dt = 100A/s<br>-<br>57<br>80<br>ns<br>Qrr<br>Reverse-Recovery Charge<br>-<br>45<br>67<br>nC<br>~~——==~~||



5:  The maximum value is specified by design at TJ = 175°C.  Product is not tested to this condition in production. 

www.onsemi.com 

**2** 

## **Typical Characteristics** 

**==> picture [433 x 544] intentionally omitted <==**

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1.2 100<br>VGS = -10V<br>90<br>1.0 ee<br>80<br>70<br>0.8<br>CNCEPE | 60 OBESE<br>0.6 50<br>40 CURRENT LIMITED<br>0.4 BY PACKAGE<br>FEPREER) 6G 30  BRE<br>20<br>0.2<br>== 10<br>0.0 CECE = 0 SR<br>0 25 50 75 100 125 150 175 25 50 75 100 125 150 175<br>TC, CASE TEMPERATURE( [o] C) TC, CASE TEMPERATURE( [o] C)<br>Figure 1.  Normalized Power Dissipation vs. Case  Figure 2.  Maximum Continuous Drain Current vs.<br>Temperature              Case Temperature<br>2<br>DUTY CYCLE - DESCENDING ORDER<br>1<br>D = 0.50<br>      0.20<br>      0.10 P DM<br>      0.05<br>      0.02<br>0.1       0.01 t 1<br>t2<br>o SINGLE PULSE NOTES: ah<br>DUTY FACTOR: D = t 1 /t 2<br>PEAK TJ = PDM x Z  JC x R  JC + TC<br>0.01<br>10-5 10-4 10-3 10-2 10-1 1<br>t, RECTANGULAR  PULSE DURATION(s)<br>Figure 3.  Normalized Maximum Transient Thermal Impedance<br>1000<br>T C = 25 [o] C VGS = -10V<br>FOR TEMPERATURES<br>ABOVE 25 [o] C DERATE PEAK<br>CURRENT AS FOLLOWS:<br>I = I 25 175 - TC<br>150<br>100<br>stilaimeeil<br>SINGLE PULSE<br>10<br>10-5 10-4 10-3 10-2 10-1 1 10<br>t, RECTANGULAR PULSE DURATION(s)<br>Figure 4.  Peak Current Capability<br>, DRAIN CURRENT (A)<br>D<br>-I<br>POWER DISSIPATION MULTIPLIER<br>IMPEDANCE, ZJC <br>NORMALIZED THERMAL<br>PEAK CURRENT (A)<br>,<br>IDM<br>**----- End of picture text -----**<br>


www.onsemi.com 

**3** 

## **Typical Characteristics** 

**==> picture [420 x 580] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000 100 If R = 0 If R t tAVAV =   = (L)(I  0(L/RAS)ln[ )/(1.3 (IAS ** R RATED BV )/(1.3 * RATED BVDSS - V DDDSS )  - VDD)  +1]<br>100<br>STARTING TJ = 25 [o] C<br>10 100  s 10<br>OPERATION IN THIS<br>AREA MAY BE  1ms STARTING TJ = 150 [o] C<br>LIMITED BY rDS(on)<br>1 SINGLE PULSE 10ms<br>TJ = MAX RATED 100ms<br>TC = 25 [o] C<br>1<br>0.1 0.001 0.01 0.1 1 10 100 1000<br>0.1 1 10 100 200 tAV, TIME IN AVALANCHE (ms)<br>-VDS, DRAIN TO SOURCE VOLTAGE (V)<br>NOTE: Refer to ONsemi Application Notes AN7514 and AN7515<br>Figure 5.  Forward Bias Safe Operating Area Figure 6.  Unclamped Inductive Switching<br>Capability<br>300 300<br>PULSE DURATION = 250  s 100 VGS = 0 V<br>DUTY CYCLE = 0.5% MAX<br>TE<br>250<br>VDS = -5V<br>10<br>200 Te TJ = 175  [o] C<br>TJ = 175 [o] C<br>1<br>150 ae TJ = 25 [o] C TJ = 25 [ o] C<br>0.1<br>100<br>mo acne<br>T J  = -55 [ o] C<br>50 7s 0.01<br>TJ = -55 [o] C<br>ann<br>0 0.001<br>2 3 4 5 6 7 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4<br>-VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 7.  Transfer Characteristics Figure 8.  Forward Diode Characteristics<br>300 250<br>250 V250Tj=25GS  s PULSE WIDTH [o] C 200 Tj=175250  s PULSE WIDTH [o] C<br>-10V  Top VGS<br>-7V -10V  Top<br>200 -5V -7V<br>-4.5V-4V 150 -5V -4.5V<br>150 iP -3.5V  Bottom SsZssiaee=oP -4V ee<br>-3.5V  Bottom<br>p= 100 =a<br>100<br>Za Za<br>50<br>50<br>L-_—— freee<br>0 A) 0 Ae<br>0 1 2 3 4 5 0 1 2 3 4 5<br>-VDS, DRAIN TO SOURCE VOLTAGE (V) -VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 9.  Saturation Characteristics  Figure 10.  Saturation Characteristics<br>, DRAIN CURRENT (A)<br>D<br> -I<br>, AVALANCHE CURRENT (A)<br>AS<br>-I<br>, DRAIN CURRENT (A)<br>-ID , REVERSE DRAIN CURRENT (A)S<br>-I<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>D D<br>-I -I<br>**----- End of picture text -----**<br>


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**4** 

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**----- Start of picture text -----**<br>
Typical Characteristics<br>60 1.7<br>DUTY CYCLE = 0.5% MAXPULSE DURATION = 250  s 1.6 DUTY CYCLE = 0.5% MAXPULSE DURATION = 250  s<br>50 lf ID = -65A . 1.5 TT<br>1.4 ID = -65A<br>40 VGS = -10V<br>Mo 1.3 eee<br>30 1.2<br>1.1<br>20 Abe pp) ERRERRRSE E<br>TJ = 175 [o] C 1.0<br>0.9<br>10<br>0.8<br>TJ = 25 [o] C<br>0 | rer 0.7 CALE EEE<br>3 4 5 6 7 8 9 10 -75 -50 -25 0 25 50 75 100 125 150 175<br>-VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE( [o] C)<br>Figure 11.  RDSON vs. Gate Voltage Figure 12.  Normalized RDSON vs. Junction<br>Temperature<br>) <br>m<br>, DRAIN TO SOURCE  NORMALIZED<br>ON-RESISTANCE (<br>rDS(on)<br> DRAIN TO SOURCE ON-RESISTANCE<br>**----- End of picture text -----**<br>


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1.25 1.8<br>VGS = VDS<br>ID = -250  A ID = -5mA<br>1.00 1.5<br>0.75 1.2<br>0.50 0.9<br>0.25 0.6<br>-80 -40 0 40 80 120 160 200 -80 -40 0 40 80 120 160 200<br>TJ, JUNCTION TEMPERATURE( [o] C) TJ, JUNCTION TEMPERATURE ( [o] C)<br>Figure 13.  Normalized Gate Threshold Voltage vs.  Figure 14.  Normalized Drain to Source<br>Temperature Breakdown Voltage vs. Junction Temperature<br>10000 10<br>Ciss ID = -65A VDD = -16V<br>8<br>1000 Coss V DD = -20V<br>6<br>VDD = -24V<br>4<br>100<br>ee f = 1MHz C rss 2 Oe<br>VGS = 0V<br>10 0 ZET<br>0.1 1 10 150 0 10 20 30 40 50<br>-VDS, DRAIN TO SOURCE VOLTAGE (V) Qg ,  GATE CHARGE(nC)<br>Figure 15.  Capacitance vs. Drain to Source  Figure 16.  Gate Charge  vs. Gate to Source<br>Voltage Voltage<br>NORMALIZED GATE<br>THRESHOLD VOLTAGE  BREAKDOWN VOLTAGE<br>NORMALIZED DRAIN TO SOURCE<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE(V)<br>GS<br>-V<br>**----- End of picture text -----**<br>


www.onsemi.com 

**5** 

**DFN8 5.1x6.3, 1.27P** CASE 506DW ISSUE O 

**==> picture [463 x 537] intentionally omitted <==**

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