# Power MOSFET, N Channel, 80 V, 80 A, 0.0045 ohm, DFN, Surface Mount ![Product image](https://novapart.co/image/farnell:3368788RL/) **URL**: https://novapart.co/products/FDWS86368-F085/power-mosfet-n-channel-80-v-a-00045-ohm-dfn **SKU**: FDWS86368-F085 **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.9310 **Stock**: 500+ **Lead Time**: 106 days (indicative) ## Specifications | Parameter | Value | |---|---| | Svhc | Lead (25-Jun-2025) | | No. Of Pins | 8Pins | | Channel Type | N Channel | | Product Range | PowerTrench | | Qualification | AEC-Q101 | | Power Dissipation | 214W | | Transistor Mounting | Surface Mount | | Rds(On) Test Voltage | 10V | | Transistor Case Style | DFN | | Drain Source Voltage Vds | 80V | | Operating Temperature Max | 175°C | | Continuous Drain Current Id | 80A | | Drain Source On State Resistance | 0.0045ohm | | Gate Source Threshold Voltage Max | 3V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:3368788RL/) ## MOSFET, N-Channel, ® POWERTRENCH **80 V, 80 A, 4.5 m** ## FDWS86368-F085 ## **www.onsemi.com** ## **Features** - Typical RDS(on) = 3.7 m Q at VGS = 10 V, ID = 80 A - Typical Qg(tot) = 57 nC at VGS = 10 V, ID = 80 A - UIS Capability - Wettable Flanks for Automatic Optical Inspection (AOI) - AEC−Q101 Qualified and PPAP Capable - This Device is Pb−Free and is RoHS Compliant ## **Applications** - Automotive Engine Control - PowerTrain Management - Solenoid and Motor Drivers - Integrated Starter/Alternator - Primary Switch for 12 V Systems **DFN8 5.1x6.3, 1.27P CASE 506DW** ## **MARKING DIAGRAM** $Y&Z&3&K FDWS86368 **==> picture [167 x 49] intentionally omitted <==** **----- Start of picture text -----**
$Y = ON Semiconductor Logo
&Z = Assembly Plant Code
&3 = Numeric Date Code
&K = Lot Code
FDWS86368 = Specific Device Code
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## **ORDERING INFORMATION** See detailed ordering and shipping information on page 2 of this data sheet. Publication Order Number: **FDWS86368−F085/D** **1** © Semiconductor Components Industries, LLC, 2016 **October, 2019 − Rev. 3** **FDWS86368−F085** **MOSFET MAXIMUM RATINGS** (TJ = 25 ° C, Unless otherwise noted) |**MOSFET MAX**|**IMUM RATINGS**(TJ= 25°C, Unless otherwise noted)||| |---|---|---|---| |**Symbol**|**Parameter**|**Ratings**|**Units**| |VDSS|Drain−to−Source Voltage|80|V| |VGS|Gate−to−Source Voltage|±20|V| |ID|Drain Current
−Continuous (VGS= 10 V) (Note 1)
TC= 25°C|80|A| ||−Pulsed
TC= 25°C|See Figure 4|| |EAS|Single Pulse Avalanche Energy
(Note 2)|82|mJ| |PD|Power Dissipation|214|W| ||Derate Above 25°C|1.43|W/°C| |TJ, TSTG|Operating and Storage Temperature|−55 to +175|°C| |RθJC|Thermal Resistance, Junction to Case|0.7|°C/W| |RθJA|Maximum Thermal Resistance, Junction to Ambient
(Note 3)|50|°C/W| Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Current is limited by bondwire configuration. 2. Starting TJ = 25 ° C, L = 40 � H, IAS = 64 A, VDD = 80 V during inductor charging and VDD = 0 V during time in avalanche. 3. R θ JA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. R θ JC is guaranteed by design, while R θ JA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in[2] pad of 2 oz copper. ## **PACKAGE MARKING AND ORDERING INFORMATION** |**Device Marking**|**Device**|**Package**|**Shipping**†| |---|---|---|---| |FDWS86368|FDWS86368−F085|DFN8 5.1x6.3, 1.27P (Pb−Free)|3000 units / Tape & Reel| †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D **www.onsemi.com** **2** **FDWS86368−F085** **ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) |**Symbol**|**Parameter**|**Test Conditions**|**Min.**|**Typ.**|**Max.**|**Units**| |---|---|---|---|---|---|---| |**OFF CHARACTERISTICS**||||||| |BVDSS|Drain−to−Source Breakdown
Voltage|ID= 250�A, VGS= 0 V|80|||V| |IDSS|Drain−to−Source Leakage
Current|VDS= 80 V, VGS= 0 V, TJ= 25°C|||1|�A| |||VDS= 80 V, VGS= 0 V, TJ= 175°C (Note 4)|||1|mA| |IGSS|Gate−to−Source Leakage
Current|VGS=±20 V|||±100|nA| |**ON CHARACTERISTICS**||||||| |VGS(th)|Gate to Source Threshold
Voltage|VGS= VDS, ID= 250�A|2.0|3.0|4.0|V| |RDS(on)|Drain to Source On Resistance|ID= 80 A, VGS= 10 V, TJ= 25°C||3.7|4.5|m�| |||ID= 80 A, VGS= 10 V, TJ= 175°C (Note 4)||7.4|9.0|| |**DYNAMIC**|**CHARACTERISTICS**|||||| |Ciss|Input Capacitance|VDS= 40 V, VGS= 0 V, f = 1 MHz||4350||pF| |Coss|Output Capacitance|||636||pF| |Crss|Reverse Transfer Capacitance|||20||pF| |Rg|Gate Resistance|f = 1 MHz||2.5||�| |Qg(TOT)|Total Gate Charge|VGS= 0 V to 10 V||57|75|nC| |Qg(th)|Threshold Gate Charge|VGS= 0 V to 2 V||8||nC| |Qgs|Gate−to−Source Gate Charge|||23||nC| |Qgd|Gate−to−Drain “Miller” Charge|||11||nC| |**SWITCHING CHARACTERISTICS**||||||| |ton|Turn−On Time|VDD= 40 V, ID= 80 A, VGS= 10V, RGEN= 6�|||60|ns| |td(on)|Turn−On Delay|||23||ns| |tr|Rise Time|||22||ns| |td(off)|Turn−Off Delay|||32||ns| |tf|Fall Time|||13||ns| |toff|Turn−Off Time||||59|ns| |**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||| |VSD|Source−to−Drain Diode
Voltage|VGS= 0 V, ISD= 80 A
VGS= 0 V, ISD= 40 A|||1.25
1.2|V| |trr|Reverse−Recovery Time|IF= 80 A,�ISD/�t = 100 A/�s, VDD= 64 V||58|75|ns| |Qrr|Reverse−Recovery Charge|||49|67|nC| Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. The maximum value is specified by design at TJ = 175 ° C. Product is not tested to this condition in production. **www.onsemi.com** **3** **FDWS86368−F085** ## **TYPICAL CHARACTERISTICS** **==> picture [188 x 150] intentionally omitted <==** **----- Start of picture text -----**
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0 25 50 75 100 125 150 175
TC, CASE TEMPERATURE( [o] C)
POWER DISSIPATION MULTIPLIER
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**==> picture [194 x 149] intentionally omitted <==** **----- Start of picture text -----**
200
175 CURRENT LIMITEDBY PACKAGE VGS = 10V
150 CURRENT LIMITED
BY SILICON
125
100
75
50
25
0
25 50 75 100 125 150 175 200
TC, CASE TEMPERATURE( [o] C)
, DRAIN CURRENT (A)
ID
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**Figure 1. Normalized Power Dissipation vs. Case Temperature** **Figure 2. Maximum Continuous Drain Current vs. Case Temperature** **==> picture [416 x 153] intentionally omitted <==** **----- Start of picture text -----**
2
DUTY CYCLE − DESCENDING ORDER
1
D = 0.50
0.20
0.10 P DM
0.05
0.02
0.1 0.01 t1
t2
NOTES:
DUTY FACTOR: D = t 1/t2
SINGLE PULSE PEAK T J = P DM x Z � JC x R � JC + T C
0.01
10−5 10−4 10−3 10−2 10−1 100 101
t, RECTANGULAR PULSE DURATION(s)
JC �
IMPEDANCE, Z
NORMALIZED THERMAL
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**Figure 3. Normalized Maximum Transient Thermal Impedance** **==> picture [421 x 171] intentionally omitted <==** **----- Start of picture text -----**
1000
VGS = 10V T C = 25 [o] C
FOR TEMPERATURES
ABOVE 25 [o] C DERATE PEAK
CURRENT AS FOLLOWS:
I = I 25 175 − T C
150
100
SINGLE PULSE
10
10−5 10−4 10−3 10−2 10−1 100 101
t, RECTANGULAR PULSE DURATION(s)
PEAK CURRENT (A)
,
IDM
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**Figure 4. Peak Current Capability** **www.onsemi.com** **4** **FDWS86368−F085** ## **TYPICAL CHARACTERISTICS** **==> picture [196 x 151] intentionally omitted <==** **----- Start of picture text -----**
1000
100
10 100us
1 OPERATION IN THIS
AREA MAY BE LIMITED BY rDS(on) 1ms
10ms
0.1 SINGLE PULSE 100ms
T J = MAX RATED
TC = 25 [o] C
0.01
0.1 1 10 100 500
VDS, DRAIN TO SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
D
I
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**Figure 5. Forward Bias Safe Operating Area** **==> picture [197 x 166] intentionally omitted <==** **----- Start of picture text -----**
500
If R = 0
t AV = (L)(I AS )/(1.3*RATED BV DSS − V DD )
If R � 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS − VDD) +1]
100
STARTING TJ = 25 [o] C
10
STARTING TJ = 150 [o] C
1
0.001 0.01 0.1 1 10 100 1000
tAV, TIME IN AVALANCHE (ms)
NOTE: Refer to ON Semiconductor Application Notes
AN7514 and AN7515
, AVALANCHE CURRENT (A)
IAS
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**Figure 6. Unclamped Inductive Switching Capability** **==> picture [190 x 150] intentionally omitted <==** **----- Start of picture text -----**
300
PULSE DURATION = 80 � s
DUTY CYCLE = 0.5% MAX
250
VDD = 5V
200
150
TJ = 175 [o] C
100
TJ = 25 [o] C
50 T J = −55 [o] C
0
2 3 4 5 6 7 8 9
VGS, GATE TO SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
ID
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**Figure 7. Transfer Characteristics** **==> picture [201 x 149] intentionally omitted <==** **----- Start of picture text -----**
300
250 VGS
15V Top
10V
8V
200 7V
6V
150 80 � s PULSE WIDTH 5.5V 5V Bottom
Tj=25 [o] C
100
50
5V
0
0 1 2 3 4 5
VDS, DRAIN TO SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
ID
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**==> picture [201 x 351] intentionally omitted <==** **----- Start of picture text -----**
300
100 VGS = 0 V
10 TJ = 175 [o] C TJ = 25 [ o] C
1
0.1
0.0 0.2 0.4 0.6 0.8 1.0 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 8. Forward Diode Characteristics
300
80 � s PULSE WIDTH
Tj=175 [o] C
250 VGS
15V Top
10V
200 8V
7V
6V
150 5.5V
5V Bottom
100
50 5V
0
0 1 2 3 4 5
VDS, DRAIN TO SOURCE VOLTAGE (V)
, REVERSE DRAIN CURRENT (A)
IS
, DRAIN CURRENT (A)
ID
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**Figure 9. Saturation Characteristics** **Figure 10. Saturation Characteristics** **www.onsemi.com** **5** **FDWS86368−F085** ## **TYPICAL CHARACTERISTICS** **==> picture [203 x 350] intentionally omitted <==** **----- Start of picture text -----**
40
ID = 80A PULSE DURATION = 80 � s
DUTY CYCLE = 0.5% MAX
30
TJ = 175 [o] C TJ = 25 [o] C
20
10
0
4 5 6 7 8 9 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. RDSON vs. Gate Voltage
1.4
VGS = V DS
1.2 ID = 250 � A
1.0
0.8
0.6
0.4
0.2
−80 −40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE( [o] C)
) �
m
, DRAIN TO SOURCE
ON−RESISTANCE (
rDS(on)
NORMALIZED GATE
THRESHOLD VOLTAGE
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**Figure 13. Normalized Gate Threshold Voltage vs. Temperature** **==> picture [205 x 358] intentionally omitted <==** **----- Start of picture text -----**
2.2
PULSE DURATION = 80 � s
2.0 DUTY CYCLE = 0.5% MAX
1.8
1.6
1.4
1.2
1.0
0.8 ID = 80A
0.6 VGS = 10V
0.4
−80 −40 0 40 80 120 160 200
TJ , JUNCTION TEMPERATURE [o] (C)
Figure 12. Normalized RDSON vs. Junction
Temperature
1.10
ID = 5mA
1.05
1.00
0.95
0.90
−80 −40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE ( [o] C)
NORMALIZED
DRAIN TO SOURCE ON−RESISTANCE
BREAKDOWN VOLTAGE
NORMALIZED DRAIN TO SOURCE
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**Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature** **==> picture [202 x 149] intentionally omitted <==** **----- Start of picture text -----**
10000
Ciss
1000
Coss
100
10
Crss
f = 1MHz
V GS = 0V
1
0.1 1 10 100
VDS , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
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**==> picture [196 x 149] intentionally omitted <==** **----- Start of picture text -----**
10
I D = 80A
VDD =32V
8
VDD = 40V
VDD = 48V
6
4
2
0
0 10 20 30 40 50 60
Qg , GATE CHARGE(nC)
, GATE TO SOURCE VOLTAGE(V)
GS
V
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**Figure 15. Capacitance vs. Drain to Source Voltage** **Figure 16. Single Pulse Maximum Power Dissipation** POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. **www.onsemi.com** **6** ## MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** **==> picture [86 x 29] intentionally omitted <==** **----- Start of picture text -----**
DFN8 5.1x6.3, 1.27P
CASE 506DW
ISSUE O
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**==> picture [79 x 7] intentionally omitted <==** **----- Start of picture text -----**
DATE 28 FEB 2017
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## **DOCUMENT NUMBER:** ## **DESCRIPTION:** **98AON13746G DFN8 5.1x6.3, 1.27P** Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. **PAGE 1 OF 1** ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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