# Dual MOSFET, Complementary N and P Channel, 40 V, 6.1 A, 0.02 ohm, SOIC, Surface Mount

![Product image](https://novapart.co/image/farnell:2453863/)

**URL**: https://novapart.co/products/FDS4897AC/dual-mosfet-complementary-n-and-p-channel-40-v-61
**SKU**: FDS4897AC
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Dual MOSFETs
**Price**: €0.4030
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 8Pins |
| Channel Type | Complementary N and P Channel |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | Complementary N and P Channel |
| Power Dissipation Pd | 2W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.02ohm |
| Transistor Case Style | SOIC |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 6.1A |
| Power Dissipation N Channel | 2W |
| Power Dissipation P Channel | 2W |
| Gate Source Threshold Voltage Max | 2V |
| Drain Source Voltage Vds N Channel | 40V |
| Drain Source Voltage Vds P Channel | 40V |
| Continuous Drain Current Id N Channel | 6.1A |
| Continuous Drain Current Id P Channel | 6.1A |
| Drain Source On State Resistance N Channel | 0.02ohm |
| Drain Source On State Resistance P Channel | 0.02ohm |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2453863/)

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October 2008<br>**----- End of picture text -----**<br>


## **FDS4897AC** 

## **Dual N & P-Channel PowerTrench[®] MOSFET** 

**N-Channel: 40 V, 6.1 A, 26 m** Ω **P-Channel: -40 V, -5.2 A, 39 m** Ω **Features General Description** 

## Q1: N-Channel 

Max rDS(on) = 26 mΩ at VGS = 10 V, ID = 6.1 A 

Max rDS(on) = 31 mΩ at VGS = 4.5 V, ID = 5.6 A 

These dual N- and P-Channel MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench **[®]** process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. 

## Q2: P-Channel 

Max rDS(on) = 39 mΩ at VGS = -10 V, ID = -5.2 A Max rDS(on) = 65 mΩ at VGS = -4.5 V, ID = -4.1 A 100% UIL Tested 

## **Applications** 

Inverter 

Power Supplies 

RoHS Compliant 

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D2<br>D2 Q2<br>D2 5 4 G2<br>D1<br>D1<br>D2 6 3 S2<br>Q1<br>G2 D1 7 2 G1<br>S2<br>ee G1 D1 = 8 1 S1<br>S1<br>Pin 1<br>SO-8<br>MOSFET Maximum Ratings TA = 25 °C unless otherwise noted<br>Symbol Parameter Q1 Q2 Units<br>VDS Drain to Source Voltage 40 -40 V<br>VGS Gate to Source Voltage ±20 ±20 V<br>Drain Current - Continuous   6.1 -5.2<br>ID                        - Pulsed 24 -24 A<br>Power Dissipation for Dual Operation      2.0<br>PD Power Dissipation for Single Operation                               TA = 25 °C   (Note 1a) 1.6 W<br>                                                                                                    TA = 25 °C   (Note 1b) 0.9<br>EAS Single Pulse Avalanche Energy                                                                    (Note 3) 37 73 mJ<br>TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C<br>Thermal Characteristics<br>RθJC Thermal Resistance, Junction to Case,                                                       (Note 1) 40<br>°C/W<br>[_@fH RθJC Thermal Resistance, Junction to Ambient,                                               (Note 1a) 78<br>Package Marking and Ordering Information<br>Device Marking Device Package Reel Size Tape Width Quantity<br>FDS4897AC FDS4897AC SO-8 13 ” 12 mm 2500 units<br>[-——___}______}—______+_____|______}___<br>**----- End of picture text -----**<br>


©2008 Fairchild Semiconductor Corporation **1** www.fairchildsemi.com FDS4897AC  Rev.C 

**Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Electric**|**al Characteristics **TJ= 25 °C u|nless otherwise noted||||||
|---|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Type**|**Min**|**Typ**|**Max**|**Units**|
|**Off Characteristics**||||||||
|BVDSS|Drain to Source Breakdown Voltage|ID= 250µA, VGS= 0 V<br>ID= -250µA, VGS= 0 V|Q1<br>Q2|40<br>-40|||V|
|∆BVDSS<br>∆TJ|Breakdown Voltage Temperature<br>Coefficient|ID= 250µA, referenced to 25 °C<br>ID= -250µA, referenced to 25 °C|Q1<br>Q2||37<br>-32||mV/°C|
|IDSS|Zero Gate Voltage Drain Current|VDS= 32 V,   VGS= 0 V<br>VDS= -32 V,  VGS = 0 V|Q1<br>Q2|||1<br>-1|µA|
|IGSS|Gate to Source Leakage Current|VGS= ±20 V, VDS= 0 V|Q1<br>Q2|||±100<br>±100|nA<br>nA|
|**On Characteristics**||||||||
|VGS(th)|Gate to Source Threshold Voltage|VGS= VDS,  ID= 250µA<br>VGS= VDS,  ID= -250µA|Q1<br>Q2|1.5<br>-1.5|2.0<br>-2.0|3.0<br>-3.0|V|
|∆VGS(th)<br>∆TJ|Gate to Source Threshold Voltage<br>Temperature Coefficient|ID= 250µA, referenced to 25 °C<br>ID= -250µA, referenced to 25 °C|Q1<br>Q2||-6<br>6||mV/°C|
|rDS(on)|Static Drain to Source On Resistance|VGS= 10 V,  ID= 6.1 A<br>VGS= 4.5 V,  ID= 5.6 A<br>VGS= 10 V,  ID= 6.1 A, TJ = 125 °C|Q1||20<br>24<br>30|26<br>31<br>39|mΩ|
|||VGS= -10 V,  ID= -5.2 A<br>VGS= -4.5 V,  ID= -4.1 A<br>VGS= -10 V,  ID= -5.2 A, TJ = 125 °C|Q2||28<br>45<br>41|39<br>65<br>57||
|gFS|Forward Transconductance|VDD= 5 V,  ID= 6.1 A<br>VDD= -5 V,  ID= -5.2 A|Q1<br>Q2||24<br>14||S|
|**Dynamic Characteristics**||||||||
|Ciss|Input Capacitance|Q1<br>VDS= 20 V, VGS= 0 V, f = 1 MHZ<br>Q2<br>VDS= -20 V, VGS= 0 V, f = 1 MHZ|Q1<br>Q2||795<br>765|1055<br>1015|pF|
|Coss|Output Capacitance||Q1<br>Q2||95<br>135|130<br>180|pF|
|Crss|Reverse Transfer Capacitance||Q1<br>Q2||65<br>80|100<br>120|pF|
|Rg|Gate Resistance||Q1<br>Q2||1.7<br>3.6||Ω|
|**Switching Characteristics**||||||||
|td(on)|Turn-On Delay Time|Q1<br>VDD= 20 V, ID= 6.1 A,<br>VGS= 10 V, RGEN= 6Ω<br>Q2<br>VDD= -20 V, ID= -5.2 A,<br>VGS= -10 V, RGEN= 6Ω|Q1<br>Q2||6<br>8|12<br>15|ns|
|tr|Rise Time||Q1<br>Q2||2<br>3|10<br>10|ns|
|td(off)|Turn-Off Delay Time||Q1<br>Q2||17<br>17|30<br>30|ns|
|tf|Fall Time||Q1<br>Q2||2<br>3|10<br>10|ns|
|Qg(TOT)|Total Gate Charge|Q1<br>VGS= 10 V, VDD= 20 V, ID= 6.1 A<br>Q2<br>VGS= -10 V, VDD= -20 V, ID= -5.2 A|Q1<br>Q2||15<br>15|21<br>20|nC|
|Qgs|Gate to Source  Charge||Q1<br>Q2||2.5<br>2.6||nC|
|Qgd|Gate to Drain “Miller” Charge||Q1<br>Q2||2.9<br>3.2||nC|



©2008 Fairchild Semiconductor Corporation **2** www.fairchildsemi.com FDS4897AC  Rev.C 

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Electrical Characteristics  TJ = 25 °C unless otherwise noted<br>Symbol Parameter Test Conditions Type Min Typ Max Units<br>Drain-Source Diode Characteristics<br>VSD Source to Drain Diode  Forward Voltage VVGS GS = 0 V, I= 0 V, IS S = 1.3 A               (Note 2)= -1.3 A             (Note 2) Q1Q2 -0.760.75 -1.2 1.2 V<br>Q1 Q1 17 31<br>trr Reverse Recovery Time IF = 6.1 A, di/dt = 100 A/s Q2 20 36 ns<br>Q2 Q1 7 15<br>Qrr Reverse Recovery Charge IF = -5.2 A, di/dt = 100 A/s Q2 10 20 nC<br>ree<br>Notes:<br>1: RθJA is determined with the device mounted on a 1in [2]  pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by<br>the user's board design.<br>a) 78 °C/W when b) 135 °C/W when<br>    mounted on a  1 in [2]     mounted on a<br>    pad of 2 oz copper     minimun pad<br>**----- End of picture text -----**<br>


- **2:** Pulse Test: Pulse Width < 30 0 µs, Duty cycle < 2.0%. **3:** Starting TJ = 25 °C, N-ch: L = 3 mH, IAS = 5 A, VDD = 40 V, VGS = 10 V;  P-ch: L = 3 mH, IAS = -7 A, VDD = -40 V, VGS = -10 V. 

©2008 Fairchild Semiconductor Corporation **3** www.fairchildsemi.com FDS4897AC  Rev.C 

## **Typical Characteristics (Q1 N-Channel)** TJ = 25 °C unless otherwise noted 

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24 5<br>VGS = 10 V PULSE DURATION = 80  µ s<br>20 VGS = 4.5 V VGS = 3 V DUTY CYCLE = 0.5% MAX<br>4<br>VGS = 4 V<br>16 VGS = 3.5 V<br>VGS = 3.5 V<br>3<br>12<br>PULSE DURATION = 80  µ s<br>DUTY CYCLE = 0.5% MAX<br>8 2<br>VGS = 4 V VGS = 4.5 V<br>4<br>VGS = 3 V 1<br>VGS = 10 V<br>0 0.5<br>0.0 0.5 1.0 1.5 2.0 0 4 8 12 16 20 24<br>VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 1.  On Region Characteristics Figure 2.  Normalized On-Resistance<br>vs Drain Current and Gate Voltage<br>1.8 80<br>ID = 6.1 A PULSE DURATION = 80  µ s<br>1.6 VGS = 10 V 70 DUTY CYCLE = 0.5% MAX<br>ID = 6.1 A<br>60<br>1.4<br>50<br>1.2<br>40<br>1.0 TJ = 125  [o] C<br>30<br>0.8 20<br>TJ = 25 [ o] C<br>0.6 10<br>-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3.  Normalized  On  Resistance                                         Figure 4.   On-Resistance vs  Gate to<br>vs Junction Temperature Source Voltage<br>24 40<br>PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX µ s 10 VGS = 0 V<br>20<br>VDS = 5 V<br>16 1 TJ = 150  [o] C<br>TJ = 25 [ o] C<br>12<br>TJ = 150 [ o] C 0.1<br>8<br>TJ = 25 [ o] C TJ = -55  [o] C 0.01 TJ = -55 [ o] C<br>4<br>0 0.001<br>1 2 3 4 0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5.  Transfer Characteristics Figure 6.    Source to Drain  Diode<br>Forward Voltage vs Source Current<br>NORMALIZED<br>DRAIN CURRENT (A)<br>,<br>ID<br>DRAIN TO SOURCE ON-RESISTANCE<br>)<br>Ω<br>m<br>(<br>DRAIN TO<br>NORMALIZED rDS(on),<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>ID<br>, REVERSE DRAIN CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


©2008 Fairchild Semiconductor Corporation **4** www.fairchildsemi.com FDS4897AC  Rev.C 

## **Typical Characteristics (Q1 N-Channel)** TJ = 25 °C unless otherwise noted 

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10 2000<br>ID = 6.1 A 1000<br>8<br>VDD = 15 V Ciss<br>6<br>VDD = 20 V VDD = 25 V Coss<br>100<br>4<br>Crss<br>2<br>f = 1 MHz<br>VGS = 0 V<br>0 10<br>0 4 8 12 16 0.1 1 10 40<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7.  Gate Charge Characteristics Figure 8.  Capacitance vs Drain                                                Capacitance vs Drain<br>to Source Voltage<br>10 7<br>9<br>8<br>7 6<br>6<br>5 5<br>4 VGS = 10 V<br>4<br>3 VGS = 4.5 V<br>3<br>TJ = 125 [ o] C TJ = 25  [o] C<br>2 2<br>1<br>R θ JA = 78 oC/W<br>1 0<br>0.01 0.1 1 10 20 25 50 75 100 125 150<br>tAV, TIME IN AVALANCHE (ms) TC, AMBIENT TEMPERATURE (oC)<br>Figure 9. Unclamped Inductive                                  Figure 10.  Maximum Continuous Drain                             Maximum Continuous Drain<br>Switching Capability Current  vs Ambient Temperature<br>30 1000<br>10 VGS = 10 V<br>100 us<br>100 SINGLE PULSE<br>1 ms R θ JA = 135  [o] C/W<br>1<br>10 ms TA = 25  [o] C<br>THIS AREA IS<br>LIMITED BY rDS(on) 100 ms 10<br>0.1 SINGLE PULSE 1 s<br>TJ = MAX RATED<br>10 s<br>R θ JA = 135  [o] C/W<br>DC 1<br>TA = 25  [o] C<br>0.01 0.5<br>0.01 0.1 1 10 100 200 10-4 10-3 10-2 10-1 1 10 100 1000<br>VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>V<br>DRAIN CURRENT (A)<br>,<br>ID<br>, AVALANCHE CURRENT (A)<br>IAS<br>, DRAIN CURRENT (A)<br>ID<br>PEAK TRANSIENT POWER (W)<br>P)(PK,<br>**----- End of picture text -----**<br>


**Figure 8.  Capacitance vs Drain                                                Capacitance vs Drain to Source Voltage** 

**Figure 10.  Maximum Continuous Drain                             Maximum Continuous Drain Current  vs Ambient Temperature** 

**Figure 11.  Forward Bias Safe Operating Area** 

**Figure 12.   Single  Pulse Maximum Power  Dissipation** 

©2008 Fairchild Semiconductor Corporation **5** www.fairchildsemi.com FDS4897AC  Rev.C 

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Typical Characteristics (Q1 N-Channel)  TJ = 25 °C unless otherwise noted<br>2<br>1 DUTY CYCLE-DESCENDING ORDER<br>D = 0.5<br>      0.2<br>      0.1<br>0.1<br>      0.05<br>      0.02 PDM<br>      0.01<br>t1<br>0.01 SINGLE PULSE t2<br>R θ JA = 135  [o] C/W NOTES:DUTY FACTOR: D = t1/t2<br>(Note 1b) PEAK TJ = PDM x Z θJA  x R θJA  + TA<br>0.001<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Z JA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


**Figure 13.  Junction-to-Ambient Transient Thermal Response Curve** 

©2008 Fairchild Semiconductor Corporation **6** www.fairchildsemi.com FDS4897AC  Rev.C 

## **Typical Characteristics (Q2 P-Channel)** TJ = 25 °C unless otherwise noted 

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24 5<br>20 VGS = VGS-5 V = -10 V VGS = -3.5 V PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX µ s<br>4<br>VGS = -4.5 V VGS = -4 V<br>16 VGS = -4 V<br>3<br>12 PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX µ s VGS = -4.5 V<br>8 VGS = -3.5 V 2<br>4 VGS = -5 V<br>1<br>VGS = -10 V<br>0 0.5<br>0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 4 8 12 16 20 24<br>-VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A)<br>Figure 15. On- Region Characteristics Figure 16. Normalized on-Resistance vs Drain<br>Current and Gate  Voltage<br>1.8 120<br>ID = -5.2 A ID = -5.2 A PULSE DURATION = 80DUTY CYCLE = 0.5% MAX  µ s<br>1.6 VGS = -10 V 100<br>1.4<br>80<br>1.2<br>60<br>1.0 TJ = 125  [o] C<br>40<br>0.8<br>TJ = 25  [o] C<br>0.6 20<br>-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) -VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 17. Normalized On-Resistance  Figure 18. On-Resistance vs Gate to<br> vs Junction Temperature Source Voltage<br>24 40<br>PULSE DURATION = 80  µ s VGS = 0 V<br>DUTY CYCLE = 0.5% MAX 10<br>20<br>VDS = -5 V<br>16 1 TJ = 150  [o] C<br>12<br>TJ = 150  [o] C 0.1 TJ = 25  [o] C<br>8<br>TJ = 25  [o] C TJ = -55  [o] C 0.01 TJ = -55  [o] C<br>4<br>0 0.001<br>1 2 3 4 5 0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>-VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)<br>DRAIN CURRENT (A) NORMALIZED<br>,<br>D<br>-I<br>DRAIN TO SOURCE ON-RESISTANCE<br>)<br>Ω<br>m<br>(<br>DRAIN TO<br>,<br>NORMALIZED rDS(on)<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>D<br>-I , REVERSE DRAIN CURRENT (A)<br>S<br>-I<br>**----- End of picture text -----**<br>


**Figure 19. Transfer Characteristics** 

**Figure 20. Source to Drain Diode Forward Voltage vs Source Current** 

©2008 Fairchild Semiconductor Corporation **7** www.fairchildsemi.com FDS4897AC  Rev.C 

## **Typical Characteristics (Q2 P-Channel)** TJ = 25 °C unless otherwise noted 

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**----- Start of picture text -----**<br>
10 2000<br>ID = -5.2 A 1000 Ciss<br>8<br>VDD = -15 V<br>6 Coss<br>VDD = -20 V VDD = -25 V<br>100<br>4<br>Crss<br>2<br>f = 1 MHz<br>VGS = 0 V<br>0 10<br>0 4 8 12 16 0.1 1 10 40<br>Qg, GATE CHARGE (nC) -VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 21. Gate Charge Characteristics Figure 22. Capacitance vs Drain<br>to Source Voltage<br>10 6<br>9<br>8<br>7 5<br>6<br>5<br>4<br>4 VGS = -10 V<br>3<br>3<br>TJ = 25 [ o] C VGS = -4.5 V<br>2<br>2<br>TJ = 125  [o] C 1<br>R θ JA = 78  [o] C/W<br>1 0<br>0.1 1 10 40 25 50 75 100 125 150<br>tAV, TIME IN AVALANCHE (ms) TC, AMBIENT TEMPERATURE ( [o] C)<br>Figure 23. Unclamped Inductive  Figure 24. Maximum   Continuous   Drain<br>Switching Capability Current  vs Ambient Temperature<br>30 1000<br>100 us VGS = -10 V<br>10<br>1 ms 100 SINGLE PULSE<br>1 THIS AREA IS 10 ms R θ JA = 135 [ o] C/W<br>LIMITED BY rds(on)<br>100 ms<br>10<br>0.1 SINGLE PULSE 1 s<br>TJ = MAX RATED<br>TRA θ JA=  = 135 25 [ o] C [o] C/W DC10 s 1<br>0.010.01 0.1 1 10 100 200 0.510-4 10-3 10-2 10-1 1 10 100 1000<br>-VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)<br>Figure 25. Forward Bias Safe                                            Figure 26. Single Pulse  Maximum Power<br>Operating Area Dissipation<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>-V<br>DRAIN CURRENT (A)<br>,<br>D<br>-I<br>, AVALANCHE CURRENT (A)<br>IAS-<br>, DRAIN CURRENT (A)<br>D<br>-I<br>, PEAK TRANSIENT POWER (W)P)(PK<br>**----- End of picture text -----**<br>


©2008 Fairchild Semiconductor Corporation **8** www.fairchildsemi.com FDS4897AC  Rev.C 

## **Typical Characteristics (Q2 P-Channel)** TJ = 25 °C unless otherwise noted 

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2<br>1 DUTY CYCLE-DESCENDING ORDER<br>D = 0.5<br>      0.2<br>      0.1<br>0.1<br>      0.05 PDM<br>      0.02<br>      0.01<br>t1<br>0.01 SINGLE PULSE t2<br>NOTES:<br>R θ JA = 135  [o] C/W DUTY FACTOR: D = t1/t2<br>(Note 1b) PEAK TJ = PDM x Z θJA  x R θJA  + TA<br>0.001<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Z JA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


**Figure 27. Junction-to-Ambient Transient Thermal Response Curve** 

©2008 Fairchild Semiconductor Corporation **9** www.fairchildsemi.com FDS4897AC  Rev.C 

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## **LIFE SUPPORT POLICY** 

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 

1. Life support devices or systems are devices or systems which, (a) are 2. A critical component in any component of a life support, device, or intended for surgical implant into the body or (b) support or sustain life, system whose failure to perform can be reasonably expected to cause and (c) whose failure to perform when properly used in accordance with the failure of the life support device or system, or to affect its safety or instructions for use provided in the labeling, can be reasonably effectiveness. expected to result in a significant injury of the user. 

## **ANTI-COUNTERFEITING POLICY** 

Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Farichild’s Anti-Counterfeiting Policy is also stated on our external website, www.fairchildsemi.com, under Sales Support. 

Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Farichild strongly encourages customers to purchase Farichild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Farichild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Farichild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. 

## **PRODUCT STATUS DEFINITIONS Definition of Terms** 

|**Definition of Terms**|||
|---|---|---|
|**Datasheet Identification**|**Product Status**|**Definition**|
|Advance Information|Formative / In Design|Datasheet contains the design specifications for product development. Specifications may<br>change in any manner without notice.|
|Preliminary|First Production|Datasheet contains preliminary data; supplementary data will be published at a later date.<br>Fairchild Semiconductor reserves the right to make changes at any time without notice to<br>improve design.|
|No Identification Needed|Full Production|Datasheet contains final specifications. Fairchild Semiconductor reserves the right to<br>make changes at any time without notice to improve the design.|
|Obsolete|Not In Production|Datasheet contains specifications on a product that is discontinued by Fairchild<br>Semiconductor. The datasheet is for reference information only.|



©2008 Fairchild Semiconductor Corporation **10** www.fairchildsemi.com 

FDS4897AC  Rev.C 



## Links

- [View this product on Novapart](https://novapart.co/products/FDS4897AC/dual-mosfet-complementary-n-and-p-channel-40-v-61)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/en-ES/onsemi/fds4897ac/mosfet-n-p-ch-40v-6-1a-soic-8/dp/2453863)
---

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