# Power MOSFET, P Channel, 20 V, 2 A, 0.07 ohm, SOT-23, Surface Mount

![Product image](https://novapart.co/image/farnell:9846310RL/)

**URL**: https://novapart.co/products/FDN340P/power-mosfet-p-channel-20-v-2-a-007-ohm-sot-23
**SKU**: FDN340P
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.1380
**Stock**: 1000+
**Lead Time**: 125 days (indicative)

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:2A; Drain Source Voltage Vds:-20V; On Resistance Rds(on):0.06ohm; Rds(on) Test Voltage Vgs:-4.5V; Threshold Voltage Vgs:-800mV; Power Dissipat

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | P Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 500mW |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 4.5V |
| Transistor Case Style | SOT-23 |
| Drain Source Voltage Vds | 20V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 2A |
| Drain Source On State Resistance | 0.07ohm |
| Gate Source Threshold Voltage Max | 800mV |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:9846310RL/)

## MOSFET – Single, P-Channel, POWERTRENCH , Logic Level 

## FDN340P 

**General Description** This P−Channel Logic Level MOSFET is produced using ON Semiconductor advanced POWERTRENCH process that has been especially tailored to minimize the on−state resistance and yet maintain low gate charge for superior switching performance. 

# **www.onsemi.com** 

These devices are well suited for portable electronics applications: load switching and power management, battery charging circuits, and dc−dc conversion. 

**==> picture [442 x 250] intentionally omitted <==**

**----- Start of picture text -----**<br>
SOT−23<br>CASE 527AG<br>Features<br>• −2 A, 20 V<br>♦ RDS(ON) = 70 m  @ VGS = −4.5 V D<br>♦ RDS(ON) = 110 m  @ VGS = −2.5 V<br>• Low Gate Charge (7.2 nC Typical)<br>• High Performance Trench Technology for Extremely Low RDS(ON)<br>• High Power Version of Industry Standard SOT−23 Package. Identical<br>G S<br>Pin−Out to SOT−23 with 30% Higher Power Handling Capability<br>• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS<br>Compliant<br>MARKING DIAGRAM<br>Drain<br>3<br>340M<br>1 SS 2<br>Gate Source<br>M = Date Code<br>**----- End of picture text -----**<br>


## **ORDERING INFORMATION** 

See detailed ordering and shipping information on page 3 of this data sheet. 

Publication Order Number: **FDN340P/D** 

**1** 

© Semiconductor Components Industries, LLC, 2007 **May, 2021 − Rev. 7** 

**FDN340P** 

## **ABSOLUTE MAXIMUM RATINGS** 

TA = 25 ° C unless otherwise noted 

|**Symbol**|**Parameter**|**Ratings**|**Unit**|
|---|---|---|---|
|VDSS|Drain−Source Voltage|−20|V|
|VGSS|Gate−Source Voltage|±8|V|
|ID|Drain Current<br>Continuous (Note 1a)<br>Pulsed|−2<br>−10|A|
|PD|Power Dissipation for Single Operation<br>(Note 1a)<br>(Note 1b)|0.5<br>0.46|W|
|TJ, TSTG|Operating and Storage Junction Temperature Range|−55 to +150|�C|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

## **THERMAL CHARACTERISTICS** 

|**Symbol**|**Parameter**|**Ratings**|**Unit**|
|---|---|---|---|
|RθJA|Thermal Resistance, Junction−to−Ambient (Note 1a)|250|°C/W|
|RθJC|Thermal Resistance, Junction−to−Case (Note 1)|75|°C/W|



## **ELECTRICAL CHARACTERISTICS** 

TA = 25 ° C unless otherwise noted 

|**Symbol**|**Symbol**|**Parameter**|**Test Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**OFF CHARACTERISTICS**||||||||
||BVDSS|Drain−Source Breakdown Voltage|VGS = 0 V, ID = −250�A|−20|−|−|V|
||�BVDSS<br>�TJ|Breakdown Voltage Temperature Coefficient|ID = −250�A, Referenced to 25�C|−|−12|−|mV/�C|
||IDSS|Zero Gate Voltage Drain Current|VDS = −16 V, VGS = 0 V|−|−|−1|�A|
||||VDS = −16 V, VGS = 0 V, TJ = 55�C|−|−|−10||
||IGSSF|Gate−Body Leakage, Forward|VGS = 8 V, VDS = 0 V|−|−|100|nA|
||IGSSR|Gate−Body Leakage, Reverse|VGS = −8 V, VDS = 0 V|−|−|−100|nA|
|**ON CHARACTERISTICS**(Note 2)||||||||
||VGS(th)|Gate Threshold Voltage|VDS = VGS,ID = −250�A|−0.4|−0.8|−1.5|V|
||�VGS(th)<br>�TJ|Gate Threshold Voltage Temperature Coefficient|ID = −250�A, Referenced to 25�C|−|3|−|mV/�C|
||RDS(on)|Static Drain−Source On−Resistance|VGS = −4.5 V, ID = −2 A|−|60|70|m�|
||||VGS = −4.5 V, ID = −2 A, TJ = 125�C|−|77|120||
||||VGS = −2.5 V, ID = −1.7 A|−|82|110||
||ID(on)|On−State Drain Current|VGS = −4.5 V, VDS = −5 V|−5|−|−|A|
||gFS|Forward Transconductance|VDS = −4.5 V, ID = −2 A|−|9|−|S|
|**DYNAMIC CHARACTERISTICS**||||||||
|600||Input Capacitance|VDS = −10 V, VGS = 0 V, f = 1.0 MHz|−|779|−|pF|
|175||Output Capacitance||−|121|−|pF|
|80||Reverse Transfer Capacitance||−|56|−|pF|



**www.onsemi.com** 

**2** 

**FDN340P** 

## **ELECTRICAL CHARACTERISTICS** (continued) 

## TA = 25 ° C unless otherwise noted 

|**Symbol**|**Parameter**|**Test Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|**SWITCHING CHARACTERISTICS**(Note 2)|||||||
|td(on)|Turn−On Delay Time|VDD = −10 V, ID = −1 A,<br>VGS = −4.5 V, RGEN = 6�|−|10|20|ns|
|tr|Turn−On Rise Time||−|9|10|ns|
|td(off)|Turn−Off Delay Time||−|27|43|ns|
|tf|Turn−Off Fall Time||−|11|20|ns|
|Qg|Total Gate Charge|VDS = −10 V, ID = −3.5 A, VGS = −4.5 V|−|7.2|10|nC|
|Qgs|Gate−Source Charge||−|1.7|−|nC|
|Qgd|Gate−Drain Charge||−|1.5|−|nC|
|**DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS**|||||||
|IS|Maximum Continuous Drain−Source Diode Forward Current||−|−|−0.42|A|
|VSD|Drain−Source Diode Forward Voltage|VGS= 0 V, IS = −0.42 A (Note 2)|−|−0.7|−1.2|V|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

## NOTES: 

1. R θ JA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θ JC is guaranteed by design while R θ CA is determined by the user’s board design. 

   - a) 250 ° C/W when mounted on 

   - a 0.02 in[2] pad of 2 oz copper 

- b) 270 ° C/W when mounted on 

- a 001 in[2] pad of 2 oz copper 

Scale 1:1 on letter size paper 

2. Pulse Test: Pulse Width < 300 μ s, Duty Cycle < 2.0%. 

## **PACKAGE MARKING AND ORDERING INFORMATION** 

|**Device**|**Device Marking**|**Package**|**Reel Size**|**Tape Width**|**Shipping†**|
|---|---|---|---|---|---|
|FDN340P|340|SOT−23<br>(Pb−Free)|7″|8 mm|3000 / Tape & Reel|



- †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. 

**www.onsemi.com** 

**3** 

**FDN340P** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [491 x 606] intentionally omitted <==**

**----- Start of picture text -----**<br>
15 2<br>−4.5 V<br>−2.5 V VGS = −2.0 V<br>−3.5 V<br>1.8<br>12<br>−3.0 V −2.5 V<br>1.6<br>9<br>−2.0 V<br>1.4<br>− 3 V<br>6<br>1.2 − 3.5 V<br>− 4.5 V<br>3<br>VGS = −1.5 V 1<br>0 0.8<br>0 1 2 3 4 0 3 6 9 12 15<br>−VDS, Drain to Source Voltage (V) −ID, Drain Current (A)<br>Figure 1. On−Region Characteristics Figure 2. On−Resistance Variation with<br>Drain Current and Gate Voltage<br>1.4 0.22<br>1.3 ID = −2 A ID = −1 A<br>V GS  = −4.5 V 0.18<br>1.2<br>0.14<br>1.1<br>TA = 125 ° C<br>1 0.1<br>0.9 TA = 25 ° C<br>0.06<br>0.8<br>0.7 0.02<br>−50 −25 0 25 50 75 100 125 150 1 2 3 4 5<br>TJ, Junction temperature ( � C) −VGS, Gate to Source Voltage (V)<br>Figure 3. On−Resistance Variation with Figure 4. On−Resistance Variation with<br>Temperature Gate−to−Source Voltage<br>10 10<br>VDS = −5 V TA = −55 ° C 25 ° C VGS = 0 V<br>8 1<br>125 ° C<br>TA = 125 ° C<br>6 0.1<br>25 ° C<br>4 0.01<br>−55 ° C<br>2 0.001<br>0 0.0001<br>0.5 1 1.5 2 2.5 0 0.2 0.4 0.6 0.8 1 1.2<br>−VGS, Gate to Source Voltage (V) −VSD, Body Diode Forward Voltage (V)<br> Drain Current (A)  Normalized<br>D, DS(ON)<br>−I R<br>Drain−Source On−Resistance<br>��<br>��<br>, Normalized   On−Resistance (<br>DS(ON)<br>R<br>DS(ON)<br>R<br>Drain−Source On−Resistance (<br>, Drain Current (A)<br>ID  , Reserve Drain Current (A)<br>S<br>−I<br>**----- End of picture text -----**<br>


**Figure 5. Transfer Characteristics** 

**Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature** 

**www.onsemi.com** 

**4** 

**FDN340P** 

## **TYPICAL CHARACTERISTICS** (Continued) 

**==> picture [492 x 588] intentionally omitted <==**

**----- Start of picture text -----**<br>
5 1000<br>ID = −3.5 A VDS = −5 V f = 1 MHz<br>−10 V CISS VGS = 0 V<br>4<br>800<br>−15 V<br>3<br>600<br>2 400<br>COSS<br>1 200<br>CRSS<br>0 0<br>0 1 2 3 4 5 6 7 8 9 0 5 10 15 20<br>Qg,Gate Charge (nC) −VDS, Drain to Source Voltage (V)<br>Figure 7. Gate Charge Characteristics Figure 8. Capacitance Characteristics<br>100 50<br>Single Pulse<br>10 RDS(ON) LIMIT 1 s 40 R θ JATA= = 25 270 °° CC/W<br>1 ms<br>10 ms 30<br>1<br>100 ms<br>20<br>1 s<br>0.1 VGS = −10 V<br>Single Pulse DS 10<br>R θ JA = 270 ° C/W<br>0.01 TA = 25 ° C 0<br>0.1 1 10 100 0.001 0.01 0.1 1 10 100<br>−VDS, Drain−Source Voltage (V) Single Pulse Time (SEC)<br>Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power<br>Dissipation<br>1<br>D = 0.5<br>0.5<br>0.2<br>0.2<br>0.1 0.1 R � R JA � JA (t) = r(t) * R  = 270 ° C/W � JA<br>0.05 0.05<br>0.02 P(pk)<br>0.02 0.01 t1<br>0.01 Single Pulse t2<br>0.005<br>TJ − TA = P * R � JA (t)<br>0.002 Duty Cycle, D = t1 / t2<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 300<br>t1, Time (sec)<br>Capacitance (pF)<br>, Drain to Source Voltage (V)<br>DS<br>−V<br>Power (W)<br>, Drain Current (A)<br>D<br>−I<br>Thermal Resistance<br>r(t), Normalized Effective Transient<br>**----- End of picture text -----**<br>


**Figure 11. Transient Thermal Response Curve** 

Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. 

**www.onsemi.com** 

**5** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

## **SOT−23/SUPERSOT −23, 3 LEAD, 1.4x2.9** CASE 527AG ISSUE A 

## DATE 09 DEC 2019 

## **GENERIC** 

**MARKING DIAGRAM*** XXX = Specific Device Code M = Month Code XXXM = Pb−Free Package 

*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ ”, may or may not be present. Some products may not follow the Generic Marking. 

(Note: Microdot may be in either location) 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

## **DOCUMENT NUMBER:** 

## **98AON34319E** 

**DESCRIPTION: SOT−23/SUPERSOT−23, 3 LEAD, 1.4X2.9** 

**PAGE 1 OF 1** 

ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2019 

**onsemi** , , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **onsemi** owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of **onsemi’s** product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. **onsemi** reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and **onsemi** makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using **onsemi** products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by **onsemi** . “Typical” parameters which may be provided in **onsemi** data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. **onsemi** does not convey any license under any of its intellectual property rights nor the rights of others. **onsemi** products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use **onsemi** products for any such unintended or unauthorized application, Buyer shall indemnify and hold **onsemi** and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that **onsemi** was negligent regarding the design or manufacture of the part. **onsemi** is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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◊ 

**==> picture [232 x 43] intentionally omitted <==**



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