# Power MOSFET, N Channel, 120 V, 128 A, 0.0042 ohm, PQFN, Surface Mount

![Product image](https://novapart.co/image/farnell:3004022/)

**URL**: https://novapart.co/products/FDMT800120DC/power-mosfet-n-channel-120-v-128-a-00042-ohm-pqfn
**SKU**: FDMT800120DC
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €3.3300
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:128A; Drain Source Voltage Vds:120V; On Resistance Rds(on):0.00345ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3.1V;

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | Lead (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | PowerTrench |
| Qualification | - |
| Power Dissipation | 156W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PQFN |
| Drain Source Voltage Vds | 120V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 128A |
| Drain Source On State Resistance | 0.0042ohm |
| Gate Source Threshold Voltage Max | 3.1V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3004022/)

**DATA SHEET** ~~a~~ **www.onsemi.com** 

## MOSFET – N-Channel, 

## , POWERTRENCH 

## 120 V, 128 A, 4.2 m FDMT800120DC 

## **General Description** 

This N−Channel MOSFET is produced using **onsemi** ’s advanced POWERTRENCH process. Advancements in both silicon and DUAL COOL package technologies have been combined to offer the lowest rDS(on) while maintaining excellent switching performance by extremely low Junction−to−Ambient thermal resistance. 

## **Features** 

|**VDS**|||**RDS(on) MAX**||**ID MAX**|
|---|---|---|---|---|---|
|120 V|||4.2 m @ 10 V||128 A|
||||6.4 m @ 6 V|||
||Top|||Bottom||



**TDFNW8 8.3 x 8.4, 2P, DUAL COOL, OPTION 2 CASE 507AR** 

**==> picture [90 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
MARKING DIAGRAM<br>**----- End of picture text -----**<br>


- Max rDS(on) = 4.2 m at VGS = 10 V, ID = 20 A 

   - | 

- Max rDS(on) = 6.4 m at VGS = 6 V, ID = 16 A 

- Advanced Package and Silicon Combination for Low rDS(on) and High Efficiency 

- Next Generation Enhanced Body Diode Technology, Engineered for Soft Recovery 

- Low Profile 8x8 mm MLP Package 

- MSL1 Robust Package Design 

- 100% UIL Tested 

- This Device is RoHS Compliant 

|800120|= Device Code|
|---|---|
|A|= Assembly Location|
|WL|= Wafer Lot|
|Y|= Year|
|W|= Work Week|



## **Typical Applications** 

- OringFET/Load Switching 

- Synchronous Rectification 

## **ELECTRICAL CONNECTION** 

- DC−DC Conversion 

**==> picture [126 x 104] intentionally omitted <==**

**----- Start of picture text -----**<br>
G D<br>S D<br>S D<br>S D<br>N-Channel MOSFET<br>**----- End of picture text -----**<br>


## **ORDERING INFORMATION** 

See detailed ordering, marking and shipping information on page 7 of this data sheet. 

**1** 

Publication Order Number: **FDMT800120DC/D** 

© Semiconductor Components Industries, LLC, 2015 **January, 2023 − Rev. 3** 

**FDMT800120DC** 

**MOSFET MAXIMUM RATINGS** (TA = 25 ° C unless otherwise noted) 

|**MOSFET M**|**AXIMUM RATINGS**(TA= 25°C unless otherwise noted)|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Rating**|**Unit**|
|VDS|Drain to Source Voltage|120|V|
|VGS|Gate to Source Voltage|±20|V|
|ID|Drain Current<br>−Continuous<br>TC= 25°C<br>(Note 5)|128|A|
||−Continuous<br>TC= 100°C<br>(Note 5)|81||
||−Continuous<br>TA= 25°C<br>(Note 1a)|20||
||−Pulsed<br>(Note 4)|767||
|EAS|Single Pulse Avalanche Energy<br>(Note 3)|1350|mJ|
|PD|Power Dissipation<br>TC= 25°C|156|W|
||Power Dissipation<br>TA= 25°C<br>(Note 1a)|3.2||
|TJ, TSTG|Operating and Storage Junction Temperature Range|−55 to +150|°C|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

## **THERMAL CHARACTERISTICS** 

|**THERMAL**|**CHARACTERISTICS**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Ratings**|**Unit**|
|R�JC|Thermal Resistance, Junction to Case<br>(Top Source)|1.6|°C/W|
|R�JC|Thermal Resistance, Junction to Case<br>(Bottom Drain)|0.8||
|R�JA|Thermal Resistance, Junction to Ambient<br>(Note 1a)|38||
|R�JA|Thermal Resistance, Junction to Ambient<br>(Note 1b)|81||
|R�JA|Thermal Resistance, Junction to Ambient<br>(Note 1i)|15||
|R�JA|Thermal Resistance, Junction to Ambient<br>(Note 1j)|21||
|R�JA|Thermal Resistance, Junction to Ambient<br>(Note 1k)|9||



**www.onsemi.com** 

**2** 

## **FDMT800120DC** 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**ELECTRI**|**ELECTRI**|**CAL CHARACTERISTICS**(TJ= 25°C|unless otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**Symbol**||**Parameter**|**Test Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|BVDSS||Drain to Source Breakdown Voltage|ID= 250�A, VGS  = 0 V|120|−|−|V|
|�BVDSS<br>�TJ||Breakdown Voltage Temperature<br>Coefficient|ID= 250�A, referenced to 25°C|−|97|−|mV/°C|
|IDSS||Zero Gate Voltage Drain Current|VDS= 96 V, VGS  = 0 V|−|−|1|�A|
|IGSS||Gate to Source Leakage Current|VGS=±20 V, VDS  = 0 V|−|−|100|nA|
|**ON CHARACTERISTICS**||||||||
||VGS(th)|Gate to Source Threshold Voltage|VGS= VDS, ID= 250�A|2.0|3.1|4.0|V|
||�VGS(th)<br>�TJ|Gate to Source Threshold Voltage<br>Temperature Coefficient|ID= 250�A, referenced to 25°C|−|−12|−|mV/°C|
||rDS(on)|Static Drain to Source On Resistance|VGS=  10 V, ID= 20 A|−|3.45|4.2|m�|
||||VGS=  6 V, ID= 16 A|−|4.6|6.4||
||||VGS=  10 V, ID= 20 A, TJ= 125°C|−|6.3|7.7||
||gFS|Forward Transconductance|VDS= 5 V, ID= 20 A|−|69|−|S|
|**DYNAMIC CHARACTERISTICS**||||||||
|Ciss||Input Capacitance|VDS= 60 V, VGS= 0 V, f = 1 MHz|−|5605|7850|pF|
|Coss||Output Capacitance||−|778|1090|pF|
|Crss||Reverse Transfer Capacitance||−|27|40|pF|
|Rg||Gate Resistance||0.1|1.4|3.5|�|
|**SWITCHING CHARACTERISTICS**||||||||
|td(on)||Turn−On Delay Time|VDD= 60 V, ID= 20 A,<br>VGS= 10 V, RGEN= 6�|−|29|47|ns|
|tr||Rise Time||−|18|33||
|td(off)||Turn−Off Delay Time||−|40|64||
|tf||Fall Time||−|9.5|19||
|Qg(TOT)||Total Gate Charge|VGS= 0 V to 10 V, VDD= 60 V, ID= 20 A|−|76|107|nC|
||||VGS= 0 V to 6 V, VDD= 60 V, ID= 20 A|−|48|68||
|Qgs||Gate to Source Charge|VDD= 60 V, ID= 20 A|−|25|−|nC|
|Qgd||Gate to Drain�Miller�Charge||−|15|−|nC|
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|VSD||Source to Drain Diode Forward Voltage|VGS= 0 V, IS= 2.9 A<br>(Note 2)|−|0.7|1.1|V|
||||VGS= 0 V, IS=  20 A<br>(Note 2)|−|0.8|1.2||
|trr||Reverse Recovery Time|IF= 20 A, di/dt = 100 A/�s|−|87|139|ns|
|Qrr||Reverse Recovery Charge||−|164|263|nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

**www.onsemi.com** 

**3** 

**FDMT800120DC** 

## **THERMAL CHARACTERISTICS** 

|**THERMAL CHARACTERISTICS**<br>~~es~~|**THERMAL CHARACTERISTICS**|||
|---|---|---|---|
|**Symbol**<br>~~es~~<br>~~ee~~|**Parameter**|**Ratings**|**Unit**|
|R JC<br>~~es~~<br>~~ee~~<br>~~es~~|Thermal Resistance, Junction to Case<br>(Top Source)|1.6|°C/W|
|R JC<br>~~ee~~<br>~~es~~|Thermal Resistance, Junction to Case<br>(Bottom Drain)|0.8||
|R JA<br>~~es~~<br>~~a~~<br>~~es~~|Thermal Resistance, Junction to Ambient<br>(Note 1a)|38||
|R JA<br>~~es~~<br>~~es~~|Thermal Resistance, Junction to Ambient<br>(Note 1b)|81||
|R JA<br>~~es~~<br>~~es~~<br>~~es~~|Thermal Resistance, Junction to Ambient<br>(Note 1c)|26||
|R JA<br>~~es~~<br>~~es~~|Thermal Resistance, Junction to Ambient<br>(Note 1d)|34||
|R JA<br>~~es~~<br>~~a~~<br>~~es~~|Thermal Resistance, Junction to Ambient<br>(Note 1e)|14||
|R JA<br>~~es~~<br>~~aa~~|Thermal Resistance, Junction to Ambient<br>(Note 1f)|16||
|R JA<br>~~es~~<br>~~aa~~|Thermal Resistance, Junction to Ambient<br>(Note 1g)|26||
|R JA<br>~~aaa~~|Thermal Resistance, Junction to Ambient<br>(Note 1h)|60||
|R JA<br>~~aaaa~~|Thermal Resistance, Junction to Ambient<br>(Note 1i)|15||
|R JA<br>~~aaes~~|Thermal Resistance, Junction to Ambient<br>(Note 1j)|21||
|R JA<br>~~aes~~<br>~~Rs~~|Thermal Resistance, Junction to Ambient<br>(Note 1k)|9||
|R JA<br>~~es~~<br>~~Rs~~|Thermal Resistance, Junction to Ambient<br>(Note 1l)|11||



NOTES: 

1. R 0 JA is determined with the device mounted on a FR−4 board using a specified pad of 2 oz copper as shown below. R 0 CA is determined by the user’s board design. 

**==> picture [410 x 127] intentionally omitted <==**

**----- Start of picture text -----**<br>
a) 38 ° C/W when mounted on  b) 81 ° C/W when mounted on<br>a 1 in [2]  pad of 2 oz copper. a minimum pad of 2 oz copper.<br>LEL8. 0990000<br>90000<br>G SF SS DF DS<br>G SF SS DF DS<br>**----- End of picture text -----**<br>


c) Still air, 20.9 × 10.4 × 12.7 mm Aluminum Heat Sink, 1 in[2] pad of 2 oz copper 

   - d) Still air, 20.9 × 10.4 × 12.7 mm Aluminum Heat Sink, minimum pad of 2 oz copper 

   - e) Still air, 45.2 × 41.4 × 11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, 1 in[2] pad of 2 oz copper 

   - f) Still air, 45.2 × 41.4 × 11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, minimum pad of 2 oz copper 

   - g) 200 FPM Airflow, No Heat Sink, 1 in[2] pad of 2 oz copper 

   - h) 200 FPM Airflow, No Heat Sink, minimum pad of 2 oz copper 

   - i) 200 FPM Airflow, 20.9 × 10.4 × 12.7 mm Aluminum Heat Sink, 1 in[2] pad of 2 oz copper 

   - j) 200 FPM Airflow, 20.9 × 10.4 × 12.7 mm Aluminum Heat Sink, minimum pad of 2 oz copper 

   - k) 200 FPM Airflow, 45.2 × 41.4 × 11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, 1 in[2] pad of 2 oz copper 

   - l) 200 FPM Airflow, 45.2 × 41.4 × 11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, minimum pad of 2 oz copper 

2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. 4 

3. EAS of 1350 mJ is based on starting TJ = 25 ° C; N−ch: L = 3 mH, IAS = 30 A, VDD = 120 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 93 A. 4. Pulsed Id please refer to Figure 11 SOA graph for more details. 

5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro−mechanical application board design. 

**www.onsemi.com** 

**4** 

**FDMT800120DC** 

## **TYPICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

**==> picture [491 x 602] intentionally omitted <==**

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320 5<br>VGS = 10 V VGS = 5.5 V<br>240 VGS = 7 V 4 VGS = 6 V<br>VGS = 6.5 V VGS = 6.5 V<br>3<br>160<br>VGS = 6 V 2<br>80<br>VGS = 5.5 V 1<br>Pulse Duration = 80  � s Pulse Duration = 80  � s VGS =  10 V<br>Duty Cycle = 0.5% Max Duty Cycle = 0.5% Max VGS = 7 V<br>0 0<br>0 1 2 3 4 5 0 80 160 240 320<br>VDS, Drain to Source Voltage (V) ID, Drain Current (A)<br>Figure 1. On Region Characteristics Figure 2. Normalized On−Resistance<br>vs. Drain Current and Gate Voltage<br>2.5 20<br>ID = 20 A Pulse Duration = 80  � s<br>VGS = 10 V Duty Cycle = 0.5% Max<br>2.0 15<br>ID = 20 A<br>1.5 10<br>TJ = 125 ° C<br>1.0 5 T J  = 25 ° C<br>0.5 0<br>−75 −50 −25 0 25 50 75 100 125 150 4 5 6 7 8 9 10<br>TJ, Junction Temperature ( � C) VGS, Gate to Source Voltage (V)<br>Figure 3. Normalized On Resistance Figure 4. On−Resistance vs. Gate to Source<br>vs. Junction Temperature Voltage<br>320 320<br>Pulse Duration = 80  � s 100 V GS  = 0 V<br>Duty Cycle = 0.5% Max<br>240<br>10<br>VDS = 5 V TJ = 150 ° C<br>160 1 TJ = 25 ° C<br>0.1<br>TJ = 25 ° C<br>80 TJ = 150 ° C 0.01 T J  = −55 ° C<br>TJ = −55 ° C<br>0 0.001<br>2 3 4 5 6 7 8 0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>VGS, Gate to Source Voltage (V) VSD, Body Diode Forward Voltage (V)<br>, Drain Current (A)ID Normalized Drain<br>to Source On−Resistance<br>) �<br>(m<br>Normalized<br> Drain to Source On−Resistance<br>Drain to Source On−Resistance<br>DS(on),<br>r<br>, Drain Current (A)<br>ID<br>, Reverse Drain Current (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 5. Transfer Characteristics** 

**Figure 6. Source to Drain Diode Forward Voltage vs. Source Current** 

**www.onsemi.com** 

**5** 

**FDMT800120DC** 

## **TYPICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) (continued) 

**==> picture [488 x 589] intentionally omitted <==**

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10 10000<br>ID = 20 A VDD = 35 V Ciss<br>8<br>1000<br>VDD = 60 V Coss<br>6<br>100<br>4 VDD = 85 V<br>C rss<br>10<br>2<br>f = 1 MHz<br>V GS  = 0 V<br>0 1<br>0 20 40 60 80 0.1 1 10 100<br>Qg, Gate Charge (nC) VDS, Drain to Source Voltage (V)<br>Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs. Drain to Source<br>Voltage<br>500 150<br>R � JC = 0.8 ° C/W<br>100 120<br>VGS = 10 V<br>T J  = 25 ° C 90<br>10 TJ = 100 ° C 60 VGS = 6 V<br>TJ = 125 ° C<br>30<br>1 0<br>0.01 0.1 1 10 100 1000 25 50 75 100 125 150<br>tAV, Time in Avalanche (ms) TC, Case Temperature ( � C)<br>Figure 9. Unclamped Inductive Switching Figure 10. Maximum Continuous Drain Current<br>Capability vs Case Temperature<br>2000 40000<br>1000 Single pulse<br>R � JC = 0.8 ° C/W<br>10000 TC = 25 ° C<br>100 10  � s<br>1000<br>This Area is<br>10 Limited by rDS(on)<br>100  � s<br>1 ms 100<br>1 Single Pulse<br>TJ = Max Rated<br>R � JC = 0.8 ° C/W Curve Bent to  10 ms<br>T C  = 25 ° C Measured Data DC<br>0.1 10<br>0.1 1 10 100 500 10 [−5] 10 [−4] 10 [−3] 10 [−2] 10 [−1] 1<br>VDS, Drain to Source Voltage (V) t, Pulse Width (s)<br>Capacitance (pF)<br>, Gate to Source Voltage (V)<br>GS<br>V<br>, Drain Current (A)<br>, Avalanche Current (A)IAS ID<br>, Drain Current (A)<br>ID , Peak Transient Power (W)<br>(PK)<br>P<br>**----- End of picture text -----**<br>


**Figure 11. Forward Bias Safe Operating Area** 

**Figure 12. Single Pulse Maximum Power Dissipation** 

**www.onsemi.com** 

**6** 

**FDMT800120DC** 

**TYPICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) (continued) 

**==> picture [443 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
2<br>Duty Cycle − Descending Order<br>1<br>D = 0.5<br>PDM<br>0.2<br>0.1 0.1 t1<br>0.05 t2<br>0.02<br>Notes:<br>0.01<br>0.01 Z � JC(t) = r(t) x R � JC<br>Single pulse R � JC = 0.8 ° C/W<br>Peak TJ = PDM x Z � JC(t) + TC<br>Duty Cycle, D = t 1 /t 2<br>0.001<br>10 [−5] 10 [−4] 10 [−3] 10 [−2] 10 [−1] 1<br>t, Rectangular Pulse Duration (s)<br>Thermal Resistance<br>r(t) Normalized Effective Transient<br>**----- End of picture text -----**<br>


**Figure 13. Junction−to−Case Transient Thermal Response Curve** 

## **PACKAGE MARKING AND ORDERING INFORMATION** 

|**Device Marking**|**Device**|**Package**|**Reel Size**|**Tape Width**|**Shipping**†|
|---|---|---|---|---|---|
|800120|FDMT800120DC|TDFNW8 8.3×8.4, 2P**,**<br>DUAL COOL, OPTION 2|13”|13.3 mm|3000 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

POWERTRENCH and DUAL COOL are registered trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. 

**www.onsemi.com** 

**7** 

## MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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TDFNW8 8.3x8.4, 2P, DUAL COOL, OPTION 2<br>CASE 507AR<br>ISSUE B<br>DATE 29 MAR 2021<br>**----- End of picture text -----**<br>


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GENERIC<br>. 65 MARKING DIAGRAM*<br>Y oO<br>Gy<br>' won uancasie<br>Yy<br>7/7jj4 AREA<br>LLe<br>XXXXXXX AWLYW<br>XXXX = Specific Device Code<br>A = Assembly Location<br>WL = Wafer Lot Code<br>Y = Year Code<br>W = Work Week Code<br>*This information is generic. Please refer to<br>device data sheet for actual part marking.<br>Pb−Free indicator, “G” or microdot “ ”, =<br>may or may not be present. Some products<br>may not follow the Generic Marking.<br>**----- End of picture text -----**<br>


Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

## **DOCUMENT NUMBER: 98AON95711G** 

## **TDFNW8 8.3x8.4, 2P, DUAL COOL, OPTION 2** 

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PAGE 1 OF 1<br>**----- End of picture text -----**<br>


## **DESCRIPTION:** 

ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2018 

**onsemi** , , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **onsemi** owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of **onsemi** ’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. **onsemi** reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and **onsemi** makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using **onsemi** products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by **onsemi** . “Typical” parameters which may be provided in **onsemi** data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. **onsemi** does not convey any license under any of its intellectual property rights nor the rights of others. **onsemi** products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use **onsemi** products for any such unintended or unauthorized application, Buyer shall indemnify and hold **onsemi** and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that **onsemi** was negligent regarding the design or manufacture of the part. **onsemi** is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

**LITERATURE FULFILLMENT** : **TECHNICAL SUPPORT Email Requests to:** orderlit@onsemi.com **North American Technical Support: Europe, Middle East and Africa Technical Support:** Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 00421 33 790 2910 **onsemi Website:** www.onsemi.com Phone: 011 421 33 790 2910 For additional information, please contact your local Sales Representative 

◊ 

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## Links

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---

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