# Power MOSFET, N Channel, 80 V, 60 A, 6100 µohm, Power 56, Surface Mount

![Product image](https://novapart.co/image/farnell:2083320/)

**URL**: https://novapart.co/products/FDMS86322/power-mosfet-n-channel-80-v-60-a-6100-ohm-56
**SKU**: FDMS86322
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.7710
**Stock**: 10+

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:60A; Drain Source Voltage Vds:80V; On Resistance Rds(on):0.0061ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.9V; Po

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 104W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | Power 56 |
| Drain Source Voltage Vds | 80V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 60A |
| Drain Source On State Resistance | 6100µohm |
| Gate Source Threshold Voltage Max | 2.9V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2083320/)

## **Is Now Part of** 

**To learn more about ON Semiconductor, please visit our website at www.onsemi.com** 

ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

**==> picture [58 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
October 2014<br>**----- End of picture text -----**<br>


## **FDMS86322** 

**N-Channel Shielded Gate PowerTrench[®] MOSFET 80 V, 60 A, 7.65 m** Ω 

## **Features** 

Shielded Gate MOSFET Technology 

Max rDS(on) = 7.65 mΩ at VGS = 10 V, ID = 13 A 

Max rDS(on) = 12 mΩ at VGS = 6 V, ID = 7.2 A 

## **General Description** 

This N-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench **[®]** process that incorporates Shielded Gate technology. This process has been optimized for the on-state resistance and yet maintain superior switching performance. 

Advanced Package and Silicon combination for  low rDS(on) and high efficiency 

MSL1 robust package design 100% UIL tested 

## **Application** 

DC-DC Conversion 

RoHS Compliant 

|**D **<br>**Top**|**D D**|**D D**|**D**<br>**Bottom**|**S**<br>**Bottom**|**S**<br>**S**<br>a|**G**<br>Pin 1|**G**<br>Pin 1|**G**<br>Pin 1|**S**<br>**S**<br>**S**<br>**G**|_<br>it<br>2}<br>3}<br>4}|_<br>it<br>2}<br>3}<br>4}||=<br>18<br>7<br>‘6<br>5|**D**<br>**D**<br>**D**<br>**D**|**D**<br>**D**<br>**D**<br>**D**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|**Power 56**||||||||||||||||
|**MOSFET Maximum Ratings  **TA= 25 °C unless otherwise noted|= 25 °C unless otherwise noted|||||||||||||||
|**Symbol**||**Parameter**|||||||||**Ratings**||||**Units**|
|VDS<br>Drain to Source Voltage|||||||||||80||||V|
|VGS<br>Gate to Source Voltage|||||||||||±20||||V|
|Drain Current   -Continuous|||T|T|TC = 25 °C|= 25 °C||= 25 °C|= 25 °C||60|||||
|ID<br>-Continuous||||T|TA= 25 °C|= 25 °C||= 25 °C|= 25 °C<br> (Note 1a)||13||||A|
|-Pulsed|||||||||||200|||||
|EAS<br>Single Pulse Avalanche Energy|||||||||(Note 3)||135||||mJ|
|PD<br>Power Dissipation<br>Power Dissipation|||T|T|TC= 25 °C<br>TA= 25 °C|= 25 °C<br>= 25 °C||= 25 °C<br>= 25 °C|= 25 °C<br> (Note 1a)||104<br>2.5||||W|
|TJ, TSTG<br>Operatingand Storage Junction Tem|e Junction Temperature Range||||||||||-55 to +150||||°C|
|**Thermal Characteristics**||||||||||||||||
|RθJC<br>Thermal Resistance, Junction to Case|Thermal Resistance, Junction to Case||||||||||1.2||||°C/W|
|RθJA<br>Thermal Resistance, Junction to Ambient|Thermal Resistance, Junction to Ambient||||||||(Note 1a)||50|||||
|**Package Marking and Ordering Information**||||||||||||||||
|**Device Marking**<br>**Device**|||**Package**||||||**Reel Size**||**Tape Width**|||**Quantity**||
|FDMS86322<br>FDMS86322|||Power 56|Power 56|||||13 ’’||12 mm|||3000 units||



www.fairchildsemi.com 

©2010 Fairchild Semiconductor Corporation FDMS86322 Rev . C3 

**1** 

## **Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Switching Characteristics**<br>**Drain-Source Diode Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250μA, VGS= 0 V<br>80<br>V<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250μA, referenced to 25 °C<br>66<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 64 V, VGS = 0 V<br>800<br>nA<br>IGSS<br>Gate to Source Leakage Current, Forward<br>VGS= ±20 V, VDS = 0 V<br>100<br>nA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS, ID= 250μA<br>2.0<br>2.9<br>4.0<br>V<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= 250μA, referenced to 25 °C<br>-9<br>mV/°C<br>rDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V, ID= 13 A<br>6.1<br>7.65<br>mΩ<br>VGS= 6 V, ID= 7.2 A<br>8.2<br>12<br>VGS= 10 V, ID= 13 A, TJ = 125 °C<br>10.7<br>14<br>gFS<br>Forward Transconductance<br>VDS= 10 V, ID= 13 A<br>45<br>S<br>Ciss<br>Input Capacitance<br>VDS= 50 V, VGS= 0 V,<br>f = 1 MHz<br>2255<br>3000<br>pF<br>Coss<br>Output Capacitance<br>460<br>610<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>30<br>45<br>pF<br>Rg<br>Gate Resistance<br>1.0<br>Ω<br>td(on)<br>Turn-On DelayTime<br>VDD= 50 V, ID= 13 A,<br>VGS= 10 V, RGEN= 6Ω<br>15<br>27<br>ns<br>tr<br>Rise Time<br>11<br>20<br>ns<br>td(off)<br>Turn-Off DelayTime<br>27<br>44<br>ns<br>tf<br>Fall Time<br>7<br>13<br>ns<br>Qg<br>Total Gate Charge<br>VGS= 0 V to 10 V<br>VDD= 50 V,<br>ID= 13 A<br>39<br>55<br>nC<br>Qg<br>Total Gate Charge<br>VGS= 0 V to 5 V<br>22<br>31<br>nC<br>Qgs<br>Gate to Source Charge<br>9.5<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>10.8<br>nC<br>VSD<br>Source to Drain Diode  Forward Voltage<br>VGS = 0 V, IS = 2.1 A(Note 2)<br>0.7<br>1.2<br>V<br>VGS = 0 V, IS = 13 A(Note 2)<br>0.8<br>1.3<br>trr<br>Reverse RecoveryTime<br>IF= 13 A, di/dt = 100 A/μs<br>56<br>90<br>ns<br>Qrr<br>Reverse RecoveryCharge<br>61<br>98<br>nC<br>~~=~~<br>~~————— ==~~<br>~~=eee~~<br>~~———— nn~~<br>~~——~~|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Switching Characteristics**<br>**Drain-Source Diode Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250μA, VGS= 0 V<br>80<br>V<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250μA, referenced to 25 °C<br>66<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 64 V, VGS = 0 V<br>800<br>nA<br>IGSS<br>Gate to Source Leakage Current, Forward<br>VGS= ±20 V, VDS = 0 V<br>100<br>nA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS, ID= 250μA<br>2.0<br>2.9<br>4.0<br>V<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= 250μA, referenced to 25 °C<br>-9<br>mV/°C<br>rDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V, ID= 13 A<br>6.1<br>7.65<br>mΩ<br>VGS= 6 V, ID= 7.2 A<br>8.2<br>12<br>VGS= 10 V, ID= 13 A, TJ = 125 °C<br>10.7<br>14<br>gFS<br>Forward Transconductance<br>VDS= 10 V, ID= 13 A<br>45<br>S<br>Ciss<br>Input Capacitance<br>VDS= 50 V, VGS= 0 V,<br>f = 1 MHz<br>2255<br>3000<br>pF<br>Coss<br>Output Capacitance<br>460<br>610<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>30<br>45<br>pF<br>Rg<br>Gate Resistance<br>1.0<br>Ω<br>td(on)<br>Turn-On DelayTime<br>VDD= 50 V, ID= 13 A,<br>VGS= 10 V, RGEN= 6Ω<br>15<br>27<br>ns<br>tr<br>Rise Time<br>11<br>20<br>ns<br>td(off)<br>Turn-Off DelayTime<br>27<br>44<br>ns<br>tf<br>Fall Time<br>7<br>13<br>ns<br>Qg<br>Total Gate Charge<br>VGS= 0 V to 10 V<br>VDD= 50 V,<br>ID= 13 A<br>39<br>55<br>nC<br>Qg<br>Total Gate Charge<br>VGS= 0 V to 5 V<br>22<br>31<br>nC<br>Qgs<br>Gate to Source Charge<br>9.5<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>10.8<br>nC<br>VSD<br>Source to Drain Diode  Forward Voltage<br>VGS = 0 V, IS = 2.1 A(Note 2)<br>0.7<br>1.2<br>V<br>VGS = 0 V, IS = 13 A(Note 2)<br>0.8<br>1.3<br>trr<br>Reverse RecoveryTime<br>IF= 13 A, di/dt = 100 A/μs<br>56<br>90<br>ns<br>Qrr<br>Reverse RecoveryCharge<br>61<br>98<br>nC<br>~~=~~<br>~~————— ==~~<br>~~=eee~~<br>~~———— nn~~<br>~~——~~|
|---|---|
|Notes**:**||
|1. RθJAis determined with the device mounted on a 1in2pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJCis guaranteed by design while RθCAis determined by||
|the user's board design.||
|a. 50 °C/W when mounted  on a<br>1 in2pad of  2 oz  copper.<br>b. 125 °C/W when mounted on  a<br>minimum pad of 2 oz copper.<br>2||
|**G**<br>**DF**<br>**DS**<br>**SF**<br>**SS**<br>**G**<br>**DF**<br>**DS**<br>**SF**<br>**SS**||



2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 

3. Starting TJ = 25 °C, L = 0.3 mH, IAS = 30 A, VDD = 75 V, VGS = 10 V 

©2010 Fairchild Semiconductor Corporation FDMS86322 Rev . C3 

www.fairchildsemi.com 

**2** 

## **Typical Characteristics** TJ = 25 °C unless otherwise noted 

**==> picture [464 x 590] intentionally omitted <==**

**----- Start of picture text -----**<br>
200 5<br>VGS =  10 V PULSE DURATION = 80  μ s VGS = 4.5 V<br>DUTY CYCLE = 0.5% MAX<br>4<br>150<br>VGS =  6 V VGS = 5 V<br>3<br>100 VGS =  5.5 V VGS = 5.5 V<br>2<br>VGS = 5 V VGS = 6 V<br>50<br>1<br>VGS = 4.5 V PULSE DURATION = 80  μ s VGS = 10 V<br>DUTY CYCLE = 0.5% MAX<br>0 0<br>0 1 2 3 4 5 0 50 100 150 200<br>VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 1.  On Region Characteristics Figure 2.  Normalized On-Resistance                                          Normalized On-Resistance<br>vs Drain Current and Gate Voltage<br>2.0 40<br>1.8 V  ID GS  = 13 A  = 10 V ID = 13 A PULSE DURATION = 80DUTY CYCLE = 0.5% MAX  μ s<br>30<br>1.6<br>1.4<br>20<br>1.2<br>TJ = 125 [ o] C<br>1.0<br>10<br>0.8<br>TJ = 25 [ o] C<br>0.6 0<br>-75 -50 -25 0 25 50 75 100 125 150 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3.  Normalized  On  Resistance                                         Figure 4.   On-Resistance vs  Gate to                                  On-Resistance vs  Gate to<br>vs Junction Temperature Source Voltage<br>200 100<br>PULSE DURATION = 80  μ s VGS = 0 V<br>DUTY CYCLE = 0.5% MAX<br>150 10<br>VDS = 5 V<br>T J  = 150 [ o] C<br>100 1<br>TJ = 150  [o] C<br>TJ = 25  [o] C<br>TJ = 25  [o] C<br>50 0.1<br>TJ = -55 [ o] C TJ = -55  [o] C<br>0 0.01<br>1 2 3 4 5 6 7 8 0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>NORMALIZED<br>DRAIN CURRENT (A)<br>,<br>ID<br>DRAIN TO SOURCE ON-RESISTANCE<br>)<br>Ω<br>m<br>(<br>DRAIN TO<br>NORMALIZED rDS(on),<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>ID<br>, REVERSE DRAIN CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 2.  Normalized On-Resistance                                          Normalized On-Resistance vs Drain Current and Gate Voltage** 

**Figure 4.   On-Resistance vs  Gate to                                  On-Resistance vs  Gate to Source Voltage** 

**Figure 5.  Transfer Characteristics** 

**Figure 6.    Source to Drain  Diode Forward Voltage vs Source Current** 

©2010 Fairchild Semiconductor Corporation FDMS86322 Rev . C3 

www.fairchildsemi.com 

**3** 

## **Typical Characteristics** TJ = 25 °C unless otherwise noted 

**==> picture [466 x 610] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 10000<br>ID = 13 A VDD = 50 V C iss<br>8<br>VDD = 25 V VDD = 75 V 1000 Coss<br>6<br>4<br>100<br>Crss<br>2<br>f = 1 MHz<br>V GS  = 0 V<br>0 10<br>0 10 20 30 40 0.1 1 10 80<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7.  Gate Charge Characteristics Figure 8.  Capacitance vs Drain<br>to Source Voltage<br>100 90<br>75<br>T J  = 25  [o] C 60<br>VGS = 10 V<br>10 TJ = 100  [o] C 45<br>Limited by Package<br>30<br>T J  = 125  [o] C VGS = 6 V<br>15<br>R θ JC = 1.2 oC/W<br>1 0<br>0.001 0.01 0.1 1 10 100 25 50 75 100 125 150<br>tAV, TIME IN AVALANCHE (ms) Tc, CASE TEMPERATURE (oC)<br>Figure 9. Unclamped Inductive                                  Figure 10.  Maximum Continuous Drain<br>Switching Capability Current  vs Case Temperature<br>500 2000<br>THIS AREA IS<br>100 LIMITED BY r DS(on) 1000 VGS = 10 V SINGLE PULSE<br>R θ JA = 125  [o] C/W<br>T A = 25  [o] C<br>10<br>100<br>1 1 ms<br>10 ms 10<br>SINGLE PULSE<br>100 ms<br>0.1 TJ = MAX RATED<br>TRA θ JA= 25 = 125 [o] C [ o] C/W CURVE BENT TO MEASURED DATA DC 1 s10 s 1<br>0.01<br>0.01 0.1 1 10 100 300 0.510-3 10-2 10-1 1 10 100 1000<br>VDS, DRAIN to SOURCE VOLTAGE (V)<br>t, PULSE WIDTH (sec)<br>Figure 11.  Forward Bias Safe                                      Figure 12.   Single  Pulse Maximum<br>Operating Area  Power  Dissipation<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>V<br>DRAIN CURRENT (A)<br>,<br>ID<br>, AVALANCHE CURRENT (A)<br>IAS<br>, DRAIN CURRENT (A)<br>ID<br>PEAK TRANSIENT POWER (W)<br>P)(PK,<br>**----- End of picture text -----**<br>


©2010 Fairchild Semiconductor Corporation FDMS86322 Rev . C3 

www.fairchildsemi.com 

**4** 

**==> picture [257 x 12] intentionally omitted <==**

**----- Start of picture text -----**<br>
Typical Characteristics  TJ = 25 °C unless otherwise noted<br>**----- End of picture text -----**<br>


**==> picture [470 x 190] intentionally omitted <==**

**----- Start of picture text -----**<br>
2<br>1 DUTY CYCLE-DESCENDING ORDER<br>D = 0.5<br>      0.2<br>      0.1<br>0.1       0.05<br>      0.02<br>      0.01 PDM<br>0.01<br>t1<br>t2<br>SINGLE PULSE NOTES:<br>DUTY FACTOR: D = t1/t2<br>0.001 R θ JA = 125  [o] C/W PEAK TJ = PDM x Z θJA  x R θJA  + TA<br>0.0005<br>10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Figure 13.  Junction-to-Ambient Transient Thermal Response Curve<br>ZJA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


©2010 Fairchild Semiconductor Corporation FDMS86322 Rev . C3 

www.fairchildsemi.com 

**5** 

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