# Power MOSFET, P Channel, 150 V, 22 A, 0.053 ohm, Power 56, Surface Mount ![Product image](https://novapart.co/image/farnell:2822538RL/) **URL**: https://novapart.co/products/FDMS86263P/power-mosfet-p-channel-150-v-22-a-0053-ohm-56 **SKU**: FDMS86263P **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €1.3900 **Stock**: 1000+ **Lead Time**: 141 days (indicative) ## Description Transistor Polarity:P Channel; Continuous Drain Current Id:-22A; Drain Source Voltage Vds:-150V; On Resistance Rds(on):0.042ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | Lead (25-Jun-2025) | | No. Of Pins | 8Pins | | Channel Type | P Channel | | Product Range | PowerTrench | | Qualification | - | | Power Dissipation | 104W | | Transistor Mounting | Surface Mount | | Rds(On) Test Voltage | 10V | | Transistor Case Style | Power 56 | | Drain Source Voltage Vds | 150V | | Operating Temperature Max | 150°C | | Continuous Drain Current Id | 22A | | Drain Source On State Resistance | 0.053ohm | | Gate Source Threshold Voltage Max | 2.9V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2822538RL/) ## **Is Now Part of** ## **To learn more about ON Semiconductor, please visit our website at www.onsemi.com** Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. **==> picture [58 x 7] intentionally omitted <==** **----- Start of picture text -----**
October 2014
**----- End of picture text -----**
## **FDMS86263P** ## **P-Channel PowerTrench[®] MOSFET -150 V, -22 A, 53 m** Ω ## **Features** Max rDS(on) = 53 mΩ at VGS = -10 V, ID = -4.4 A Max rDS(on) = 64 mΩ at VGS = -6 V, ID = -4 A Very low Rds-on in Mid-Voltage P-Channel silicon technology optimized for low Qg This product is optimised for fast switching applications as well as load switch applications ## **General Description** This P-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench **[®]** technology. This very high density process is especially tailored to minimize on-state resistance and optimized for superior switching performance. ## **Applications** |**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a|**FDMS86263P P-Channel PowerTrench® MOSFET**
100% UIL tested
RoHS Compliant
Active Clamp Switch
Load Switch
|
a
|a| |---|---|---|---|---|---|---|---|---|---|---|---|---|---| |**Top**|||**S**
**Bottom**|**S**
Pin 1
**S**
**D**
~~—~~
7
fa|||||||||| |||||**G**
**S**||**S**||||**D**|||| |||||||**S**||||**D**|||| |**D **|**D D**||**D**|||**G**||||**D**|||| |**Power 56**|||||||||||||| |**MOSFET Maximum Ratings **TA= 25 °C unless otherwise noted|= 25 °C unless otherwise noted||= 25 °C unless otherwise noted||||||||||| |**Symbol**||**Parameter**|||||||**Ratings**||**Units**||| |VDS
Drain to Source Voltage|||||||||-150||V||| |VGS
Gate to Source Voltage|||||||||±25||V||| |Drain Current -Continuous|Drain Current -Continuous|Drain Current -Continuous|T|TC = 25 °C||= 25 °C|||-22||||| |ID
-Continuous|||T|TA= 25 °C||= 25 °C
(Note 1a)|||-4.4||A||| |-Pulsed|||||||||-70||||| |EAS
Single Pulse Avalanche Energy||||||(Note 3|Note 3)||384||mJ||| |PD
Power Dissipation
Power Dissipation|||T|TC= 25 °C
TA= 25 °C||= 25 °C
(Note 1a)|||104
2.5||W||| |TJ, TSTG
Operatingand Storage Junction Tem|e Junction Temperature Range||||||||-55 to +150||°C||| |**Thermal Characteristics**|||||||||||||| |RθJC
Thermal Resistance, Junction to Case|Thermal Resistance, Junction to Case||||||||1.2||°C/W||| |RθJA
Thermal Resistance, Junction to Ambient|Thermal Resistance, Junction to Ambient|||||(Note 1a)|||50||||| |**Package Marking and Ordering Information**|||||||||||||| |**Device Marking**
**Device**|||**Package**|||**Reel Size**|||**Tape Width**|**Quantity**|||| |FDMS86263P
FDMS86263P|||Power 56|||13 ’’|||12 mm|3000 units|||| ©2014 Fairchild Semiconductor Corporation FDMS86263P Rev.C2 www.fairchildsemi.com **1** ## **Electrical Characteristics** TJ = 25 °C unless otherwise noted |**Off Characteristics**
**On Characteristics**
**Dynamic Characteristics**
**Symbol**
**Parameter**
**Test Conditions**
**Min**
**Typ**
**Max**
**Units**
BVDSS
Drain to Source Breakdown Voltage
ID= -250μA, VGS= 0 V
-150
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID= -250μA, referenced to 25 °C
-116
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= -120 V, VGS = 0 V
-1
μA
IGSS
Gate to Source Leakage Current
VGS= ±25 V, VDS = 0 V
±100
nA
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= -250μA
-2
-2.9
-4
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID= -250μA, referenced to 25 °C
7
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= -10 V, ID= -4.4 A
42
53
mΩ
VGS= -6 V, ID= -4 A
45
64
VGS= -10 V, ID= -4.4 A,TJ = 125 °C
71
94
gFS
Forward Transconductance
VDS= -10 V, ID= -4.4 A
19
S
Ciss
Input Capacitance
VDS= -75 V, VGS= 0 V,
f = 1 MHz
2935
3905
pF
Coss
Output Capacitance
238
315
pF
Crss
Reverse Transfer Capacitance
11
20
pF
Rg
Gate Resistance
0.1
2.7
5.4
Ω
~~Te~~
~~ee~~|**Off Characteristics**
**On Characteristics**
**Dynamic Characteristics**
**Symbol**
**Parameter**
**Test Conditions**
**Min**
**Typ**
**Max**
**Units**
BVDSS
Drain to Source Breakdown Voltage
ID= -250μA, VGS= 0 V
-150
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID= -250μA, referenced to 25 °C
-116
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= -120 V, VGS = 0 V
-1
μA
IGSS
Gate to Source Leakage Current
VGS= ±25 V, VDS = 0 V
±100
nA
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= -250μA
-2
-2.9
-4
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID= -250μA, referenced to 25 °C
7
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= -10 V, ID= -4.4 A
42
53
mΩ
VGS= -6 V, ID= -4 A
45
64
VGS= -10 V, ID= -4.4 A,TJ = 125 °C
71
94
gFS
Forward Transconductance
VDS= -10 V, ID= -4.4 A
19
S
Ciss
Input Capacitance
VDS= -75 V, VGS= 0 V,
f = 1 MHz
2935
3905
pF
Coss
Output Capacitance
238
315
pF
Crss
Reverse Transfer Capacitance
11
20
pF
Rg
Gate Resistance
0.1
2.7
5.4
Ω
~~Te~~
~~ee~~|**Off Characteristics**
**On Characteristics**
**Dynamic Characteristics**
**Symbol**
**Parameter**
**Test Conditions**
**Min**
**Typ**
**Max**
**Units**
BVDSS
Drain to Source Breakdown Voltage
ID= -250μA, VGS= 0 V
-150
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID= -250μA, referenced to 25 °C
-116
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= -120 V, VGS = 0 V
-1
μA
IGSS
Gate to Source Leakage Current
VGS= ±25 V, VDS = 0 V
±100
nA
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= -250μA
-2
-2.9
-4
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID= -250μA, referenced to 25 °C
7
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= -10 V, ID= -4.4 A
42
53
mΩ
VGS= -6 V, ID= -4 A
45
64
VGS= -10 V, ID= -4.4 A,TJ = 125 °C
71
94
gFS
Forward Transconductance
VDS= -10 V, ID= -4.4 A
19
S
Ciss
Input Capacitance
VDS= -75 V, VGS= 0 V,
f = 1 MHz
2935
3905
pF
Coss
Output Capacitance
238
315
pF
Crss
Reverse Transfer Capacitance
11
20
pF
Rg
Gate Resistance
0.1
2.7
5.4
Ω
~~Te~~
~~ee~~|**Off Characteristics**
**On Characteristics**
**Dynamic Characteristics**
**Symbol**
**Parameter**
**Test Conditions**
**Min**
**Typ**
**Max**
**Units**
BVDSS
Drain to Source Breakdown Voltage
ID= -250μA, VGS= 0 V
-150
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID= -250μA, referenced to 25 °C
-116
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= -120 V, VGS = 0 V
-1
μA
IGSS
Gate to Source Leakage Current
VGS= ±25 V, VDS = 0 V
±100
nA
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= -250μA
-2
-2.9
-4
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID= -250μA, referenced to 25 °C
7
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= -10 V, ID= -4.4 A
42
53
mΩ
VGS= -6 V, ID= -4 A
45
64
VGS= -10 V, ID= -4.4 A,TJ = 125 °C
71
94
gFS
Forward Transconductance
VDS= -10 V, ID= -4.4 A
19
S
Ciss
Input Capacitance
VDS= -75 V, VGS= 0 V,
f = 1 MHz
2935
3905
pF
Coss
Output Capacitance
238
315
pF
Crss
Reverse Transfer Capacitance
11
20
pF
Rg
Gate Resistance
0.1
2.7
5.4
Ω
~~Te~~
~~ee~~| |---|---|---|---| |**Switching Characteristics**|||| |td(on)
Turn-On DelayTime|17|31
ns|| |VDD= -75 V, ID= -4.4 A,
tr
Rise Time|10|21
ns|| |VGS= -10 V, RGEN= 6Ω
td(off)
Turn-Off DelayTime|37|59
ns|| |tf
Fall Time|14|25
ns|| |Qg
Total Gate Charge
VGS= 0 V to -10 V
VDD= -75 V,
ID= -4.4 A
45
63
nC
Qg
Total Gate Charge
VGS= 0 V to -6 V
29
40
nC
Qgs
Gate to Source Charge
11.3
nC
Qgd
Gate to Drain “Miller” Charge
8.9
nC
~~—————~~|||| |**Drain-Source Diode Characteristics**|||| |VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, IS = -4.4 A
(Note 2)
-0.79
-1.3
V
VGS = 0 V, IS = -2 A(Note 2)
-0.75
-1.2
trr
Reverse RecoveryTime
IF= -4.4 A, di/dt = 100 A/μs
91
146
ns
Qrr
Reverse RecoveryCharge
287
460
nC
~~———~~|||| |Notes**:**|||| |1. RθJAis determined with the device mounted on a 1 in2pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJCis guaranteed by design while R|is guaranteed by design while RθCAis determined by||| |the user's board design.|||| **==> picture [366 x 90] intentionally omitted <==** **----- Start of picture text -----**
a) 50 °C/W when mounted on a b) 125 °C/W when mounted on a
1 in [2 ] pad of 2 oz copper minimum pad of 2 oz copper.
i)
G DF DS SF SS G DF DS SF SS
**----- End of picture text -----**
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Starting TJ = 25 °C; P-ch: L = 3 mH, IAS = -16 A, VDD = -150 V, VGS = -10 V. 100% test at L = 0.1 mH, IAS = -52 A. ©2014 Fairchild Semiconductor Corporation FDMS86263P Rev.C2 www.fairchildsemi.com **2** c **Typical Characteristics** TJ = 25 °C unless otherwise noted **==> picture [470 x 599] intentionally omitted <==** **----- Start of picture text -----**
70 4
VGS = -10 V
VGS = -6 V VGS = -4.5 V
56
VGS = -5.5 V 3
42 VGS = -5 V
2
28 VGS = -5 V VGS = -5.5 V
1
14 VGS = -4.5 V PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX μ s PULSE DURATION = 80DUTY CYCLE = 0.5% MAX μ s VGS = -6 V VGS = -10 V
0 0
0 1 2 3 4 5 0 14 28 42 56 70
-VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
2.2 140
2.0 ID = -4.4 A PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX μ s
VGS = -10 V 120
1.8 ID = -4.4 A
1.6 100
1.4 TJ = 125 [o] C
80
1.2
1.0 60
0.8 TJ = 25 [o] C
40
0.6
0.4 20
-75 -50 -25 0 25 50 75 100 125 150 3 4 5 6 7 8 9 10
TJ, JUNCTION TEMPERATURE ( [o] C) -VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance Figure 4. On-Resistance vs Gate to
vs Junction Temperature Source Voltage
70 100
PULSE DURATION = 80 μ s VGS = 0 V
DUTY CYCLE = 0.5% MAX
56 10
VDS = -10 V
T J = 150 [o] C
42 1
TJ = 150 [o] C TJ = 25 [ o] C
28 0.1
TJ = 25 [o] C
14 0.01 TJ = -55 [o] C
TJ = -55 [o] C
0 0.001
2 3 4 5 6 0.0 0.2 0.4 0.6 0.8 1.0 1.2
-VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Source to Drain Diode
NORMALIZED
, DRAIN CURRENT (A)
D
-I
DRAIN TO SOURCE ON-RESISTANCE
) Ω
(m
DRAIN TO
NORMALIZED rDS(on),
SOURCE ON-RESISTANCE
DRAIN TO SOURCE ON-RESISTANCE
, DRAIN CURRENT (A)
D
-I , REVERSE DRAIN CURRENT (A)
S
-I
**----- End of picture text -----**
**Figure 6. Source to Drain Diode Source to Drain Diode Forward Voltage vs Source Current** ©2014 Fairchild Semiconductor Corporation FDMS86263P Rev.C2 www.fairchildsemi.com **3** **Typical Characteristics** TJ = 25 °C unless otherwise noted **==> picture [470 x 597] intentionally omitted <==** **----- Start of picture text -----**
10 10000
ID = -4.4 A VDD = -50 V Ciss
8
1000
VDD = -75 V Coss
6
VDD = -100 V 100
4 Crss
10
2
f = 1 MHz
VGS = 0 V
0 1
0 10 20 30 40 50 0.1 1 10 100
Qg, GATE CHARGE (nC) -VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain
to Source Voltage
100 40
R θ JC = 1.2 [o] C/W
30
TJ = 25 [ o] C
TJ = 100 [o] C
10 20
VGS = -10 V
T J = 125 [ o] C Limited by Package
VGS = -6 V
10
1 0
0.001 0.01 0.1 1 10 100 25 50 75 100 125 150
tAV, TIME IN AVALANCHE (ms) TC, CASE TEMPERATURE (oC)
Figure 9. Unclamped Inductive Figure 10. Maximum Continuous Drain
Switching Capability Current vs Case Temperature
200 30000
100 10 µ s SINGLE PULSE
10000 R θ JC = 1.2 [o] C/W
TC = 25 [o] C
10 100 µ s
THIS AREA IS
1000
LIMITED BY r
DS(on)
1 ms
1 SINGLE PULSE
TJ = MAX RATED
10 ms
R θ JC = 1.2 [ o] C/W CURVE BENT TO
T C = 25 [o] C MEASURED DATA DC 100
0.1 50
1 10 100 400 10-5 10-4 10-3 10-2 10-1 1
-VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum
Operating Area Power Dissipation
CAPACITANCE (pF)
, GATE TO SOURCE VOLTAGE (V)
GS
-V
DRAIN CURRENT (A)
,
D
-I
, AVALANCHE CURRENT (A)
AS
-I
, DRAIN CURRENT (A)
D
-I
PEAK TRANSIENT POWER (W)
P)(PK,
**----- End of picture text -----**
©2014 Fairchild Semiconductor Corporation FDMS86263P Rev.C2 www.fairchildsemi.com **4** ## **Typical Characteristics** TJ = 25 °C unless otherwise noted **==> picture [470 x 180] intentionally omitted <==** **----- Start of picture text -----**
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2 0.1 PDM
0.05
0.02
0.1 t1
0.01
t2
NOTES:
Z θ JC (t) = r(t) x R θ JC
R θ JC = 1.2 [o] C/W
SINGLE PULSE Peak TJ = PDM x Z θ JC(t) + TC
0.01 Duty Cycle, D = t1 / t2
0.005
10-5 10-4 10-3 10-2 10-1 1
t, RECTANGULAR PULSE DURATION (sec)
THERMAL RESISTANCE
r(t), NORMALIZED EFFECTIVE TRANSIENT
**----- End of picture text -----**
**Figure 13. Junction-to-Case Transient Thermal Response Curve** ©2014 Fairchild Semiconductor Corporation FDMS86263P Rev.C2 www.fairchildsemi.com **5** **==> picture [490 x 598] intentionally omitted <==** **----- Start of picture text -----**
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE A
5.10 A 5.10
3.91
PKG SEE
1.27
CL B DETAIL B
8 5 8 7 6 5
0.77
4.52
3.75
PKG CL 6.15 5.85 6.61
5.65
KEEP OUT
AREA
1.27
1 4
1 2 3 4
TOP VIEW
1.27 0.61
3.81
LAND PATTERN
OPTIONAL DRAFT RECOMMENDATION
ANGLE MAY APPEAR
SEE ON FOUR SIDES
5.00
4.80 DETAIL C OF THE PACKAGE
0.35
0.15
������
0.10 C
0.30
0.05
0.05
SIDE VIEW 0.00 ������
8X
0.08 C
0.35 C
5.20 0.15
4.80 1.10 SEATING
0.90 PLANE
DETAIL C DETAIL B
3.81
SCALE: 2:1 SCALE: 2:1
1.27 0.51
0.31 [ (8X)]
(0.34) NOTES: UNLESS OTHERWISE SPECIFIED
0.10 C A B A. PACKAGE STANDARD REFERENCE: JEDEC MO-240,
1 2 3 4 ISSUE A, VAR. AA,.
B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH.
0.76 MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.
0.51 (0.52) C. ALL DIMENSIONS ARE IN MILLIMETERS.
6.25 D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009.
5.90 E. IT IS RECOMMENDED TO HAVE NO TRACES OR
VIAS WITHIN THE KEEP OUT AREA.
(0.50) 3.48 [+0.30]
-0.10
(0.30)
(2X)
8 7 6 5
���������
0.20 [+0.10] 3.96
-0.15 [(8X)]
3.61
**----- End of picture text -----**
**==> picture [63 x 8] intentionally omitted <==** **----- Start of picture text -----**
BOTTOM VIEW
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