# Power MOSFET, N Channel, 100 V, 16.5 A, 0.056 ohm, PQFN, Surface Mount

![Product image](https://novapart.co/image/farnell:3003882/)

**URL**: https://novapart.co/products/FDMS8622/power-mosfet-n-channel-100-v-165-a-0056-ohm-pqfn
**SKU**: FDMS8622
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.3440
**Stock**: 1000+
**Lead Time**: 141 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:16.5A; Drain Source Voltage Vds:100V; On Resistance Rds(on):0.045ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V; Po

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | Lead (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | PowerTrench |
| Qualification | - |
| Power Dissipation | 31W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PQFN |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 16.5A |
| Drain Source On State Resistance | 0.056ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3003882/)

**August 2018** 

## **FDMS8622** 

## **N-Channel Shielded Gate PowerTrench[®] MOSFET 100 V, 16.5 A, 56 m**  

## **Features** 

- Shielded Gate MOSFET Technology 

- Max rDS(on) = 56 m at VGS = 10 V, ID = 4.8 A 

- Max rDS(on) = 88 m at VGS = 6 V, ID = 3.9 A 

- High performance trench technology for extremely low rDS(on) 

- High power and current handling capability in a widely used surface mount package 

- 100% UIL Tested 

## **General Description** 

This N-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench **[®]** process that incorporates Shielded Gate technology. This process has been optimized for rDS(on), switching performance and ruggedness. 

## **Applications** 

   - POE Protection Switch 

   - DC-DC Switch 

- Termination is Lead-free and RoHS Compliant 

**==> picture [383 x 108] intentionally omitted <==**

**----- Start of picture text -----**<br>
Top Bottom<br>Pin 1<br>S D<br>S<br><~ iy is<br>S<br>S<br>G S 2} i D<br>S 3} i D<br>D<br>D G 4} is D<br>D<br>D<br>Power 56<br>**----- End of picture text -----**<br>


- **MOSFET Maximum Ratings** TA = 25 °C unless otherwise noted 

**==> picture [471 x 224] intentionally omitted <==**

**----- Start of picture text -----**<br>
Symbol Parameter Ratings Units<br>VDS Drain to Source Voltage 100 V<br>VGS Gate to Source Voltage ±20 V<br>Drain Current   -Continuous                TC = 25 °C     16.5<br>ID -Continuous    TA = 25 °C   (Note 1a) 4.8 A<br>-Pulsed 30<br>EAS Single Pulse Avalanche Energy (Note 3) 12 mJ<br>PD Power DissiPower Dissippation     ation               TTAC = 25 °C  = 25 °C (Note 1a) 2.531 W<br>TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C<br>Thermal Characteristics<br>RJC Thermal Resistance, Junction to Case    (Note 1) 4<br>°C/W<br>ee RJA Thermal Resistance, Junction to Ambient  (Note 1a) oe 50 ae<br>Package Marking and Ordering Information<br>Device Marking Device Package Reel Size Tape Width Quantity<br>FDMS8622 FDMS8622 Power56 13 ’’ 12 mm 3000 units<br>eeee<br>**----- End of picture text -----**<br>


©2011 Semiconductor Components Industries, LLC. **1** FDMS8622 Rev . 2 

www.onsemi.com 

## **Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Switching Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250A, VGS= 0 V<br>100<br>V<br>BVDSS<br>TJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250A, referenced to 25 °C<br>69<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 80 V, VGS = 0 V<br>1<br>A<br>IGSS<br>Gate to Source Leakage Current<br>VGS= ±20 V, VDS = 0 V<br>±100<br>nA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS,  ID= 250A<br>2<br>3<br>4<br>V<br>VGS(th)<br>TJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= 250A, referenced to 25 °C<br>-8<br>mV/°C<br>rDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V,  ID= 4.8 A<br>45<br>56<br>m<br>VGS= 6 V,  ID= 3.9 A<br>62<br>88<br>VGS= 10 V,  ID= 4.8 A,   TJ= 125 °C<br>78<br>97<br>gFS<br>Forward Transconductance<br>VDD= 5 V,  ID= 4.8 A<br>9<br>S<br>Ciss<br>Input Capacitance<br>VDS= 50 V, VGS= 0 V,<br>f = 1 MHz<br>301<br>400<br>pF<br>Coss<br>Output Capacitance<br>70<br>95<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>3.6<br>5<br>pF<br>Rg<br>Gate Resistance<br>1.0<br><br>td(on)<br>Turn-On DelayTime<br>VDD= 50 V, ID= 4.8 A,<br>VGS= 10 V, RGEN= 6<br>5.7<br>11<br>ns<br>tr<br>Rise Time<br>1.7<br>10<br>ns<br>td(off)<br>Turn-Off DelayTime<br>10.2<br>18<br>ns<br>~~Se~~<br>~~nee~~<br>~~————~~<br>~~nnn =~~|
|---|
|tf<br>Fall Time<br>2.1<br>10<br>ns|
|**Drain-Source Diode Characteristics**<br>Qg(TOT)<br>Total Gate Charge<br>VGS = 0 V to 10 V<br>VDD= 50 V,<br>ID= 4.8 A<br>5<br>7<br>nC<br>Qg(TOT)<br>Total Gate Charge<br>VGS = 0 V to 5 V<br>2.8<br>4<br>nC<br>Qgs<br>Total Gate Charge<br>1.4<br>2.8<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>1.3<br>2.6<br>nC<br>~~—————— nn~~|
|VSD<br>Source to Drain Diode  Forward Voltage<br>VGS = 0 V, IS = 4.8 A(Note 2)<br>0.8<br>1.3<br>V<br>VGS = 0 V, IS = 1.9 A(Note 2)<br>0.8<br>1.2<br>trr<br>Reverse RecoveryTime<br>IF= 4.8 A, di/dt = 100 A/s<br>38<br>60<br>ns<br>Qrr<br>Reverse RecoveryCharge<br>30<br>48<br>nC<br>~~—————~~|
|Notes**:**|
|1. RJAis determined with the device mounted on a 1in2pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJCis guaranteed by design while RCAis determined by|
|the user's board design.|
|50 °C/W when mounted  on  a<br>1 in2pad of  2 oz  copper<br>125 °C/W when mounted on a<br>minimum pad of 2 oz copper.<br>a)<br>b)<br>)|
|**G**<br>**DF**<br>**DS**<br>**SF**<br>**SS**<br>**G**<br>**DF**<br>**DS**<br>**SF**<br>**SS**|



2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. 

- 3.Starting TJ = 25 °C; N-ch: L = 0.1 mH, IAS = 16 A, VDD = 90 V, VGS = 10 V. 

©2011 Semiconductor Components Industries, LLC. FDMS8622 Rev . 2 

www.onsemi.com 

**2** 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

**==> picture [464 x 590] intentionally omitted <==**

**----- Start of picture text -----**<br>
30 4<br>25 VV GS GS = 8 V = 10 V VGS = 7 V VGS = 5 V VGS = 6 V<br>3<br>20 VGS = 7 V<br>15 VGS =  6 V 2 V GS  = 8 V<br>10 PULSE DURATION = 80   s<br>DUTY CYCLE = 0.5% MAX<br>1<br>5 V GS  = 5 V PULSE DURATION = 80  s VGS = 10 V<br>DUTY CYCLE = 0.5% MAX<br>0 0<br>0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 5 10 15 20 25 30 35<br>VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 1.  On Region Characteristics Figure 2.  Normalized On-Resistance<br>vs Drain Current and Gate Voltage<br>2.0<br>ID = 4.8 A 250 PULSE DURATION = 80  s<br>1.8 VGS = 10 V DUTY CYCLE = 0.5% MAX<br>200<br>1.6 ID = 4.8 A<br>1.4 150<br>1.2 TJ = 125  [o] C<br>100<br>1.0<br>0.8 50<br>TJ = 25  [o] C<br>0.6<br>-75 -50 -25 0 25 50 75 100 125 150 0<br>4 6 8 10<br>TJ, JUNCTION TEMPERATURE  ( [o] C )<br>VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3.  Normalized  On  Resistance    Figure 4.   On-Resistance vs  Gate to<br>vs Junction Temperature Source Voltage<br>30 100<br>PULSE DURATION = 80   s VGS = 0 V<br>DUTY CYCLE = 0.5% MAX<br>25<br>VDS = 5 V 10 TJ = 150  [o] C<br>20<br>1<br>15 TJ = 25 [ o] C<br>TJ = 150  [o] C 0.1<br>10<br>TJ = 25  [o] C<br>0.01<br>5 TJ = -55  [o] C<br>TJ = -55  [o] C<br>0 0.001<br>2 3 4 5 6 7 8 9 0.2 0.4 0.6 0.8 1.0 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>NORMALIZED<br>, DRAIN CURRENT (A)<br>ID<br>DRAIN TO SOURCE ON-RESISTANCE<br>)<br><br>m<br>(<br>DRAIN TO<br>,<br>NORMALIZED<br>rDS(on)<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>ID<br>, REVERSE DRAIN CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 5.  Transfer Characteristics** 

**Figure 6.    Source to Drain  Diode Forward Voltage vs Source Current** 

©2011 Semiconductor Components Industries, LLC. FDMS8622 Rev . 2 

www.onsemi.com 

**3** 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

**==> picture [464 x 610] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 500<br>ID = 4.8 A<br>VDD = 25 V<br>8<br>C iss<br>VDD = 50 V 100<br>6<br>VDD = 75 V Coss<br>4<br>10<br>2<br>f = 1 MHz<br>VGS = 0 V Crss<br>0 1<br>0 2 4 6 0.1 1 10 100<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7.  Gate Charge Characteristics Figure 8.  Capacitance vs Drain<br>to Source Voltage<br>10 5<br>8 VGS = 10 V<br>6 4<br>TJ = 25 [ o] C<br>4 3<br>VGS = 6 V<br>TJ = 100 [ o] C 2<br>2<br>1<br>TJ = 125  [o] C R  JA = 50  [o] C/W<br>1 0<br>0.01 0.1 1 10 25 50 75 100 125 150<br>tAV, TIME IN AVALANCHE (ms) TA, AMBIENT TEMPERATURE  ( oC )<br>Figure 9. Unclamped Inductive   Figure 10.  Maximum Continuous Drain<br>Switching Capability Current  vs Ambient Temperature<br>100 1000<br>SINGLE PULSE<br>R  JA = 125  [o] C/W<br>10 100 TA = 25 [o] C<br>100 us<br>1 THIS AREA IS  10<br>LIMITED BY rDS(on)<br>1 ms<br>SINGLE PULSE 10 ms<br>0.1 TJ = MAX RATED 100 ms 1<br>1 s<br>R  JA = 125 [ o] C/W<br>10 s<br>T A = 25  [o] C DC<br>0.01 0.1<br>0.01 0.1 1 10 100 500 10-3 10-2 10-1 1 10 100 1000<br>VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)<br>Figure 11.  Forward Bias Safe    Figure 12.   Single  Pulse Maximum<br>Operating Area  Power  Dissipation<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>V<br>DRAIN CURRENT (A)<br>,<br>ID<br>, AVALANCHE CURRENT (A)<br>IAS<br>, DRAIN CURRENT (A)<br>ID<br>PEAK TRANSIENT POWER (W)<br>P )( PK,<br>**----- End of picture text -----**<br>


©2011 Semiconductor Components Industries, LLC. FDMS8622 Rev . 2 

www.onsemi.com 

**4** 

**==> picture [470 x 222] intentionally omitted <==**

**----- Start of picture text -----**<br>
Typical Characteristics  TJ = 25 °C unless otherwise noted<br>2<br>DUTY CYCLE-DESCENDING ORDER<br>1<br>D = 0.5<br>      0.2<br>      0.1<br>0.1       0.05<br>      0.02 PDM<br>      0.01<br>t 1<br>0.01 t 2<br>SINGLE PULSE NOTES:<br>R  JA = 125  [o] C/W DUTY FACTOR: D = tPEAK T J  = P DM  x Z JA 1 x R/t2 JA  + T A<br>0.001<br>10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (s)<br>Figure 13.  Junction-to-Ambient Transient Thermal Response Curve<br>Z JA <br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


©2011 Semiconductor Components Industries, LLC. FDMS8622 Rev . 2 

www.onsemi.com 

**5** 

## **Dimensional Outline and Pad Layout** 

**==> picture [413 x 427] intentionally omitted <==**

**----- Start of picture text -----**<br>
5.204.80 A 5.103.91<br>8 PKGCL 5 B SEEDETAIL B 8 7 6 0.645 1.27<br>0.77<br>4.52<br>PKG CL 6.255.90 5.855.65 3.75 6.61<br>KEEP OUT<br>AREA<br>1.27<br>1 4<br>1 2 3 4<br>TOP VIEW<br>1.27 0.61<br>3.81<br>LAN D PATTERN<br>OPTIONAL DRAFT REC OM MEND ATION<br>ANGLE MAY APPEAR<br>5.004.80 SEEDETAIL C OF THE PACKAGEON FOUR SIDES<br>0.35<br>0.15<br>0.10 C<br>SIDE VIEW 0.050.00 0.300.06<br>8X<br>0.08 C<br>0.35 C<br>0.15<br>1.10 SEATING<br>0.90 PLANE<br>3.81 DETAIL C DETAIL B<br>SCALE: 2:1 SCALE: 2:1<br>1.27 0.51<br>(0.34) 0 .31 [ (8X)] N OTES: UNLESS OTHERWISE SPECIFIED<br>0.10 C A B A.  PACKAGE STAND ARD REFERENCE:  JEDEC M O-240,<br>1 2 3 4   ISSUE A, VAR. AA, DATED OCTOBER  2002.<br>B.  DIMENSIONS DO N OT INCLUDE BURRS OR MOLD FLASH.<br>0.76   MOLD FLASH  OR BURRS DOES NOT EXCEED 0.10MM.<br>0.44 (0.52) C . ALL DIMEN SIONS ARE IN MILLIMETERS.<br>D . DIMENSIONING AND TOLERANCING PER   ASME Y14.5M-1994.<br>E.  IT IS RECOMMENDED TO HAVE NO TRACES OR<br>VIAS WITHIN TH E KEEP  OUT AREA.<br>(0.50)(0.30) 3.783.38 4.223.99 F. DRAWING FILE NAME: PQFN08AREV8<br>(3.40) (2X )<br>8 7 6 5<br>0.64<br>3 .96 0.34<br>3.61<br>BOTTOM VIEW<br>**----- End of picture text -----**<br>


_Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products._ 

_Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: https://www.fairchildsemi.com/evaluate/package-specifications/packageDetails.html?id=PN_PQOAM-008_ 

**==> picture [55 x 6] intentionally omitted <==**

**----- Start of picture text -----**<br>
www.onsemi.com<br>**----- End of picture text -----**<br>


©2011 Semiconductor Components Industries, LLC. FDMS8622 Rev . 2 

**6** 

## **TRADEMARKS** 

The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 

AccuPower™ F-PFS™ ®* Awinda[®] FRFET[®] ® AX-CAP[®] * Global Power Resource[SM] PowerTrench[®] [Bceveni BitSiC™ GreenBridge™ PowerXS™ TinyBoost[®] Build it Now™ Green FPS™ Programmable Active Droop™ TinyBuck[®] CorePLUS™ Green FPS™ e-Series™ QFET[®] TinyCalc™ CorePOWER™ G _max_ ™ QS™ TinyLogic[®] _CROSSVOLT_ ™ GTO™ Quiet Series™ TINYOPTO™ CTL™ IntelliMAX™ RapidConfigure™ TinyPower™ Current Transfer Logic™ ISOPLANAR™ ™ TinyPWM™ DEUXPEED[®] Marking Small Speakers Sound Louder 2) TinyWire™TranSiC™ Dual Cool™ and Better™ Saving our world, 1mW/W/kW at a time™ TriFault Detect™ EcoSPARK[®] MegaBuck™ SignalWise™ TRUECURRENT[®] * EfficentMax™ MICROCOUPLER™ SmartMax™ ESBC™ MicroFET™ SMART START™ SerDes™ ® MicroPak™ Solutions for Your Success™ MicroPak2™ SPM[®] Fairchild[®] MillerDrive™ STEALTH™ UHC[®] Fairchild Semiconductor[®] MotionMax™ SuperFET[®] Ultra FRFET™ FACT Quiet Series™ MotionGrid[®] SuperSOT™-3 UniFET™ FACT[®] MTi[®] SuperSOT™-6 VCX™ FAST[®] MTx[®] SuperSOT™-8 VisualMax™ FastvCore™ MVN[®] SupreMOS[®] VoltagePlus™ FETBench™ mWSaver[®] SyncFET™ XS™ FPS™ OptoHiT™ Sync-Lock™ Xsens™ 仙童 ™ *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. 

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## **PRODUCT STATUS DEFINITIONS** 

**Definition of Terms** 

|**Definition of Terms**|||
|---|---|---|
|**Datasheet Identification**|**Product Status**|**Definition**|
|Advance Information|Formative / In Design|Datasheet contains the design specifications for product development. Specifications<br>may change in any manner without notice.|
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Rev. I71 

FDMS8622 Rev . 2 

www.onsemi.com 

**7** 



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