# Power MOSFET, N Channel, 25 V, 28 A, 0.0059 ohm, PQFN, Surface Mount ![Product image](https://novapart.co/image/farnell:3050461RL/) **URL**: https://novapart.co/products/FDMS7580/power-mosfet-n-channel-25-v-28-a-00059-ohm-pqfn **SKU**: FDMS7580 **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.6660 **Stock**: 10+ ## Specifications | Parameter | Value | |---|---| | No. Of Pins | 8Pins | | Channel Type | N Channel | | Product Range | Power Trench | | Power Dissipation | 27W | | Transistor Mounting | Surface Mount | | Transistor Polarity | N Channel | | Power Dissipation Pd | 27W | | Rds(On) Test Voltage | 10V | | On Resistance Rds(On) | 0.0059ohm | | Transistor Case Style | PQFN | | Drain Source Voltage Vds | 25V | | Operating Temperature Max | 150°C | | Continuous Drain Current Id | 28A | | Drain Source On State Resistance | 0.0059ohm | | Gate Source Threshold Voltage Max | 1.6V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:3050461RL/) ## **Is Now Part of** ## **To learn more about ON Semiconductor, please visit our website at www.onsemi.com** Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. **==> picture [57 x 8] intentionally omitted <==** **----- Start of picture text -----**
October 2014
**----- End of picture text -----**
## **FDMS7580** ## **N-Channel Power Trench[®] MOSFET 25 V, 7.5 m** Ω ## **Features** Max rDS(on) = 7.5 mΩ at VGS = 10 V, ID = 15 A Max rDS(on) = 11.1 mΩ at VGS = 4.5 V, ID = 12 A Advanced Package and Silicon combination for low rDS(on) and high efficiency Next generation enhanced body diode technology, engineered for soft recovery MSL1 robust package design 100% UIL tested ## **General Description** This N-Channel MOSFET has been designed specifically to improve the overall efficiency and to minimize switch node ringing of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low rDS(on), fast switching speed and body diode reverse recovery performance. ## **Applications** Control MOSFET for Synchronous Buck Converters Notebook |RoHS Compliant||Server
Telecomm
High Efficiency DC-DC Switch Mode Power Supplies|Server
Telecomm
High Efficiency DC-DC Switch Mode Power Supplies|Server
Telecomm
High Efficiency DC-DC Switch Mode Power Supplies|Server
Telecomm
High Efficiency DC-DC Switch Mode Power Supplies|Server
Telecomm
High Efficiency DC-DC Switch Mode Power Supplies|High Efficiency DC-DC Switch Mode Power Supplies|High Efficiency DC-DC Switch Mode Power Supplies|| |---|---|---|---|---|---|---|---|---|---| |**D**
**D D D**
**G**
**S**
**S**
**S**
Pin 1
**Bottom**
**Top**
es||||**D**
**D**
**D**
**D**|**5**
**6**
**7**
**8**||**3**
**2**
**1**
**4**|**G**
**S**
**S**
**S**|| |**Power 56**|||||||||| |**MOSFET Maximum Ratings **TA= 25 °C unless otherwise noted|||||||||| |**Symbol**
**Parameter**||||||**Ratings**||**Units**|| |VDS
Drain to Source Voltage||||||25||V|| |VGS
Gate to Source Voltage|e|e|e|e(Note 4)||±20||V|| |Drain Current -Continuous(Package limited)T|TC|= 25 °C||= 25 °C||28|||| |ID
-Continuous(Silicon limited)T
-Continuous T|TC
-Continuous TA|= 25 °C
A= 25 °C||= 25 °C(Note 1a)||49
15||A|| |-Pulsed||||||60|||| |EAS
Single Pulse Avalanche Energy||||(Note 3)||32||mJ|| |PD
Power Dissipation T
Power Dissipation T|ation TC= 25 °C
ation TA= 25 °C|= 25 °C
= 25 °C||= 25 °C(Note 1a)||27
2.5||W|| |TJ, TSTG
Operatingand Storage Junction Temperature Range||||||-55 to +150||°C|| |**Thermal Characteristics**|||||||||| |RθJC
Thermal Resistance, Junction to Case
4.6
°C/W
RθJA
Thermal Resistance, Junction to Ambient(Note 1a)
50
~~sd~~|||||||||| |**Package Marking and Ordering Information**|||||||||| |**Device Marking**
**Device**
**Package**
**Reel Size**
**Tape Width**
**Quantity**
FDMS7580
FDMS7580
Power 56
13 ’’
12 mm
3000 units
~~——se~~|||||||||| ©2009 Fairchild Semiconductor Corporation **1** FDMS7580 Rev.C1 www.fairchildsemi.com ## **Electrical Characteristics** TJ = 25 °C unless otherwise noted |**Symbol**
**Parameter**
**Test Conditions**
**Min**
**Typ**
**Max**
**Units**
**Off Characteristics**
BVDSS
Drain to Source Breakdown Voltage
ID= 250µA, VGS= 0 V
25
V
~~∆BVDSS~~
∆TJ
Breakdown Voltage Temperature
Coefficient
ID= 250µA, referenced to 25 °C
18
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= 20 V, VGS = 0 V
1
µA
IGSS
Gate to Source Leakage Current
VGS= 20 V, VDS = 0 V
100
nA
**On Characteristics**
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= 250µA
1.0
1.6
3.0
V
~~∆VGS(th~~)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID= 250µA, referenced to 25 °C
-6
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= 10 V, ID= 15 A
5.9
7.5
mΩ
VGS= 4.5 V, ID= 12 A
8.3
11.1
VGS= 10 V, ID= 15 A, TJ= 125 °C
8.3
10.6
gFS
Forward Transconductance
VDD= 5 V, ID= 15 A
63
S
**Dynamic Characteristics**
Ciss
Input Capacitance
VDS= 13 V, VGS= 0 V,
f = 1 MHz
894
1190
pF
Coss
Output Capacitance
277
370
pF
~~aDG~~
~~TO~~
~~ee~~
~~ee~~
~~ee~~
~~sD~~|**Symbol**
**Parameter**
**Test Conditions**
**Min**
**Typ**
**Max**
**Units**
**Off Characteristics**
BVDSS
Drain to Source Breakdown Voltage
ID= 250µA, VGS= 0 V
25
V
~~∆BVDSS~~
∆TJ
Breakdown Voltage Temperature
Coefficient
ID= 250µA, referenced to 25 °C
18
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= 20 V, VGS = 0 V
1
µA
IGSS
Gate to Source Leakage Current
VGS= 20 V, VDS = 0 V
100
nA
**On Characteristics**
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= 250µA
1.0
1.6
3.0
V
~~∆VGS(th~~)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID= 250µA, referenced to 25 °C
-6
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= 10 V, ID= 15 A
5.9
7.5
mΩ
VGS= 4.5 V, ID= 12 A
8.3
11.1
VGS= 10 V, ID= 15 A, TJ= 125 °C
8.3
10.6
gFS
Forward Transconductance
VDD= 5 V, ID= 15 A
63
S
**Dynamic Characteristics**
Ciss
Input Capacitance
VDS= 13 V, VGS= 0 V,
f = 1 MHz
894
1190
pF
Coss
Output Capacitance
277
370
pF
~~aDG~~
~~TO~~
~~ee~~
~~ee~~
~~ee~~
~~sD~~|**Symbol**
**Parameter**
**Test Conditions**
**Min**
**Typ**
**Max**
**Units**
**Off Characteristics**
BVDSS
Drain to Source Breakdown Voltage
ID= 250µA, VGS= 0 V
25
V
~~∆BVDSS~~
∆TJ
Breakdown Voltage Temperature
Coefficient
ID= 250µA, referenced to 25 °C
18
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= 20 V, VGS = 0 V
1
µA
IGSS
Gate to Source Leakage Current
VGS= 20 V, VDS = 0 V
100
nA
**On Characteristics**
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= 250µA
1.0
1.6
3.0
V
~~∆VGS(th~~)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID= 250µA, referenced to 25 °C
-6
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= 10 V, ID= 15 A
5.9
7.5
mΩ
VGS= 4.5 V, ID= 12 A
8.3
11.1
VGS= 10 V, ID= 15 A, TJ= 125 °C
8.3
10.6
gFS
Forward Transconductance
VDD= 5 V, ID= 15 A
63
S
**Dynamic Characteristics**
Ciss
Input Capacitance
VDS= 13 V, VGS= 0 V,
f = 1 MHz
894
1190
pF
Coss
Output Capacitance
277
370
pF
~~aDG~~
~~TO~~
~~ee~~
~~ee~~
~~ee~~
~~sD~~|**Symbol**
**Parameter**
**Test Conditions**
**Min**
**Typ**
**Max**
**Units**
**Off Characteristics**
BVDSS
Drain to Source Breakdown Voltage
ID= 250µA, VGS= 0 V
25
V
~~∆BVDSS~~
∆TJ
Breakdown Voltage Temperature
Coefficient
ID= 250µA, referenced to 25 °C
18
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= 20 V, VGS = 0 V
1
µA
IGSS
Gate to Source Leakage Current
VGS= 20 V, VDS = 0 V
100
nA
**On Characteristics**
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= 250µA
1.0
1.6
3.0
V
~~∆VGS(th~~)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID= 250µA, referenced to 25 °C
-6
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= 10 V, ID= 15 A
5.9
7.5
mΩ
VGS= 4.5 V, ID= 12 A
8.3
11.1
VGS= 10 V, ID= 15 A, TJ= 125 °C
8.3
10.6
gFS
Forward Transconductance
VDD= 5 V, ID= 15 A
63
S
**Dynamic Characteristics**
Ciss
Input Capacitance
VDS= 13 V, VGS= 0 V,
f = 1 MHz
894
1190
pF
Coss
Output Capacitance
277
370
pF
~~aDG~~
~~TO~~
~~ee~~
~~ee~~
~~ee~~
~~sD~~| |---|---|---|---| |Crss
Reverse Transfer Capacitance
53
80||pF|| |Rg
Gate Resistance
1.1
2.2||Ω|| |**Switching Characteristics**|||| |td(on)
Turn-On DelayTime
VDD= 13 V, ID= 15 A,
VGS= 10 V, RGEN= 6Ω
7.3
15
tr
Rise Time
2.4
10
td(off)
Turn-Off DelayTime
17
31
tf
Fall Time
2.1
10
Qg(TOT)
Total Gate Charge
VGS= 0 V to 10 V
VDD= 13 V
ID= 15 A
14
20
Total Gate Charge
VGS= 0 V to 4.5 V
6.5
10
Qgs
Total Gate Charge
2.9
Qgd
Gate to Drain “Miller” Charge
1.6
~~ee~~
~~ee ee ee~~
~~ee~~
~~ee~~
~~ee ee ~~
~~ee~~
~~ee~~
~~ee ee ~~
~~ee~~
~~ee~~
~~ee ee ~~
~~ee~~
~~ee ee ee ~~
~~ee~~
~~ee ee ee ~~
~~ee~~
~~**ee** ~~~~**ee** e~~~~**e** ~~
~~ee~~
~~e~~|




|ns
ns
ns
ns
nC
nC
nC
nC
~~ee~~
~~ee~~
~~ee~~
~~ee~~
~~ee~~
~~ee~~
~~**ee**~~|| |**Drain-Source Diode Characteristics**|||| |VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, IS = 2 A(Note 2)
0.73
1.1
VGS = 0 V, IS = 15 A(Note 2)
0.85
1.2||V|| |trr
Reverse RecoveryTime
IF= 15 A, di/dt = 100 A/µs
19
34
Qrr
Reverse RecoveryCharge
5.1
10||ns
nC|| |trr
Reverse RecoveryTime
IF= 15 A, di/dt = 300 A/µs
15
27
Qrr
Reverse RecoveryCharge
8.9
18||ns|| NOTES: 1. RθJA is determined with the device mounted on a 1 in[2] pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 50 °C/W when mounted on b.125 °C/W when mounted on a 1 in[2 ] pad of 2 oz copper a minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 30 0 µs, Duty cycle < 2.0 %. 3. EAS of 32 mJ is based on starting TJ = 25 °C, L = 1 mH, IAS = 8 A, VDD = 23 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 12 A. 4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied. www.fairchildsemi.com **2** FDMS7580 Rev.C1 ## **Typical Characteristics** TJ = 25 °C unless otherwise noted **==> picture [464 x 557] intentionally omitted <==** **----- Start of picture text -----**
60 10
50 VGS = 4.5 V VGS = 4.0 V VGS = 3.0 V PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX µ s
PULSE DURATION = 80 µ s 8
40 DUTY CYCLE = 0.5% MAX VGS = 3.5 V
VGS = 10 V 6
30
VGS = 3.5 V 4
20
VGS = 4.0 V
2
10
0 VGS = 3.0 V 0 VGS = 4.5 V VGS = 10 V
0 1 2 3 4 5 0 10 20 30 40 50 60
VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics Figure 2. Normalized On-Resistance Normalized On-Resistance
vs Drain Current and Gate Voltage
1.6 40
1.5 IVDGS = 15 A = 10 V ID = 15 AD = 15 A= 15 A PULSE DURATION = 80 DUTY CYCLE = 0.5% MAXDUTY CYCLE = 0.5% MAX µ s
1.4
30
1.3
1.2
20
1.1
1.0 TJ = 125 J = 125 = 125 [[o]] C
10
0.9
0.8
TJ = 25 J = 25 = 25 [[o]] C
0.7 0
-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)GS, GATE TO SOURCE VOLTAGE (V), GATE TO SOURCE VOLTAGE (V)GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On- Resistance Figure 4. On-Resistance vs Gate to On-Resistance vs Gate to
vs Junction Temperature Source Voltage
60 100
PULSE DURATION = 80 µ s VGS = 0 VGS = 0 V= 0 V
DUTY CYCLE = 0.5% MAX
50
10
VDS = 5 V
40
TJ = 150 [o] C 1 TJ = 150 J = 150 = 150 [[o]] C
30
TJ = 25 [o] C 0.1 TJ = 25J = 25 = 25 [[ o]] C
20
10 TJ = -55 [o] C 0.01 TJ = -55 J = -55 = -55 [[o]] C
0 0.001
1 2 3 4 5 0.0 0.2 0.4 0.6 0.8 1.0 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)SD, BODY DIODE FORWARD VOLTAGE (V), BODY DIODE FORWARD VOLTAGE (V)
NORMALIZED
DRAIN CURRENT (A)
,
ID
DRAIN TO SOURCE ON-RESISTANCE
)
Ω
m
(
DRAIN TO
NORMALIZED rDS(on),DS(on),
SOURCE ON-RESISTANCE
DRAIN TO SOURCE ON-RESISTANCE
, DRAIN CURRENT (A)
ID
, REVERSE DRAIN CURRENT (A)
ISS
**----- End of picture text -----**
**Figure 2. Normalized On-Resistance Normalized On-Resistance vs Drain Current and Gate Voltage** **==> picture [218 x 374] intentionally omitted <==** **----- Start of picture text -----**
40
ID = 15 AD = 15 A= 15 A µ s
PULSE DURATION = 80 DUTY CYCLE = 0.5% MAXDUTY CYCLE = 0.5% MAX
30
20
TJ = 125 J = 125 = 125 [[o]] C
10
TJ = 25 J = 25 = 25 [[o]] C
0
2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)GS, GATE TO SOURCE VOLTAGE (V), GATE TO SOURCE VOLTAGE (V)GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to On-Resistance vs Gate to
Source Voltage
100
VGS = 0 VGS = 0 V= 0 V
10
1 TJ = 150 J = 150 = 150 [[o]] C
TJ = 25J = 25 = 25 [[ o]] C
0.1
0.01 TJ = -55 J = -55 = -55 [[o]] C
0.001
0.0 0.2 0.4 0.6 0.8 1.0 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)SD, BODY DIODE FORWARD VOLTAGE (V), BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
)
Ω
m
(
DRAIN TO
rDS(on),DS(on),
SOURCE ON-RESISTANCE
, REVERSE DRAIN CURRENT (A)
ISS
**----- End of picture text -----**
**Figure 5. Transfer Characteristics** www.fairchildsemi.com **3** FDMS7580 Rev.C1 ## **Typical Characteristics** TJ = 25 °C unless otherwise noted **==> picture [472 x 587] intentionally omitted <==** **----- Start of picture text -----**
10 2000
ID = 15 A 1000
8
Ciss
VDD = 13 V
6
VDD = 10 V VDD = 16 V Coss
4
100
2
f = 1 MHz Crss
VGS = 0 V
0 20
0 2 4 6 8 10 12 14 0.1 1 10 30
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain
to Source Voltage
20 50
VGS = 10 V
40
10
TJ = 25 [ o] C
VGS = 4.5 V
30
TJ = 100 [o] C
20
TJ = 125 [o] C Limited by Package
10
R θ JC = 4.6 oC/W
1 0
0.01 0.1 1 10 30 25 50 75 100 125 150
tAV, TIME IN AVALANCHE (ms) Tc, CASE TEMPERATURE (oC)
Figure 9. Unclamped Inductive Figure 10. Maximum Continuous Drain
Switching Capability Current vs Case Temperature
100 1000
VGS = 10 V SINGLE PULSE
10 100 µ s R θ JA = 125 [o] C/W
100 TA = 25 [o] C
1 ms
10 ms
1
THIS AREA IS
100 ms
LIMITED BY rDS(on) 10
1 s
SINGLE PULSE
0.1 TJ = MAX RATED 10 s
R θ JA = 125 [o] C/W DC
TA = 25 [o] C 1
0.01 0.5
0.01 0.1 1 10 100 10-4 10-3 10-2 10-1 1 10 100 1000
VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum
Operating Area Power Dissipation
CAPACITANCE (pF)
, GATE TO SOURCE VOLTAGE (V)
GS
V
DRAIN CURRENT (A)
,
ID
, AVALANCHE CURRENT (A)
IAS
, DRAIN CURRENT (A)
ID PEAK TRANSIENT POWER (W)
P)(PK,
**----- End of picture text -----**
www.fairchildsemi.com FDMS7580 Rev.C1 **4** **==> picture [469 x 208] intentionally omitted <==** **----- Start of picture text -----**
Typical Characteristics TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.1
0.02 PDM
0.01
t1
0.01 t2
NOTES:
SINGLE PULSE DUTY FACTOR: D = t1/t2
R θ JA = 125 [o] C/W PEAK TJ = PDM x Z θJA x R θJA + TA
0.001
10-4 10-3 10-2 10-1 1 10 100 1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Transient Thermal Response Curve
Z JA θ
IMPEDANCE,
NORMALIZED THERMAL
**----- End of picture text -----**
www.fairchildsemi.com FDMS7580 Rev.C1 **5** **==> picture [490 x 598] intentionally omitted <==** **----- Start of picture text -----**
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE A
5.10 A 5.10
3.91
PKG SEE
1.27
CL B DETAIL B
8 5 8 7 6 5
0.77
4.52
3.75
PKG CL 6.15 5.85 6.61
5.65
KEEP OUT
AREA
1.27
1 4
1 2 3 4
TOP VIEW
1.27 0.61
3.81
LAND PATTERN
OPTIONAL DRAFT RECOMMENDATION
ANGLE MAY APPEAR
SEE ON FOUR SIDES
5.00
4.80 DETAIL C OF THE PACKAGE
0.35
0.15
������
0.10 C
0.30
0.05
0.05
SIDE VIEW 0.00 ������
8X
0.08 C
0.35 C
5.20 0.15
4.80 1.10 SEATING
0.90 PLANE
DETAIL C DETAIL B
3.81
SCALE: 2:1 SCALE: 2:1
1.27 0.51
0.31 [ (8X)]
(0.34) NOTES: UNLESS OTHERWISE SPECIFIED
0.10 C A B A. PACKAGE STANDARD REFERENCE: JEDEC MO-240,
1 2 3 4 ISSUE A, VAR. AA,.
B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH.
0.76 MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.
0.51 (0.52) C. ALL DIMENSIONS ARE IN MILLIMETERS.
6.25 D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009.
5.90 E. IT IS RECOMMENDED TO HAVE NO TRACES OR
VIAS WITHIN THE KEEP OUT AREA.
(0.50) 3.48 [+0.30]
-0.10
(0.30)
(2X)
8 7 6 5
���������
0.20 [+0.10] 3.96
-0.15 [(8X)]
3.61
**----- End of picture text -----**
**==> picture [63 x 8] intentionally omitted <==** **----- Start of picture text -----**
BOTTOM VIEW
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