# Power MOSFET, N Channel, 100 V, 20 A, 0.0194 ohm, Power 33, Surface Mount

![Product image](https://novapart.co/image/farnell:2083265/)

**URL**: https://novapart.co/products/FDMC86102/power-mosfet-n-channel-100-v-20-a-00194-ohm-33
**SKU**: FDMC86102
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.9130
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:20A; Drain Source Voltage Vds:100V; On Resistance Rds(on):0.0194ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3.1V;

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 41W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | Power 33 |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 20A |
| Drain Source On State Resistance | 0.0194ohm |
| Gate Source Threshold Voltage Max | 3.1V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2083265/)

## **Is Now Part of** 

## **To learn more about ON Semiconductor, please visit our website at www.onsemi.com** 

Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. 

ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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## **FDMC86102** 

## **N-Channel Shielded Gate PowerTrench[®] MOSFET 100 V, 20 A, 24 m** Ω 

## **Features** 

Shielded Gate MOSFET Technology Max rDS(on) = 24 mΩ at VGS = 10 V, ID = 7 A Max rDS(on) = 38 mΩ at VGS = 6 V, ID = 5 A Low Profile - 1 mm max in Power 33 100% UIL Tested RoHS Compliant 

## **General Description** 

This N-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench **[®]** process that incorporates Shielded Gate technology. This process has been optimized for the on-state resistance and yet maintain superior switching performance. 

## **Application** 

DC - DC Conversion 

**==> picture [199 x 117] intentionally omitted <==**

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Top Bottom<br>Pin 1<br>S<br>-<br>S<br>S<br>G<br>SP |<br>D<br>D<br>D<br>D<br>Power 33<br>**----- End of picture text -----**<br>


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S D<br>1} [8<br>S D<br>2} 7<br>S 3} is D<br>G D<br>**----- End of picture text -----**<br>


**MOSFET Maximum Ratings** TA = 25 °C unless otherwise noted 

|**Symbol**||**Parameter**||||**Ratings**|||**Units**|
|---|---|---|---|---|---|---|---|---|---|
|VDS|Drain to Source Voltage|||||100|||V|
|VGS|Gate to Source Voltage|||||±20|||V|
||Drain Current   -Continuous                                    T|Drain Current   -Continuous                                    TC = 25 °C||= 25 °C||20||||
|ID|-Continuous                                       T|-Continuous                                       TA= 25 °C||= 25 °C(Note 1a)||7|||A|
||-Pulsed|-Pulsed|-Pulsed|-Pulsed(Note 4)||60||||
|EAS|Single Pulse Avalanche Energy|||(Note 3)||72|||mJ|
|PD|Power Dissipation                                                   T<br>Power Dissipation                                                        T|ation                                                   TC= 25 °C<br>ation                                                        TA= 25 °C||= 25 °C(Note 1a)||41<br>2.3|||W|
|TJ, TSTG|Operatingand Storage Junction Temperature Range|||||-55 to +150|||°C|
|**Thermal Characteristics**||||||||||
|RθJC|Thermal Resistance, Junction to Case|||||3|||°C/W|
|RθJA|Thermal Resistance, Junction to Ambient||Thermal Resistance, Junction to Ambient|Thermal Resistance, Junction to Ambient(Note 1a)||53||||
|**Package Marking and Ordering Information**||||||||||
|**Device Marking**<br>**Device**||**Package**||**Reel Size**||**Tape Width**||**Quantity**||
|FDMC86102<br>FDMC86102||Power 33||13’’||12 mm||3000 units||



## **Thermal Characteristics** 

## **Package Marking and Ordering Information** 

**1** 

©2012 Fairchild Semiconductor Corporation FDMC86102 Rev.C3 

www.fairchildsemi.com 

## **Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>**Off Characteristics**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250μA, VGS= 0 V<br>100<br>V<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250μA, referenced to 25 °C<br>69<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 80 V, VGS = 0 V<br>1<br>μA<br>IGSS<br>Gate to Source Leakage Current<br>VGS= ±20 V, VDS = 0 V<br>±100<br>nA<br>**On Characteristics**<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS,  ID= 250μA<br>2.0<br>3.1<br>4.0<br>V<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= 250μA, referenced to 25 °C<br>-9<br>mV/°C<br>rDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V,  ID= 7 A<br>19.4<br>24<br>mΩ<br>VGS= 6 V,  ID= 5 A<br>26.8<br>38<br>VGS= 10 V,  ID= 7 A, TJ= 125 °C<br>32.8<br>41<br>gFS<br>Forward Transconductance<br>VDD= 10 V,  ID= 7 A<br>19<br>S<br>**Dynamic Characteristics**<br>Ciss<br>Input Capacitance<br>VDS= 50 V, VGS= 0 V,<br>f = 1 MHz<br>725<br>965<br>pF<br>Coss<br>Output Capacitance<br>175<br>235<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>15<br>25<br>pF<br>Rg<br>Gate Resistance<br>0.5<br>Ω<br>**Switching Characteristics**<br>td(on)<br>Turn-On DelayTime<br>VDD= 50 V, ID= 7 A,<br>VGS= 10 V, RGEN= 6Ω<br>8<br>17<br>ns<br>tr<br>Rise Time<br>4<br>10<br>ns<br>td(off)<br>Turn-Off DelayTime<br>14<br>25<br>ns<br>tf<br>Fall Time<br>4<br>10<br>ns<br>Qg(TOT)<br>Total Gate Charge<br>VGS= 0 V to 10 V<br>VDD= 50 V<br>ID= 7 A<br>13<br>18<br>nC<br>Total Gate Charge<br>VGS= 0 V to 5 V<br>8<br>11<br>nC<br>Qgs<br>Total Gate Charge<br>3.7<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>3.6<br>nC<br>~~Te~~<br>~~—————~~<br>~~eee~~<br>~~————~~|**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>**Off Characteristics**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250μA, VGS= 0 V<br>100<br>V<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250μA, referenced to 25 °C<br>69<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 80 V, VGS = 0 V<br>1<br>μA<br>IGSS<br>Gate to Source Leakage Current<br>VGS= ±20 V, VDS = 0 V<br>±100<br>nA<br>**On Characteristics**<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS,  ID= 250μA<br>2.0<br>3.1<br>4.0<br>V<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= 250μA, referenced to 25 °C<br>-9<br>mV/°C<br>rDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V,  ID= 7 A<br>19.4<br>24<br>mΩ<br>VGS= 6 V,  ID= 5 A<br>26.8<br>38<br>VGS= 10 V,  ID= 7 A, TJ= 125 °C<br>32.8<br>41<br>gFS<br>Forward Transconductance<br>VDD= 10 V,  ID= 7 A<br>19<br>S<br>**Dynamic Characteristics**<br>Ciss<br>Input Capacitance<br>VDS= 50 V, VGS= 0 V,<br>f = 1 MHz<br>725<br>965<br>pF<br>Coss<br>Output Capacitance<br>175<br>235<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>15<br>25<br>pF<br>Rg<br>Gate Resistance<br>0.5<br>Ω<br>**Switching Characteristics**<br>td(on)<br>Turn-On DelayTime<br>VDD= 50 V, ID= 7 A,<br>VGS= 10 V, RGEN= 6Ω<br>8<br>17<br>ns<br>tr<br>Rise Time<br>4<br>10<br>ns<br>td(off)<br>Turn-Off DelayTime<br>14<br>25<br>ns<br>tf<br>Fall Time<br>4<br>10<br>ns<br>Qg(TOT)<br>Total Gate Charge<br>VGS= 0 V to 10 V<br>VDD= 50 V<br>ID= 7 A<br>13<br>18<br>nC<br>Total Gate Charge<br>VGS= 0 V to 5 V<br>8<br>11<br>nC<br>Qgs<br>Total Gate Charge<br>3.7<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>3.6<br>nC<br>~~Te~~<br>~~—————~~<br>~~eee~~<br>~~————~~|
|---|---|
|**Drain-Source Diode Characteristics**||
|VSD<br>Source to Drain Diode  Forward Voltage<br>VGS = 0 V, IS = 7 A(Note 2)<br>0.81<br>1.3<br>V<br>VGS = 0 V, IS = 2 A(Note 2)<br>0.75<br>1.2<br>trr<br>Reverse RecoveryTime<br>IF= 7 A, di/dt = 100 A/μs<br>44<br>70<br>ns<br>Qrr<br>Reverse RecoveryCharge<br>40<br>65<br>nC<br>~~——————~~||
|NOTES:||
|1. RθJAis determined with the device mounted on a 1in2pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJCis guaranteed by design while RθCAis determined by||
|the user's board design.||
|53 °C/W when mounted on a<br>125 °C/W when mounted on<br>a.<br>b.||
|1 in2pad of  2 oz  copper<br>a minimum pad of 2 oz copper||
|**G**<br>**DF**<br>**DS**<br>**SF**<br>**SS**||
|**G**<br>**DF**<br>**DS**<br>**SF**<br>**SS**||



   2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %. 

   3. Starting TJ = 25[o] C; N-ch: L = 1 mH, IAS = 12 A, VDD = 90 V, VGS = 10 V. 

   4. Pulse Id refers to Figure.11 Forward Bias Safe Operation Area. 

- ©2012 Fairchild Semiconductor Corporation FDMC86102 Rev.C3 

www.fairchildsemi.com 

**2** 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

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60 5<br>PULSE DURATION = 80  μ s VGS = 4.5 V<br>DUTY CYCLE = 0.5% MAX<br>50<br>VGS = 10 V 4<br>VGS = 5 V<br>40 VGS = 6 V<br>3 VGS = 5.5 V<br>30<br>VGS = 5.5 V VGS = 6 V<br>2<br>20 VGS = 5 V VGS = 10 V<br>1<br>10<br>VGS = 4.5 V PULSE DURATION = 80  μ s<br>DUTY CYCLE = 0.5% MAX<br>0 0<br>0 1 2 3 4 5 0 10 20 30 40 50 60<br>VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 1.  On-Region Characteristics Figure 2.  Normalized On-Resistance<br>vs Drain Current and Gate Voltage<br>2.0 80<br>PULSE DURATION = 80  μ s<br>1.8 ID = 7 A 70 ID = 7 A DUTY CYCLE = 0.5% MAX<br>VGS = 10 V<br>1.6 60<br>1.4 50<br>TJ = 125  [o] C<br>1.2 40<br>1.0 30<br>0.8 20<br>TJ = 25  [o] C<br>0.6 10<br>-75 -50 -25 0 25 50 75 100 125 150 4 5 6 7 8 9 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3.  Normalized  On- Resistance                                         Figure 4.   On-Resistance vs  Gate to<br>vs Junction Temperature Source Voltage<br>60 60<br>PULSE DURATION = 80  μ s VGS = 0 V<br>DUTY CYCLE = 0.5% MAX<br>50 10<br>VDS = 5 V<br>40 T J  = 150  [o] C<br>1<br>30<br>0.1 TJ = 25 [ o] C<br>TJ = 150  [o] C<br>20<br>TJ = 25  [o] C<br>10 0.01 TJ = -55  [o] C<br>TJ = -55  [o] C<br>0 0.001<br>2 3 4 5 6 7 8 0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5.  Transfer Characteristics Figure 6.    Source to Drain  Diode<br>NORMALIZED<br>DRAIN CURRENT (A)<br>,<br>ID<br>DRAIN TO SOURCE ON-RESISTANCE<br>)<br>Ω<br>m<br>(<br>DRAIN TO<br>NORMALIZED rDS(on),<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>ID<br>, REVERSE DRAIN CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


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Figure 6.    Source to Drain  Diode<br>Forward Voltage vs Source Current<br>**----- End of picture text -----**<br>


www.fairchildsemi.com 

©2012 Fairchild Semiconductor Corporation FDMC86102 Rev.C3 

**3** 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

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**----- Start of picture text -----**<br>
10 1000<br>ID = 7 A VDD = 50 V Ciss<br>8<br>6 VDD = 25 V VDD = 75 V C oss<br>100<br>4<br>2<br>f = 1 MHz<br>VGS = 0 V Crss<br>0 10<br>0 2 4 6 8 10 12 14 0.1 1 10 100<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7.  Gate Charge Characteristics Figure 8.  Capacitance   vs  Drain<br>to Source Voltage<br>10 30<br>9<br>8<br>7 25<br>6<br>5<br>4 TJ = 25 [ o] C 20 Limited by Package VGS = 10 V<br>15<br>3<br>TJ = 100  [o] C VGS = 6 V<br>10<br>2<br>TJ = 125  [o] C 5<br>R θ JC = 3 oC/W<br>1 0<br>0.01 0.1 1 10 30 25 50 75 100 125 150<br>tAV, TIME IN AVALANCHE (ms) Tc, CASE TEMPERATURE (oC)<br>Figure 9. Unclamped Inductive                                  Figure 10.  Maximum Continuous Drain<br>Switching Capability Current vs Case Temperature<br>200 10000<br>100<br>10  μ s<br>10 100  μ s 1000<br>THIS AREA IS<br>1 LIMITED BY rDS(on) 1 ms<br>SINGLE PULSE 10 ms 100<br>0.1 T J = MAX RATED DC SINGLE PULSE<br>R θ JC = 3.0  [o] C/W CURVE BENT TO  R θ JC = 3.0  [o] C/W<br>TC = 25  [o] C MEASURED DATA TC = 25  [o] C<br>0.01 10<br>0.1 1 10 100 10-5 10-4 10-3 10-2 10-1 1<br>VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)<br>Figure 11.  Forward Bias Safe                                  Figure 12.  Single  Pulse Maximum<br>Operating Area Power  Dissipation<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>V<br>DRAIN CURRENT (A)<br>,<br>ID<br>, AVALANCHE CURRENT (A)<br>IAS<br>, DRAIN CURRENT (A)<br>ID PEAK TRANSIENT POWER (W)<br>,<br>(PK)<br>P<br>**----- End of picture text -----**<br>


www.fairchildsemi.com 

©2012 Fairchild Semiconductor Corporation FDMC86102 Rev.C3 

**4** 

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Typical Characteristics  TJ = 25 °C unless otherwise noted<br>2<br>DUTY CYCLE-DESCENDING ORDER<br>1<br>D = 0.5<br>      0.2<br>      0.1<br>      0.05<br>0.1       0.02<br>      0.01 PDM<br>SINGLE PULSE<br>0.01 R θ JC  = 3.0  [o] C/W t1<br>t2<br>NOTES:<br>DUTY FACTOR: D = t1/t2<br>PEAK TJ = PDM x Z θJC  x R θJC  + TC<br>0.001<br>10-5 10-4 10-3 10-2 10-1 1<br>t, RECTANGULAR PULSE DURATION (sec)<br>Figure 13.  Transient Thermal Response Curve<br>Z JC θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


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©2012 Fairchild Semiconductor Corporation<br>FDMC86102 Rev.C3<br>**----- End of picture text -----**<br>


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5 www.fairchildsemi.com<br>**----- End of picture text -----**<br>


## **Dimensional Outline and Pad Layout** 

www.fairchildsemi.com 

©2012 Fairchild Semiconductor Corporation FDMC86102 Rev.C3 

**6** 

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|Advance Information|Formative / In Design|Datasheet contains the design specifications for product development. Specifications<br>may change in any manner without notice.|
|Preliminary|First Production|Datasheet contains preliminary data; supplementary data will be published at a later<br>date. Fairchild Semiconductor reserves the right to make changes at any time without<br>notice to improve design.|
|No Identification Needed|Full Production|Datasheet contains final specifications. Fairchild Semiconductor reserves the right to<br>make changes at any time without notice to improve the design.|
|Obsolete|Not In Production|Datasheet contains specifications on a product that is discontinued by Fairchild<br>Semiconductor. The datasheet is for reference information only.|



Rev. I65 

www.fairchildsemi.com 

FDMC86102 Rev.C3 

**7** 

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---

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