# Dual MOSFET, N Channel, 30 V, 46 A, 0.022 ohm ![Product image](https://novapart.co/image/farnell:3616868/) **URL**: https://novapart.co/products/FDMC7200S/dual-mosfet-n-channel-30-v-46-a-0022-ohm **SKU**: FDMC7200S **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Dual MOSFETs **Price**: €0.2640 **Stock**: 10+ **Lead Time**: 162 days (indicative) ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | No SVHC (25-Jun-2025) | | No. Of Pins | 8Pins | | Channel Type | N Channel | | Product Range | - | | Qualification | - | | Transistor Case Style | Power 33 | | Operating Temperature Max | 150°C | | Power Dissipation N Channel | 2.5W | | Power Dissipation P Channel | - | | Drain Source Voltage Vds N Channel | 30V | | Drain Source Voltage Vds P Channel | - | | Continuous Drain Current Id N Channel | 46A | | Continuous Drain Current Id P Channel | - | | Drain Source On State Resistance N Channel | 0.022ohm | | Drain Source On State Resistance P Channel | - | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:3616868/) **DATA SHEET** ~~ee~~ **www.onsemi.com** **==> picture [488 x 195] intentionally omitted <==** **----- Start of picture text -----**
MOSFET – Dual, N-Channel, D1D1
Pin 1 G1 [D1]
POWERTRENCH
D1
D2/S1
30 V, 22 m and 10 m GHS VIN VIN VIN S2 S2 S2
FDMC7200S VIN G2
SWITCH
NODE Bottom
General Description GND
This device includes two specialized N−Channel MOSFETs in a " : e° GNDGND
dual Power 33 (3 mm x 3 mm MLP) package. The switch node has GLS
Bottom
been internally connected to enable easy placement and routing of
WDFN8 3x3, 0.65P
synchronous buck converters. The control MOSFET (Q1) and (Power 33)
synchronous MOSFET (Q2) have been designed to provide optimal CASE 511DE
power efficiency.
**----- End of picture text -----**
## **Features** ## **MARKING DIAGRAM** - Q1: N−Channel - ♦ Max RDS(on) = 22 m at VGS = 10 V, ID = 6 A - ♦ Max RDS(on) = 34 m at VGS = 4.5 V, ID = 5 A - Q2: N−Channel - ♦ Max RDS(on) = 10 m at VGS = 10 V, ID = 8.5 A - ♦ Max RDS(on) = 13.5 m at VGS = 4.5 V, ID = 7.2 A - This Device is Pb−Free, Halide Free and is RoHS Compliant ## **Applications** - Mobile Computing **==> picture [148 x 97] intentionally omitted <==** **----- Start of picture text -----**
ZXYKK
FDMC
7200S
Z = Assembly Plant Code
XY = Date Code
KK = Lot Run Traceability Code
FDMC7200S = Device Code
**----- End of picture text -----**
- Mobile Internet Devices - General Purpose Point of Load ## **PIN ASSIGNMENT** **==> picture [108 x 86] intentionally omitted <==** **----- Start of picture text -----**
Q2
5 4
6 3
7 2
8 1
Q1
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**ORDERING INFORMATION** **==> picture [192 x 92] intentionally omitted <==** **----- Start of picture text -----**
Device Package Shipping [†]
FDMC7200S WDFN8 3000 /
(Pb−Free, Tape & Reel
Halide Free)
tT
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
**----- End of picture text -----**
Publication Order Number: **1** © Semiconductor Components Industries, LLC, 2011 **March, 2023 − Rev. 3** **FDMC7200S/D** **FDMC7200S** **MOSFET MAXIMUM RATINGS** (TC = 25 ° C, unless otherwise noted) |**MOSFET**|**MAXIMUM RATINGS**(TC= 25°C, unless otherwise noted)|||| |---|---|---|---|---| |**Symbol**|**Parameter**|**Q1**|**Q2**|**Unit**| |VDS|Drain to Source Voltage|30|30|V| |VGS|Gate to Source Voltage
(Note 4)|±20|±20|V| |ID|Drain Current − Continuous (Package Limited)
TC= 25°C|18|13|A| ||− Continuous (Silicon Limited)
TC= 25°C|23|46|| ||− Continuous
TA= 25°C|7 (Note 1a)|13 (Note 1b)|| ||− Pulsed|40|27|| |EAS|Single Pulse Avalanche Energy
(Note 3)|12|32|mJ| |PD|Power Dissipation for Single Operation
TA= 25°C|1.9 (Note 1a)|2.5 (Note 1b)|W| ||Power Dissipation for Single Operation
TA= 25°C|0.7 (Note 1c)|1.0 (Note 1d)|| |TJ, TSTG|Operating and Storage Junction Temperature Range|−55 to +150||°C| Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. **THERMAL CHARACTERISTICS** (TC = 25 ° C, unless otherwise noted) |**Symbol**|**Parameter**|**Q1**|**Q2**|**Unit**| |---|---|---|---|---| |R�JA|Thermal Resistance, Junction to Ambient|65 (Note 1a)|50 (Note 1b)|°C/W| |R�JA|Thermal Resistance, Junction to Ambient|180 (Note 1c)|125 (Note 1d)|| |R�JC|Thermal Resistance, Junction to Case|7.5|4.2|| ## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) |**ELECTRI**|**CAL CHARACTERISTICS**(TJ= 25|°C unless otherwise noted)|||||| |---|---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test Conditions**|**Type**|**Min**|**Typ**|**Max**|**Unit**| |**OFF CHARACTERISTICS**|||||||| |BVDSS|Drain to Source Breakdown Voltage|ID= 250�A, VGS= 0 V
ID=�mA, VGS= 0 V|Q1
Q2|30
30|−
−|−
−|V| |�BVDSS
�TJ|Breakdown Voltage Temperature
Coefficient|ID= 250�A, referenced to 25°C
ID=�mA, referenced to 25°C|Q1
Q2|−
−|14
13|−
−|mV/°C| |IDSS|Zero Gate Voltage Drain Current|VDS= 24 V, VGS= 0 V|Q1
Q2|−
−|−
−|1
500|�A| |IGSS|Gate to Source Leakage Current|VGS=±20 V, VDS= 0 V|Q1
Q2|−
−|−
−|100
100|nA| |**ON CHARACTERISTICS**|||||||| |VGS(th)|Gate to Source Threshold Voltage|VGS= VDS, ID= 250�A
VGS= VDS, ID=�mA|Q1
Q2|1.0
1.0|2.3
2.0|3.0
3.0|V| |�VGS(th)
�TJ|Gate to Source Threshold Voltage
Temperature Coefficient|ID= 250�A, referenced to 25°C
ID= 1 mA, referenced to 25°C|Q1
Q2|−
−|−5
−6|−
−|mV/°C| |RDS(on)|Static Drain to Source On Resistance|VGS= 10 V, ID= 6 A
VGS= 4.5 V, ID= 5 A
VGS= 10 V, ID= 6 A, TJ= 125°C|Q1|−
−
−|17
25
23|22
34
30|m�| |||VGS= 10 V, ID= 8.5 A
VGS= 4.5 V, ID= 7.2 A
VGS= 10 V, ID= 8.5 A, TJ= 125°C|Q2|−
−
−|7.8
10.3
11.4|10.0
13.5
13.1|| |gFS|Forward Transconductance|VDD= 5 V, ID= 6 A
VDD= 5 V, ID= 8.5 A|Q1
Q2|−
−|29
43|−
−|S| **www.onsemi.com** **2** ## **FDMC7200S** **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) (continued) |**ELECTRI**|**CAL CHARACTERISTICS**(TJ= 25|°C unless otherwise noted) (continue|d)||||| |---|---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test Conditions**|**Type**|**Min**|**Typ**|**Max**|**Unit**| |**DYNAMIC CHARACTERISTICS**|||||||| |Ciss|Input Capacitance|VDS= 15 V, VGS= 0 V, f = 1 MHz|Q1
Q2|−
−|495
1080|660
1436|pF| |Coss|Output Capacitance||Q1
Q2|−
−|145
373|195
495|pF| |Crss|Reverse Transfer Capacitance||Q1
Q2|−
−|20
35|30
52|pF| |Rg|Gate Resistance|f = 1 MHz|Q1
Q2|0.2
0.2|1.4
1.2|4.2
3.6|�| |**SWITCHING CHARACTERISTICS**|||||||| |td(on)|Turn−On Delay Time|Q1
VDD= 15 V, ID= 1 A,
VGS= 10 V, RGEN= 6�
Q2
VDD= 15 V, ID= 1 A,
VGS= 10 V, RGEN= 6�|Q1
Q2|−
−|11
7.6|20
15|ns| |tr|Rise Time||Q1
Q2|−
−|3.1
1.8|10
10|ns| |td(off)|Turn−Off Delay Time||Q1
Q2|−
−|35
21|56
34|ns| |tf|Fall Time||Q1
Q2|−
−|1.3
8.5|10
17|ns| |Qg(TOT)|Total Gate Charge|VGS= 0 V to 10 V
Q1
VDD= 15 V, ID= 6 A
Q2
VDD= 15 V, ID= 8.5 A|Q1
Q2|−
−|7.3
15.7|10
22|nC| |Qg(TOT)|Total Gate Charge|VGS= 0 V to 4.5 V
Q1
VDD= 15 V, ID= 6 A
Q2
VDD= 15 V, ID= 8.5 A|Q1
Q2|−
−|3.1
7.2|4.3
10|nC| |Qgs|Gate to Source Charge|Q1
VDD= 15 V, ID= 6 A
Q2
VDD= 15 V, ID= 8.5 A|Q1
Q2|−
−|1.8
3|−
−|nC| |Qgd|Gate to Drain “Miller” Charge||Q1
Q2|−
−|1
1.9|−
−|nC| |**DRAIN−SOURCE CHARACTERISTICS**|||||||| |VSD|Source−Drain Diode Forward
Voltage|VGS= 0 V, IS= 6 A (Note 2)
VGS= 0 V, IS= 8.5 A (Note 2)
VGS= 0 V, IS= 1.3 A (Note 2)|Q1
Q2
Q2|−
−|0.8
0.8
0.6|1.2
1.2
0.8|V| |trr|Reverse Recovery Time|Q1
IF= 6 A, di/dt = 100 A/�s
Q2
IF= 8.5 A, di/dt = 300 A/�s|Q1
Q2|−
−|13
20|24
32|ns| |Qrr|Reverse Recovery Charge||Q1
Q2|−
−|2.3
15|10
24|nC| Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. **www.onsemi.com** **3** **FDMC7200S** ## NOTES: 1. R JA is determined with the device mounted on a 1 in[2] pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R JC is guaranteed by design while R 0 CA is determined by the user’s board design. a. 65 ° C/W when mounted on b. 50 ° C/W when mounted on a 1 in[2] pad of 2 oz copper a 1 in[2] pad of 2 oz copper +ooo 00000 00000 c. 180 ° C/W when mounted on d. 125 ° C./W when mounted on a minimum pad of 2 oz copper a minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. u 3. Starting Q1: T = 25 ° C, L = 1 mH, I = 5 A, Vgs = 10 V, Vdd = 27V, 100% test at L = 3 mH, I = 4 A; Q2: T = 25C, L = 1 mH, I = 8 A, Vgs = 10 V, Vdd = 27 V, 100% test at L = 3 mH, I = 3.2 A. 4. As an N−ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied. **www.onsemi.com** **4** **FDMC7200S** ## **TYPICAL CHARACTERISTICS (Q1 N−CHANNEL)** (TJ = 25 ° C, unless otherwise noted) **==> picture [485 x 601] intentionally omitted <==** **----- Start of picture text -----**
40 4
VGS = 10 V PULSE DURATION = 80 � s
VGS = 6 V DUTY CYCLE = 0.5% MAX
30 VGS = 4.5 V 3
VGS = 3.5 V
VGS = 4 V
20 2
VGS = 4 V
VGS = 4.5 V
10 1
VGS = 3.5 V PULSE DURATION = 80 � s VGS = 6 V VGS = 10 V
DUTY CYCLE = 0.5% MAX
0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 10 20 30 40
VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics Figure 2. Normalized On−Resistance vs.
Drain Current and Gate Voltage
1.6 100
ID = 6 A PULSE DURATION = 80 � s
VGS = 10 V DUTY CYCLE = 0.5% MAX
80
1.4 ID = 6 A
60
1.2 TJ = 125 ° C
40
1.0
20
TJ = 25 ° C
0.8 0
−75 −50 −25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE ( ° C) VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance vs. Figure 4. On−Resistance vs. Gate to
Junction Temperature Source Voltage
40 40
PULSE DURATION = 80 � s VGS = 0 V
DUTY CYCLE = 0.5% MAX 10
30
VDS = 5 V 1
TJ = 150 ° C
20 TJ = 150 ° C 0.1 TJ = 25 ° C
10 TJ = 25 ° C 0.01 TJ = −55 ° C
TJ = −55 ° C
0 0.001
2.0 2.5 3.0 3.5 4.0 4.5 0.2 0.4 0.6 0.8 1.0 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
NORMALIZED
, DRAIN CURRENT (A)
ID
DRAIN TO SOURCE ON−RESISTANCE
) �
, DRAIN TO
NORMALIZED
DS(on)
R
SOURCE ON−RESISTANCE (m
DRAIN TO SOURCE ON−RESISTANCE
, DRAIN CURRENT (A)
ID
, REVERSE DRAIN CURRENT (A)
IS
**----- End of picture text -----**
**Figure 5. Transfer Characteristics** **Figure 6. Source to Drain Diode Forward Voltage vs. Source Current** **www.onsemi.com** **5** **FDMC7200S** ## **TYPICAL CHARACTERISTICS (Q1 N−CHANNEL)** (TJ = 25 ° C, unless otherwise noted) (continued) **==> picture [485 x 167] intentionally omitted <==** **----- Start of picture text -----**
10 1000
ID = 6 A Ciss
8
VDD = 15 V C oss
6
VDD = 10 V VDD = 20 V 100
4
2 Crss
f = 1 MHz
VGS = 0 V
0 10
0 2 4 6 8 0.1 1 10 30
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
, GATE TO SOURCE VOLTAGE (V)
GS
V
**----- End of picture text -----**
**Figure 7. Gate Charge Characteristics** **Figure 8. Capacitance vs. Drain to Source Voltage** **==> picture [238 x 390] intentionally omitted <==** **----- Start of picture text -----**
8
7
6
5
4
TJ = 25 ° C
3
TJ = 100 ° C
2
TJ = 125 ° C
1
0.01 0.1 1 7
tAV, TIME IN AVALANCHE (ms)
Figure 9. Unclamped Inductive Switching
Capability
50
10
100 � s
1
THIS AREA IS 1 ms
LIMITED BY RDS(on) 10 ms
0.1 SINGLE PULSE 100 ms
TJ = MAX RATED 1 s
R � JA = 180 ° C/W 10 s
T A = 25 ° C DC
0.01
0.01 0.1 1 10 100
VDS, DRAIN TO SOURCE VOLTAGE (V)
, AVALANCHE CURRENT (A)
IAS
, DRAIN CURRENT (A)
ID
**----- End of picture text -----**
**Figure 11. Forward Bias Safe Operating Area** **==> picture [234 x 389] intentionally omitted <==** **----- Start of picture text -----**
25
R � JC = 7.5 ° C/W
20
VGS = 10 V
15
Limited by Package
10
VGS = 4.5 V
5
0
25 50 75 100 125 150
Tc, CASE TEMPERATURE ( ° C)
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
1000
100
10
SINGLE PULSE
1 R � JA = 180 ° C/W
TA = 25 ° C
0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
t, PULSE WIDTH (s)
, DRAIN CURRENT (A)
ID
, PEAK TRANSIENT POWER (W)
(PK)
P
**----- End of picture text -----**
**Figure 12. Single Pulse Maximum Power Dissipation** **www.onsemi.com** **6** **FDMC7200S** ## **TYPICAL CHARACTERISTICS (Q1 N−CHANNEL)** (TJ = 25 ° C, unless otherwise noted) (continued) **==> picture [443 x 166] intentionally omitted <==** **----- Start of picture text -----**
2
DUTY CYCLE−DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.1 0.05
0.02
0.01
0.01 SINGLE PULSE
R � JA = 180 ° C/W
0.003
10 [−4] 10 [−3] 10 [−2] 10 [−1] 1 10 100 1000
t, RECTANGULAR PULSE DURATION (s)
IMPEDANCE
, NORMALIZED THERMAL
JA
�
Z
**----- End of picture text -----**
**Figure 13. Junction−to−Ambient Transient Thermal Response Curve** **www.onsemi.com** **7** **FDMC7200S** ## **TYPICAL CHARACTERISTICS (Q2 N−CHANNEL)** (TJ = 25 ° C, unless otherwise noted) **==> picture [482 x 167] intentionally omitted <==** **----- Start of picture text -----**
27 4
VGS = 10 V PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX � s
VGS = 4.5 V 3 VGS = 3 V
18
VGS = 4 V
VGS = 3 V 2 VGS = 3.5 V
VGS = 3.5 V
9 VGS = 4 V
1
PULSE DURATION = 80 � s
DUTY CYCLE = 0.5% MAX VGS = 4.5 V VGS = 10 V
0 0
0.0 0.5 1.0 1.5 0 9 18 27
VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
NORMALIZED
, DRAIN CURRENT (A)
ID
DRAIN TO SOURCE ON−RESISTANCE
**----- End of picture text -----**
**Figure 14. On−Region Characteristics** **Figure 15. Normalized On−Resistance vs. Drain Current and Gate Voltage** **==> picture [486 x 400] intentionally omitted <==** **----- Start of picture text -----**
1.6 100
ID = 8.5 A PULSE DURATION = 80 � s
VGS = 10 V ID = 8.5 A DUTY CYCLE = 0.5% MAX
80
1.4
60
1.2
40
1.0
20 TJ = 125 ° C
0.8 0 TJ = 25 ° C
−75 −50 −25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE ( ° C) VGS, GATE TO SOURCE VOLTAGE (V)
Figure 16. Normalized On Resistance vs. Figure 17. On−Resistance vs. Gate to
Junction Temperature Source Voltage
27 30
PULSE DURATION = 80 � s VGS = 0 V
DUTY CYCLE = 0.5% MAX 10
18 VDS = 5 V 1 T J = 150 ° C
TJ = 150 ° C
0.1 TJ = 25 ° C
TJ = 25 ° C
9
0.01 T J = −55 ° C
TJ = −55 ° C
0 0.001
1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 18. Transfer Characteristics Figure 19. Source to Drain Diode Forward
) �
, DRAIN TO
NORMALIZED DS(on)
R
SOURCE ON−RESISTANCE (m
DRAIN TO SOURCE ON−RESISTANCE
, DRAIN CURRENT (A)
ID
, REVERSE DRAIN CURRENT (A)
IS
**----- End of picture text -----**
**Figure 19. Source to Drain Diode Forward Voltage vs. Source Current** **www.onsemi.com** **8** **FDMC7200S** **TYPICAL CHARACTERISTICS (Q2 N−CHANNEL)** (TJ = 25 ° C, unless otherwise noted) (continued) **==> picture [483 x 382] intentionally omitted <==** **----- Start of picture text -----**
10 3000
ID = 8.5 A
VDD = 10 V Ciss
8 1000
VDD = 15 V
6
C oss
VDD = 20 V
4 100
2
f = 1 MHz
VGS = 0 V C rss
0 10
0 2 4 6 8 10 12 14 16 0.1 1 10 30
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 20. Gate Charge Characteristics Figure 21. Capacitance vs. Drain to Source
Voltage
20 50
40
10
VGS = 10 VGS = 10 V = 10 V
T J = 25 ° C 30
TJ = 100 ° C 20 VGS = 4.5 VGS = 4.5 V = 4.5 V
10
TJ = 125 ° C Limited by Package
R � JC = 4.2 = 4.2 ° C/W
1 0
0.01 0.1 1 10 30 25 50 75 100 125 150
tAV, TIME IN AVALANCHE (ms) Tc, CASE TEMPERATURE (c, CASE TEMPERATURE (, CASE TEMPERATURE ( ° C)
CAPACITANCE (pF)
, GATE TO SOURCE VOLTAGE (V)
GS
V
, DRAIN CURRENT (A)
, AVALANCHE CURRENT (A)IAS IDD
**----- End of picture text -----**
**==> picture [238 x 166] intentionally omitted <==** **----- Start of picture text -----**
50
40
VGS = 10 VGS = 10 V = 10 V
30
VGS = 4.5 VGS = 4.5 V = 4.5 V
20
10
Limited by Package
R � JC = 4.2 = 4.2 ° C/W
0
25 50 75 100 125 150
Tc, CASE TEMPERATURE (c, CASE TEMPERATURE (, CASE TEMPERATURE ( ° C)
, DRAIN CURRENT (A)
IDD
**----- End of picture text -----**
**Figure 22. Unclamped Inductive Switching Capability** **Figure 23. Maximum Continuous Drain Current vs. Case Temperature** **==> picture [240 x 166] intentionally omitted <==** **----- Start of picture text -----**
50
10
100 � s
1 ms
1
10 ms
THIS AREA IS
LIMITED BY RDS(on) 100 ms
0.1 SINGLE PULSE 1 s
TJ = MAX RATED 10 s
R � JA = 125 ° C/W DC
TA = 25 ° C
0.01
0.01 0.1 1 10 100
VDS, DRAIN TO SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
ID
**----- End of picture text -----**
**Figure 24. Forward Bias Safe Operating Area** **==> picture [233 x 167] intentionally omitted <==** **----- Start of picture text -----**
100
VGS = 10 V
10
1
SINGLE PULSE
R � JA = 125 ° C/W
TA = 25 ° C
0.1
0.001 0.01 0.1 1 10 100 1000
t, PULSE WIDTH (s)
, PEAK TRANSIENT POWER (W)
(PK)
P
**----- End of picture text -----**
**Figure 25. Single Pulse Maximum Power Dissipation** **www.onsemi.com** **9** **FDMC7200S** ## **TYPICAL CHARACTERISTICS (Q2 N−CHANNEL)** (TJ = 25 ° C, unless otherwise noted) (continued) **==> picture [445 x 167] intentionally omitted <==** **----- Start of picture text -----**
2
DUTY CYCLE−DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.1 0.05 PDM
0.02
0.01 t1
t2
NOTES:
0.01 SINGLE PULSE
R � JA = 125 ° C/W DUTY FACTOR: D = tPEAK TJ = PDM x Z � JA1 x R / t2 � JA + TA
(Note 1b)
0.001
10 [−4] 10 [−3] 10 [−2] 10 [−1] 1 10 100 1000
t, RECTANGULAR PULSE DURATION (s)
IMPEDANCE
, NORMALIZED THERMAL
JA
�
Z
**----- End of picture text -----**
**Figure 26. Junction−to−Ambient Transient Thermal Response Curve** **www.onsemi.com** **10** **FDMC7200S** ## **TYPICAL CHARACTERISTICS** (continued) ## **SyncFET** � **Schottky Body Diode Characteristics** **onsemi** ’s SyncFET process embeds a Schottky diode in parallel with POWERTRENCH MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 27 shows the reverse recovery characteristic of the FDMC7200S. Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. **==> picture [480 x 172] intentionally omitted <==** **----- Start of picture text -----**
7 10 [−2]
6
TJ = 125 ° C
5 10 [−3]
4
3 di/dt = 300 A/ � s T J = 100 ° C
10 [−4]
2
1
10 [−5]
0
−1 TJ = 25 ° C
−2 10 [−6]
0 20 40 60 80 100 0 5 10 15 20 25 30
TIME (ns) VDS, REVERSE VOLTAGE (V)
CURRENT (A)
, REVERSE LEAKAGE CURRENT (A)
IDSS
**----- End of picture text -----**
**Figure 27. FDMC7200S SyncFET Body Diode Reverse Recovery Characteristic** **Figure 28. SyncFET Body Diode Reverse Leakage vs. Drain−Source Voltage** POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. SyncFET is a trademark of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **www.onsemi.com** **11** MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** **WDFN8 3x3, 0.65P** CASE 511DE ISSUE O DATE 31 AUG 2016 **==> picture [493 x 37] intentionally omitted <==** **----- Start of picture text -----**
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