# Power MOSFET, N Channel, 60 V, 7.5 A, 0.019 ohm, MicroFET, Surface Mount
**URL**: https://novapart.co/products/FDMA86551L/power-mosfet-n-channel-60-v-75-a-0019-ohm-microfet
**SKU**: FDMA86551L
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.4050
**Stock**: 1000+
**Lead Time**: 2 days (indicative)
## Description
Transistor Polarity:N Channel; Continuous Drain Current Id:7.5A; Drain Source Voltage Vds:60V; On Resistance Rds(on):0.019ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:1.8V
## Specifications
| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 6Pins |
| Channel Type | N Channel |
| Product Range | PowerTrench |
| Qualification | - |
| Power Dissipation | 2.4W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | MicroFET |
| Drain Source Voltage Vds | 60V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 7.5A |
| Drain Source On State Resistance | 0.019ohm |
| Gate Source Threshold Voltage Max | 1.8V |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:2825161RL/)
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ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
## **October 2014**
##
## **Single N-Channel PowerTrench[® ] MOSFET**
## **60 V, 7.5 A, 23 m** Ω
## **Features**
Max rDS(on) = 23 mΩ at VGS = 10 V, ID = 7.5 A Max rDS(on) = 35 mΩ at VGS = 4.5 V, ID = 6 A Low Profile - 0.8 mm maximum in the new package MicroFET 2x2 mm
Free from halogenated compounds and antimony oxides RoHS Compliant
## **General Description**
This device has been designed to provide maximum efficiency and thermal performance for synchronous buck converters. The low rDS(on) and gate charge provide excellent switching performance.
## **Application**
DC – DC Buck Converters
**==> picture [361 x 129] intentionally omitted <==**
**----- Start of picture text -----**
Pin 1 D D G
Bottom Drain Contact
D D
Drain Source
D D
G S
D D S
MicroFET 2X2 (Bottom View)
**----- End of picture text -----**
**MOSFET Maximum Ratings** TA = 25 °C unless otherwise noted
|**MOSFET Maximum Ratings**|**MOSFET Maximum Ratings **TA = 25 °C unless otherwise notedA = 25 °C unless otherwise noted= 25 °C unless otherwise noted|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Ratings**|**Units**|
|VDS|Drain to Source Voltage|60|V|
|VGS|Gate to Source Voltage|±20|V|
|ID|Drain Current -Continuous TA= 25 °C (Note 1a)|7.5|A|
||-Pulsed (Note 4)|45||
|EAS|Single Pulse Avalanche Energy(Note 3)|37|mJ|
|PD|Power Dissipation TA= 25 °C (Note 1a)|2.4|W|
||Power Dissipation TA= 25 °C (Note 1b)|0.9||
|TJ, TSTG|Operatingand Storage Junction Temperature Range|-55 to +150|°C|
**Thermal Characteristics**
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 52 °C/W ~~—oe~~ RθJA Thermal Resistance, Junction to Ambient (Note 1b) 145 **Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity** 551 FDMA86551L MicroFET 2X2 7 ” 8 mm 3000 units ~~eeee~~
©2013 Fairchild Semiconductor Corporation **1** FDMA86551L Rev.C2
www.fairchildsemi.com
**Electrical Characteristics** TJ = 25 °C unless otherwise noted
**Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics** BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 60 V ΔΔBVTDSSJ Breakdown Voltage TemperatureCoefficient ID = 250 μA, referenced to 25 °C 31 mV/°C IDSS Zero Gate Voltage Drain Current VDS = 48 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V 100 nA **On Characteristics** ~~—_—— ee~~ VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.0 1.8 3.0 V Δ ΔVTGS(th)J Gate to Source Threshold VoltageTemperature Coefficient ID = 250 μA, referenced to 25 °C -5 mV/°C VGS = 10 V, ID = 7.5 A 19 23 r Static Drain to Source On Resistance VGS = 4.5 V, ID = 6 A 26 35 mΩ DS(on) VGS = 10 V, ID = 7.5 A, 28 33 TJ = 125 °C ~~=~~ gFS Forward Transconductance VDD = 5 V, ID = 7.5 A 21 S **Dynamic Characteristics** CCiossss InOutput Caput Capacitancepacitance Vf = 1 MHzDS = 30 V, VGS = 0 V, 182881 1235255 ppFF Crss Reverse Transfer Capacitance 6.1 15 pF R Gate Resistance 0.1 0.5 1.5 Ω ~~————~~ g **Switching Characteristics** td(on) Turn-On Delay Time 7.3 15 ns ttd(or ff) Rise TimeTurn-Off Delay Time VVDDGS = 30 V, I = 10 V, RDGEN = 7.5 A, = 6 Ω 1.716 1029 nsns tf Fall Time 1.4 10 ns Qg(TOT) Total Gate Charge VGS = 0 V to 10 V 12 17 nC Qg(TOT) Total Gate Charge VGS = 0 V to 4.5 V VDD = 30 V, 5.8 8.1 nC Qgs Gate to Source Charge ID = 7.5 A 2.7 3.8 nC ~~eee=~~ Qgd Gate to Drain “Miller” Charge ~~EEE~~ 1.4 2.0 nC **Drain-Source Diode Characteristics** VSD Source to Drain Diode Forward Voltage VVGSGS = 0 V, I= 0 V, ISS = 7.5 A = 2 A ((Note 2Note 2)) 0.90.8 1.21.2 VV ~~=~~ tQrrrr Reverse RecoverReverse Recoveryy Char Timege IF = 7.5 A, di/dt = 100 A/μs 9.723 1937 nCns NOTES: 1. RθJA is determined with the device mounted on a 1 in[2] pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. a. 52 °C/W when mounted b. 145 °C/W when mounted on a on a 1 in[2 ] pad of 2 oz copper. minimum pad of 2 oz copper. fl
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 37 mJ is based on starting TJ = 25 °C, L = 3 mH, IAS = 5 A, VDD = 60 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 16 A.
4. Pulse Id measured at td <= 250 μs, refer to Fig 11 SOA graph for more details.
©2013 Fairchild Semiconductor Corporation FDMA86551L Rev.C2
**2**
www.fairchildsemi.com
**Typical Characteristics** TJ = 25 °C unless otherwise noted
**==> picture [222 x 566] intentionally omitted <==**
**----- Start of picture text -----**
45
VGS = 10 V
VGS = 4.5 V
36
VGS = 4 V
27
18
VGS = 3.5 V
9
VGS = 3 V PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX μ s
0
0 1 2 3 4
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
1.8
1.6 ID = 7.5 A
VGS = 10 V
1.4
1.2
1.0
0.8
0.6
-75 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE ( [o] C)
Figure 3. Normalized On- Resistance
vs Junction Temperature
45
PULSE DURATION = 80 μ s
DUTY CYCLE = 0.5% MAX
36
VDS = 5 V
27
18
TJ = 150 [o] C
TJ = 25 [o] C
9
TJ = -55 [o] C
0
1 2 3 4 5 6
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
, DRAIN CURRENT (A)
ID
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
, DRAIN CURRENT (A)
ID
**----- End of picture text -----**
**==> picture [223 x 169] intentionally omitted <==**
**----- Start of picture text -----**
5
VGS = 3 V
4
VGS = 3.5 V
3
VGS = 4 V
2
VGS = 4.5 V
1
PULSE DURATION = 80 μ s VGS = 10 V
DUTY CYCLE = 0.5% MAX
0
0 9 18 27 36 45
ID, DRAIN CURRENT (A)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
**----- End of picture text -----**
**Figure 2. vs Drain Current and Gate Voltage**
**==> picture [228 x 362] intentionally omitted <==**
**----- Start of picture text -----**
90
PULSE DURATION = 80 μ s
DUTY CYCLE = 0.5% MAX
ID = 7.5 A
60
TJ = 125 [o] C
30
TJ = 25 [o] C
0
2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
45
VGS = 0 V
10
T J = 150 [o] C
1
T J = 25 [ o] C
0.1
0.01 TJ = -55 [o] C
0.001
0.0 0.2 0.4 0.6 0.8 1.0 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
) Ω
(m
DRAIN TO
rDS(on),
SOURCE ON-RESISTANCE
, REVERSE DRAIN CURRENT (A)
IS
**----- End of picture text -----**
**Figure 6. Forward Voltage vs Source Current**
©2013 Fairchild Semiconductor Corporation FDMA86551L Rev.C2
**3**
www.fairchildsemi.com
**Typical Characteristics** TJ = 25 °C unless otherwise noted
**==> picture [467 x 566] intentionally omitted <==**
**----- Start of picture text -----**
10
1000
ID = 7.5 A Ciss
8
VDD = 20 V VDD = 30 V Coss
100
6
VDD = 40 V
4
10 Crss
2
f = 1 MHz
VGS = 0 V
0
0 3 6 9 12 15 1
0.1 1 10 60
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain
to Source Voltage
100
1000
SINGLE PULSE
10 R θ JA = 145 [o] C/W
100 TA = 25 [o] C
100 μ s
1
THIS AREA IS LIMITED BY r 1 ms 10 ms 10
0.1 DS(on) 100 ms
SINGLE PULSE 1 s
0.01 T J = MAX RATED DC10 s 1
R θ JA = 145 [ o] C/W CURVE BENT TO
TA = 25 [o] C MEASURED DATA
0.001
0.01 0.1 1 10 100 300 0.110-4 10-3 10-2 10-1 1 10 100 1000
VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)
Figure 9. Forward Bias Safe Figure 10. Single Pulse Maximum
Operating Area Power Dissipation
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05 PDM
0.1
0.02
0.01
t 1
t2
0.01 NOTES:
SINGLE PULSE RZ θθJAJA (= 145 t) = r(t°)C/W x R θJA
Peak T J = P DM x Z θJA (t) + T A
Duty Cycle, D = t1 / t2
0.001
10-4 10-3 10-2 10-1 1 10 100 1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Junction-to-Ambient Transient Thermal Response Curve
CAPACITANCE (pF)
, GATE TO SOURCE VOLTAGE (V)
GS
V
, DRAIN CURRENT (A)
ID
PEAK TRANSIENT POWER (W)
,
(PK)
P
THERMAL RESISTANCE
r(t), NORMALIZED EFFECTIVE TRANSIENT
**----- End of picture text -----**
©2013 Fairchild Semiconductor Corporation FDMA86551L Rev.C2
**4**
www.fairchildsemi.com
**==> picture [368 x 495] intentionally omitted <==**
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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