# Power MOSFET, P Channel, 20 V, 2.5 A, 0.01 ohm, MicroFET, Surface Mount

![Product image](https://novapart.co/image/farnell:3368743RL/)

**URL**: https://novapart.co/products/FDMA008P20LZ/power-mosfet-p-channel-20-v-25-a-001-ohm-microfet
**SKU**: FDMA008P20LZ
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.3980
**Stock**: 10+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Channel Type | P Channel |
| Power Dissipation | 2.4W |
| Transistor Mounting | Surface Mount |
| Drain Source On State Resistance | 0.01ohm |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3368743RL/)

**==> picture [58 x 8] intentionally omitted <==**

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October 2016<br>**----- End of picture text -----**<br>


## 

## **Single P-Channel PowerTrench[®] MOSFET -20 V, -2.5 A, 13 m** Ω 

## **Features** 

Max rDS(on) = 13 mΩ at VGS = -4.5 V, ID = -2.5 A Max rDS(on) = 16 mΩ at VGS = -2.5 V, ID = -1.4 A Max rDS(on) = 20 mΩ at VGS = -1.8 V, ID = -1.0 A Max rDS(on) = 30 mΩ at VGS = -1.5 V, ID = -0.85 A Low Profile - 0.8 mm maximum in the new package MicroFET 2x2 mm 

## **General Description** 

This device is designed specifically for battery charge or load switching in cellular handset and other ultraportable applications.It features a MOSFET with low on-state resistance and zener diode protection against ESD. The MicroFET 2X2 package offers exceptional thermal performance for its physical size and is well suited to linear mode applications. 

HBM ESD protection level > 1k V typical (Note 3) 

Free from halogenated compounds and antimony oxides 

RoHS Compliant 

|**1**<br>**D**<br>**D**<br>**G**<br>**D**<br>**Pin 1**<br>**Drain**<br>**Source**|Bottom Drain Contact|Bottom Drain Contact|Bottom Drain Contact|Bottom Drain Contact|Bottom Drain Contact|Bottom Drain Contact|Bottom Drain Contact|Bottom Drain Contact|Bottom Drain Contact|Bottom Drain Contact|**6**||**D**|||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|**2**<br>**D**|||||||||||**5**||**D**|||
|||||||||||||||||
|**3**<br>**G**<br>**D**<br>**D**|||||||||||**4**||**S**|||
|**S**||||||||||||||||
|**MicroFET 2X2 (Bottom View)**||||||||||||||||
|**MOSFET Maximum Ratings  **TA= 25 °C unless otherwise noted||||||||||||||||
|**Symbol**<br>**Parameter**||||||||||**Ratings**||||**Units**||
|VDS<br>Drain to Source Voltage|||||||||||-20|||V||
|VGS<br>Gate to Source Voltage|||||||||||±8|||V||
|ID<br>-Continuous                                         TA= 25°C<br>-Pulsed|= 25°C<br>-Pulsed|= 25°C(Note 1a<br>-Pulsed(Note 5|||Note 1a)<br>Note 5)||||||-2.5<br>-164|||A||
|EAS<br>Single Pluse Avalanche Energy||(Note 4||Note 4)|||||||54|||mJ||
|PD<br>Power Dissipation                                                        TA= 25°C<br>Power Dissipation                                                        TA= 25°C|= 25°C<br>= 25°C|= 25°C(Note 1a<br>= 25°C(Note 1b|||Note 1a)<br>Note 1b)||||||2.4<br>0.9|||W||
|TJ, TSTG<br>Operatingand Storage Junction Temperature Range|||||||||-55 to +150||-55 to +150|||°C||
|**Thermal Characteristics**||||||||||||||||
|**Package Marking and Ordering Information**<br>RθJA<br>Thermal Resistance, Junction to Ambient(Note 1a)<br>52<br>°C/W<br>RθJA<br>Thermal Resistance, Junction to Ambient(Note 1b)<br>145<br>~~oo~~<br>~~—_~~||||||||||||||||
|**Device Marking**<br>**Device**<br>**Package**<br>**Reel Size**<br>**Tape Width**<br>**Quantity**<br>FDMA008P20LZ<br>FDMA008P20LZ<br>MicroFET 2X2<br>7”<br>8 mm<br>3000 units<br>~~ee~~<br>~~ee ee ee~~||||||||||||||||
|©2016 Fairchild Semiconductor Corporation<br>**1**|||||||||||||www.fairchildsemi.com|||



©2016 Fairchild Semiconductor Corporation **1** FDMA008P20LZ Rev.1.0 

## **Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Electrical Characteristics**TJ = 25 °C unless otherwise notedJ = 25 °C unless otherwise noted= 25 °C unless otherwise noted|**Electrical Characteristics**TJ = 25 °C unless otherwise notedJ = 25 °C unless otherwise noted= 25 °C unless otherwise noted|
|---|---|
|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Switching Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= -250μA, VGS= 0 V<br>-20<br>V<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= -250μA, referenced to 25 °C<br>-16<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= -16 V, VGS = 0 V<br>-1<br>μA<br>IGSS<br>Gate to Source Leakage Current<br>VGS= ±8 V, VDS = 0 V<br>±1<br>μA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS,  ID= -250μA<br>-0.4<br>-0.65<br>-1.4<br>V<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= -250μA, referenced to 25 °C<br>3<br>mV/°C<br>rDS(on)<br>Static Drain to Source On Resistance<br>VGS= -4.5 V,  ID= -2.5 A<br>10<br>13<br>mΩ<br>VGS= -2.5 V,  ID= -1.4 A<br>12<br>16<br>VGS= -1.8 V,  ID= -1.0 A<br>15<br>20<br>VGS= -1.5 V,  ID= -0.85 A<br>20<br>30<br>VGS= -4.5 V,  ID= -2.5 A,<br>TJ= 125 °C<br>12.8<br>gFS<br>Forward Transconductance<br>VDD= -5 V,  ID= -2.5 A<br>26<br>S<br>Ciss<br>Input Capacitance<br>VDS= -10 V, VGS= 0 V,<br>f = 1 MHz<br>3131<br>4383<br>pF<br>Coss<br>Output Capacitance<br>424<br>594<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>386<br>540<br>pF<br>Rg<br>Gate Resistance<br>13<br>25<br>Ω<br>td(on)<br>Turn-On DelayTime<br>VDD= -10 V, ID= -2.5 A,<br>VGS= -4.5 V, RGEN= 6Ω<br>12<br>21<br>ns<br>tr<br>Rise Time<br>17<br>30<br>ns<br>td(off)<br>Turn-Off DelayTime<br>239<br>382<br>ns<br>tf<br>Fall Time<br>96<br>153<br>ns<br>Qg<br>Total Gate Charge<br>VGS= -4.5 V, VDD= -10 V,<br>ID= -2.5 A<br>28<br>39<br>nC<br>Qgs<br>Gate to Source Charge<br>3.6<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>6.2<br>nC<br>~~=~~<br>~~eee~~<br>~~——————~~<br>~~een~~||
|**Drain-Source Diode Characteristics**||
|VSD<br>Source to Drain Diode Forward Voltage<br>VGS= 0 V, IS= -2 A<br> (Note 2)<br>-0.6<br>-1.2<br>V<br>VGS= 0 V, IS= -2.5 A(Note 2)<br>-0.8<br>-1.3<br>V<br>trr<br>Reverse RecoveryTime<br>IF= -2.5 A, di/dt = 100 A/μs<br>28<br>46<br>ns<br>Qrr<br>Reverse RecoveryCharge<br>10<br>17<br>nC<br>~~ee~~||
|NOTES:||
|1. RθJAis determined with the device mounted on a 1 in2pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJCis guaranteed by design while RθJAis determined by||
|the user's board design.||
|a. 52 °C/W when mounted<br>on a 1 in2pad of  2 oz copper.<br>b. 145  °C/W when mounted on  a<br>minimum pad of 2 oz copper.<br>nm||



2. Pulse Test: Pulse Width < 30 0 μs, Duty cycle < 2.0%. 

3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 

4. EAS of 54 mJ is based on starting TJ = 25 °C, L = 3 mH, IAS = 6 A, VDD = 20 V, VGS = 4.5 V.  100% test at L = 0.1 mH, IAS = 19 A. 

5. Pulsed Id please refer to Fig.10 SOA curve for more details. 

©2016 Fairchild Semiconductor Corporation FDMA008P20LZ Rev.1.0 

**2** 

www.fairchildsemi.com 

## **Typical Characteristics** TJ = 25 °C unless otherwise noted 

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4<br>140 VGS = -4.5 V VGS = -1.5 V<br>VGS = -3.5 V VGS = -3 V 3 VGS = -1.8 V<br>105 VGS = -2 V<br>VGS = -2.5 V PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX μ s 2 VGS = -2.5 V<br>70 VGS = -3 V<br>VGS = -2 V<br>35 V GS  = -1.8 V 1 VGS = -3.5 V V GS  = -4.5 V<br>PULSE DURATION = 80  μ s<br>VGS = -1.5 V DUTY CYCLE = 0.5% MAX<br>0<br>0 0 35 70 105 140<br>0 1 2 3 4 5<br>-VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A)<br>Figure 1.  On-Region Characteristics Figure 2.  Normalized On-Resistance<br>vs Drain Current and Gate Voltage<br>1.4 80<br>PULSE DURATION = 80  μ s<br>1.3 ID = -2.5 A 70 DUTY CYCLE = 0.5% MAX<br>VGS = -4.5 V ID = -2.5 A<br>60<br>1.2<br>50<br>1.1 40<br>30<br>1.0 TJ = 125  [o] C<br>20<br>0.9<br>10<br>TJ = 25  [o] C<br>0.8 0<br>-75 -50 -25 0 25 50 75 100 125 150 0 1 2 3 4<br>TJ, JUNCTION TEMPERATURE ( [o] C) -VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3.  Normalized  On- Resistance                                         Figure 4.   On-Resistance vs  Gate to<br>vs Junction Temperature Source Voltage<br>140 100<br>PULSE DURATION = 80  μ s VGS = 0 V<br>DUTY CYCLE = 0.5% MAX<br>120<br>VDS = -5 V 10<br>100<br>TJ = -55  [o] C T J  = 150  [o] C<br>1<br>80<br>T J = 25  [o] C<br>60 TJ = 25 [ o] C<br>0.1<br>TJ = 150  [o] C<br>40<br>0.01 TJ = -55  [o] C<br>20<br>0 0.001<br>0 1 2 3 4 0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>-VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5.  Transfer Characteristics Figure 6.    Source to Drain  Diode<br>Forward Voltage vs Source Current<br>NORMALIZED<br>, DRAIN CURRENT (A)<br>D<br>-I<br>DRAIN TO SOURCE ON-RESISTANCE<br>) Ω<br>(m<br>DRAIN TO<br>NORMALIZED rDS(on),<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>D<br>-I , REVERSE DRAIN CURRENT (A)<br>S<br>-I<br>**----- End of picture text -----**<br>


©2016 Fairchild Semiconductor Corporation FDMA008P20LZ Rev.1.0 

**3** 

www.fairchildsemi.com 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

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4.5 10000<br>ID = -2.5 A VDD = -8 V<br>Ciss<br>3.0<br>VDD = -10 V<br>1000<br>VDD = -12 V Coss<br>1.5<br>Crss<br>f = 1 MHz<br>VGS = 0 V<br>0.0 100<br>0 5 10 15 20 0.1 1 10 20<br>Qg, GATE CHARGE (nC) -VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7.  Gate Charge Characteristics Figure 8.  Capacitance vs Drain<br>to Source Voltage<br>100 200<br>100<br>100  μ s<br>10<br>TJ = 25 [ o] C 1 ms<br>10 1 THIS AREA IS  10 ms<br>TJ = 100  [o] C LIMITED BY rDS(on) 100 ms<br>SINGLE PULSE<br>1 s<br>0.1 TJ = MAX RATED<br>TJ = 125  [o] C R θ JA = 145  [o] C/W CURVE BENT TO  DC10 s<br>T A = 25  [o] C MEASURED DATA<br>1 0.01<br>0.001 0.01 0.1 1 10 100 0.01 0.1 1 10 80<br>tAV, TIME IN AVALANCHE (ms) -VDS, DRAIN to SOURCE VOLTAGE (V)<br>Figure 9.  Unclamped Inductive Switching CapabilityUnclamped Inductive Switching Capability Figure 10.  Forward Bias Safe<br>Operating Area<br>100000<br>SINGLE PULSE<br>10000 R θ JA = 145 [ o] C/W<br>TA = 25  [o] C<br>1000<br>100<br>10<br>1<br>0.1<br>10-6 10-5 10-4 10-3 10-2 10-1 1 10 100 1000<br>t, PULSE WIDTH (sec)<br>Figure 11.  Single Pulse Maximum Power Dissipation<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>-V<br>, DRAIN CURRENT (A)<br>D<br>-I<br>, AVALANCHE CURRENT (A)<br>AS<br>-I<br>, PEAK TRANSIENT POWER (W)<br>(PK)<br>P<br>**----- End of picture text -----**<br>


**Figure 9.  Unclamped Inductive Switching CapabilityUnclamped Inductive Switching Capability** 

©2016 Fairchild Semiconductor Corporation FDMA008P20LZ Rev.1.0 

**4** 

www.fairchildsemi.com 

**==> picture [457 x 196] intentionally omitted <==**

**----- Start of picture text -----**<br>
Typical Characteristics  TJ = 25 °C unless otherwise noted<br>2<br>1 DUTY CYCLE-DESCENDING ORDER<br>0.1 D = 0.5<br>      0.2<br>      0.1 P DM<br>      0.05<br>0.01<br>      0.02<br>      0.01 t 1<br>0.001 t2<br>NOTES:<br>Z θ JA (t) = r(t) x R θ JA<br>0.0001 SINGLE PULSE R θ JA = 145  [o] C/W<br>Peak TJ = PDM x Z θ JA(t) + TA<br>Duty Cycle, D = t1 / t2<br>0.00001<br>10-6 10-5 10-4 10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Figure 12.  Junction-to-Ambient Transient Thermal Response Curve<br>THERMAL RESISTANCE<br>r(t), NORMALIZED EFFECTIVE TRANSIENT<br>**----- End of picture text -----**<br>


©2016 Fairchild Semiconductor Corporation FDMA008P20LZ Rev.1.0 

**5** 

www.fairchildsemi.com 



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