# Power MOSFET, P Channel, 40 V, 100 A, 0.0044 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2895699/)

**URL**: https://novapart.co/products/FDD9507L-F085/power-mosfet-p-channel-40-v-100-a-00044-ohm-to-252
**SKU**: FDD9507L-F085
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €2.7500
**Stock**: 10+

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:-100A; Drain Source Voltage Vds:-40V; On Resistance Rds(on):0.0033ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (15-Jan-2018) |
| No. Of Pins | 3Pins |
| Channel Type | P Channel |
| Product Range | PowerTrench |
| Qualification | AEC-Q101 |
| Power Dissipation | 227W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 100A |
| Drain Source On State Resistance | 0.0044ohm |
| Gate Source Threshold Voltage Max | 2V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2895699/)

FDD9507L-F085 

## P‐Channel POWERTRENCH MOSFET 

## **−40 V, −100 A, 4.4 m** 

## **Features** 

**www.onsemi.com** 

- Typical RDS(on) = 3.3 m at VGS = −10 V, ID = −80 A 

- Typical Gg(tot) = 110 nC at VGS = −10 V, ID = −80 A 

- UIS Capability 

|• <br>|Typical Gg(tot) = 110 nC at VGS = −10 V, ID = −80 Ag(tot) = 110 nC at VGS = −10 V, ID = −80 A= 110 nC at VGS = −10 V, ID = −80 AGS = −10 V, ID = −80 A= −10 V, ID = −80 AD = −80 A= −80 A<br>UIS Capability|||
|---|---|---|---|
|•|UIS Capability|**VDSS**|**RDS(ON) MAX**<br>**ID MAX**|
|• <br>•|Qualified to AEC Q101<br> These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS<br>Compliant|−40 V|D<br>4.4 m @ −10 V<br>−100 A<br>~~°~~|



## **Applications** 

- Automotive Engine Control 

- PowerTrain Management 

- Solenoid and Motor Drivers 

**==> picture [7 x 7] intentionally omitted <==**

**----- Start of picture text -----**<br>
G<br>**----- End of picture text -----**<br>


- Electrical Power Steering 

- Integrated Starter/Alternator 

S • Distributed Power Architectures and VRM **P-CHANNEL MOSFET** • Primary Switch for 12 V Systems **MAXIMUM RATINGS** (TA = 25 ° C unless otherwise noted) D **Symbol Parameter Value Unit** G VDSS Drain-to-Source Voltage −40 V S VGS Gate-to-Source Voltage ± 16 V **DPAK3 (TO−252)** ID Drain Current − Continuous, −100 A **CASE 369AS** (VGS = −10 V) TC = 25 ° C (Note 1) Pulsed Drain Current, TC = 25 ° C (See Figure 4) A **MARKING DIAGRAM** EAS Single Pulse Avalanche Energy 259 mJ (Note 2) PD Power Dissipation 227 W $Y&Z&3&K Derate Above 25 ° C 1.52 W/ ° C FDD 9507L TJ, TSTG Operating and Storage −55 to +175 ° C Temperature ~~ec~~ Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be ~~-~~ assumed, damage may occur and reliability may be affected. 1. Current is limited by bondwire configuration. $Y 

**==> picture [167 x 49] intentionally omitted <==**

**----- Start of picture text -----**<br>
$Y = ON Semiconductor Logo<br>&Z = Assembly Plant Code<br>&3 = Numeric Date Code<br>&K = Lot Code<br>FDD9507L = Specific Device Code<br>**----- End of picture text -----**<br>


2. Starting TJ = 25 ° C, L = 0.1 mH, IAS = −72 A, VDD = −40 V during inductor charging and VDD = 0 V during time in avalanche. 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information on page 7 of this data sheet. 

Publication Order Number: **FDD9507L−F085/D** 

**1** 

© Semiconductor Components Industries, LLC, 2017 **January, 2018 − Rev. 3** 

**FDD9507L−F085** 

## **THERMAL CHARACTERISTICS** 

|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|R�JC|Thermal Resistance, Junction to Case|0.66|°C/W|
|R�JA|Thermal Resistance, Junction to Ambient (Note 3)|52||



3. R � JA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. R � JC is guaranteed by design, while R � JA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in[2] pad of 2oz copper. 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**Symbol**|**Parameter**|**Test Condition**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|**OFF CHARACTERISTICS**|||||||
|BVDSS|Drain-to-Source Breakdown Voltage|ID= −250�A, VGS= 0 V|−40|−|−|V|
|IDSS|Drain-to-Source Leakage Current|VDS= −40 V, VGS= 0 V<br>TJ= 25°C<br>TJ= 175°C (Note 4)|−<br>−|−<br>−|1<br>1|�A|
|IGSS|Gate-to-Source Leakage Current|VGS=±16 V|−|−|±100|nA|
|**ON CHARACTERISTICS**|||||||
|VGS(th)|Gate to Source Threshold Voltage|VGS= VDS, ID= 250�A|−1|−2|−3|V|
|RDS(on)|Static Drain to Source On Resistance|VGS= −4.5 V, ID= −80 A, TJ= 25°C|−|4.9|7.2|m�|
|||VGS= −10 V, ID= −80 A<br>TJ= 25°C<br>TJ= 175°C (Note 4)|−<br>−|3.3<br>5.3|4.4<br>7.1||
|**DYNAMIC CHARACTERISTICS**|||||||
|Ciss|Input Capacitance|VDS= −20 V, VGS= 0 V, f = 1 MHz|−|6250|−|pF|
|Coss|Output Capacitance||−|2640|−|pF|
|Crss|Reverse Transfer Capacitance||−|61|−|pF|
|Rg|Gate Resistance|f = 1 MHz|−|19.3|−|�|
|Qg(tot)|Total Gate Charge|VGS= 0 V to −10 V, VDD= −20 V, ID= −80 A|−|100|130|nC|
|Qg(−4.5)|Total Gate Charge|VGS= 0 V to −4.5 V, VDD= −20 V, ID= −80 A|−|46|−|nC|
|Qg(th)|Threshold Gate Charge|VGS= 0 V to −2 V, VDD= −20 V, ID= −80 A|−|13|−|nC|
|Qgs|Gate to Source Charge|VDD= −20 V, ID= −80 A|−|22|−|nC|
|Qgd|Gate to Drain “Miller” Charge|VDD= −20 V, ID= −80 A|−|13|−|nC|
|**SWITCHING CHARACTERISTICS**|||||||
|ton|Turn-On Time|VDD= −20 V, ID= −80 A, VGS= −10 V,<br>RGEN= 6�|−|−|21|ns|
|td(on)|Turn-On Delay||−|10|−|ns|
|tr|Rise Time||−|6|−|ns|
|td(off)|Turn-Off Delay||−|400|−|ns|
|tf|Fall Time||−|132|−|ns|
|toff|Turn-Off Time||−|−|710|ns|
|**DRAIN-SOURCE DIODE CHARACTERISTICS**|||||||
|VSD|Source to Drain Diode Forward<br>Voltage|ISD= −80 A, VGS= 0 V|−|−0.9|−1.3|V|
|||ISD= −40 A, VGS= 0 V|−|−0.85|−1.2||
|trr|Reverse Recovery Time|IF= −80 A, dISD/dt = 100 A/�s|−|87|113|ns|
|Qrr|Reverse Recovery Charge||−|115|150|nC|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. The maximum value is specified by design at TJ = 175 ° C. Product is not tested to this condition in production. 

**www.onsemi.com** 

**2** 

**FDD9507L−F085** 

## **TYPICAL CHARACTERISTICS** 

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**----- Start of picture text -----**<br>
1.2<br>1.0<br>0.8<br>0.6<br>0.4<br>0.2<br>0.0<br>0 25 50 75 100 125 150 175<br>TC, CASE TEMPERATURE [(] [�] [C)]<br>POWER DISSIPATION MULTIPLIER<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
200<br>CURRENT LIMITED VGS = −10 V<br>BY SILICON<br>160<br>120<br>80<br>CURRENT LIMITED<br>BY PACKAGE<br>40<br>0<br>25 50 75 100 125 150 175<br>TC, CASE TEMPERATURE( [o] C)<br>, DRAIN CURRENT (A)<br>D<br>−I<br>**----- End of picture text -----**<br>


**Figure 1. Normalized Power Dissipation vs. Case Temperature** 

**Figure 2. Maximum Continuous Drain Current vs. Case Temperature** 

**==> picture [422 x 366] intentionally omitted <==**

**----- Start of picture text -----**<br>
2<br>DUTY CYCLE − DESCENDING ORDER<br>1<br>D = 0.50<br>      0.20<br>P DM       0.10<br>      0.05<br>      0.02<br>0.1 t 1       0.01<br>SINGLE PULSE t2<br>NOTES:<br>DUTY FACTOR: D = t1/t2<br>PEAK TJ = PDM x Z � JC x R � JC + TC<br>0.01<br>10−5 10−4 10−3 10−2 10−1 100 10 1<br>t, RECTANGULAR  PULSE DURATION(s)<br>Figure 3. Normalized Maximum Transient Thermal Impedance<br>5000<br>TC = 25 [o] C<br>V GS  = −10 V FOR TEMPERATURES<br>ABOVE 25 [o] C DERATE PEAK<br>1000 CURRENT AS FOLLOWS:<br>I = I 25 175 − T C<br>150<br>100<br>SINGLE PULSE<br>10<br>10−5 10−4 10−3 10−2 10−1 100 101<br>t, RECTANGULAR PULSE DURATION(s)<br>IMPEDANCE, ZJC �<br>NORMALIZED THERMAL<br> PEAK CURRENT (A)IDM ,<br>**----- End of picture text -----**<br>


**Figure 4. Peak Current Capability** 

**www.onsemi.com** 

**3** 

**FDD9507L−F085** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [200 x 151] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000<br>100<br>100 us<br>10<br>1 ms<br>1 10 ms<br>SINGLE PULSE<br>OPERATION IN THIS  TJ = MAX RATED 100 ms<br>AREA MAY BE<br>LIMITED BY r DS(on) TC = 25 [o] C<br>0.1<br>11 0 100<br>−VDS, DRAIN TO SOURCE VOLTAGE (V)<br> , DRAIN CURRENT (A)<br>D<br> −I<br>**----- End of picture text -----**<br>


**Figure 5. Forward Bias Safe Operating Area** 

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**----- Start of picture text -----**<br>
300 If R = 0<br>tAV = (L)(I AS )/(1.3*RATED BV DSS [ − V] DD [)]<br>If R [�]  0<br>100 tAV = (L/R)ln[(I AS*R)/(1.3*RATED BV DSS  − VDD ) +1]<br>STARTING TJ = 25 [o] C<br>10<br>STARTING TJ = 150 [o] C<br>1<br>0.001 0.01 0.1 1 10 100 1000<br>tAV, TIME IN AVALANCHE (ms)<br>, AVALANCHE CURRENT (A)<br>AS<br>−I<br>**----- End of picture text -----**<br>


**Figure 6. Unclamped Inductive Switching Capability** 

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**----- Start of picture text -----**<br>
300<br>PULSE DURATION = 250 � s<br>DUTY CYCLE = 0.5% MAX<br>250<br>VDD = −5 V<br>200<br>TJ = 25 [o] C<br>150<br>100<br>TJ = 175 [o] C<br>TJ = −55 [o] C<br>50<br>0<br>1 2 3 4 5<br>−VGS, GATE TO SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>D<br>−I<br>**----- End of picture text -----**<br>


**Figure 7. Transfer Characteristics** 

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**----- Start of picture text -----**<br>
300<br>250<br>200<br>150<br>100 VGS<br>-10V  Top<br>-7V<br>50 250 � s PULSE WIDTH -5V-4.5V-4V<br>Tj=25 [o] C −3.5V Bottom<br>0<br>0 1 2 3 4 5<br>−VDS, DRAIN TO SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>D<br>−I<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
300<br>VGS = 0 V<br>100<br>TJ = 175 [o] C<br>10<br>TJ = 25 [ o] C<br>1 TJ = −55 [ o] C<br>0.1<br>0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>−V SD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 8. Forward Diode Characteristics<br>300<br>250<br>200<br>150<br>100 VGS<br>-10V  Top<br>-7V<br>50 250 � s PULSE WIDTH -5V-4.5V<br>-4V<br>Tj=175 [o] C -3.5V Bottom<br>0<br>0 1 2 3 4 5<br>−VDS, DRAIN TO SOURCE VOLTAGE (V)<br>, REVERSE DRAIN CURRENT (A)<br>S<br>−I<br>, DRAIN CURRENT (A)<br>D<br>−I<br>**----- End of picture text -----**<br>


**Figure 9. Saturation Characteristics** 

**Figure 10. Saturation Characteristics** 

**www.onsemi.com** 

**4** 

**FDD9507L−F085** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [208 x 355] intentionally omitted <==**

**----- Start of picture text -----**<br>
50<br>PULSE DURATION = 250 � s<br>DUTY CYCLE = 0.5% MAX<br>40<br>ID = −80 A<br>30<br>20<br>10 T J  = 175 [o] C<br>TJ = 25 [o] C<br>0<br>2 4 6 8 10<br>−VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 11. RDS(on) vs. Gate Voltage<br>1.3<br>VGS  = V DS<br>1.2<br>ID = −250  � A<br>1.1<br>1.0<br>0.9<br>0.8<br>0.7<br>0.6<br>0.5<br>0.4<br>0.3<br>−80 −40 0 40 80 120 160 200<br>TJ, JUNCTION TEMPERATURE ( [o] C)<br>) �<br>m<br>, DRAIN TO SOURCE<br>ON−RESISTANCE (<br>DS(on)<br>R<br>NORMALIZED GATE<br>THRESHOLD VOLTAGE<br>**----- End of picture text -----**<br>


**Figure 13. Normalized Gate Threshold Voltage vs. Temperature** 

**==> picture [202 x 148] intentionally omitted <==**

**----- Start of picture text -----**<br>
10000 Ciss<br>C oss<br>1000<br>100<br>Crss<br>f = 1 MHz<br>V GS  = 0 V<br>10<br>0.1 1 10 40<br>−VDS , DRAIN TO SOURCE VOLTAGE (V)<br>CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**==> picture [208 x 154] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.8<br>PULSE DURATION = 250 � s<br>DUTY CYCLE = 0.5% MAX<br>1.6<br>1.4<br>1.2<br>1.0<br>0.8  ID = −80 A<br>VGS = −10 V<br>0.6<br>−80 −40 0 40 80 120 160 200<br>TJ , JUNCTION TEMPERATURE ( [o] C)<br>NORMALIZED<br> DRAIN TO SOURCE ON−RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 12. Normalized RDS(on) vs. Junction Temperature** 

**==> picture [213 x 355] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.10<br>ID = −5 mA<br>1.05<br>1.00<br>0.95<br>0.90<br>−80 −40 0 40 80 100 120 160<br>TJ, JUNCTION TEMPERATURE ( [o] C)<br>Figure 14. Normalized Drain to Source<br>Breakdown Voltage vs. Junction Temperature<br>10<br>ID = −8 A<br>8<br>VDD = −20 V<br>VDD = −24 V<br>6<br>VDD = −16 V<br>4<br>2<br>0<br>0 20 40 60 80 100<br>Qg ,  GATE CHARGE (nC)<br>BREAKDOWN VOLTAGE<br>NORMALIZED DRAIN TO SOURCE<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>−V<br>**----- End of picture text -----**<br>


**Figure 15. Capacitance vs. Drain to Source Voltage** 

**Figure 16. Gate Charge vs. Gate to Source Voltage** 

**www.onsemi.com** 

**5** 

**FDD9507L−F085** 

## **PACKAGE DIMENSIONS** 

**DPAK3 (TO−252 3 LD)** CASE 369AS ISSUE O 

**==> picture [148 x 31] intentionally omitted <==**

**www.onsemi.com** 

**6** 

**FDD9507L−F085** 

## **ORDERING INFORMATION** 

|**Device**|**Marking**|**Package**|**Reel Size**|**Tape Width**|**Quantity**|
|---|---|---|---|---|---|
|FDD9507L−F085|FDD9507L|DPAK3 (TO−252)<br>(Pb-Free / Halogen Free)|13″|16 mm|2500 Units|



POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. 

ON Semiconductor and      are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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**FDD9507L−F085/D** 

**7** 



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