# Power MOSFET, P Channel, 40 V, 50 A, 0.0123 ohm, TO-252 (DPAK), Surface Mount ![Product image](https://novapart.co/image/farnell:2992319/) **URL**: https://novapart.co/products/FDD4141-F085/power-mosfet-p-channel-40-v-50-a-00123-ohm-to-252 **SKU**: FDD4141-F085 **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.9740 **Stock**: 10+ ## Description Transistor Polarity:P Channel; Continuous Drain Current Id:-50A; Drain Source Voltage Vds:-40V; On Resistance Rds(on):0.0101ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | No SVHC (15-Jan-2018) | | No. Of Pins | 3Pins | | Channel Type | P Channel | | Product Range | Power Trench | | Qualification | AEC-Q101 | | Power Dissipation | 69W | | Transistor Mounting | Surface Mount | | Rds(On) Test Voltage | 10V | | Transistor Case Style | TO-252 (DPAK) | | Drain Source Voltage Vds | 40V | | Operating Temperature Max | 175°C | | Continuous Drain Current Id | 50A | | Drain Source On State Resistance | 0.0123ohm | | Gate Source Threshold Voltage Max | 1.8V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2992319/) ## **FDD4141-F085** **P-Channel PowerTrench[®] MOSFET -40V, -50A, 12.3m** Ω ## **General Description** ## **Features** This P-Channel MOSFET has been produced using ON Max rDS(on) = 12.3mΩ at VGS = -10V, ID = -12.7A Semiconductor’s proprietary PowerTrenchdeliver low rDS(on) and optimized Bvdss capability to offer[®] technology to Max rDS(on) = 18.0mΩ at VGS = -4.5V, ID = -10.4A superior performance benefit in the applications. and optimized switching performance capability reducing power dissipation High performance trench technology for extremely low rDS(on) losses in converter/inverter applications. Qualified to AEC Q101 **Applications** RoHS Compliant Inverter Power Supplies **S D G G S D-PAK** on **TO -252** @) **(TO-252) D** **MOSFET Maximum Ratings** TC = 25°C unless otherwise noted |**Symbol**
**Parameter**||||**Ratings**||**Units**|| |---|---|---|---|---|---|---|---| |VDS
Drain to Source Voltage||||-40||V|| |VGS
Gate to Source Voltage||||±20||V|| |Drain Current -Continuous(Package limited)TC = 25°C||= 25°C||-50|||| |ID
-Continuous(Silicon limited)
TC = 25°C
-Continuous
TA= 25°C||= 25°C
(Note 1a)||-58
-10.8||A|| |-Pulsed||||-100|||| |EAS
Single Pulse Avalanche Energy||(Note 3)||337||mJ|| |PD
Power Dissipation
TC= 25°C
Power Dissipation
TA= 25°C||= 25°C
(Note 1a)||69
2.4||W|| |TJ, TSTG
Operatingand Storage Junction Temperature Range||||-55 to +175||°C|| |**Thermal Characteristics**|||||||| |**Package Marking and Ordering Information**
RθJC
Maximum Thermal Resistance, Junction to Case
1.8
°C/W
RθJA
Maximum Thermal Resistance, Junction to Ambient
(Note 1a)
52
~~ee~~
~~eee~~|||||||| |**Device Marking**
**Device**
**Package**
**Reel Size**
**Tape Width**
**Quantity**
FDD4141
FDD4141-F085
D-PAK (TO-252)
13’’
16mm
2500 units
~~**e**e~~
~~e~~
~~ee ee ee~~|||||||| |©2013 Semiconductor Components Industries, LLC.
**1**||||Publication Order Number:|||| |November-2018, Rev.4|||||FDD4141-F085/D||| **Electrical Characteristics** TJ = 25°C unless otherwise noted |**Symbol**
**Parameter**
**Test Conditions**
**Min**
**Typ**
**Max**
**Units**
**Off Characteristics**
BVDSS
Drain to Source Breakdown Voltage
ID= -250μA, VGS= 0V
-40
-
-
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID= -250μA, referenced to 25°C
-
-29
-
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= -32V, VGS = 0V
-
-
-1
μA
IGSS
Gate to Source Leakage Current
VGS= ±20V, VDS = 0V
-
-
±100
nA
**On Characteristics**
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= -250μA
-1
-1.8
-3
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID= -250μA, referenced to 25°C
-
5.8
-
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= -10V, ID= -12.7A
-
10.1
12.3
mΩ
VGS= -4.5V, ID= -10.4A
-
14.5
18.0
VGS= -10V, ID= -12.7A,
TJ = 175°C
-
17.3
19.4
gFS
Forward Transconductance
VDS= -5V, ID= -12.7A
-
38
-
S
**Dynamic Characteristics**
Ciss
Input Capacitance
VDS= -20V, VGS= 0V,
f = 1MHz
-
2085
2775
pF
Coss
Output Capacitance
-
360
480
pF
Crss
Reverse Transfer Capacitance
-
210
310
pF
Rg
Gate Resistance
f = 1MHz
-
4.6
-
Ω
~~SE~~
~~eee~~
~~eee~~|**Symbol**
**Parameter**
**Test Conditions**
**Min**
**Typ**
**Max**
**Units**
**Off Characteristics**
BVDSS
Drain to Source Breakdown Voltage
ID= -250μA, VGS= 0V
-40
-
-
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID= -250μA, referenced to 25°C
-
-29
-
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= -32V, VGS = 0V
-
-
-1
μA
IGSS
Gate to Source Leakage Current
VGS= ±20V, VDS = 0V
-
-
±100
nA
**On Characteristics**
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= -250μA
-1
-1.8
-3
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID= -250μA, referenced to 25°C
-
5.8
-
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= -10V, ID= -12.7A
-
10.1
12.3
mΩ
VGS= -4.5V, ID= -10.4A
-
14.5
18.0
VGS= -10V, ID= -12.7A,
TJ = 175°C
-
17.3
19.4
gFS
Forward Transconductance
VDS= -5V, ID= -12.7A
-
38
-
S
**Dynamic Characteristics**
Ciss
Input Capacitance
VDS= -20V, VGS= 0V,
f = 1MHz
-
2085
2775
pF
Coss
Output Capacitance
-
360
480
pF
Crss
Reverse Transfer Capacitance
-
210
310
pF
Rg
Gate Resistance
f = 1MHz
-
4.6
-
Ω
~~SE~~
~~eee~~
~~eee~~| |---|---| |**Switching Characteristics**|| |td(on)
Turn-On DelayTime
VDD= -20V, ID= -12.7A,
VGS= -10V, RGEN= 6Ω
-
10
19
ns
tr
Rise Time
-
7
13
ns
td(off)
Turn-Off DelayTime
-
38
60
ns|| |tf
Fall Time
-
15
27
ns|| |Qg
Total Gate Charge
VGS = 0V to -10V
VDD= -20V,
ID= -12.7A
-
36
50
nC
Qg
Total Gate Charge
VGS = 0V to -5V
-
19
27
nC
Qgs
Gate to Source Charge
-
7
-
nC
Qgd
Gate to Drain “Miller” Charge
-
8
-
nC
~~OS~~|| |**Drain-Source Diode Characteristics**|| |VSD
Source to Drain Diode Forward Voltage
VGS = 0V, IS = -12.7A(Note 2)
-
-0.8
-1.2
V
trr
Reverse RecoveryTime
IF= -12.7A, di/dt = 100A/μs
-
29
44
ns
Qrr
Reverse RecoveryCharge
-
26
40
nC
~~—————~~|| |Notes**:**|| |**1:** RθJAis the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.|is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.| |RθJC is guaranteed by design while RθJAis determined by the user’s board design.|| a) 52°C/W when mounted on a 1 in[2 ] pad of 2 oz copper b) 100°C/W when mounted on a minimum pad. - **2:** Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%. - **3:** Starting TJ = 25°C, L = 3mH, IAS = 15A, VDD = 40V, VGS = 10V. **www.onsemi.com 2** ## **Typical Characteristics** TJ = 25°C unless otherwise noted **==> picture [223 x 169] intentionally omitted <==** **----- Start of picture text -----**
100
PULSE DURATION = 80 μ s
DUTY CYCLE = 0.5%MAX
80
VGS = -4.5V
VGS = -4V
60
VGS = -10V
40
VGS = -3.5V
20
VGS = -3V
0
0 1 2 3 4 5
-VDS, DRAIN TO SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
D
-I
**----- End of picture text -----**
**Figure 1. On-Region Characteristics** **==> picture [205 x 187] intentionally omitted <==** **----- Start of picture text -----**
2.0
PULSE DURATION = 80 μ s
1.8 DUTY CYCLE = 0.5% MAX
1.6
1.4
1.2
1.0
0.8
ID = -12.7A
0.6 VGS = -10V
0.4
-80 -40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE( [o] C)
Figure 3. Normalized On- Resistance
vs Junction Temperature
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
**----- End of picture text -----**
**==> picture [205 x 177] intentionally omitted <==** **----- Start of picture text -----**
100
PULSE DURATION = 80 μ s
DUTY CYCLE = 0.5% MAX
80
VDD = -5V
60
40
TJ = 175 [o] C
20
TJ = 25 [o] C TJ = -55 [o] C
0
1 2 3 4 5
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
, DRAIN CURRENT (A)
ID
**----- End of picture text -----**
**==> picture [223 x 169] intentionally omitted <==** **----- Start of picture text -----**
4.0
PULSE DURATION = 80 μ s
3.5 V GS = -3V DUTY CYCLE = 0.5%MAX
3.0
VGS = -3.5V
2.5
2.0 V GS = -4V
1.5 V GS = -4.5V
1.0
VGS = -10V
0.5
0 20 40 60 80 100
-ID, DRAIN CURRENT(A)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
**----- End of picture text -----**
**Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage** **==> picture [211 x 381] intentionally omitted <==** **----- Start of picture text -----**
100
PULSE DURATION = 80 μ s
DUTY CYCLE = 0.5% MAX
80 ID =-12.7A
60
40
TJ = 175 [o] C
20
TJ = 25 [o] C
0
2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
100
VGS = 0 V
10
1 T J = 175 [o] C
TJ = -55 [ o] C
0.1
0.01 TJ = 25 [ o] C
1E-3
0.0 0.2 0.4 0.6 0.8 1.0 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
) Ω
m
, DRAIN TO SOURCE
ON-RESISTANCE (
rDS(on)
, REVERSE DRAIN CURRENT (A)
IS
**----- End of picture text -----**
**www.onsemi.com 3** **Typical Characteristics** TJ = 25°C unless otherwise noted **==> picture [456 x 575] intentionally omitted <==** **----- Start of picture text -----**
10 10000
ID = -12.7A
8
VDD = -15V C iss
6
VDD = -20V
1000
4 VDD = -10V Coss
2 f = 1MHz
VGS = 0V C rss
0 100
0 8 16 24 32 40 0.1 1 10 40
Qg, GATE CHARGE(nC) -VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain
to Source Voltage
60
200
If R = 0
100 If R tAV = ≠ 0 (L)(IAS)/(1.3*RATED BVDSS - VDD) 50
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
40
VGS = -4.5V VGS = -10V
30
Limited by Package
10 STARTING TJ = 25 [o] C
20
STARTING T J = 150 [o] C 10
R θ JC = 1.8 [o] C/W
0
1 25 50 75 100 125 150
0.01 0.1 1 10 100 1000
tAV, TIME IN AVALANCHE (ms) TC, CASE TEMPERATURE ( [o] C)
Figure 9. Unclamped Inductive Figure 10. Maximum Continuous Drain
Switching Capability Current vs Case Temperature
10000
1000
VGS = -10V FOR TEMPERATURES
ABOVE 25SINGLE PULSE [o] C DERATE PEAK
100 1000 CURRENT AS FOLLOWS:I = I25 R θ 150 ------------------------ JC 125= 1.8 – TC [o] C/W
100us
10 TC = 25 [o] C
1ms
1 OPERATION IN THIS SINGLE PULSE 10ms
AREA MAY BE LIMITED BY rDS(on) TJ = MAX RATED 100ms 100
TC = 25 [o] C
50
0.1 10-5 10-4 10-3 10-2 10-1 100 101 102 103
0.1 1 10 100
VDS, DRAIN TO SOURCE VOLTAGE (V) t, PULSE WIDTH (s)
Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum
Operating Area Power Dissipation
CAPACITANCE (pF)
, GATE TO SOURCE VOLTAGE(V)
GS
-V
DRAIN CURRENT (A)
,
D
-I
, AVALANCHE CURRENT (A)
IAS
, DRAIN CURRENT (A)
D
I , PEAK TRANSIENT POWER (W)P)(PK
**----- End of picture text -----**
**www.onsemi.com 4** **==> picture [469 x 208] intentionally omitted <==** **----- Start of picture text -----**
Typical Characteristics TJ = 25°C unless otherwise noted
2
1 DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.1 0.02 PDM
0.01
t1
t 2
NOTES:
SINGLE PULSE DUTY FACTOR: D = t1/t2
0.01 R θ JC = 1.8 [o] C/W PEAK TJ = PDM x Z θJC x R θJC + TC
0.005
10-5 10-4 10-3 10-2 10-1 100 101
t, RECTANGULAR PULSE DURATION (s)
Figure 13. Transient Thermal Response Curve
IMPEDANCE, ZJC θ
NORMALIZED THERMAL
**----- End of picture text -----**
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