# Power MOSFET, N Channel, 20 V, 50 A, 0.0075 ohm, TO-252AA, Surface Mount ![Product image](https://novapart.co/image/farnell:2454152RL/) **URL**: https://novapart.co/products/FDD3706/power-mosfet-n-channel-20-v-50-a-00075-ohm-to **SKU**: FDD3706 **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.4070 **Stock**: 10+ ## Specifications | Parameter | Value | |---|---| | No. Of Pins | 3Pins | | Channel Type | N Channel | | Power Dissipation | 44W | | Transistor Mounting | Surface Mount | | Transistor Polarity | N Channel | | Power Dissipation Pd | 44W | | Rds(On) Test Voltage | 10V | | On Resistance Rds(On) | 0.0075ohm | | Transistor Case Style | TO-252AA | | Drain Source Voltage Vds | 20V | | Operating Temperature Max | 175°C | | Continuous Drain Current Id | 50A | | Drain Source On State Resistance | 0.0075ohm | | Gate Source Threshold Voltage Max | 1V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2454152RL/) April 2002 ## **FDD3706/FDU3706** ## **20V N-Channel PowerTrench[] MOSFET** **==> picture [435 x 535] intentionally omitted <==** **----- Start of picture text -----**
General Description Features
This N-Channel MOSFET has been designed • 50 A, 20 V RDS(ON) = 9 mΩ @ VGS = 10 V
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional RDS(ON) = 11 mΩ @ VGS = 4.5 V
switching PWM controllers. It has been optimized for RDS(ON) = 16 mΩ @ VGS = 2.5 V
low gate charge, low RDS( ON) , fast switching speed and
extremely low RDS(ON) in a small package. • Low gate charge (16 nC)
Applications • Fast Switching
• DC/DC converter
• High performance trench technology for extremely
• Motor Drives low RDS(ON)
D
G
gS 9 I-PAK G
D-PAK (TO-251AA)
TO-252
(TO-252) G D S S
Absolute Maximum Ratings TA=25 [o] C unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source Voltage 20 V
VGSS Gate-Source Voltage ± 12 V
ID Continuous Drain Current @TC=25°C (Note 3) 50 A
@TA=25°C (Note 1a) 14.7
Pulsed (Note 1a) 60
PD Power Dissipation @TC=25°C (Note 3) 44 W
@TA=25°C (Note 1a) 3.8
@TA=25°C (Note 1b) 1.6
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +175 °C
Thermal Characteristics
RθJC Thermal Resistance, Junction-to-Case (Note 1) 3.4 °C/W
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 45 °C/W
—— RθJA Thermal Resistance, Junction-to-Ambient (Note 1b) 96 °C/W
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape width Quantity
FDD3706 FDD3706 D-PAK (TO-252) 13’’ 12mm 2500 units
FDU3706 FDU3706 I-PAK (TO-251) Tube N/A 75
=== ==
2002 Fairchild Semiconductor Corp. FDD3706/FDU3706 Rev C (W)
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|**Electrical Characteristics**
TA= 25°C unless otherwise noted|**Electrical Characteristics**
TA= 25°C unless otherwise noted|**Electrical Characteristics**
TA= 25°C unless otherwise noted|**Electrical Characteristics**
TA= 25°C unless otherwise noted||||| |---|---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test Conditions**||**Min**|**Typ**|**Max**|**Units**| |**Drain-Source Avalanche Ratings** (Note 2)|||||||| |EAS|Drain-Source Avalanche Energy|Single Pulse, VDD= 10V, ID=7A||||60|mJ| |IAS|Drain-Source Avalanche Current|||||7|A| |**Off Characteristics**|||||||| |BVDSS|Drain–Source Breakdown Voltage|VGS= 0 V,
ID= 250µA||20|||V| |∆BVDSS
∆TJ|Breakdown Voltage Temperature
Coefficient|ID= 250µA,Referenced to 25°C|||13||mV/°C| |IDSS|Zero Gate Voltage Drain Current|VDS= 16 V,
VGS= 0 V||||1|µA| |IGSSF|Gate–BodyLeakage, Forward|VGS= 12 V,
VDS= 0 V||||100|nA| |IGSSR|Gate–Body Leakage, Reverse|VGS= –12 V
VDS= 0 V||||–100|nA| |**On Characteristics**
**(Note 2)**|||||||| |VGS(th)|Gate Threshold Voltage|VDS= VGS,
ID= 250µA||0.5|1|1.5|V| |∆VGS(th)

∆TJ|Gate Threshold Voltage
Temperature Coefficient|ID= 250µA,Referenced to 25°C|||–3.5||mV/°C| |RDS(on)|Static Drain–Source
On–Resistance|VGS= 10 V,
ID= 16.2 A
VGS= 4.5 V,
ID= 14.7 A
VGS= 2.5 V,
ID= 12.2 A
VGS= 4.5 V,ID= 14.7 A,TJ = 125°C|||7.5
8
11
12.6|9
11
16
19|mΩ| |ID(on)|On–State Drain Current|VGS= 4.5 V,
VDS= 5 V||30|||A| |gFS|Forward Transconductance|VDS= 5 V,
ID= 14.7 A|||65||S| |**Dynamic Characteristics**|||||||| |Ciss|Input Capacitance|VDS= 10 V,
VGS= 0 V,
f = 1.0 MHz|||1882||pF| |Coss|Output Capacitance||||430||pF| |Crss|Reverse Transfer Capacitance||||201||pF| |**Switching Characteristics(Note 2)**|||||||| |td(on)|Turn–On DelayTime|VDD= 10 V,
ID= 1 A,
VGS= 4.5 V,
RGEN= 6Ω|||11|20|ns| |tr|Turn–On Rise Time||||15|27|ns| |td(off)|Turn–Off Delay Time||||35|56|ns| |tf|Turn–Off Fall Time||||16|29|ns| |Qg|Total Gate Charge|VDS= 10V,
ID= 14.7 A,
VGS= 4.5 V|||16|23|nC| |Qgs|Gate–Source Charge||||3.7||nC| |Qgd|Gate–Drain Charge||||4||nC| |**Drain–Source Diode Characteristics and Maximum Ratings**|||||||| |IS|Maximum Continuous Drain–Source Diode Forward Current|||||3.2|A| |VSD|Drain–Source Diode Forward Voltage||VGS= 0 V,
IS= 3.2 A
(Note 2)||0.7|1.2|V| **Notes:** **1.** RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. - a) RθJA = 40°C/W when mounted on a b) RθJA = 96°C/W when mounted 1in[2] pad of 2 oz copper on a minimum pad. Scale 1 : 1 on letter size paper - **2.** Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% PD - **3.** Maximum current is calculated as: R DS(ON) where PD is maximum power dissipation at TC = 25°C and RDS(on) is at TJ(max) and VGS = 10V. Package current limitation is 21A FDD3706/FDU3706 Rev C (W) ## **Typical Characteristics** **==> picture [429 x 537] intentionally omitted <==** **----- Start of picture text -----**
100 1.8
VGS=4.5V 3.0V
3.5V
80 1.6
2.5V VGS = 2.5V
60 1.4
40 1.2 3.0V
3.5V
4.0V 4.5V
2.0V
20 1
0 0.8
0 1 2 3 4 5 0 20 40 60 80 100
VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage
1.6 0.03
ID = 14.7A
VGS = 4.5V ID = 7.4A
1.4 0.025
1.2 0.02
TA = 125 [o] C
1 0.015
TA = 25 [o] C
0.8 0.01
0.6 0.005
-50 -25 0 25 50 75 100 125 150 175 1 2 3 4 5
TJ, JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation Figure 4. On-Resistance Variation with
withTemperature Gate-to-Source Voltage
60 100
VDS = 5V TA =-55 [o] C 25 [o] C VGS = 0V
50 10
125 [o] C TA = 125 [o] C
40 1
25 [o] C
30 0.1
-55 [o] C
20 0.01
10 0.001
0 0.0001
1 1.5 2 2.5 3 0 0.2 0.4 0.6 0.8 1 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature
, NORMALIZED
, DRAIN CURRENT (A)ID RDS(ON)
DRAIN-SOURCE ON-RESISTANCE
, NORMALIZED
RDS(ON) , ON-RESISTANCE (OHM)DS(ON)
R
DRAIN-SOURCE ON-RESISTANCE
, DRAIN CURRENT (A)ID
, REVERSE DRAIN CURRENT (A)IS
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FDD3706/FDU3706 Rev C (W) ## **Typical Characteristics** **==> picture [424 x 533] intentionally omitted <==** **----- Start of picture text -----**
10 2500
8 ID = 14.7A VDS = 5V 10V 2000 CISS Vf = 1MHzGS = 0 V
15V
6 1500
4 1000
COSS
2 500
CRSS
0 0
0 10 20 30 40 0 5 10 15 20
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics Figure 8. Capacitance Characteristics
1000 100
SINGLE PULSE
100 RDS(ON) LIMIT 1ms 100µs 80 RθTJAA = 96°C/W = 25°C
10ms
10 100ms 60
1s
1 10s 40
VGS = 4.5V DC
SINGLE PULSE
0.1 RθJA = 96 o C/W 20
TA = 25 [o] C
0.01 0
0.01 0.1 1 10 100 0.01 0.1 1 10 100 1000
VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)
Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum
Power Dissipation
1
D = 0.5
0.2 R θ JA (t) = r(t) * R θJA
0.1 0.1 Rθ JA = 96 °C/W
0.05
0.02
0.01 0.01 P( p k)
t1
t 2
0.001 SINGLE PULSE T J - T A = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.0001
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
CAPACITANCE (pF)
, GATE-SOURCE VOLTAGE (V)
GS
V
, DRAIN CURRENT (A)ID
P(pk), PEAK TRANSIENT POWER (W)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
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FDD3706/FDU3706 Rev C (W) **==> picture [64 x 7] intentionally omitted <==** **----- Start of picture text -----**
TRADEMARKS
**----- End of picture text -----**
**==> picture [439 x 623] intentionally omitted <==** **----- Start of picture text -----**
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™ FACT™ ImpliedDisconnect™ PACMAN™ SPM™
ActiveArray™ FACT Quiet Series™ ISOPLANAR™ POP™ Stealth™
Bottomless™ FAST® LittlkeFET™ Power247™ SuperSOT™-3
CoolFET™ FASTr™ MicroFET™ PowerTrench® SuperSOT™-6
CROSSVOLT™ FRFET™ MicroPak™ QFET™ SuperSOT ™-8
DOME™ GlobalOptoisolator™ MICROWIRE™ qas™ SyncFET™
EcoSPARK™ GTOo™ MSX™ QT Optoelectronics™ TinyLogic™
E?CMOS™ HiSeC™ MSXPro™ Quiet Series™ TruTranslation™
EnSigna™ 2co™ OCX™ RapidConfigure™ UHC™
Across the board. Around the world.™ OCXPro™ RapidConnect™ UltraFET®
The Power Franchise™ OPTOLOGIC® SILENT SWITCHER® VCX™
Programmable Active Droop™ OPTOPLANAR™ SMART START™
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DOES NOTASSUMEANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTENAPPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
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systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I1
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