# Power MOSFET, P Channel, 60 V, 3 A, 0.105 ohm, SuperSOT, Surface Mount

![Product image](https://novapart.co/image/farnell:2323159/)

**URL**: https://novapart.co/products/FDC5614P/power-mosfet-p-channel-60-v-3-a-0105-ohm-supersot
**SKU**: FDC5614P
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.2110
**Stock**: 1000+
**Lead Time**: 141 days (indicative)

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:3A; Drain Source Voltage Vds:-60V; On Resistance Rds(on):0.082ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs:-1.6V;

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 6Pins |
| Channel Type | P Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 1.6W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | SuperSOT |
| Drain Source Voltage Vds | 60V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 3A |
| Drain Source On State Resistance | 0.105ohm |
| Gate Source Threshold Voltage Max | 1.6V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2323159/)

## **Is Now Part of** 

**To learn more about ON Semiconductor, please visit our website at www.onsemi.com** 

ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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April 2015<br>**----- End of picture text -----**<br>


## **FDC5614P** 

## **60V P-Channel Logic Level PowerTrench[] MOSFET** 

## **General Description Features** 

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**----- Start of picture text -----**<br>
This 60V P-Channel MOSFET uses Fairchild’s high  •  –3 A,  –60 V.  RDS(ON) = 0.105 Ω @ VGS = –10 V<br>voltage PowerTrench process. It has been optimized for<br>power management applications.  RDS(ON) = 0.135 Ω @ VGS = –4.5 V<br>• Fast switching speed<br>Applications<br>• DC-DC converters • High performance trench technology for extremely<br>low RDS(ON)<br>• Load switch<br>• Power management<br>S<br>D<br>1 6<br>D<br>2 5<br>G<br>TM D D 3 4<br>SuperSOT   -6<br>Absolute Maximum Ratings TA=25 [o] C unless otherwise noted<br>Symbol Parameter Ratings  Units<br>VDSS Drain-Source Voltage   –60 V<br>VGSS Gate-Source Voltage ±20  V<br>ID Drain Current – Continuous  (Note 1a) –3 A<br>– Pulsed –20<br>PD Maximum Power Dissipation   (Note 1a) 1.6 W<br>(Note 1b) 0.8<br>TJ, TSTG Operating and Storage Junction Temperature Range  –55 to +150 °C<br>Thermal Characteristics<br>RθJA Thermal Resistance, Junction-to-Ambient   (Note 1a)  78  °C/W<br>RθJC Thermal Resistance, Junction-to-Case  (Note 1)  30  °C/W<br>es<br>Package Marking and Ordering Information<br>Device Marking  Device  Reel Size  Tape width  Quantity<br>.564 FDC5614P 7’’ 8mm 3000 units<br>eo<br>**----- End of picture text -----**<br>


FDC5614P Rev. 1.4 

2002 Fairchild Semiconductor Corporation 

|**Electrical Characteristics**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics**<br>TA= 25°C unless otherwise noted|||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Min**|**Typ**|**Max**|**Units**|
|**Off Characteristics**|||||||
|BVDSS|Drain–Source Breakdown Voltage|VGS= 0 V, ID= –250µA|–60|||V|
|∆BVDSS<br>∆TJ|Breakdown Voltage Temperature<br>Coefficient|ID= –250µA, Referenced to<br>25°C||–49||mV/°C|
|IDSS|Zero Gate Voltage Drain Current|VDS= –48 V,<br>VGS= 0 V|||–1|µA|
|IGSSF|Gate–Body Leakage, Forward|VGS= 20V,<br>VDS= 0 V|||100|nA|
|IGSSR|Gate–Body Leakage, Reverse|VGS= –20 V<br>VDS= 0 V|||–100|nA|
|**On Characteristics**<br>**(Note 2)**|||||||
|VGS(th)|Gate Threshold Voltage|VDS= VGS, ID= –250µA|–1|–1.6|–3|V|
|∆VGS(th)<br> <br>∆TJ|Gate Threshold Voltage<br>Temperature Coefficient|ID= –250µA,Referenced to 25°C||4||mV/°C|
|RDS(on)|Static Drain–Source<br>On–Resistance|VGS= –10 V,<br>ID= –3 A<br>VGS= –4.5 V,<br>ID= –2.7 A<br>VGS= –10 V,ID= –3 A TJ=125°C||82<br>105<br>130|105<br>135<br>190|mΩ|
|ID(on)|On–State Drain Current|VGS= –10 V,<br>VDS= –5 V|–20|||A|
|gFS|Forward Transconductance|VDS= –5 V,<br>ID= –3 A||8||S|
|**Dynamic Characteristics**|||||||
|Ciss|Input Capacitance|VDS= –30 V,<br>VGS= 0 V,<br>f = 1.0 MHz||759||pF|
|Coss|Output Capacitance|||90||pF|
|Crss|Reverse Transfer Capacitance|||39||pF|
|**Switching Characteristics(Note 2)**|||||||
|td(on)|Turn–On Delay Time|VDD= –30 V,<br>ID= –1 A,<br>VGS= –10 V,<br>RGEN= 6Ω||7|14|ns|
|tr|Turn–On Rise Time|||10|20|ns|
|td(off)|Turn–Off Delay Time|||19|34|ns|
|tf|Turn–Off Fall Time|||12|22|ns|
|Qg|Total Gate Charge|VDS= –30V,<br>ID= –3.0 A,<br>VGS= –10 V||15|24|nC|
|Qgs|Gate–Source Charge|||2.5||nC|
|Qgd|Gate–Drain Charge|||3.0||nC|
|**Drain–Source Diode Characteristics and Maximum Ratings**|||||||
|IS|Maximum Continuous Drain–Source Diode Forward Current||||–1.3|A|
|VSD|Drain–Source Diode Forward<br>Voltage|VGS= 0 V,<br>IS= –1.3 A<br>(Note 2)||–0.8|–1.2|V|



## **Notes:** 

**1.** RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.  RθJC is guaranteed by design while RθCA is determined by the user's board design. 

- a. 78°C/W when mounted on a 1in[2] pad of 2oz copper on FR-4 board. 

- b. 156°C/W when mounted on a minimum pad. 

**2.** Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% 

FDC5614P Rev. 1.4 

## **Typical Characteristics** 

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**----- Start of picture text -----**<br>
15 1.8<br>VGS = -10V -4.5V<br>12 -6.0V -5.0V Wy -4.0V 1.6 VGS = -3.5V<br>a 9 YW— -3.5V — 1.4  -4.0V -4.5V<br> -5.0V<br>1.2<br>6  -6.0V<br>-3.0V  -7.0V<br>i  -8.0V<br>1  -10V<br>3<br>-2.5V<br>0 | A VY a 0.8<br>0 2 4 6 8 10<br>0 1 2 3 4 5<br>-VDS, DRAIN-SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A)<br>Figure 1. On-Region Characteristics.  Figure 2. On-Resistance Variation with<br>Drain Current and Gate Voltage.<br>1.8 0.4<br>1.6 I D = -3.0A ID = -1.5A<br>VGS = -10V<br>af 3 0.3<br>1.4<br>225Ow 1.2 2bn 0.2 TA = 125oC<br>1<br>0.8<br>0.1<br>0.6 TA = 25oC<br>0.4 0<br>-50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE (oC) -VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3. On-Resistance Variation with  Figure 4. On-Resistance Variation with<br>Temperature.  Gate-to-Source Voltage.<br>15 100<br>VDS = -5V TA = -55oC 25oC VGS = 0V<br>e 12 e// 125oC ee 10 TA = 125 [o] C<br>9 1 25 o C<br>3 z3 Iee ae oer, -55oC —<br>6 VA B 0.1 aan 442<br>30 A _ SbJ 0.0010.01 Eeey Ae ee<br>1 2 3 4 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4<br>-VGS, GATE TO SOURCE VOLTAGE (V) -VSD,  BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5. Transfer Characteristics.  Figure 6. Body Diode Forward Voltage Variation<br>with Source Current and Temperature.<br>, NORMALIZED<br>DS(ON)<br>R<br>DRAIN-SOURCE ON-RESISTANCE<br>**----- End of picture text -----**<br>


FDC5614P Rev. 1.4 

## **Typical Characteristics** 

**==> picture [429 x 531] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 1200<br>ID = -3.0A VDS = -10V f = 1 MHz<br>8 OG -20V 1000 VGS = 0 V<br>-30V<br>800<br>6 w CISS ||<br>600<br>4 e)$é 400<br>2<br>200<br>CRSS COSS<br>0 J 0 \ee ee eee<br>0 4 8 12 16 0 10 20 30 40 50 60<br>Qg, GATE CHARGE (nC) -VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7. Gate Charge Characteristics.  Figure 8. Capacitance Characteristics.<br>100 30 a 9000 40 SSSS<br>SINGLE PULSE<br><- 10 Fett} RDS(ON) LIMIT +on)eSSS 100 [µ] s | 30 a Rea RθJAT = 156°C/WA = 156  = 25°C °  °C/W MU I<br>10ms<br>z aeae 100 us =| 2= 10 fp — SS T,= 25°C ais:<br>100ms<br>Be 1 20 pe LE<br>1s<br>3 SSS SSS SS SSSSSSeOs) ee EREpe PRrr<br>VGS = -10V 10s<br>0.1 SINGLE PULSE DC 10 hs<br>B01o |Zi RθJA = 156 smote [o] C/W  ruse fiatrom e |g CM TINT CSSC<br>0.01 FFEE TA = 25 [o] C Rea" sow SeTCO —  ss | 0 ene ER<br>oor0.01 0.1  LL 0.1 -V Vps, DS, DRAIN-SOURCE VOLTAGE (V) DRAIN 1 to SOURCE1  VOLTAGEI 10 10ities(V) 100 100 300 gg 0.1 10°CC10° 1 10°t, PULSE WIDTH t1 10° , TIME (sec) 10 1(sec) 10 100 100 = 1000  1000<br>Figure 9. Maximum Safe Operating Area.  Figure 10. Single Pulse Maximum<br>Power Dissipation.<br>1<br>21 | SS [_purycycieescenpincoroerR] —a | — - D = 0.50.2 Aeeee| ||| I[l/ee| | {Tiff nc| [IiOO | Liu RθJA(t) = r(t) + RθJA ry<br>_ 0.1 [ | D=0.5 0.1 A a YY RθJA = 156°C/W TT]<br>2. 2 eerLl i il<br>0.05<br>P(pk)<br>0.02<br>Wua&FSN = 0.01 Fe E aaS 0 .01 02 0.01 SS Hf ieTeeTe ft eeeee t1 ty t2 ty | we |TT] FHTy |]<br>SINGLE PULSE TJ - TA = P * R θ JA(t)<br>= Son eT IMI | TI TT TTI ores<br>9 0.001 La Se || SINGLE PULSE  ee Ry, Zoyalt) = =156°C/iWrt) Duty Cycle, D = t x Resa 1  / t 2 Ha<br>es 0.0001 0.001 a 0.01 a 0.1 ee 1 ee 10 Peak T = Pow 100  X Zoya(t) #7, 1000 |<br>a a a es ee Duty Cycle Dati a I<br>coor LETTE FL EEEIT t1, TIME (sec) I<br>10° 10° 107 40" 4 10 100 1000<br>Figure 11. Transient Thermal Response Curve.  t, RECTANGULAR PULSE DURATION (sec)<br>Thermal characterization performed using the conditions described in Note 1b.<br>Transient themal response will change depending on the circuit board design.<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>-V<br>, DRAIN CURRENT (A)-ID<br>**----- End of picture text -----**<br>


FDC5614P Rev. 1.4 

**==> picture [491 x 668] intentionally omitted <==**

**----- Start of picture text -----**<br>
SYMM<br>CL<br>C 0.95 0.95<br>3.00<br>A<br>2.80<br>6 4 1.00 MIN<br>B<br>3.00<br>2.60<br>2.60<br>1.70<br>C<br>1.50<br>1 3<br>0.50<br>0.95<br>0.30<br>0.70 MIN<br>0.20 M A B<br>1.90<br>LAND PATTERN RECOMMENDATION<br>(0.30)<br>SEE DETAIL A<br>1.10 MAX<br>H<br>1.00<br>0.70<br>C<br>0.20<br>0.10 0.08<br>0.00 0.10 C NOTES: UNLESS OTHERWISE SPECIFIED<br>   A)  THIS PACKAGE CONFORMS TO JEDEC MO-193.<br>       VAR. AA, ISSUE E.<br>   B)  ALL DIMENSIONS ARE IN MILLIMETERS.<br>GAGE PLANE    C  PACKAGE LENGTH DOES NOT INCLUDE MOLD<br>FLASH,  PROTRUSIONS OR GATE BURRS. MOLD<br>FLASH, PROTRUSIONS OR GATE BURRS SHALL<br>NOT EXCEED 0.25mm PER END. PACKAGE WIDTH<br>0.25 DOES NOT INCLUDE INTERLEAD FLASH OR<br>PROTRUSION. INTERLEAD FLASH OR<br>8°<br>PROTRUSION SHALL NOT EXCEED 0.25mm PER<br>0°<br>SIDE. PACKAGE LENGTH AND WIDTH DIMENSIONS<br>ARE DETERMINED AT DATUM H.<br>0.55    D)  DRAWING FILE NAME: MKT-MA06AREVF<br>0.35 SEATING PLANE<br>0.60 REF<br>DETAIL A<br>SCALE: 50X<br>**----- End of picture text -----**<br>


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