# Power MOSFET, Trench, N Channel, 30 V, 6.1 A, 0.026 ohm, SuperSOT, Surface Mount ![Product image](https://novapart.co/image/farnell:2617741/) **URL**: https://novapart.co/products/FDC021N30/power-mosfet-trench-n-channel-30-v-61-a-0026-ohm **SKU**: FDC021N30 **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.1560 **Stock**: 10+ ## Specifications | Parameter | Value | |---|---| | No. Of Pins | 6Pins | | Channel Type | N Channel | | Power Dissipation | 1.6W | | Transistor Mounting | Surface Mount | | Transistor Polarity | N Channel | | Power Dissipation Pd | 1.6W | | Rds(On) Test Voltage | 10V | | On Resistance Rds(On) | 0.026ohm | | Transistor Case Style | SuperSOT | | Drain Source Voltage Vds | 30V | | Operating Temperature Max | 150°C | | Continuous Drain Current Id | 6.1A | | Drain Source On State Resistance | 0.026ohm | | Gate Source Threshold Voltage Max | 1.8V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2617741/) ## **Is Now Part of** **To learn more about ON Semiconductor, please visit our website at www.onsemi.com** ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. **June 2016** ## **FDC021N30** ## **N-Channel PowerTrench[®] MOSFET** **30 V, 6.1 A, 26 m** Ω **Features** Max rDS(on) = 26 mΩ at VGS = 10 V, ID = 6.1 A Max rDS(on) = 33 mΩ at VGS = 4.5 V, ID = 5.3 A High Performance Trench Technology for Extremely Low rDS(on) High Power and Current Handling Capability in a Widely Used Surface Mount Package Fast Switching Speed RoHS Compliant ## **General Description** This N-Channel PowerTrench MOSFET is produced using Fairchild’s advanced PowerTrench **[®]** process that has been especially tailored to minimize on-state resistance and yet maintain low gate charge for superior switching performance. ## **Applications** Load Switch Battery Protection Power Management **==> picture [316 x 83] intentionally omitted <==** **----- Start of picture text -----**
p
D D
D D
G S
nL :
**----- End of picture text -----**
**MOSFET Maximum Ratings** TA= 25°C unless otherwise noted. |**Symbol**
**Parameter**|**Ratings**|**Units**| |---|---|---| |VDS
Drain to Source Voltage|30|V| |VGS
Gate to Source Voltage(Note 3)|±20|V| |ID
-Continuous TA= 25°C(Note 1a)
-Pulsed(Note 4)|6.1
62|A| |PD
Power Dissipation(Note 1a)
Power Dissipation(Note 1b)|1.6
0.7|W| |TJ, TSTG
Operatingand Storage Junction Temperature Range|-55 to + 150|°C| |**Thermal Characteristics**||| |**Package Marking and Ordering Information**
RθJA
Thermal Resistance, Junction to Ambient(Note 1a)
RθJA
Thermal Resistance, Junction to Ambient(Note 1b)
~~—~~|78
175
|°C/W
°C/W
| **Device Marking Device Package Reel Size Tape Width Quantity** 21N FDC021N30 SSOT-6[TM] 7 ’’ 8 mm 3000 units ~~ee~~ ©2016 Fairchild Semiconductor Corporation **1** FDC021N30 Rev . 1.0 www.fairchildsemi.com ## **Electrical Characteristics** TJ = 25°C unless otherwise noted. |**Electrical Characteristics**TJ = 25°C unless otherwise noted.J = 25°C unless otherwise noted.= 25°C unless otherwise noted.|**Electrical Characteristics**TJ = 25°C unless otherwise noted.J = 25°C unless otherwise noted.= 25°C unless otherwise noted.| |---|---| |**Off Characteristics**
**On Characteristics**
**Dynamic Characteristics**
**Symbol**
**Parameter**
**Test Conditions**
**Min.**
**Typ.**
**Max.**
**Units**
BVDSS
Drain to Source Breakdown Voltage
ID= 250 μA, VGS= 0 V
30
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID= 250 μA, referenced to 25°C
16
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS= 24 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS= 20 V, VDS = 0 V
100
nA
VGS(th)
Gate to Source Threshold Voltage
VGS= VDS, ID= 250 μA
1.0
1.8
3.0
V
ΔVGS(th)
~~ΔT~~J
Gate to Source Threshold Voltage
Temperature Coefficient
ID= 250 μA, referenced to 25°C
-5
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS= 10 V, ID= 6.1 A
19
26
mΩ
VGS= 4.5 V, ID= 5.3 A
23
33
VGS= 10 V, ID= 6.1 A,
TJ = 125°C
26
37
gFS
Forward Transconductance
VDS= 5 V, ID= 6.1 A
30
S
Ciss
Input Capacitance
VDS= 15 V, VGS= 0 V,
f = 1 MHz
510
710
pF
Coss
Output Capacitance
170
240
pF
Crss
Reverse Transfer Capacitance
22
30
pF
Rg
Gate Resistance
0.1
1.3
2.6
Ω
~~Sees~~
~~————~~|| |**Switching Characteristics**|| |td(on)
Turn-On DelayTime
VDD= 15 V, ID= 6.1 A,
VGS= 10 V, RGEN= 6 Ω
6
12
ns
tr
Rise Time
2
10
ns
td(off)
Turn-Off DelayTime
13
24
ns
tf
Fall Time
2
10
ns
Qg(TOT)
Total Gate Charge
VGS= 0 V to 10 V
VDD= 15 V,
ID= 6.1 A
7.7
10.8
nC
Qg(TOT)
Total Gate Charge
VGS= 0 V to 4.5 V
3.7
5.2
nC
Qgs
Gate to Source Charge
1.4
nC
Qgd
Gate to Drain “Miller” Charge
1.1
nC
~~eee~~
~~—————~~|| |**Drain-Source Diode Characteristics**|| |VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, IS = 6.1 A(Note 2)
0.8
1.2
V
trr
Reverse RecoveryTime
IF= 6.1 A, di/dt = 100 A/μs
14
25
ns
Qrr
Reverse RecoveryCharge
3
10
nC
~~————~~|| |**Notes:**|| |1: RθJAis the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.|| |RθJCis guaranteed by design while RθCAis determined by the user’s board design.|| **==> picture [345 x 83] intentionally omitted <==** **----- Start of picture text -----**
a. 78 °C/W when mounted on b.175 °C/W when mounted on
a 1 in [2 ] pad of 2 oz copper a minimum pad of 2 oz copper
G DF DS SF SS
G DF DS SF SS
**----- End of picture text -----**
- 2: Pulse Test: Pulse Width<300 us, Duty Cycle<2.0%. 3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied. 4. Pulsed Id please refer to Fig 11 SOA graph for more details. www.fairchildsemi.com ©2016 Fairchild Semiconductor Corporation FDC021N30 Rev . 1.0 **2** ## **Typical Characteristics** TJ = 25 °C unless otherwise noted. **==> picture [454 x 558] intentionally omitted <==** **----- Start of picture text -----**
35 8
VGS = 10 V PULSE DURATION = 80 μ s
30 VGS = 4.5 V DUTY CYCLE = 0.5% MAX
VGS = 4 V 6 VGS = 3 V
25
VGS = 3.5 V
20
VGS = 3.5 V 4
15
10 VGS = 4 V
2
5 V GS = 3 V PULSE DURATION = 80 μ s
DUTY CYCLE = 0.5% MAX VGS = 4.5 V VGS = 10 V
0 0
0 1 2 3 4 5 0 7 14 21 28 35
VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics Figure 2. Normalized On-Resistance
vs. Drain Current and Gate Voltage
1.5 150
ID = 6.1 A PULSE DURATION = 80 μ s
1.4 V GS = 10 V DUTY CYCLE = 0.5% MAX
1.3 ID = 6.1 A
100
1.2
1.1
1.0
50
0.9 TJ = 125 [o] C
0.8
TJ = 25 [o] C
0.7 0
-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On- Resistance Figure 4. On-Resistance vs. Gate to
vs. Junction Temperature Source Voltage
35 40
PULSE DURATION = 80 μ s VGS = 0 V
DUTY CYCLE = 0.5% MAX 10
28
VDS = 5 V TJ = 150 [o] C
1
21
TJ = 150 [o] C 0.1 TJ = 25 [ o] C
14
TJ = 25 [o] C
7 0.01 TJ = -55 [o] C
TJ = -55 [o] C
0 0.001
0 1 2 3 4 5 0.0 0.2 0.4 0.6 0.8 1.0 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode
NORMALIZED
, DRAIN CURRENT (A)
ID
DRAIN TO SOURCE ON-RESISTANCE
) Ω
(m
DRAIN TO
NORMALIZED rDS(on),
SOURCE ON-RESISTANCE
DRAIN TO SOURCE ON-RESISTANCE
, DRAIN CURRENT (A)
ID
, REVERSE DRAIN CURRENT (A)
IS
**----- End of picture text -----**
**Figure 6. Source to Drain Diode Forward Voltage vs. Source Current** www.fairchildsemi.com ©2016 Fairchild Semiconductor Corporation FDC021N30 Rev . 1.0 **3** **Typical Characteristics** TJ = 25 °C unless otherwise noted. **==> picture [463 x 595] intentionally omitted <==** **----- Start of picture text -----**
10 1000
ID = 6.1 A
8 C iss
VDD = 15 V
6
VDD = 10 V 100 Coss
VDD = 20 V
4
2
f = 1 MHz
VGS = 0 V Crss
0 10
0 2 4 6 8 0.1 1 10 30
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs. Drain
to Source Voltage
20 5
4
10
TJ = 25 [ o] C VGS = 10 V
3
TJ = 100 [o] C
2
VGS = 4.5 V
1
TJ = 125 [o] C
R θ JA = 175 [o] C/W
1 0
0.001 0.01 0.1 1 10 25 50 75 100 125 150
tAV, TIME IN AVALANCHE (ms) TA, AMBIENT TEMPERATURE (oC)
Figure 9. Unclamped Inductive Figure 10. Maximum Continous Drain Current
Switching Capability vs. Ambient Temperature
100 10000
THIS AREA IS
SINGLE PULSE
LIMITED BY r DS(on) 10 μ s 1000 R θ JA = 175 [o] C/W
10 TA = 25 [o] C
100
100 μ s
1
1 ms 10
10 ms
SINGLE PULSE
0.1 TJ = MAX RATED 1 100 ms s 1
R θ JA = 175 [ o] C/W CURVE BENT TO 10 s
TA = 25 [o] C MEASURED DATA DC
0.01 0.1
0.01 0.1 1 10 100200 10-5 10-4 10-3 10-2 10-1 1 10 100 1000
VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum
Operating Area Power Dissipation
CAPACITANCE (pF)
, GATE TO SOURCE VOLTAGE (V)
GS
V
DRAIN CURRENT (A)
,
ID
, AVALANCHE CURRENT (A)
IAS
, DRAIN CURRENT (A)
ID
PEAK TRANSIENT POWER (W)
,
(PK)
P
**----- End of picture text -----**
www.fairchildsemi.com ©2016 Fairchild Semiconductor Corporation FDC021N30 Rev . 1.0 **4** **==> picture [457 x 201] intentionally omitted <==** **----- Start of picture text -----**
Typical Characteristics TJ = 25 °C unless otherwise noted.
2
1 DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1 0.1
0.05 PDM
0.02
0.01
0.01 t1
t2
NOTES:
0.001 SINGLE PULSE Z θ JA(t) = r(t) x R θ JA
R θ JA = 175 [o] C/W
Peak TJ = PDM x Z θ JA(t) + TA
Duty Cycle, D = t1 / t2
0.0001
10-5 10-4 10-3 10-2 10-1 1 10 100 1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
THERMAL RESISTANCE
r(t), NORMALIZED EFFECTIVE TRANSIENT
**----- End of picture text -----**
www.fairchildsemi.com ©2016 Fairchild Semiconductor Corporation FDC021N30 Rev . 1.0 **5** ## **Dimensional Outline and Pad Layout** **==> picture [389 x 448] intentionally omitted <==** **----- Start of picture text -----**
SYMM
CL
0.95 0.95
3.00
A
2.80
6 4 1.00 MIN
B
3.00
2.60
2.60
1.70
1.50
1 3
0.50
0.95
0.30
0.20 M A B 0.70 MIN
1.90
(0.30) LAND PATTERN RECOMMENDATION
1.10 MAX
SEE DETAIL A
1.00
0.70
C
0.10
0.00 0.10 C 0.20
0.08
GAGE PLANE NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC MO-193.
VAR. AA, ISSUE C, DATED JANUARY 2000.
0.25 B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONING AND TOLERANCING
PER ASME Y14.5M - 2009.
D) DRAWING FILE NAME: MKT-MA06AREV5
0.55
0.35 SEATING PLANE
0.60 REF
DETAIL A
SCALE: 50X
**----- End of picture text -----**
_Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products._ www.fairchildsemi.com ©2016 Fairchild Semiconductor Corporation FDC021N30 Rev . 1.0 **6** ## **TRADEMARKS** The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. AccuPower™ F-PFS™ OPTOPLANAR[®] ®* AttitudeEngine™ FRFET[®] [Eceveaa Awinda[®] Global Power Resource[SM] tm[®] AX-CAP[®] * GreenBridge™ Power Supply WebDesigner™ TinyBoost[®] BitSiC™ Green FPS™ PowerTrench[®] TinyBuck[®] Build it Now™ Green FPS™ e-Series™ PowerXS™ TinyCalc™ CorePLUS™ G _max_ ™ Programmable Active Droop™ TinyLogicTINYOPTO™[®] CorePOWER™ GTO™ QFET[®] _CROSSVOLT_ ™ IntelliMAX™ QS™ TinyPower™ CTL™ ISOPLANAR™ Quiet Series™ TinyPWM™ TinyWire™ Current Transfer Logic™DEUXPEED[®] Marking Small Speakers Sound Louder and Better™ RapidConfigure™™ TranSiC™ TriFault Detect™ Dual Cool™ MegaBuck™ ©) TRUECURRENT[®] * EcoSPARKEfficentMax™[®] MICROCOUPLER™MicroFET™ Saving our world, 1mW/W/kW at a time™SignalWise™ μSerDes™ ESBC™ MicroPak™ SmartMax™ ® MicroPak2™ SMART START™ MillerDrive™ Solutions for Your Success™ UHC[®] ~~-~~ "Z4.... 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Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. ## **PRODUCT STATUS DEFINITIONS** |**Definition of Terms**||| |---|---|---| |**Datasheet Identification**|**Product Status**|**Definition**| |Advance Information|Formative / In Design|Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.| |Preliminary|First Production|Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.| |No Identification Needed|Full Production|Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.| |Obsolete|Not In Production|Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.| Rev. I77 **7** www.fairchildsemi.com ©2016 Fairchild Semiconductor Corporation FDC021N30 Rev . 1.0 **==> picture [491 x 668] intentionally omitted <==** **----- Start of picture text -----**
SYMM
CL
C 0.95 0.95
3.00
A
2.80
6 4 1.00 MIN
B
3.00
2.60
2.60
1.70
C
1.50
1 3
0.50
0.95
0.30
0.70 MIN
0.20 M A B
1.90
LAND PATTERN RECOMMENDATION
(0.30)
SEE DETAIL A
1.10 MAX
H
1.00
0.70
C
0.20
0.10 0.08
0.00 0.10 C NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC MO-193.
VAR. AA, ISSUE E.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
GAGE PLANE C PACKAGE LENGTH DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH, PROTRUSIONS OR GATE BURRS SHALL
NOT EXCEED 0.25mm PER END. PACKAGE WIDTH
0.25 DOES NOT INCLUDE INTERLEAD FLASH OR
PROTRUSION. INTERLEAD FLASH OR
8°
PROTRUSION SHALL NOT EXCEED 0.25mm PER
0°
SIDE. PACKAGE LENGTH AND WIDTH DIMENSIONS
ARE DETERMINED AT DATUM H.
0.55 D) DRAWING FILE NAME: MKT-MA06AREVF
0.35 SEATING PLANE
0.60 REF
DETAIL A
SCALE: 50X
**----- End of picture text -----**
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