# Power MOSFET, N Channel, 150 V, 169 A, 0.0063 ohm, H-PSOF, Surface Mount ![Product image](https://novapart.co/image/farnell:3253677/) **URL**: https://novapart.co/products/FDBL0630N150/power-mosfet-n-channel-150-v-169-a-00063-ohm-h **SKU**: FDBL0630N150 **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €2.7100 **Stock**: 200+ **Lead Time**: 141 days (indicative) ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | Lead (25-Jun-2025) | | No. Of Pins | 8Pins | | Channel Type | N Channel | | Product Range | PowerTrench | | Qualification | - | | Power Dissipation | 500W | | Transistor Mounting | Surface Mount | | Rds(On) Test Voltage | 10V | | Transistor Case Style | H-PSOF | | Drain Source Voltage Vds | 150V | | Operating Temperature Max | 175°C | | Continuous Drain Current Id | 169A | | Drain Source On State Resistance | 0.0063ohm | | Gate Source Threshold Voltage Max | 2.8V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:3253677/) ## FDBL0630N150 MOSFET – N-Channel, POWERTRENCH ® ## 150 V, 169 A, 6.3 m ## **Features** ## **www.onsemi.com** - Typ rDS(on) = 5 m Q at VGS = 10 V, ID = 80 A - Typ Qg(tot) = 70 nC at VGS = 10 V, ID = 80 A - UIS Capability - This Device is Pb−Free and is RoHS Compliant ## **Applications** - Industrial Motor Drive - Industrial Power Supply - Industrial Automation - Battery Operated tools - Battery Protection - Solar Inverters - UPS and Energy Inverters |**VDSS**
~~es~~|**rDS(ON) MAX**
~~ee~~|**ID MAX**| |---|---|---| |150 V
~~es~~|6.3 m @ 10 V
~~ee~~|169 A| **==> picture [70 x 86] intentionally omitted <==** **----- Start of picture text -----**
D
G
S
**----- End of picture text -----**
**MOSFET — N−Channel** - Energy Storage - Load Switch **MAXIMUM RATINGS** (TJ = 25 ° C, unless otherwise specified) |**MAXIMUM RATINGS**|**MAXIMUM RATINGS**(TJ = 25J = 25= 25°C, unless otherwise specified)|C, unless otherwise specified)|| |---|---|---|---| |**Symbol**
~~ee~~|**Parameter**|**Ratings**|**Unit**| |VDSS
~~ee~~|Drain to Source Voltage|150|V| |VGS
~~ee~~
~~aEee~~|Gate to Source Voltage
~~Eee~~|±20
~~Eee~~|V
~~Eee~~| |ID
~~Eee~~|Drain Current − Continuous (VGS= 10 V)
(Note 1)
TC= 25°C
~~Eee~~|169
~~Eee~~|A
~~Eee~~| ||Pulsed Drain Current
TC= 25°C
~~Eee~~|See Figure 4
~~Eee~~|| |EAS
~~Eee~~
~~a~~
~~ee~~|Single Pulse Avalanche Energy (Note 2)
~~Eee~~
~~ee~~|502
~~Eee~~
~~ee~~|mJ
~~Eee~~
~~ee~~| |PD
~~a~~
~~ee~~
~~ns~~|Power Dissipation
~~ee~~
~~es~~|500
~~ee~~
~~ee~~|W
~~ee~~| ||Derate above 25°C
~~ee~~
~~es~~|3.3
~~ee~~
~~ee~~|W/°C
~~ee~~| |TJ, TSTG
~~ns~~|Operating and Storage Temperature
~~es~~|−55 to +175
~~ee~~|°C| |R JC
~~ns~~|Thermal Resistance Junction to Case
~~es ~~|0.3
~~ee~~|°C/W| |R JA|Maximum Thermal Resistance Junction
to Ambient (Note 3)|43|°C/W| Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. **H−PSOF8L 11.68x9.80 CASE 100CU** **MARKING DIAGRAM** ~~=|~~ | ~~|~~ $Y&Z&3&K FDBL 0630N150 ~~|~~ **==> picture [159 x 49] intentionally omitted <==** **----- Start of picture text -----**
$Y = ON Semiconductor Logo
&Z = Assembly Plant Code
&3 = Date Code
&K = Lot Run Traceability Code
FDBL0630N150 = Specific Device Code
**----- End of picture text -----**
1. Current is limited by junction temperature. 2. Starting TJ = 25 ° C, L = 0.24 mH, IAS = 64 A, VDD = 100 V during inductor charging and VDD = 0 V during time in avalanche. 3. R 0 JA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θ JC is guaranteed by design while R 0 JA is determined by the user’s board design. The maximum rating presented here is based on mounting on a 1 in[2] pad of 2 oz copper. ## **ORDERING INFORMATION** See detailed ordering and shipping information on page 6 of this data sheet. Publication Order Number: **FDBL0630N150/D** **1** © Semiconductor Components Industries, LLC, 2014 **June, 2019 − Rev. 3** **FDBL0630N150** **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) |**ELECTRI**|**CAL CHARACTERISTICS**(TJ= 2|5°C unless otherwise noted)|5°C unless otherwise noted)||||| |---|---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**| |**OFF CHARACTERISTICS**|||||||| |BVDSS|Drain to Source Breakdown Voltage|ID= 250�A, VGS= 0 V||150|−|−|V| |IDSS|Drain to Source Leakage Current|VDS= 150 V, VGS= 0 V|TJ= 25°C|−|−|1|�A| ||||TJ= 175°C (Note 4)|−|−|1|mA| |IGSS|Gate to Source Leakage Current|VGS=±20 V||−|−|±100|nA| |**ON CHARACTERISTICS**|||||||| |VGS(th)|Gate to Source Threshold Voltage|VGS= VDS, ID= 250�A||2.0|2.8|4.0|V| |rDS(on)|Drain to Source On Resistance|ID= 80 A, VGS= 10 V|TJ= 25°C|−|5|6.3|m�| ||||TJ= 175°C (Note 4)|−|14|17.5|m�| |**DYNAMIC**|**CHARACTERISTICS**||||||| |Ciss|Input Capacitance|VDS= 75V, VGS= 0V, f|= 1 MHz|−|5805|−|pF| |Coss|Output Capacitance|||−|536|−|pF| |Crss|Reverse Transfer Capacitance|||−|16|−|pF| |Rg|Gate Resistance|f = 1 MHz||−|2.2|−|�| |Qg(ToT)|Total Gate Charge at 10 V|VGS= 0 to 10 V, VDD=|75 V, ID= 80 A|−|70|90|nC| |Qg(th)|Threshold Gate Charge|VGS= 0 to 2 V, VDD= 75 V, ID= 80 A||−|10.5|13|nC| |Qgs|Gate to Source Gate Charge|VDD= 75 V, ID= 80 A||−|32.5|−|nC| |Qgd|Gate to Drain “Miller” Charge|VDD= 75 V, ID= 80 A||−|10|−|nC| |**SWITCHING CHARACTERISTICS**|||||||| |ton|Turn−On Time|VDD= 75 V, ID= 80 A, VGS= 10 V, RGEN= 6�||−|−|80|ns| |td(on)|Turn−On Delay Time|||−|39|−|ns| |tr|Rise Time|||−|30|−|ns| |td(off)|Turn−Off Delay Time|||−|70|−|ns| |tf|Fall Time|||−|23|−|ns| |toff|Turn−Off Time|||−|−|130|ns| |**DRAIN−SOURCE DIODE CHARACTERISTICS**|||||||| |VSD|Source to Drain Diode Voltage|ISD= 80 A, VGS= 0 V||−|−|1.25|V| |||ISD= 40 A, VGS= 0 V||−|−|1.2|V| |Trr|Reverse Recovery Time|IF= 80 A, dISD/dt = 100 A/�s, VDD= 120 V||−|108|125|ns| |Qrr|Reverse Recovery Charge|||−|323|467|nC| Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. The maximum value is specified by design at TJ = 175 ° C. Product is not tested to this condition in production. **www.onsemi.com** **2** **FDBL0630N150** ## **TYPICAL CHARACTERISTICS** **==> picture [423 x 581] intentionally omitted <==** **----- Start of picture text -----**
1.2 200
1.0
160
0.8
120
0.6
80
0.4
40
0.2
0.0 0
0 25 50 75 100 125 150 175 25 50 75 100 125 150 175 200
TC, CASE TEMPERATURE( ° C) TC, CASE TEMPERATURE(C, CASE TEMPERATURE(, CASE TEMPERATURE( ° C)
Figure 1. Normalized Power Dissipation vs. Figure 2. Maximum Continuous Drain Current vs.
Case Temperature Case Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
D = 0.50
0.20
PDM
0.10
0.05
0.1 0.02 t1
0.01 t2
NOTES:
SINGLE PULSE DUTY FACTOR: D = t 1 / t 2
PEAK T J = P DM x Z � JA x R � JA + T C
0.01
10 [−5] 10 [−4] 10 [−3] 10 [−2] 10 [−1] 10 [0] 10 [1]
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
10000
VGS = 10 V TC = 25 ° C
FOR TEMPERATURES
ABOVE 25 ° C DERATE PEAK
CURRENT AS FOLLOWS:
1000
175 � TC
I � I2 �� 150 �
100
SINGLE PULSE
10
10 [−5] 10 [−4] 10 [−3] 10 [−2] 10 [−1] 10 [0] 10 [1]
t, RECTANGULAR PULSE DURATION (s)
, DRAIN CURRENT (A)
IDD
POWER DISSIPATION MULTIPLIER
JC
�
IMPEDANCE, Z
NORMALIZED THERMAL
, PEAK CURRENT (A)
IDM
**----- End of picture text -----**
**==> picture [201 x 154] intentionally omitted <==** **----- Start of picture text -----**
200
160
120
80
40
0
25 50 75 100 125 150 175 200
TC, CASE TEMPERATURE(C, CASE TEMPERATURE(, CASE TEMPERATURE( ° C)
, DRAIN CURRENT (A)
IDD
**----- End of picture text -----**
**Figure 2. Maximum Continuous Drain Current vs. Case Temperature** **Figure 4. Peak Current Capability** **www.onsemi.com** **3** **FDBL0630N150** ## **TYPICAL CHARACTERISTICS** (continued) **==> picture [196 x 154] intentionally omitted <==** **----- Start of picture text -----**
1000
100
10 100 � s
OPERATION IN THIS
AREA MAY BE
1 LIMITED BY r DS(on) 1 ms
SINGLE PULSE
TJ = MAX RATED 10 ms
T C = 25 ° C 100 ms
0.1
1 10 100
VDS, DRAIN TO SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
ID
**----- End of picture text -----**
**Figure 5. Forward Bias Safe Operating Area** **==> picture [197 x 369] intentionally omitted <==** **----- Start of picture text -----**
200
PULSE DURATION = 80 � s
DUTY CYCLE = 0.5% MAX
160 VDD = 5 V
120
TJ = 175 ° C
80
40 TJ = 25 ° C TJ = −55 ° C
0
2 3 4 5 6 7 8
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 7. Transfer Characteristics
300
VGS
250 15 V Top
10 V
200 8 V
7 V
150 6 V
5.5 V
100 5 V Bottom
50 5 V
80 � s PULSE WIDTH
Tj = 25 ° C
0
0 1 2 3 4 5
VDS, DRAIN TO SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
ID
, DRAIN CURRENT (A)
ID
**----- End of picture text -----**
**Figure 9. Saturation Characteristics** **==> picture [207 x 592] intentionally omitted <==** **----- Start of picture text -----**
1000 If R = 0
tAV = (L)(IAS) / (1.3 * RATED BVDSS − VDD)
If R ≠ 0
tAV = (L / R) ln [(IAS * R) / (1.3 * RATED BVDSS − VDD) + 1]
100
STARTING TJ = 25 ° C
10
STARTING TJ = 150 ° C
1
0.001 0.01 0.1 1 10 100 1000 10000
tAV, TIME IN AVALANCHE (ms)
NOTE: Refer to ON Semiconductor Application
Notes AN7514 and AN7515
Figure 6. Unclamped Inductive Switching
Capability
400
VGS = 0 V
100
10 TJ = 175 ° C
TJ = 25 ° C
1
0.1
0.0 0.2 0.4 0.6 0.8 1.0 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 8. Forward Diode Characteristics
300
VGS
15 V Top
250
10 V
8 V
200 7 V
6 V
150 5.5 V
5 V Bottom
100 5 V
50 80 � s PULSE WIDTH
Tj = 175 ° C
0
0 1 2 3 4 5
VDS, DRAIN TO SOURCE VOLTAGE (V)
, AVALANCHE CURRENT (A)
IAS
, REVERSE DRAIN CURRENT (A)
IS
, DRAIN CURRENT (A)
ID
**----- End of picture text -----**
**Figure 10. Saturation Characteristics** **www.onsemi.com** **4** **FDBL0630N150** ## **TYPICAL CHARACTERISTICS** (continued) **==> picture [215 x 368] intentionally omitted <==** **----- Start of picture text -----**
50
ID = 80 A PULSE DURATION = 80 � s
DUTY CYCLE = 0.5% MAX
40
30
20 TJ = 175 ° C
10
TJ = 25 ° C
0
2 4 6 8 10
VG , GATE TO SOURCE VOLTAGE (V)
Figure 11. Rdson vs. Gate Voltage
1.5
VGS = VDS
ID = 250 � A
1.2
0.9
0.6
0.3
0.0
−80 −40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE ( ° C)
) �
m
, DRAIN TO SOURCE
ON−RESISTANCE (
rDS(on)
NORMALIZED GATE
THRESHOLD VOLTAGE
**----- End of picture text -----**
**Figure 13. Normalized Gate Threshold Voltage vs. Temperature** **==> picture [215 x 369] intentionally omitted <==** **----- Start of picture text -----**
3.0
PULSE DURATION = 80 � s
2.5 DUTY CYCLE = 0.5% MAX
2.0
1.5
1.0
0.5 I D = 80 A
VGS = 10 V
0.0
−80 −40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE ( ° C)
Figure 12. Normalized Rdson vs.
Junction Temperature
1.10
ID = 1 mA
1.05
1.00
0.95
0.90
−80 −40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE ( ° C)
NORMALIZED DRAIN TO
SOURCE ON−RESISTANCE
BREAKDOWN VOLTAGE
NORMALIZED DRAIN TO SOURCE
**----- End of picture text -----**
**Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature** **==> picture [206 x 154] intentionally omitted <==** **----- Start of picture text -----**
10000
Ciss
1000
C oss
100
10
Crss
f = 1 MHz
V GS = 0 V
1
0.1 1 10 100 200
VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
**----- End of picture text -----**
**Figure 15. Capacitance vs Drain to Source Voltage** **==> picture [201 x 160] intentionally omitted <==** **----- Start of picture text -----**
10
ID = 80 A VDD = 60 V
8 VDD = 75 V
VDD = 90 V
6
4
2
0
0 20 40 60 80
Qg, GATE CHARGE (nC)
, GATE TO SOURCE VOLTAGE(V)
GS
V
**----- End of picture text -----**
**Figure 16. Gate Charge vs Gate to Source Voltage** **www.onsemi.com** **5** **FDBL0630N150** ## **ORDERING INFORMATION** |**ORDERING INFORMATION**|||| |---|---|---|---| |**Device**|**Device Marking**|**Package**|**Shipping**†| |FDBL0630N150|FDBL0630N150|H−PSOF8L 11.68x9.80
(Pb−Free)|2000 / Tape & Reel| - †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. **www.onsemi.com** **6** MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** **H−PSOF8L 11.68x9.80** CASE 100CU ISSUE O DATE 30 NOV 2016 **==> picture [116 x 59] intentionally omitted <==** **==> picture [41 x 33] intentionally omitted <==** **==> picture [48 x 46] intentionally omitted <==** **==> picture [45 x 47] intentionally omitted <==** **==> picture [143 x 51] intentionally omitted <==** **==> picture [217 x 147] intentionally omitted <==** **==> picture [59 x 68] intentionally omitted <==** **==> picture [204 x 154] intentionally omitted <==** **DOCUMENT NUMBER: 98AON13813G** Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed **STATUS: ON SEMICONDUCTOR STANDARD** versions are uncontrolled except when stamped “CONTROLLED COPY” in red. ~~**NEW STANDARD:**~~ © Semiconductor Components Industries, LLC, 2002 **http://onsemi.com** Case Outline Number: **October, 2002 − Rev. 0DESCRIPTION: H−PSOF8L 11.68x9.80 1 PAGE 1 OF 2XXX** |**DOCUMENT NUMBER:**
**98AON13813G**
**PAGE 2 OF 2**
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**98AON13813G**
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**DATE**| |O|RELEASED FOR PRODUCTION FROM FAIRCHILD TO263D02 TO ON SEMICON-
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