# EMI Filter, 6-Channel, MicroSD, ESD Protection,  MHz, FlipChip-17

![Product image](https://novapart.co/image/farnell:2400802/)

**URL**: https://novapart.co/products/EMIF06-HSD03F3/emi-filter-6-channel-microsd-esd-protection-mhz
**SKU**: EMIF06-HSD03F3
**Manufacturer**: STMICROELECTRONICS
**Category**: Passive Components || Filters || Integrated Passive Filters
**Price**: €0.2030
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 17Pins |
| Product Range | EMIF0 |
| Filter Circuit | C-R-C Pi Filter |
| Emi Filter Type | EMI Filter with ESD Protection |
| Filter Case Style | Flip-Chip |
| No. Of Data Lines | 6 Data Lines |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2400802/)

## **EMIF06-HSD03F3** 

## EMI filter with integrated ESD protection for micro-SD Card™ 

 **Datasheet production data** 

## **Features** 

- Very low line capacitance to compensate long PCB tracks (2.5 pF typ.) 

- High efficiency in ESD suppression up to 18 kV (IEC 61000-4-2) 

- Very low PCB space consumption: 

   - 1.1 x 2.4 mm 

- Ultralow leakage current: 20 nA max. 

- Very thin package: 0.605 mm 

**==> picture [74 x 19] intentionally omitted <==**

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Flip-Chip package<br>(17 bumps)<br>**----- End of picture text -----**<br>


**Figure 1. Pin configuration (bump side)** 

- Smart pinout for easier PCB layout 

- High reduction of parasitic elements through integration and wafer level packaging 

- Lead-free package 

- Complies with the following standards: 

   - IEC 61000-4-2 level 4:±15 kV (air discharge), ±8 kV (contact discharge) 

## **Application** 

- SD3.0, UHS-1 SDR104 (208 MHz) 

## **Description** 

## **Figure 2. Functional schematic** 

**==> picture [196 x 98] intentionally omitted <==**

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L = 1 nH R = 1 Ω<br>Ix Ox<br>CLINE = 2.5 pF<br>DE T VCC<br>**----- End of picture text -----**<br>


The EMIF06-HSD03F3 chip is a highly integrated device designed to suppress EMI/RFI noise for interface line filtering. 

The EMIF06-HSD03F3 Flip-Chip packaging means the package size is equal to the die size. That’s why EMIF06-HSD03F3 is a very small device. Additionally, this filter includes ESD protection circuitry, which prevents damage to the protected device when subjected to ESD surges up 18 kV. 

October 2016 

This is information on a product in full production. 

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_www.st.com_ 

**EMIF06-HSD03F3** 

**Application diagram** 

## **1 Application diagram** 

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Figure 3. Schema<br>**----- End of picture text -----**<br>


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Vcc<br>Top layer<br>Second layer<br>DAT2DAT3CMDCLKVCCGND contacts face downµSD card I4I5I3I1I2I6 GNDGNDGNDDETVcc O1O3O2O5O6O4 CPU<br>DAT0<br>DAT1<br>µSD card<br>contacts spring<br>DET<br>Maximum distance = 50 mm<br>**----- End of picture text -----**<br>


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**EMIF06-HSD03F3** 

**Characteristics** 

## **2 Characteristics** 

**Table 1. Absolute maximum ratings (Tamb = 25 °C)** 

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Symbol Parameter Value Unit<br>ESD discharge IEC 61000-4-2, level 4 for Ix pins:<br>Air discharge 18<br>Contact discharge 18<br>VPP ESD discharge IEC 61000-4-2, level 1 for Ox pins:  kV<br>Air discharge 10<br>Contact discharge 10<br>Tj Maximum junction temperature 125 °C<br>TOP Operating temperature range - 30 to + 85 °C<br>Tstg Storage temperature range - 55 to +150 °C<br>i<br>Figure 4. Electrical characteristics (definitions)<br>I<br>IF<br>Symbol     Parameter<br>VBR =        Breakdown voltage<br>IRM =        Leakage current at VRM VF<br>VRM =        Stand-off voltage VCLVBR VRM<br>V<br>VCL =        Clamping voltage IRM<br>IPP =        Peak pulse current<br>Rd =        Dynamic resistance<br>Cline =        Line capacitance Slope: 1/Rd<br>RI/O = Series resistance between IPP<br>input and ouptput<br>**----- End of picture text -----**<br>


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**Characteristics** 

**EMIF06-HSD03F3** 

**Table 2. Electrical characteristics (Tamb = 25 °C)** 

|**Symbol**<br>~~a~~|**Test conditions**<br>~~a~~|**Test conditions**<br>~~a~~|**Min.**<br>~~a~~|**Typ.**<br>~~a~~|**Max.**<br>~~a~~|**Unit**<br>~~a~~|
|---|---|---|---|---|---|---|
|VBR<br>~~a~~|Data lines, IR= 1 mA<br>~~a~~||5<br>~~a~~|~~a~~|9<br>~~a~~|V<br>~~a~~|
|IRM<br>~~a~~<br>~~a~~|VRM= 3 V per line<br>~~a~~<br>~~a~~||~~a~~<br>~~a~~|~~a~~<br>~~a~~|20<br>~~a~~<br>~~a~~|nA<br>~~a~~<br>~~a~~|
|RI/O<br>~~a~~|~~a~~||~~a~~|1<br>~~a~~|~~a~~|Ω<br>~~a~~|
|Cline<br>~~RO~~|Vline= 0 V, Vosc= 30 mV, F = 1 MHz<br>~~RO~~||~~RO~~|2.5<br>~~RO~~|3<br>~~RO~~|pF<br>~~RO~~|
|L<br>~~a~~||||1<br>||nH<br>|
|Rd<br>~~o~~|Dynamics resistance, tP= 100 ns<br>~~o~~|IO-GND (positive polarity)<br>~~o~~~~**e**~~|~~**e**~~<br>~~ee~~|650<br>~~**e**~~<br>~~ee~~|~~**e**~~<br>~~ee~~|mΩ<br>~~**e**~~<br>~~ee~~|
|||GND-IO (negative polarity)<br>~~o~~~~**e**~~<br>~~e~~|~~**e**~~<br>~~e~~<br>~~ee~~|320<br>~~**e**~~<br>~~e~~<br>~~ee~~|~~**e**~~<br>~~e~~<br>~~ee~~||
|**VCC**<br>~~o~~~~**e**~~<br>~~e~~<br>~~ee ee~~<br>~~pT~~|||||||
|VBR<br>~~a~~|IR= 1 mA<br>||5<br>||9<br>|V<br>|
|IRM<br>~~RO~~|VRM= 3 V<br>~~RO~~||~~RO~~|~~RO~~|20<br>~~RO~~|nA<br>~~RO~~|
|Cline<br>~~a~~|Vline= 0 V, Vosc= 30 mV, F = 1 MHz<br>|||40<br>||pF<br>|
|**DET**<br>~~pT~~|||||||
|VBR<br>~~a~~|IR= 1 mA<br>~~a~~||5<br>~~a~~|~~a~~|9<br>~~a~~|V<br>~~a~~|
|IRM<br>~~a~~<br>~~a~~|VRM= 3 V<br>~~a~~<br>~~a~~||~~a~~<br>~~a~~|~~a~~<br>~~a~~|20<br>~~a~~<br>~~a~~|nA<br>~~a~~<br>~~a~~|
|Cline<br>~~a~~|Vline= 0 V, Vosc= 30 mV, F = 1 MHz<br>~~a~~||~~a~~|40<br>~~a~~|~~a~~|pF<br>~~a~~|



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**Characteristics** 

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Figure 5. Attenuation versus frequency<br>IX, OX<br>S21(dB)<br>0.00<br>- 1.00<br>- 2.00 To oo<br>20<br>- 3.00<br>20<br>- 4.00<br>- 5.00 2 1 0A<br>- 6.00<br>ca<br>- 7.00<br>2 0<br>- 8.00 0<br>- 9.00 F(Hz)<br>-10.00 CHF00A HC<br>A<br>100.0 k 1.0 M 10.0 M 100.0 M 1.0 G<br>I6 I2 I4<br>I3 I1 I5<br>**----- End of picture text -----**<br>


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Figure 6. Attenuation versus frequency<br>VCC, DET<br>**----- End of picture text -----**<br>


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S21(dB)<br>0.00<br>T IN]<br>IN<br>-7.50<br>i<br>-15.0 0 YA AV ATIANlYiv<br>i<br>-22.5 0<br>F(Hz)<br>-30.0 0<br>100.0k 1.0M 10.0M 100.0M 1.0G<br>VCC DET<br>**----- End of picture text -----**<br>


**Figure 7. ESD response to IEC 61000-4-2 (+8 kV contact discharge)** 

**Figure 8. ESD response to IEC 61000-4-2 (-8 kV contact discharge)** 

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10.0 V / Div<br>**----- End of picture text -----**<br>


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20.0 V / Div 10.0 V / Div<br>1 109.6 V<br>1 VCL: Peak clamping voltage<br>2 VCL :clamping voltage @ 30 ns<br>3 VCL :clamping voltage @ 60 ns<br>ye 4 VCL :clamping voltage @ 100 ns e 2 -5.1 V e 3 -4.1 V °° 4 -2.4 V<br>1 VCL: Peak clamping voltage<br>SBRPBALT | Srvare ae, 8 TR RR REST STIS PEE APRS e@ 2 VCL :clamping voltage @ 30 ns<br>3 VCL :clamping voltage @ 60 ns<br>2 19.2 V 4 6.6 V 4 VCL :clamping voltage @ 100 ns<br>e’ 3 13.9 V © | 20 ns / Div So 1 -61.1 V SS 20 ns / Div<br>**----- End of picture text -----**<br>


**Figure 9. Digital crosstalk I1-O2** 

**Figure 10.  Analog crosstalk versus frequency** 

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1.0 V / DivP4: pkpk(C2) wc<br>eee Onan gee 1.28 ns ee ee em en meneame<br>‘ici dada Vad lili ia: “ainda Galan Wai iia<br>P1: top(C1)<br>3.01 ns<br>Le | | | le | Ce ee<br>P2:rise(C1)<br>1.99 ns ni P3: fall(C1) <<br>1.93 ns<br>i 2!<br>10 ns / Div<br>**----- End of picture text -----**<br>


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0.00 XTalk(dB)<br>-10.00<br>ATM TM TE TET T TAT TTT<br>-20.00 CUTE ETE TE TE FTE TTD<br>-30.00 IM ETA UTE PETIT ETT e<br>-40.00 CTEM EEE FE<br>-50.00 aee ee<br>-60.00 AIIM ETM TIT PEND Ct | UV<br>-70.00<br>-80.00 AIM TE TTI ar Lette<br>-90.00 AUN TN Tae LAUT eT TT<br>-100.00 F(Hz)<br>-110.00<br>100.0 k 1.0 M 10.0 M 100.0 M 1.0 G<br>I1-O2 I2-O3 VCC- Clk<br>**----- End of picture text -----**<br>


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**Characteristics** 

**EMIF06-HSD03F3** 

## **Figure 11. TLP measurement** 

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IPP(A)<br>30<br>28 fF | | PrP dT ET TT TE A TT<br>26 ee<br>24 | | | te] | cE | TT fet<br>2220 Peee| | ig TE Positive polarity<br>Negative polarity<br>18 P | tt TT a<br>16 ee ee Poly. (Positive polarity)<br>14 | | is] fT Tt | Poly. (Negative polarity)<br>12 ee ee eeeee<br>10 a ee ee<br>8 ee eee<br>6 P TPL | fT cit | | ET |<br>4 | pl | iy | | tP=100ns<br>2 VCL(V) TJ initial=25°C<br>0 Afi | | | | [|]<br>0 5 10 15 20 25 30 35 40<br>y = 0.0961x [2] + 2.1437x - 4.7641 y = -0.0078x [2] + 2.1203x - 13.887<br>R [2] = 0.9935 R [2] = 0.9956<br>**----- End of picture text -----**<br>


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**EMIF06-HSD03F3** 

**Package information** 

## **3 Package information** 

- Epoxy meets UL94, V0 

- Lead-free package 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: _www.st.com._ ECOPACK[®] is an ST trademark. 

## **3.1 Flip-Chip package information** 

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Figure 12. Flip-Chip package dimensions<br>1.10 mm ± 40 µm 605 ± 60 µm<br>2 0<br>Pte<br>® 62<br>® oe<br>o< 2<br>z e<br>DocID025248 Rev 4<br>400 ± 40 µm<br>400 ± 40 µm<br>2.40 mm ± 40 µm<br>**----- End of picture text -----**<br>


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**Package information** 

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**----- Start of picture text -----**<br>
Figure 13. Footprint recommendations Figure 14. Marking<br>Copper pad Diameter: Dot, ST logo @<br>220 µm recommended ECOPACK [® ] grade<br>260 µm maximum xx = marking<br>z = manufacturing location<br>Solder mask opening: yww = datecode<br>300 µm minimum (y = year<br>ww = week) x x z<br>Solder stencil opening:<br>y w w<br>220 µm recommended<br>=) | I<br>**----- End of picture text -----**<br>


## **Figure 15. Tape and reel specification** 

_Note: More information is available in the application notes:_ 

_AN2348, “IPAD™ 400 µm Flip Chip: package description and recommendations for use” AN1751, “EMI filters: recommendations and measurements”_ 

_AN4541: “EMI Filters for SD3.0 card: High speed SD card protection and filtering devices”_ 

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**EMIF06-HSD03F3** 

**Ordering information** 

|**4**|**Ordering information**|
|---|---|
|**5**|**Figure 16. Ordering information scheme**<br>**Revision history**<br>**Table 3. Ordering information**<br>**Order code**<br>**Marking**<br>**Package**<br>**Weight**<br>**Base qty**<br>**Delivery mode**<br>EMIF06-HSD03F3<br>KK<br>Flip Chip<br>3.4 mg<br>5000<br>Tape and reel (7”)<br>**EMIF    06    -    HSD  03    F3**<br>**EMI Filter**<br>**Number of lines**<br>**Application**<br>HSD = High speed SD card<br>**Version**<br>Version = 3<br>**Package**<br>F = Flip Chip<br>x = 3: Lead-free, pitch = 400 µm, bump = 255 µm<br>**Table 4. Document revision history**<br>**Date**<br>**Revision**<br>**Changes**<br>19-Nov-2013<br>1<br>Initial release<br>09-Jan-2014<br>2<br>Corrected typographical error.<br>06-Jan-2015<br>3<br>Added mention for new AN4541.<br>06-Oct-2016<br>Updated_Figure 1_.<br>~~=]~~<br>~~=~~|
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**EMIF06-HSD03F3** 

## **IMPORTANT NOTICE – PLEASE READ CAREFULLY** 

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. 

No license, express or implied, to any intellectual property right is granted by ST herein. 

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. 

Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 

© 2016 STMicroelectronics – All rights reserved 

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## Links

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---

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