# EMI Filter, ESD Protection, RC Pi Filter, 3 Data Lines, µQFN-8
**URL**: https://novapart.co/products/EMIF03-SIM02M8/emi-filter-esd-protection-rc-pi-3-data-lines-qfn-8
**SKU**: EMIF03-SIM02M8
**Manufacturer**: STMICROELECTRONICS
**Price**: €0.1780
**Stock**: 10+
**Lead Time**: 106 days (indicative)
## Specifications
| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Product Range | EMIF Series |
| Filter Circuit | RC Pi Filter |
| Emi Filter Type | EMI Filter with ESD Protection |
| No. Of Data Lines | 3 Data Lines |
| Filter Case / Package | µQFN |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:4320029/)
**EMIF03-SIM02M8**
## 3 line IPAD™, EMI filter for SIM card applications
## **Features**
- SIM card EMI low-pass filter
- High efficiency in EMI filtering
- Very low PCB space consumption: 1.7 mm x 1.5 mm
- Very thin package: 0.6 mm max
- High efficiency in ESD suppression on external pins (IEC 61000-4-2 level 4).
- High reliability offered by monolithic integration
- High reduction of parasitic elements through integration and wafer level packaging.
- Lead free package
- Easy layout and flexibility thanks to I/O topology
- Low clamping voltage
## **Complies with following standards**
- IEC 61000-4-2 level 4 external pins
- 15 kV (air discharge)
- 8 kV (contact discharge)
- IEC 61000-4-2 level 2 internal pins
- 2 kV (air discharge)
- 2 kV (contact discharge)
- MIL STD 883G - Method 3015-7 Class 3A (all pins)
## **Applications**
Where EMI filtering in ESD sensitive equipment is required:
- Keyboard for mobile phones
- Computers and printers
- Communication systems
- MCU boards
TM: IPAD is a trademark of STMicroelectronics
**==> picture [121 x 93] intentionally omitted <==**
**----- Start of picture text -----**
8 1
7 GND 2
GND
6 3
5 4
Micro QFN 1.7 mm x 1.5 mm
(bottom view)
**----- End of picture text -----**
## **Figure 1. Pin configuration (top view)**
**==> picture [165 x 74] intentionally omitted <==**
**----- Start of picture text -----**
Vcc Vcc
RST in RST EXT
CLK in CLKEXT
Data in Data EXT
GND
**----- End of picture text -----**
## **Figure 2. Device configuration**
**==> picture [192 x 120] intentionally omitted <==**
**----- Start of picture text -----**
Vcc 100 Ω
RST in RST ext
R1
47 Ω
CLK in CLK ext
R2
100 Ω
Data in Data ext
R3
GND
Maximum line capacitance = 20 pF
**----- End of picture text -----**
## **Description**
The EMIF03-SIM02M8 is a 3 line highly integrated device designed to suppress EMI/RFI noise in all systems exposed to electromagnetic interference.
This filter includes ESD protection circuitry, which prevents damage to the application when subjected to ESD surges up to 15 kV on the external pins.
October 2007
1/10
Rev 1
_www.st.com_
**Characteristics**
**EMIF03-SIM02M8**
## **1 Characteristics**
## **Table 1. Absolute ratings (limiting values at Tamb = 25 °C unless otherwise specified)**
|**Symbol**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|
|VPP|**Internal pins**
ESD discharge IEC 61000-4-2 air discharge
ESD discharge IEC 61000-4-2 contact discharge
**External pins and VCC**
ESD discharge IEC 61000-4-2 air discharge
ESD discharge IEC 61000-4-2 contact discharge
**All pins**
MIL STD 883G - Method 3015-7 Class 3A (human body model)|2
2
15
8
4|kV|
|Tj|Junction temperature|125|°C|
|Top|Operating temperature range|-40 to + 85|°C|
|Tstg|Storage temperature range|-55 to +150|°C|
|**Table 2.**
**Electrical characteristics(Tamb = 25 °C)**|**Table 2.**
**Electrical characteristics(Tamb = 25 °C)**|**Table 2.**
**Electrical characteristics(Tamb = 25 °C)**||||||||
|---|---|---|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**||**VBR**
**IPP**
**VRM**
**VF**
**IF**
**I**
**IRM**
**IR**
**V**
**VCL**|||||||
||||**VBR**
**VRM**
**IF**
**I**
**VCL**|||||||
|VBR|Breakdown voltage|||||||||
|||||||||||
|IRM|Leakage current @ VRM|||||||||
|VRM|Stand-off voltage|||||||||
|VCL|Clamping voltage|||||||||
|||||||||||
|IPP|Peak pulse current|||||||||
|RI/O|Series resistance between input and output|||||||||
|Cline|Input capacitance per line|||||||||
|||||||||||
|**Symbol**|**Test conditions**|**Min.**||**Typ.**||||**Max.**|**Unit**|
|VBR|IR= 1 mA|6||||||7.9|V|
|IRM|VRM= 3 V|||||||0.2|µA|
|R1, R3|Tolerance ± 20%|||100|||||Ω|
|R2|Tolerance ± 20%|||47|||||Ω|
|Cline|VR= 0 V, F = 1 MHz, VOSC= 30 mV|||17||||20|pF|
2/10
**EMIF03-SIM02M8**
**Characteristics**
## **Figure 3. S21(db) attenuation (RST line) Figure 4. S21(db) attenuation (CLK line)**
**==> picture [421 x 139] intentionally omitted <==**
**----- Start of picture text -----**
0.00 dB 0.00 dB
-5.00 -5.00
AM LIMITE TT UT rit LUT
-10.00 -10.00
-15.00 HNAT AN A -15.00 Uaa
TMA TET UT AT LUT ATT TAI UT
-20.00-25.00 aAT LITLE ETAT -20.00-25.00 TANATLITA
-30.00 IAT LIME ETT TT -30.00 ATLTTETAT A
F (Hz) F (Hz)
-35.00 -35.00
300.0k IMT 1.0M VIM 3.0M 10.0M 30.0M cl) 100.0M 300.0M CEI 1.0G TT 3.0G 300.0k SIM 1.0M LUI 3.0M 10.0M 30.0M IIE 100.0M TATLIT 300.0M 1.0G T 3.0G UTT
**----- End of picture text -----**
**==> picture [444 x 154] intentionally omitted <==**
**----- Start of picture text -----**
Figure 5. S21(db) attenuation (DATA line) Figure 6. Analog cross talk measurements
0.00 dB 0.00 dB
-10.00
-5.00 FN -20.00 HH
-30.00
-10.00 TTT ATTN -40.00 Hct ee
-50.00
-15.00
a -60.00 HA A
-20.00 -70.00
A 1h ach
-80.00
-25.00 -90.00
AT LATTE TATA eee
-100.00
-30.00 IT LTE ETT F (Hz) TIT TUT -110.00-120.00 tt HIE F (Hz) e CHEeFH
-35.00 HN 300.0k SU 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
300.0k 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G ClkIn-RstExt DataIn-Rst/Clk
**----- End of picture text -----**
**Figure 7. ESD response to IEC 61000-4-2 (+15 kV air discharge) applied to external pin**
**Figure 8. ESD response to IEC 61000-4-2 (-15 kV air discharge) applied to external pin**
**==> picture [440 x 112] intentionally omitted <==**
**----- Start of picture text -----**
200 ns/div 200 ns/div
5 V/div
2 V/div
5 V/div
2 V/div
**----- End of picture text -----**
3/10
**EMIF03-SIM02M8**
**Application schematic**
**Figure 9. ESD response to IEC 61000-4-2 Figure 10. ESD response to IEC 61000-4-2 (+2 kV air discharge) applied to (-2 kV air discharge) applied to internal pin internal pin**
**==> picture [436 x 112] intentionally omitted <==**
**----- Start of picture text -----**
20 ns/div 20 ns/div
5 V/div 5 V/div
2 V/div 2 V/div
**----- End of picture text -----**
## **2 Application schematic**
**Figure 11. Application schematic**
**==> picture [204 x 77] intentionally omitted <==**
**----- Start of picture text -----**
Vcc Vcc
RST in RST EXT
CLK in CLK EXT
Data in Data EXT
GND
SIM PROCESSOR
**----- End of picture text -----**
## **3 Ordering information scheme**
**Figure 12. Ordering information scheme**
**==> picture [462 x 186] intentionally omitted <==**
**----- Start of picture text -----**
EMIF yy - xxx zz Mx
EMI Filter
Number of lines
Information
xxx = application
zz = version
Package
Mx = Micro QFN x leads
4/10
a
**----- End of picture text -----**
**EMIF03-SIM02M8**
**Package information**
## **4 Package information**
## ● Epoxy meets UL94, V0
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
**Table 3. QFN 1.7 x 1.5 package dimensions**
||||**Ref**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|
|---|---|---|---|---|---|---|---|---|---|
|||||||||||
|||||**Millimeters**|||**inches**|||
|||||**MIN**|**TYP**|**MAX**|**MIN**|**TYP**|**MAX**|
||||A|0.50|0.55|0.60|0.20|0.22|0.24|
||||A1|0.00|0.02|0.05|0.00|0.01|0.02|
||||b|0.15|0.18|0.25|0.06|0.07|0.10|
|||||||||||
||||D||1.70|||0.67||
||||D2|0.9|1.00|1.10|0.35|0.39|0.43|
||||E
||1.50
|||0.59
||
|||||||||||
||||E2|0.30|0.40|0.50|0.12|0.16|0.24|
||||e||0.40|||0.16||
||||k|0.20|||0.08|||
||||L|0.25|0.30|0.35|0.10|0.12|0.14|
**Figure 13. Footprint (dimensions in mm) Figure 14. Marking**
**==> picture [181 x 143] intentionally omitted <==**
**==> picture [96 x 96] intentionally omitted <==**
**----- Start of picture text -----**
HA
Dot: Pin 1 Identification
**----- End of picture text -----**
5/10
**EMIF03-SIM02M8**
**Package information**
## **Figure 15. Tape and reel specification**
**==> picture [300 x 153] intentionally omitted <==**
**----- Start of picture text -----**
2.0+/-0.05 4.00+/-0.1 φ 1.5 +/- 0.1
0.75 1.70 4.00
User direction of unreeling
XX XX XX
1.75 +/- 0.1
3.5 +/- 0.03
8.0 +/- 0.3 1.90
**----- End of picture text -----**
_Note: Product marking may be rotated by 90° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose._
6/10
**EMIF03-SIM02M8**
**Recommendation on PCB assembly**
## **5 Recommendation on PCB assembly**
## **5.1 Stencil opening design**
1. General recommendation on stencil opening design
- a) Stencil opening dimensions: L (Length), W (Width), T (Thickness).
## **Figure 16. Stencil opening dimensions**
**==> picture [99 x 65] intentionally omitted <==**
**----- Start of picture text -----**
L
T
W
**----- End of picture text -----**
b) General Design Rule Stencil thickness (T) = 75 ~ 125 µm W Aspect Ratio = ≥ 1.5[-----] T Aspect Area = --------------------------L × W **-** ≥ 0.66 2T(L + W)
2. Reference design
- a) Stencil opening thickness: 100 µm
- b) Stencil opening for central exposed pad: Opening to footprint ratio is 50%. Example: Stencil opening L = 680 µm, W = 300 µm
- Footprint (see _Figure 13_ ) L = 1000 µm, W = 400 µm
- c) Stencil opening for leads: Opening to footprint ratio is 90%. Example: Stencil opening L = 570 µm, W = 190 µm Footprint (see _Figure 13_ ) L = 600 µm, W = 200 µm
## **5.2 Solder paste**
1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed
4. Solder paste with fine particles: powder particle size is 20-45 µm.
7/10
**Recommendation on PCB assembly**
**EMIF03-SIM02M8**
## **5.3 Placement**
1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools.
## **5.4 PCB design preference**
1. To control the solder paste amount, the closed via is recommended instead of open vias.
2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away.
## **5.5 Reflow profile**
## **Figure 17. ST ECOPACK® recommended soldering reflow profile for PCB mounting**
**==> picture [342 x 199] intentionally omitted <==**
**----- Start of picture text -----**
Temperature (°C)
260°C max
255°C
220°C
180°C
125 °C 2°C/s recommended2°C/s recommended
3°C/s max 6°C/s max
6°C/s max
3°C/s max
0
0 1 2 3 4 5 6 7
10-30 sec Time (min)
90 to 150 sec 90 sec max
**----- End of picture text -----**
_Note: Minimize air convection currents in the reflow oven to avoid component movement._
8/10
**EMIF03-SIM02M8**
**Ordering information**
## **6 Ordering information**
**Table 4. Ordering information**
|**Part number**|**Marking**|**Package**|**Weight**|**Base qty**|**Delivery mode**|
|---|---|---|---|---|---|
|EMIF03-SIM02M8|HA|Micro QFN|4 mg|3000|Tape and reel (7”)|
## **7 Revision history**
**Table 5. Document revision history**
|**Date**|**Revision**|**Changes**|
|---|---|---|
|07-Oct-2007|1|Initial release.|
9/10
**EMIF03-SIM02M8**
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10/10
## Links
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- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/emif03-sim02m8/emi-filter-w-esd-3-data-line-uqfn/dp/4320029)
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