# EMI FILTER W/ESD PROTECTION, 2LINE, UQFN
**URL**: https://novapart.co/products/EMIF02-MIC03M6/emi-filter-w-esd-protection-2line-uqfn
**SKU**: EMIF02-MIC03M6
**Manufacturer**: STMICROELECTRONICS
**Price**: €0.2240
**Stock**: 100+
**Lead Time**: 204 days (indicative)
## Description
EMI Filter Type:EMI Filter with ESD Protection; No. of Data Lines:2 Data Lines; Filter Circuit:RC Pi Filter; Filter Ca; Available until stocks are exhausted Alternative available
## Specifications
| Parameter | Value |
|---|---|
| Svhc | No SVHC (17-Dec-2015) |
| No. Of Pins | 6Pins |
| Product Range | EMIF Series |
| Filter Circuit | RC Pi Filter |
| Emi Filter Type | EMI Filter with ESD Protection |
| No. Of Data Lines | 2 Data Lines |
| Filter Case / Package | µQFN |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:3132463/)
**EMIF02-MIC03M6**
**==> picture [62 x 39] intentionally omitted <==**
## 2-line IPAD™, EMI filter and ESD protection for microphone
## **Features**
- EMI symmetrical (I/O) low-pass filter
- High efficiency in EMI filtering
- Very low PCB space consumption: 1.0 mm x 1.45 mm
- Very thin package: 0.6 mm max
- High efficiency in ESD suppression
- High reliability offered by monolithic integration
- ■ High reduction of parasitic elements through integration and wafer level packaging
- Lead-free and halogen-free package
## **Complies with following standards**
- IEC 61000-4-2 level 4, input and output pins
- IEC 61000-4-2 level 4 requirements
- 8 kV (contact discharge)
or
- 15 kV (air discharge)
## **Application**
**==> picture [90 x 98] intentionally omitted <==**
**----- Start of picture text -----**
Pin 1
Micro QFN 6 leads
1.45 mm x 1.00 mm
(bottom view)
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## **Figure 1. Pin configuration (top view)**
**==> picture [175 x 114] intentionally omitted <==**
**----- Start of picture text -----**
MICR in 1 6 MICR out
GND 2 5 GND
MICL in 3 4 MICL out
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- Mobile phones
## **Description**
The EMIF02-MIC03M6 is a 2-line highly integrated device designed to suppress EMI/RFI noise in all systems exposed to electromagnetic interference.
This filter includes ESD protection circuitry, which prevents damage to the application when subjected to ESD surges up to 8 kV on all pins.
## **Figure 2. Basic cell configuration**
**==> picture [209 x 94] intentionally omitted <==**
**----- Start of picture text -----**
Low-pass filter
Input Output
GND GND GND
R = 68 Ω, Cline = 45 pF typ.
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**TM** : IPAD is a trademark of STMicroelectronics
1/11
May 2011
Doc ID 14448 Rev 2
_www.st.com_
**Characteristics**
**EMIF02-MIC03M6**
## **1 Characteristics**
## **Table 1. Absolute ratings[(1)]**
|**Table 1.**|**Absolute ratings(1)**|||
|---|---|---|---|
|**Symbol**|**Parameter**|**Value**|**Unit**|
|VPP|ESD discharge IEC61000-4-2 contact discharge
ESD discharge IEC61000-4-2 air discharge(2)|8
15|kV|
|Tj|Junction temperature|125|°C|
|Top|Operating temperature range|-40 to + 85|°C|
|Tstg|Storage temperature range|-55 to +150|°C|
1. limiting values at Tamb = 25 °C unless otherwise specified
2. According to IEC61000-4-2 test conditions with ungrounded table top equipment set-up, PCB board on insulated plane (dimensions 25 x 25 mm[2] ), 2 serial resistors of 470 k Ω to GND reference plane
## **Table 2. Electrical characteristics (Tamb = 25 °C)**
|**Symbol**|**Parameter**||**I**
**V**
**IPP**
**VCL**
**VBR**
**VRM**
**IR**
**IRM**
**IRM**
**IR**
**IPP**
**VRM**
**VBR**
**VCL**|**I**
**V**
**IPP**
**VCL**
**VBR**
**VRM**
**IR**
**IRM**
**IRM**
**IR**
**IPP**
**VRM**
**VBR**
**VCL**|**I**
**V**
**IPP**
**VCL**
**VBR**
**VRM**
**IR**
**IRM**
**IRM**
**IR**
**IPP**
**VRM**
**VBR**
**VCL**|**I**
**V**
**IPP**
**VCL**
**VBR**
**VRM**
**IR**
**IRM**
**IRM**
**IR**
**IPP**
**VRM**
**VBR**
**VCL**|
|---|---|---|---|---|---|---|
|VBR|Breakdown voltage||||||
|IRM|Leakage current @ VRM||||||
|VRM|Stand-off voltage||||||
|VCL|Clamping voltage||||||
|Rd|Dynamic resistance||||||
|IPP|Peak pulse current||||||
|RI/O|Series resistance between Input & Output||||||
|Cline|Input capacitance per line||||||
|**Symbol**|**Test conditions**|**Min.**||**Typ.**|**Max.**|**Unit**|
|VBR|IR= 1 mA|6||8||V|
|IRM|VRM= 3 V per line||||500|nA|
|RI/O|Tolerance ± 20%|||68||Ω|
|Cline (1)|VR= 0 V, F = 1 MHz, VOSC= 30 mV|||45||pF|
1. Tolerance ± 20%
2/11
Doc ID 14448 Rev 2
**EMIF02-MIC03M6**
**Characteristics**
**Figure 3. S21 attenuation measurement**
## **Figure 4. Analog cross talk measurements (MIC R / MIC L)**
**==> picture [415 x 133] intentionally omitted <==**
**----- Start of picture text -----**
0.00 dB 0.00 dB
-5.00 0) -10.00 To
-10.00 CTT TIMIN IT) -20.00 HAS EH>titins
-15.00 -30.00
-20.00 HE I -40.00 Teer CO SU A7
-50.00
-25.00 ELEN Cnr TAT TT
-60.00
-30.00
-35.00 C EL F (Hz) E: -70.00 A A F (Hz)
-80.00 CMC ul CH
-40.00 aC 300.0k 10 1.0M 3.0M 01 10.0M A 30.0M 100.0M 300.0M 1.0G 3.0G
300.0k 1.0M 3.0M 10.0M 30.0M 100.0M300.0M 1.0G 3.0G Xtalk R-L XtalkL-R
**----- End of picture text -----**
## **Figure 5. ESD response to IEC 61000-4-2 (+8 kV contact discharge) on MIC lines**
**Figure 6. ESD response to IEC 61000-4-2 (-8 kV contact discharge) on MIC lines**
**==> picture [304 x 104] intentionally omitted <==**
**----- Start of picture text -----**
vi = 20 V/d vi = 20 V/d
Input Input
vo = 10 V/d vo = 10 V/d
Output Output
20 ns/d 20 ns/d
**----- End of picture text -----**
Doc ID 14448 Rev 2 3/11 ~~Te~~
**Ordering information scheme**
**EMIF02-MIC03M6**
## **2 Ordering information scheme**
**==> picture [197 x 11] intentionally omitted <==**
**----- Start of picture text -----**
Figure 7. Ordering information scheme
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**==> picture [327 x 128] intentionally omitted <==**
**----- Start of picture text -----**
EMIF yy - xxx zz Mx
EMI Filter
Number of lines
Information
xxx = application
zz = version
Package
Mx = Micro QFN x leads
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4/11
Doc ID 14448 Rev 2
**EMIF02-MIC03M6**
**Package information**
## **3 Package information**
- Epoxy meets UL94, V0
- Lead-free packages
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark.
## **Table 3. Micro QFN 1.45 x 1.00 6L dimensions**
|**A**|||||**E**
**b**
**k**
**L**|**Ref.**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|
||||**D**||||||||||
|||**N**|||||**Millimeters**|||**Inches**|||
||||||||||||||
||||||||**Min.**|**Typ.**|**Max.**|**Min.**|**Typ.**|**Max.**|
||||||||||||||
|||**1**
|**2**|||A|0.50|0.55|0.60|0.020|0.022|0.024|
|||||||A1|0.00|0.02|0.05|0.000|0.001|0.002|
||||||||||||||
||**A1**|**1**
|**2**|||b|0.18|0.25|0.30|0.007|0.010|0.012|
|||||||D||1.45|||0.057||
|||||||E||1.00|||0.039||
||||||||||||||
||||||||||||||
|||||||e||0.50|||0.020||
|||**e**|||||||||||
|||||||K|0.20|||0.008|||
|||||||L|0.30|0.35|0.40|0.012|0.014|0.016|
||||||||||||||
## **Figure 8. Footprint in mm [inches] Figure 9. Marking**
**==> picture [405 x 114] intentionally omitted <==**
**----- Start of picture text -----**
0.50 0.25 Dot : Pi n 1 Identification
[0.020] [0.010]
0.60
[0.023]
0.30 1.60
L
[0.012] [0.063]
**----- End of picture text -----**
5/11
Doc ID 14448 Rev 2
**EMIF02-MIC03M6**
**Package information**
## **Figure 10. Tape and reel specification**
**==> picture [301 x 161] intentionally omitted <==**
**----- Start of picture text -----**
Dot identifying pin 1 location
2.0+/-0.05 4.00+/-0.1 φ 1.5 +/- 0.1
L L L
0.75 1.20 4.00
All dimensions in mm User direction of unreeling
1.65
1.75 +/- 0.1
3.5 +/- 0.03
8.0 +/- 0.3
**----- End of picture text -----**
_Note: Product marking may be rotated by 90° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose._
6/11
Doc ID 14448 Rev 2
**EMIF02-MIC03M6**
**Recommendation on PCB assembly**
## **4 Recommendation on PCB assembly**
## **4.1 Stencil opening design**
1. General recommendation on stencil opening design
- a) Stencil opening dimensions: L (Length), W (Width), T (Thickness).
## **Figure 11. Stencil opening dimensions**
**==> picture [47 x 42] intentionally omitted <==**
**----- Start of picture text -----**
L
T
W
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- b) General design rule
Stencil thickness (T) = 75 ~ 125 µm
W Aspect Ratio = ≥ 1.5[-----] T
Aspect Area = --------------------------L × W **-** ≥ 0.66 2T ( L + W )
2. Reference design
- a) Stencil opening thickness: 100 µm
- b) Stencil opening for leads: Opening to footprint ratio is 90%.
## **Figure 12. Recommended stencil window position**
**==> picture [260 x 168] intentionally omitted <==**
**----- Start of picture text -----**
7 µm 7 µm a
—_"
15 µm
Ft
236 µm =a
15 µm
Footprint
250 µm
Stencil window
Footprint
650 µm 620 µm
**----- End of picture text -----**
7/11
Doc ID 14448 Rev 2
**Recommendation on PCB assembly**
**EMIF02-MIC03M6**
## **4.2 Solder paste**
1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed.
4. Solder paste with fine particles: powder particle size is 20-45 µm.
## **4.3 Placement**
1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering.
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools.
## **4.4**
## **PCB design preference**
1. To control the solder paste amount, the closed via is recommended instead of open vias.
2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away.
8/11
Doc ID 14448 Rev 2
**EMIF02-MIC03M6**
**Recommendation on PCB assembly**
## **4.5 Reflow profile**
**Figure 13. ST ECOPACK® recommended soldering reflow profile for PCB mounting**
**==> picture [342 x 199] intentionally omitted <==**
**----- Start of picture text -----**
Temperature (°C)
260°C max
255°C
220°C
180°C
125 °C 2°C/s recommended2°C/s recommended
3°C/s max 6°C/s max
6°C/s max
3°C/s max
0
0 1 2 3 4 5 6 7
10-30 sec Time (min)
90 to 150 sec 90 sec max
**----- End of picture text -----**
_Note: Minimize air convection currents in the reflow oven to avoid component movement._
9/11
Doc ID 14448 Rev 2
**Ordering information**
**EMIF02-MIC03M6**
## **5 Ordering information**
## **Table 4. Ordering information**
|**Order code**|**Marking**|**Package**|**Weight**|**Base qty**|**Delivery mode**|
|---|---|---|---|---|---|
|EMIF02-MIC03M6|L(1)|Micro QFN|2.2 mg|3000|Tape and reel (7”)|
1. The marking can be rotated by 90° to differentiate assembly location
## **6 Revision history**
## **Table 5. Document revision history**
|**Date**|**Revision**|**Changes**|
|---|---|---|
|13-Feb-2008|1|Initial release|
|27-May-2011|2|Updated ECOPACK statement. Updated_n: IEC 61000-4-2 level 4_
_requirements on page 1_. Added note_2. on page 2_. Updated title
_Figure 5._and_Figure 6. on page 3_.|
10/11
Doc ID 14448 Rev 2
**EMIF02-MIC03M6**
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© 2011 STMicroelectronics - All rights reserved
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11/11
Doc ID 14448 Rev 2
## Links
- [View this product on Novapart](https://novapart.co/products/EMIF02-MIC03M6/emi-filter-w-esd-protection-2line-uqfn)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/stmicroelectronics/emif02-mic03m6/emi-filter-w-esd-protection-2line/dp/3132463)
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