# Bipolar Pre-Biased / Digital Transistor, NPN and PNP Complement, 50 V, 50 V, 100 mA, 10 kohm

![Product image](https://novapart.co/image/farnell:2727960/)

**URL**: https://novapart.co/products/EMC3DXV5T1G/bipolar-pre-biased-digital-transistor-npn-and-pnp
**SKU**: EMC3DXV5T1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Pre-Biased / Digital Bipolar Transistors
**Price**: €0.0510
**Stock**: 10+
**Lead Time**: 78 days (indicative)

## Description

Digital Transistor Polarity:NPN and PNP Complement; Collector Emitter Voltage V(br)ceo:50V; Continuous Collector Current Ic:100mA; Base Input Resistor R1:10kohm; Base-Emitter Resis

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 5 Pin |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 500mW |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | NPN and PNP Complement |
| Transistor Case Style | SOT-553 |
| Base Input Resistor R1 | 10kohm |
| Dc Current Gain Hfe Min | 35hFE |
| Base Emitter Resistor R2 | 10kohm |
| Operating Temperature Max | 150°C |
| Continuous Collector Current | 100mA |
| Collector Emitter Voltage Max Npn | 50V |
| Collector Emitter Voltage Max Pnp | 50V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2727960/)

## EMC2DXV5T1G, EMC3DXV5T1G, EMC4DXV5T1G, EMC5DXV5T1G 

## Dual Common Base-Collector Bias Resistor Transistors 

## **NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network** 

The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the EMC2DXV5T1G series, two complementary BRT devices are housed in the SOT−553 package which is ideal for low power surface mount applications where board space is at a premium. 

## **http://onsemi.com** 

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3 2 1<br>R1<br>R2<br>Q2<br>R2<br>Q1<br>R1<br>4 5<br>5<br>S<br>1<br>SOT−553<br>CASE 463B<br>**----- End of picture text -----**<br>


## **Features** 

- Simplifies Circuit Design 

## **MARKING DIAGRAM** 

- Reduces Board Space 

- Reduces Component Count 

- NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

- These are Pb−Free Devices 

**MAXIMUM RATINGS** (TA = 25 ° C unless otherwise noted, common for Q1 and Q2, − minus sign for Q1 (PNP) omitted) 

|**Rating**|**Symbol**|**Value**|**Unit**|
|---|---|---|---|
|Collector-Base Voltage|VCBO|50|Vdc|
|Collector-Emitter Voltage|VCEO|50|Vdc|
|Collector Current|IC|100|mAdc|



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**----- Start of picture text -----**<br>
Ux M<br>**----- End of picture text -----**<br>


Ux = Specific Device Code x = C, 3, E, or 5 

M = Date Code = Pb−Free Package 

(Note: Microdot may be in either location) 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. 

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

Publication Order Number: **EMC2DXV5T1/D** 

**1** 

© Semiconductor Components Industries, LLC, 2014 **May, 2014 − Rev. 7** 

**EMC2DXV5T1G, EMC3DXV5T1G, EMC4DXV5T1G, EMC5DXV5T1G** 

## **THERMAL CHARACTERISTICS** 

|**THERMAL CHARACTERISTICS**||||
|---|---|---|---|
|**Characteristic**|**Symbol**|**Max**|**Unit**|
|**ONE JUNCTION HEATED**||||
|Total Device Dissipation<br>TA= 25°C<br>Derate above 25°C|PD|357 (Note 1)<br>2.9 (Note 1)|mW<br>mW/°C|
|Thermal Resistance,Junction-to-Ambient|R�JA|350(Note 1)|°C/W|
|**BOTH JUNCTIONS HEATED**||||
|Total Device Dissipation<br>TA= 25°C<br>Derate above 25°C|PD|500 (Note 1)<br>4.0 (Note 1)|mW<br>mW/°C|
|Thermal Resistance, Junction-to-Ambient|R�JA|250 (Note 1)|°C/W|
|Junction and Storage Temperature|TJ,Tstg|−55 to +150|°C|



1. FR−4 @ Minimum Pad 

## **DEVICE ORDERING INFORMATION, MARKING AND RESISTOR VALUES** 

|**Device**|**Marking**|**Transistor 1 − PNP**|**Transistor 1 − PNP**|**Transistor 2 − NPN**|**Transistor 2 − NPN**|**Package**|**Shipping**†|
|---|---|---|---|---|---|---|---|
|||**R1 (K)**|**R2 (K)**|**R1 (K)**|**R2 (K)**|||
|EMC2DXV5T1G|UC|22|22|22|22|SOT−553<br>(Pb−Free)|4000 / Tape & Reel|
|NSVEMC2DXV5T1G*|UC|22|22|22|22||4000 / Tape & Reel|
|EMC3DXV5T1G|U3|10|10|10|10||4000 / Tape & Reel|
|EMC3DXV5T5G|||||||8000 / Tape & Reel|
|EMC4DXV5T1G|UE|10|47|47|47||4000 / Tape & Reel|
|EMC5DXV5T1G|U5|4.7|10|47|47||4000 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

*NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable. 

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250<br>200<br>150<br>100<br>R�JA = 833°C/W<br>50<br>0-�50 0 50 100 150<br>TA, AMBIENT TEMPERATURE ( ° C)<br>Figure 1. Derating Curve<br>PD, POWER DISSIPATION (MILLIWATTS)<br>**----- End of picture text -----**<br>


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**2** 

**EMC2DXV5T1G, EMC3DXV5T1G, EMC4DXV5T1G, EMC5DXV5T1G** 

## **ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS **(TA= 25°C unless otherwise|noted)|||||
|---|---|---|---|---|---|
|**Characteristic**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|**Q1 TRANSISTOR: PNP**<br>**OFF CHARACTERISTICS**||||||
|Collector-Base Cutoff Current (VCB= 50 V, IE= 0)|ICBO|−|−|100|nAdc|
|Collector-Emitter Cutoff Current (VCB= 50 V, IB= 0)|ICEO|−|−|500|nAdc|
|Emitter-Base Cutoff Current<br>EMC2DXV5T1G<br>(VEB= 6.0 V, IC= 0)<br>EMC3DXV5T1G<br>EMC4DXV5T1G<br>EMC5DXV5T1G|IEBO|−<br>−<br>−<br>−|−<br>−<br>−<br>−|0.2<br>0.5<br>0.2<br>1.0|mAdc|
|**ON CHARACTERISTICS**||||||
|Collector-Base Breakdown Voltage (IC= 10�A, IE= 0)|V(BR)CBO|50|−|−|Vdc|
|Collector-Emitter Breakdown Voltage (IC= 2.0 mA, IB= 0)|V(BR)CEO|50|−|−|Vdc|
|DC Current Gain<br>EMC2DXV5T1G<br>(VCE= 10 V, IC= 5.0 mA)<br>EMC3DXV5T1G<br>EMC4DXV5T1G<br>EMC5DXV5T1G|hFE|60<br>35<br>80<br>20|100<br>60<br>140<br>35|−<br>−<br>−<br>−||
|Collector−Emitter Saturation Voltage (IC= 10 mA, IB= 0.3 mA)|VCE(SAT)|−|−|0.25|Vdc|
|Output Voltage (on) (VCC= 5.0 V, VB= 2.5 V, RL= 1.0 k�)|VOL|−|−|0.2|Vdc|
|Output Voltage (off) (VCC= 5.0 V, VB= 0.5 V, RL= 1.0 k�)|VOH|4.9|−|−|Vdc|
|Input Resistor<br>EMC2DXV5T1G<br>EMC3DXV5T1G, EMC4DXV5T1G<br>EMC5DXV5T1G|R1|15.4<br>7.0<br>3.3|22<br>10<br>4.7|28.6<br>13<br>6.1|k�|
|Resistor Ratio<br>EMC2DXV5T1G<br>EMC3DXV5T1G<br>EMC4DXV5T1G<br>EMC5DXV5T1G|R1/R2|0.8<br>0.8<br>0.17<br>0.38|1.0<br>1.0<br>0.21<br>0.47|1.2<br>1.2<br>0.25<br>0.56||
|**Q2 TRANSISTOR: NPN**<br>**OFF CHARACTERISTICS**||||||
|Collector-Base Cutoff Current (VCB= 50 V, IE= 0)|ICBO|−|−|100|nAdc|
|Collector-Emitter Cutoff Current (VCB= 50 V, IB= 0)|ICEO|−|−|500|nAdc|
|Emitter-Base Cutoff Current<br>EMC2DXV5T1G<br>(VEB= 6.0 V, IC= 0)<br>EMC3DXV5T1G<br>EMC4DXV5T1G, EMC5DXV5T1G|IEBO|−<br>−<br>−|−<br>−<br>−|0.2<br>0.5<br>0.1|mAdc|
|**ON CHARACTERISTICS**||||||
|Collector-Base Breakdown Voltage (IC= 10�A, IE= 0)|V(BR)CBO|50|−|−|Vdc|
|Collector-Emitter Breakdown Voltage (IC= 2.0 mA, IB= 0)|V(BR)CEO|50|−|−|Vdc|
|DC Current Gain<br>EMC2DXV5T1G<br>(VCE= 10 V, IC= 5.0 mA)<br>EMC3DXV5T1G<br>EMC4DXV5T1G, EMC5DXV5T1G|hFE|60<br>35<br>80|100<br>60<br>140|−<br>−<br>−||
|Collector−Emitter Saturation Voltage (IC= 10 mA, IB= 0.3 mA)|VCE(SAT)|−|−|0.25|Vdc|
|Output Voltage (on) (VCC= 5.0 V, VB= 2.5 V, RL= 1.0 k�)|VOL|−|−|0.2|Vdc|
|Output Voltage (off) (VCC= 5.0 V, VB= 0.5 V, RL= 1.0 k�)|VOH|4.9|−|−|Vdc|
|Input Resistor<br>EMC2DXV5T1G<br>EMC3DXV5T1G<br>EMC4DXV5T1G, EMC5DXV5T1G|R1|15.4<br>7.0<br>33|22<br>10<br>47|28.6<br>13<br>61|k�|
|Resistor Ratio<br>EMC2DXV5T1G<br>EMC3DXV5T1G<br>EMC4DXV5T1G, EMC5DXV5T1G|R1/R2|0.8<br>0.8<br>0.8|1.0<br>1.0<br>1.0|1.2<br>1.2<br>1.2||



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

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**EMC2DXV5T1G, EMC3DXV5T1G, EMC4DXV5T1G, EMC5DXV5T1G** 

## **TYPICAL ELECTRICAL CHARACTERISTICS − EMC2DXV5T1 PNP TRANSISTOR** 

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10 1000<br>IC/IB = 10 VCE = 10 V<br>T A �=�75°C<br>1 25 ° C 25°C<br>TA = -25°C 100 -25°C<br>75°C<br>�0.1<br>0.01 10<br>0 �20 �40 �50 1 10 100<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 2. VCE(sat) versus IC Figure 3. DC Current Gain<br>4 100<br>75°C 25°C<br>3 f = 1 MHz l T EA = 0 mA  = 25°C 10 T A �=�-25°C<br>1<br>2<br>�0.1<br>1<br>�0.01<br>VO = 5 V<br>0 �0.001<br>0 10 20 30 40 50 0 1 �2 �3 �4 �5 �6 �7 �8 �9 10<br>VR, REVERSE BIAS VOLTAGE (V) Vin, INPUT VOLTAGE (V)<br>hFE, DC CURRENT GAIN<br>, COLLECTOR EMITTER SATURATION VOLTAGE (V)<br>CE(sat)<br>V<br>Cob, CAPACITANCE (pF)<br>IC, COLLECTOR CURRENT (mA)<br>**----- End of picture text -----**<br>


**Figure 4. Output Capacitance** 

**Figure 5. Output Current versus Input Voltage** 

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100<br>VO = 0.2 V<br>T A �=�-25°C<br>10 25°C<br>75°C<br>1<br>�0.1<br>0 10 �20 �30 �40 �50<br>IC, COLLECTOR CURRENT (mA)<br>Vin, INPUT VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


**Figure 6. Input Voltage versus Output Current** 

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**EMC2DXV5T1G, EMC3DXV5T1G, EMC4DXV5T1G, EMC5DXV5T1G** 

## **TYPICAL ELECTRICAL CHARACTERISTICS − EMC2DXV5T1 NPN TRANSISTOR** 

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1 1000<br>IC/IB = 10 TA�=�-25°C V CE  = 10 V<br>25 ° C TA�=�75 ° C<br>25°C<br>0.1<br>-25°C<br>75°C<br>100<br>0.01<br>0.001 0 20 40 50 10 1 10 100<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 7. VCE(sat) versus IC Figure 8. DC Current Gain<br>4 100 25°C<br>f = 1 MHz 75°C<br>3 I T E A  = 0 mA  = 25°C 10 TA�=�-25°C<br>1<br>2<br>0.1<br>1<br>0.01<br>VO = 5 V<br>0<br>0 10 20 30 40 50 0.001 0 1 2 3 4 5 6 7 8 9 10<br>VR, REVERSE BIAS VOLTAGE (V) Vin, INPUT VOLTAGE (V)<br>hFE, DC CURRENT GAIN<br>, COLLECTOR EMITTER SATURATION VOLTAGE (V)<br>CE(sat)<br>V<br>Cob, CAPACITANCE (pF)<br>IC, COLLECTOR CURRENT (mA)<br>**----- End of picture text -----**<br>


**Figure 9. Output Capacitance** 

**Figure 10. Output Current versus Input Voltage** 

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10<br>VO = 0.2 V TA�=�-25°C<br>25°C<br>75°C<br>1<br>0.1<br>0 10 20 30 40 50<br>IC, COLLECTOR CURRENT (mA)<br>Vin, INPUT VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


**Figure 11. Input Voltage versus Output Current** 

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**EMC2DXV5T1G, EMC3DXV5T1G, EMC4DXV5T1G, EMC5DXV5T1G** 

## **TYPICAL ELECTRICAL CHARACTERISTICS − EMC3DXV5T1 PNP TRANSISTOR** 

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1<br>I C /I B  = 10<br>TA�=�-25°C<br>�0.1<br>25°C<br>75°C<br>�0.01<br>0 �20 �40 50<br>IC, COLLECTOR CURRENT (mA)<br>, COLLECTOR EMITTER SATURATION VOLTAGE (V)<br>CE(sat)<br>V<br>**----- End of picture text -----**<br>


**Figure 12. VCE(sat) versus IC** 

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1000<br>VCE = 10 V<br>T A �=�75°C<br>25°C<br>100 -25°C<br>10<br>1 10 100<br>IC, COLLECTOR CURRENT (mA)<br>hFE, DC CURRENT GAIN<br>**----- End of picture text -----**<br>


**Figure 13. DC Current Gain** 

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4 100 75°C 25°C<br>f = 1 MHz<br>3 l T EA = 0 mA  = 25°C 10 TA = -25 ° C<br>1<br>2<br>�0.1<br>1<br>�0.01 VO = 5 V<br>0 �0.001<br>0 10 20 30 40 50 0 1 �2 3 �4 �5 �6 �7 �8 �9 10<br>VR, REVERSE BIAS VOLTAGE (V) Vin, INPUT VOLTAGE (V)<br>Figure 14. Output Capacitance Figure 15. Output Current versus Input<br>Voltage<br>100<br>VO = 0.2 V<br>TA�=�-25°C<br>10<br>25°C<br>75°C<br>1<br>�0.1<br>0 10 �20 �30 �40 �50<br>IC, COLLECTOR CURRENT (mA)<br>Cob, CAPACITANCE (pF)<br>IC, COLLECTOR CURRENT (mA)<br>Vin, INPUT VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


**Figure 16. Input Voltage versus Output Current** 

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**EMC2DXV5T1G, EMC3DXV5T1G, EMC4DXV5T1G, EMC5DXV5T1G** 

## **TYPICAL ELECTRICAL CHARACTERISTICS − EMC3DXV5T1 NPN TRANSISTOR** 

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1<br>I C /II B  = 10<br>25 ° C<br>0.1 T A �=�-25°C-25°C25°C°CC<br>75°C5°C°CC<br>0.01<br>0.001<br>0 20 40 50<br>IC, COLLECTOR CURRENT (mA)C, COLLECTOR CURRENT (mA), COLLECTOR CURRENT (mA)<br>, COLLECTOR EMITTER SATURATION VOLTAGE (V)<br>CE(sat)<br>V<br>**----- End of picture text -----**<br>


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1 1000<br>VCE = 10 V<br>I C /II B  = 10<br>TA�=�75°C<br>25 ° C 25° C<br>0.1 T A �=�-25°C-25°C25°C°CC 75°C5°C°CC -25°C<br>100<br>0.01<br>0.001 0 20 40 50 101 10 100<br>IC, COLLECTOR CURRENT (mA)C, COLLECTOR CURRENT (mA), COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 17. VCE(sat) versus IC Figure 18. DC Current Gain<br>4 100 75°C 25°C<br>f = 1 MHz IE = 0 mA 10 T A �=�-25°C<br>3 T A  = 25°C<br>1<br>2<br>0.1<br>1<br>0.01<br>VO = 5 V<br>0 0.001<br>0 10 20 30 40 50 0 2 4 6 8 10<br>VR, REVERSE BIAS VOLTAGE (V) Vin, INPUT VOLTAGE (V)<br>hFE, DC CURRENT GAIN<br>, COLLECTOR EMITTER SATURATION VOLTAGE (V)<br>CE(sat)<br>V<br>Cob, CAPACITANCE (pF)<br>IC, COLLECTOR CURRENT (mA)<br>**----- End of picture text -----**<br>


**Figure 19. Output Capacitance** 

**Figure 20. Output Current versus Input Voltage** 

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100<br>VO = 0.2 V<br>T A �=�-25°C<br>10<br>75°C 25°C<br>1<br>0.1<br>0 10 20 30 40 50<br>IC, COLLECTOR CURRENT (mA)<br>Vin, INPUT VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


**Figure 21. Input Voltage versus Output Current** 

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**EMC2DXV5T1G, EMC3DXV5T1G, EMC4DXV5T1G, EMC5DXV5T1G** 

## **TYPICAL ELECTRICAL CHARACTERISTICS −EMC4DXV5T1 PNP TRANSISTOR** 

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**----- Start of picture text -----**<br>
1 180<br>I C /I B = 10 TA�=�-25 ° C 160 VCE = 10 V 25°C TA�=�75°C<br>140<br>0.1 75°C 25°C 120 -25°C<br>100<br>80<br>0.01 60<br>40<br>20<br>0.001 0<br>0 20 40 60 80 1 2 4 6 8 10 15 20 40 50 60 70 80 90 100<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 22. VCE(sat) versus IC Figure 23. DC Current Gain<br>4.5 100<br>4 f = 1 MHz TA�=�75°C 25°C<br>lE = 0 V<br>3.5 TA = 25°C<br>3 -25°C<br>2.5<br>10<br>2<br>1.5<br>1<br>VO = 5 V<br>0.5<br>0<br>0 2 4 6 8 10 15 20 25 30 35 40 45 50 1 0 2 4 6 8 10<br>VR, REVERSE BIAS VOLTAGE (V) Vin, INPUT VOLTAGE (V)<br>Figure 24. Output Capacitance Figure 25. Output Current versus Input Voltage<br>10 +12 V<br>VO = 0.2 V 25°C<br>TA�=�-25°C<br>75°C Typical Application<br>for PNP BRTs<br>1<br>LOAD<br>0.1<br>0 10 20 30 40 50<br>IC, COLLECTOR CURRENT (mA)<br>hFE, DC CURRENT GAIN (NORMALIZED)<br>, COLLECTOR EMITTER SATURATION VOLTAGE (V)<br>CE(sat)<br>V<br>Cob, CAPACITANCE (pF)<br>IC, COLLECTOR CURRENT (mA)<br>Vin, INPUT VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


**Figure 26. Input Voltage versus Output Current** 

**Figure 27. Inexpensive, Unregulated Current Source** 

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**EMC2DXV5T1G, EMC3DXV5T1G, EMC4DXV5T1G, EMC5DXV5T1G** 

## **TYPICAL ELECTRICAL CHARACTERISTICS − EMC5DXV5T1 PNP TRANSISTOR** 

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**----- Start of picture text -----**<br>
1 1000<br>IC/IB = 10 VCE = 10 V<br>TA�=�75°C<br>25°C<br>100 -25°C<br>TA�=�75°C<br>25°C<br>0.1 -25°C<br>10<br>0.01 1<br>0 10 20 30 40 50 60 1 10 100 1000<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 28. VCE(sat) versus IC Figure 29. DC Current Gain<br>12 100<br>f = 1 MHz<br>10 I TEA  = 0 mA  = 25°C 10 75°C<br>8<br>6 1<br>4 VO = 5 V<br>SERIES 1 0.1<br>2 TA�=�-25°C<br>25°C<br>0 0.01<br>0 5 10 15 20 25 30 35 40 45 0 2 4 6 8 10 12<br>VR, REVERSE BIAS VOLTAGE (V) Vin, INPUT VOLTAGE (V)<br>hFE, DC CURRENT GAIN<br>, COLLECTOR EMITTER SATURATION VOLTAGE (V)<br>CE(sat)<br>V<br>Cob, CAPACITANCE (pF)<br>IC, COLLECTOR CURRENT (mA)<br>**----- End of picture text -----**<br>


**Figure 30. Output Capacitance** 

**Figure 31. Output Current versus Input Voltage** 

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**EMC2DXV5T1G, EMC3DXV5T1G, EMC4DXV5T1G, EMC5DXV5T1G** 

## **TYPICAL ELECTRICAL CHARACTERISTICS − EMC4DXV5T1, EMC5DXV5T1 NPN TRANSISTOR** 

**==> picture [492 x 393] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 1000<br>IC/IB = 10 VCE = 10 V<br>TA�=�75°C<br>1 25 ° C<br>-25°C<br>°<br>TA�=�-25°C 25 C 100<br>75°C<br>0.1<br>0.01 0 20 40 50 10 1 10 100<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 32. VCE(sat) versus IC Figure 33. DC Current Gain<br>1 f = 1 MHz 100 75°C 25°C<br>IE = 0 mA<br>0.8 T A  = 25°C 10 TA = -25°C<br>0.6 1<br>0.4 0.1<br>0.2 0.01<br>V O = 5 V<br>0 0.001<br>0 10 20 30 40 50 0 2 4 6 8 10<br>VR, REVERSE BIAS VOLTAGE (V) Vin, INPUT VOLTAGE (V)<br>hFE, DC CURRENT GAIN<br>, COLLECTOR EMITTER SATURATION VOLTAGE (V)<br>CE(sat)<br>V<br>Cob, CAPACITANCE (pF)<br>IC, COLLECTOR CURRENT (mA)<br>**----- End of picture text -----**<br>


**Figure 34. Output Capacitance** 

**Figure 35. Output Current versus Input Voltage** 

**==> picture [232 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>VO = 0.2 V<br>°<br>TA�=�-25 C 25 ° C<br>10 75°C<br>1<br>0.1<br>0 10 20 30 40 50<br>IC, COLLECTOR CURRENT (mA)<br>Vin, INPUT VOLTAGE (VOLTS)<br>**----- End of picture text -----**<br>


**Figure 36. Input Voltage versus Output Current** 

**http://onsemi.com** 

**10** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

**SOT−553, 5 LEAD** CASE 463B ISSUE C 

**SCALE 4:1** 

## DATE 20 MAR 2013 

**==> picture [195 x 106] intentionally omitted <==**

**----- Start of picture text -----**<br>
D<br>A<br>−X−<br>L<br>5 4<br>E<br>−Y− HE<br>1 2 3<br>b 5 PL c<br>e 0.08 (0.003) M X Y<br>**----- End of picture text -----**<br>


NOTES: 

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 

2. CONTROLLING DIMENSION: MILLIMETERS 

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 

|**DIM**|**MILLIMETERS**|**MILLIMETERS**|**MILLIMETERS**|**INCHES**|**INCHES**|**INCHES**|
|---|---|---|---|---|---|---|
||**MIN**|**NOM**|**MAX**|**MIN**|**NOM**|**MAX**|
|**A**|0.50|0.55|0.60|0.020|0.022|0.024|
|**b**|0.17|0.22|0.27|0.007|0.009|0.011|
|**c**|0.08|0.13|0.18|0.003|0.005|0.007|
|**D**|1.55|1.60|1.65|0.061|0.063|0.065|
|**E**|1.15|1.20<br>|1.25|0.045|0.047<br>|0.049<br>|
|**e**<br>**L**|0.50 BSC<br>0.10<br>0.20<br>0.30|||0.004<br>0.008<br>0.012<br>0.020 BSC|||
|**HE**|1.55|1.60|1.65|0.061|0.063|0.065|



## **RECOMMENDED** 

## **SOLDERING FOOTPRINT*** 

**==> picture [144 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.3<br>0.0118<br>0.45<br>0.0177<br>1.0<br>1.35 0.0394<br>0.0531<br>0.5 0.5<br>0.0197 0.0197<br>**----- End of picture text -----**<br>


## **GENERIC MARKING DIAGRAM*** 

XXM � � 

XX = Specific Device Code M = Date Code � = Pb−Free Package (Note: Microdot may be in either location) 

*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ � ”, may or may not be present. 

SCALE 20:1 ~~�~~ inches[mm] ~~�~~ 

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

STYLE 1: STYLE 2: STYLE 3: PIN 1. BASE PIN 1. CATHODE PIN 1. ANODE 1 2. EMITTER 2. COMMON ANODE 2. N/C 3. BASE 3. CATHODE 2 3. ANODE 2 4. COLLECTOR 4. CATHODE 3 4. CATHODE 2 5. COLLECTOR 5. CATHODE 4 5. CATHODE 1 STYLE 6: STYLE 7: STYLE 8: PIN 1. EMITTER 2 PIN 1. BASE PIN 1. CATHODE 2. BASE 2 2. EMITTER 2. COLLECTOR 3. EMITTER 1 3. BASE 3. N/C 4. COLLECTOR 1 4. COLLECTOR 4. BASE 5. COLLECTOR 2/BASE 1 5. COLLECTOR 5. EMITTER 

STYLE 3: STYLE 4: STYLE 5: PIN 1. ANODE 1 PIN 1. SOURCE 1 PIN 1. ANODE 2. N/C 2. DRAIN 1/2 2. EMITTER 3. ANODE 2 3. SOURCE 1 3. BASE 4. CATHODE 2 4. GATE 1 4. COLLECTOR 5. CATHODE 1 5. GATE 2 5. CATHODE STYLE 8: STYLE 9: PIN 1. CATHODE PIN 1. ANODE 2. COLLECTOR 2. CATHODE 3. N/C 3. ANODE 4. BASE 4. ANODE 5. EMITTER 5. ANODE 

**DOCUMENT NUMBER: 98AON11127D** Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed ~~**STATUS: ON SEMICONDUCTOR STANDARD**~~ © Semiconductor Components Industries, LLC, 2002 **1** versions are uncontrolled except when stamped  Case Outline Number: **January, 2002** ~~**NEW STANDARD:**~~ **− Rev. 01O** “CONTROLLED COPY” in red. **463B** © Semiconductor Components Industries, LLC, 2002 **http://onsemi.com** Case Outline Number: **October, 2002 − Rev. 0DESCRIPTION: SOT−553, 5 LEAD 1 PAGE 1 OF 2XXX** 

|**DOCUMENT NUMBER:**<br>**98AON11127D**<br>**PAGE 2 OF 2**<br>~~— ©~~<br>~~———~~|**DOCUMENT NUMBER:**<br>**98AON11127D**<br>**PAGE 2 OF 2**<br>~~— ©~~<br>~~———~~|**DOCUMENT NUMBER:**<br>**98AON11127D**<br>**PAGE 2 OF 2**<br>~~— ©~~<br>~~———~~|**DOCUMENT NUMBER:**<br>**98AON11127D**<br>**PAGE 2 OF 2**<br>~~— ©~~<br>~~———~~|
|---|---|---|---|
|**ISSUE**|**REVISION**||**DATE**|
|A|ADDED STYLES 3−9. REQ. BY D. BARLOW||11 NOV 2003|
|B|ADDED NOMINAL VALUES AND UPDATED GENERIC MARKING DIAGRAM. REQ.||27 MAY 2005|
||BY HONG XIAO|||
|C|UPDATED DIMENSIONS D, E, AND HE. REQ. BY J. LETTERMAN.||20 MAR 2013|



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Case Outline Number: 

© Semiconductor Components Industries, LLC, 2013 **March, 2013 − Rev. C** 

**463B** 

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**==> picture [232 x 43] intentionally omitted <==**



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