# Power MOSFET, N Channel, 80 V, 74 A, 7000 µohm, TSDSON-FL, Surface Mount

![Product image](https://novapart.co/image/farnell:3155101RL/)

**URL**: https://novapart.co/products/BSZ070N08LS5ATMA1/power-mosfet-n-channel-80-v-74-a-7000-ohm-tsdson
**SKU**: BSZ070N08LS5ATMA1
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.7790
**Stock**: 1000+
**Lead Time**: 358 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:40A; Drain Source Voltage Vds:80V; On Resistance Rds(on):0.0059ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:1.7V

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | OptiMOS 5 |
| Qualification | - |
| Power Dissipation | 69W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 69W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.0059ohm |
| Transistor Case Style | TSDSON-FL |
| Drain Source Voltage Vds | 80V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 74A |
| Drain Source On State Resistance | 7000µohm |
| Automotive Qualification Standard | - |
| Gate Source Threshold Voltage Max | 2.3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3155101RL/)

**BSZ070N08LS5** 

## **MOSFET** 

## **OptiMOS[ª]** 

## **Features** 

**==> picture [200 x 31] intentionally omitted <==**

**----- Start of picture text -----**<br>
* Optimized technology for DC/DC converters<br>« Excellent gate charge x R DS(on) product<br>¢ Very low on-resistance R DS(on)<br>**----- End of picture text -----**<br>


|**Parameter**<br>1<br>Key ~~Performance~~|**Value**<br>~~Performance~~ ~~Parameters~~|**Unit**<br>~~Parameters~~|
|---|---|---|
|_V_DS|80|V|
|_R_DS(on),max|7.0|mΩ|
|_I_D|40|A|
|_Q_oss|29|nC|
|_Q_G(0V..4.5V)|14|nC|



**==> picture [137 x 208] intentionally omitted <==**

**----- Start of picture text -----**<br>
(enlarged source interconnection)<br>=> tg, Zaz,<br>. “Ze<br>2™<br>D 4<br>S 1 8 D<br>S 2 7 D<br>T i l<br>S 3 | ( =) i 6 D<br>G 4 5 D<br>**----- End of picture text -----**<br>


|~~Type/OrderingCode~~<br>~~**|**~~|**Package**<br>~~**|**~~|**Marking**|__Related Links|
|---|---|---|---|
|BSZ070N08LS5<br>~~Type/OrderingCode~~<br>~~**|**~~|PG-TSDSON-8 FL<br>~~**|**~~|070N08L|-|



1) J-STD20 and JESD22 

Final Data Sheet 

1 

**OptiMOS[ª] 5�Power-Transistor,�80�V BSZ070N08LS5** 

**==> picture [120 x 53] intentionally omitted <==**

## **Table�of�Contents** 

Description   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 

Final Data Sheet 

2 

Rev.�2.2,��2016-08-18 

**OptiMOS[ª] 5�Power-Transistor,�80�V BSZ070N08LS5** 

**==> picture [120 x 53] intentionally omitted <==**

**1�����Maximum�ratings** at� _T_ A=25�°C,�unless�otherwise�specified 

## **Table�2�����Maximum�ratings** 

|**Table2Maximumratings**|||||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Continuous drain current|_I_D|-<br>-<br>-|-<br>-<br>-|40<br>40<br>13|A|_T_C=25°C<br>_T_C=100°C<br>_T_A=25°C,_R_thJA=60K/W1)|
|Pulsed drain current2)|_I_D,pulse|-|-|160|A|_T_C=25°C|
|Avalanche energy, single pulse3)|_E_AS|-|-|104|mJ|_I_D=20A,_R_GS=25Ω|
|Gate source voltage|_V_GS|-20|-|20|V|-|
|Power dissipation|_P_tot|-|-|69|W|_T_C=25°C|
|Operating and storage temperature|_T_j,_T_stg|-55|-|150|°C|IEC climatic category;<br>DIN IEC 68-1: 55/150/56|



## **2�����Thermal�characteristics** 

## **Table�3�����Thermal�characteristics** 

|**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**|
|---|---|---|---|---|---|---|
|||**Min.**|**Typ.**|**Max.**|||
|Thermal resistance, junction - case,<br>bottom|_R_thJC|-|1.1|1.8|K/W|-|
|Device on PCB,<br>minimal footprint|_R_thJA|-|-|62|K/W|-|
|Device on PCB,<br>6 cm2cooling area1)|_R_thJA|-|-|60|K/W|-|



> 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 

> 2) See Diagram 3 for more detailed information 

> 3) See Diagram 13 for more detailed information 

Final Data Sheet 

3 

Rev.�2.2,��2016-08-18 

**OptiMOS[ª] 5�Power-Transistor,�80�V BSZ070N08LS5** 

**==> picture [120 x 53] intentionally omitted <==**

## **3�����Electrical�characteristics** 

## **Table�4�����Static�characteristics** 

|**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**|
|---|---|---|---|---|---|---|
|||**Min.**|**Typ.**|**Max.**|||
|Drain-source breakdown voltage|_V_(BR)DSS|80|-|-|V|_V_GS=0V,_I_D=1mA|
|Gate threshold voltage|_V_GS(th)|1.1|1.7|2.3|V|_V_DS=_V_GS,_I_D=36µA|
|Zero gate voltage drain current|_I_DSS|-<br>-|0.1<br>10|1<br>100|µA|_V_DS=80V,_V_GS=0V,_T_j=25°C<br>_V_DS=80V,_V_GS=0V,_T_j=125°C|
|Gate-source leakage current|_I_GSS|-|1|100|nA|_V_GS=20V,_V_DS=0V|
|Drain-source on-state resistance|_R_DS(on)|-<br>-|7.4<br>5.9|9.4<br>7.0|mΩ|_V_GS=4.5V,_I_D=10A<br>_V_GS=10V,_I_D=20A|
|Gate resistance1)|_R_G|-|1.3|2|Ω|-|
|Transconductance|_g_fs|26|52|-|S||_V_DS|>2|_I_D|_R_DS(on)max,_I_D=20A|



## **Table�5�����Dynamic�characteristics** 

|**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**|
|---|---|---|---|---|---|---|
|||**Min.**|**Typ.**|**Max.**|||
|Input capacitance1)|_C_iss|-|1800|2340|pF|_V_GS=0V,_V_DS=40V,_f_=1MHz|
|Output capacitance1)|_C_oss|-|280|364|pF|_V_GS=0V,_V_DS=40V,_f_=1MHz|
|Reverse transfer capacitance1)|_C_rss|-|12|21|pF|_V_GS=0V,_V_DS=40V,_f_=1MHz|
|Turn-on delay time|_t_d(on)|-|6.1|-|ns|_V_DD=40V,_V_GS=10V,_I_D=20A,<br>_R_G,ext=3Ω|
|Rise time|_t_r|-|4.8|-|ns|_V_DD=40V,_V_GS=10V,_I_D=20A,<br>_R_G,ext=3Ω|
|Turn-off delay time|_t_d(off)|-|24.6|-|ns|_V_DD=40V,_V_GS=10V,_I_D=20A,<br>_R_G,ext=3Ω|
|Fall time|_t_f|-|5.8|-|ns|_V_DD=40V,_V_GS=10V,_I_D=20A,<br>_R_G,ext=3Ω|
|**Table6Gatechargecharacteristics2)**|||||||
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Gate to source charge|_Q_gs|-|5|-|nC|_V_DD=40V,_I_D=20A,_V_GS=0to4.5V|
|Gate to drain charge1)|_Q_gd|-|5|7|nC|_V_DD=40V,_I_D=20A,_V_GS=0to4.5V|
|Switchingcharge|_Q_sw|-|6.9|-|nC|_V_DD=40V,_I_D=20A,_V_GS=0to4.5V|
|Gate charge total1)|_Q_g|-|14.1|18|nC|_V_DD=40V,_I_D=20A,_V_GS=0to4.5V|
|Gate plateau voltage|_V_plateau|-|2.9|-|V|_V_DD=40V,_I_D=20A,_V_GS=0to4.5V|
|Gate charge total, sync. FET|_Q_g(sync)|-|25|-|nC|_V_DS=0.1V,_V_GS=0to10V|
|Output charge1)|_Q_oss|-|29|39|nC|_V_DD=40V,_V_GS=0V|



> 1) Defined by design. Not subject to production test 

> 2) See ″ Gate charge waveforms ″ for parameter definition 

Final Data Sheet 

Rev.�2.2,��2016-08-18 

4 

**OptiMOS[ª] 5�Power-Transistor,�80�V BSZ070N08LS5** 

**==> picture [120 x 53] intentionally omitted <==**

## **Table�7�����Reverse�diode** 

|**Table7Reversediode**|||||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Diode continous forward current|_I_S|-|-|40|A|_T_C=25°C|
|Diode pulse current|_I_S,pulse|-|-|160|A|_T_C=25°C|
|Diode forward voltage|_V_SD|-|0.85|1.2|V|_V_GS=0V,_I_F=20A,_T_j=25°C|
|Reverse recoverytime1)|_t_rr|-|32|64|ns|_V_R=40V,_I_F=20A,d_i_F/d_t_=100A/µs|
|Reverse recoverycharge1)|_Q_rr|-|27|54|nC|_V_R=40V,_I_F=20A,d_i_F/d_t_=100A/µs|



1) Defined by design. Not subject to production test Final Data Sheet 

Rev.�2.2,��2016-08-18 

5 

**OptiMOS[ª] BSZ070N08LS5** 

**==> picture [539 x 633] intentionally omitted <==**

**----- Start of picture text -----**<br>
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Final Data Sheet 

6 

**OptiMOS[ª] BSZ070N08LS5** 

**==> picture [528 x 641] intentionally omitted <==**

**----- Start of picture text -----**<br>
160 15<br>10 V<br>6 V<br>| A7|  LL) FA | | | | | | [| ft ff]<br>4.5 V<br>12<br>120 WT) See<br>4 V<br>4 V<br>| —_—— se<br>9 4.5 V<br>_ W....... |, Ses 5 V<br>80 5.5 V<br>. © SS SE 6 V<br>ff 3.5 V 6 a a ee<br>10 V<br>_—__ ee<br>| Aa a<br>40<br>3<br>3 V<br>| | | | | ft | f ft ff<br>0 yrefefefef) 0 | | [| | ft | f ft fl<br>0 1 2 3 4 5 0 20 40 60 80 100<br>V DS [V] I D [A]<br>I D=f( V DS T j V GS R DS(on)=f( I D T j V GS<br>160 120<br>TTLLWELLI) Geers<br>100<br>CCAP) eee Ee<br>120<br>Geer<br>80<br>PCT) Rae<br>Z 80 TTT| |,es 60 |Re| | vi | | | td<br>CAE) EEE EEE<br>40<br>AE) pA<br>40<br>AERP<br>20<br>EE) A | | dt | |<br>150 °C<br>25 °C<br>0 PT ZL) 0 ARRPi | | | | i ft th+<br>0 2 4 6 8 0 20 40 60 80 100<br>V GS [V] I D [A]<br>I D=f( V GS V DS|>2| I D| R DS(on)max T j g fs=f( I D T j<br>] Ω<br>I D<br>DS(on)<br>R<br>I D fs g<br>**----- End of picture text -----**<br>


Final Data Sheet 

7 

**OptiMOS[ª] BSZ070N08LS5** 

**==> picture [528 x 282] intentionally omitted <==**

**----- Start of picture text -----**<br>
15 PT tT TE EE EE ET 2.5 ey] ty ty ty tp bd<br>12 PtPt tT|  ttttt | tett ttrE tT| TtPd 2.0 Tht_  ttle<br>CEEEEEr rr) RSET<br>360 µA<br>9 TO 1.5 ONK<br>36 µA<br>max<br>Coo err le CO PRS<br>typ<br>63 BpPeperPt 240 2a | 1.00.5 Cope™\ee<br>Pt | tt tT tt te tT Tt<br>Pt tT ttt te tT te tT Tt ] ty ty ty} tp by<br>0 Pt tT ttt tt ttTtT ttTy 0.0 THT PtP<br>-60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180<br>T j °C] T j [°C]<br>R DS(on)=f( T j I D V GS V GS(th)=f( T j V GS= V DS I D<br>] Ω<br> [m<br>GS(th)<br>DS(on) V<br>R<br>**----- End of picture text -----**<br>


**==> picture [527 x 283] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 [4] 10 [3]<br>= Se<br>25 °C<br>150 °C<br>r | {| | [| [| [| [| [ [| [T [ | J T T | (| 25 °C, max ee<br>eePt tT tT te I = 150 °C, max -=a=—=—— eeee<br>Ciss<br>10 [3] MEET ) 10 [2] L e<br>Coss<br>SS ee |<br>yp | | | TN i es ee es 8 es GY 2S<br>ce feoopoNecerrere<br>& eee fe S e<br>Ki tT ft | NPP tT tT Tt x e<br>|<br>AHP ee ee<br>PINE ELLE |Ear<br>10 [2] 10 [1] TE<br>a Crss a |<br>PTPt tTTT;| PNALTET EEET EEET ET ET P|eeft; ft ff | | f| tfee<br>TELA}<br>10 [1] 10 [0]<br>0 20 40 60 80 0.0 0.5 1.0 1.5 2.0 2.5<br>V DS V SD<br>[Vv] [Vv]<br>C =f( V DS V GS f I F=f( V SD T j<br>C I F<br>**----- End of picture text -----**<br>


Final Data Sheet 

8 

**OptiMOS[ª] BSZ070N08LS5** 

**==> picture [526 x 283] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 [2] 10<br>a ee ee Vy,<br>-—}— A HHH ee) a<br>LT TTT UT CECT TTT TTT TTT wy<br>aPT TT TTT 8 ee VAae<br>40 V<br>te  | 6<br>« 10 [1] UT NUIINGTIII /<br>25 °C<br>LUNPEE ONUINGMEH 100 °C NECHHtH fs ETF 16 V Vy 64 V<br>a 125 °C ee 4 Ae<br>NCEA VA<br>PTT PNEATING TTT Ae<br>Pot TT PENT NETS WA ,<br>ET TEIN NU f e<br>2<br>HIE ELUNE ASU Ane ne<br>UIINENII) Zo<br>10 [0] 0<br>TI NI<br>10 [0] 10 [1] 10 [2] 10 [3] 0 5 10 15 20 25 30<br>t AV [us] Q gate [nC]<br>I AS=f( t AV R GS Ω T j(start) V GS=f( Q gate I D V DD<br>I AV V GS<br>**----- End of picture text -----**<br>


Po Gate charge waveforms 

**==> picture [259 x 282] intentionally omitted <==**

**----- Start of picture text -----**<br>
90<br>TEE<br>85<br>LE<br>a<br>| er<br>e= 80 titera<br>et<br>PTE<br>75<br>70<br>FLEET TET<br>-60 -20 20 60 100 140 180<br>T j [°C]<br>V BR(DSS)=f( T j I D<br>BR(DSS)<br>V<br>**----- End of picture text -----**<br>


Final Data Sheet 

9 

**OptiMOS[ª] BSZ070N08LS5** 

Final Data Sheet 

10 

**OptiMOS[ª] BSZ070N08LS5** 

## BSZ070N08LS5 

## Previous Revision 

|Revision|Date|Subjects (major changes since last revision)|
|---|---|---|
|2.0|2016-03-23|Release of final version|
|2.1|2016-04-21|Update "Gate threshold voltage"|
|2.2|2016-08-18|Update Qsw|



## **erratum@infineon.com** 

## **Information** 

## **www.infineon.com** ). 

## **Warnings** 

Final Data Sheet 

11 



## Links

- [View this product on Novapart](https://novapart.co/products/BSZ070N08LS5ATMA1/power-mosfet-n-channel-80-v-74-a-7000-ohm-tsdson)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/bsz070n08ls5atma1/mosfet-n-ch-80v-74a-tsdson-fl/dp/3155101RL)
---

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