# Power MOSFET, N Channel, 80 V, 100 A, 4000 µohm, TDSON, Surface Mount

![Product image](https://novapart.co/image/farnell:2709860/)

**URL**: https://novapart.co/products/BSC040N08NS5ATMA1/power-mosfet-n-channel-80-v-100-a-4000-ohm-tdson
**SKU**: BSC040N08NS5ATMA1
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.7840
**Stock**: 1000+
**Lead Time**: 120 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:100A; Drain Source Voltage Vds:80V; On Resistance Rds(on):0.0034ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V; Powe

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | OptiMOS 5 |
| Qualification | - |
| Power Dissipation | 104W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TDSON |
| Drain Source Voltage Vds | 80V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 100A |
| Drain Source On State Resistance | 4000µohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2709860/)

## MOSFET 

**OptiMOS[TM]** OptiMOS[TM] 5 BSC040N08NS5 

Final 

## **OptiMOS[TM]** 5 Power-Transistor, BSC040N08NS5 80 V 

## **Features** 

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**----- Start of picture text -----**<br>
1)<br>**----- End of picture text -----**<br>


|**Parameter**|**Value**|**Unit**|
|---|---|---|
|_V_DS|80|V|
|_R_DS(on),max|4.0|mΩ|
|_I_D|100|A|
|_Q_oss|52|nC|
|_Q_G(0V..10V)|43|nC|



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||**Package**|**Marking**||
|---|---|---|---|
|BSC040N08NS5|PG-TDSON-8|040N08NS|-|



1) J-STD20 and JESD22 

Final Data Sheet 

2 

**OptiMOS[TM] 5�Power-Transistor,�80�V** 

BSC040N08NS5 

**==> picture [146 x 65] intentionally omitted <==**

## **Table�of�Contents** 

Description   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Maximum ratings   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Thermal characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics diagrams  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package Outlines  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision History  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimer   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 

Final Data Sheet 

3 

Rev.�2.0,��2014-12-27 

**OptiMOS[TM] 5�Power-Transistor,�80�V** 

BSC040N08NS5 

**==> picture [146 x 65] intentionally omitted <==**

## **2�����Maximum�ratings** 

at� _T_ j�=�25�°C,�unless�otherwise�specified 

## **Table�2�����Maximum�ratings** 

|**Table2Maximumratings**|||||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Continuous drain current|_I_D|-<br>-<br>-|-<br>-<br>-|100<br>76<br>19|A|_V_GS=10V,_T_C=25°C<br>_V_GS=10V,_T_C=100°C<br>_V_GS=10V,_T_C=25°C,_R_thJA=50K/W1)|
|Pulsed drain current2)|_ID,pulse_|-|-|400|A|_T_C=25°C|
|Avalanche energy, single pulse3)|_E_AS|-|-|120|mJ|_I_D=50A,_R_GS=25Ω|
|Gate source voltage|_V_GS|-20|-|20|V|-|
|Power dissipation|_P_tot|-<br>-|-<br>-|104<br>2.5|W|_T_C=25°C<br>_T_A=25°C,_R_thJA=50K/W1)|
|Operating and storage temperature|_T_j,_T_stg|-55|-|150|°C|IEC climatic category;<br>DIN IEC 68-1: 55/150/56|



## **3�����Thermal�characteristics** 

## **Table�3�����Thermal�characteristics** 

|**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**|
|---|---|---|---|---|---|---|
|||**Min.**|**Typ.**|**Max.**|||
|Thermal resistance, junction - case,<br>bottom|_R_thJC|-|0.7|1.2|K/W|-|
|Thermal resistance, junction - case,<br>top|_R_thJC|-|-|20|K/W|-|
|Device on PCB,<br>6 cm2cooling area1)|_R_thJA|-|-|50|K/W|-|



> 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 

> 2) See figure 3 for more detailed information 

> 3) See figure 13 for more detailed information 

Final Data Sheet 

Rev.�2.0,��2014-12-27 

4 

**OptiMOS[TM] 5�Power-Transistor,�80�V** 

BSC040N08NS5 

**==> picture [146 x 65] intentionally omitted <==**

## **4�����Electrical�characteristics** 

## **Table�4�����Static�characteristics** 

|**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**|
|---|---|---|---|---|---|---|
|||**Min.**|**Typ.**|**Max.**|||
|Drain-source breakdown voltage|_V_(BR)DSS|80|-|-|V|_V_GS=0V,_I_D=1mA|
|Gate threshold voltage|_V_GS(th)|2.2|3.0|3.8|V|_V_DS=_V_GS,_I_D=67µA|
|Zero gate voltage drain current|_I_DSS|-<br>-|0.1<br>10|1<br>100|µA|_V_DS=80V,_V_GS=0V,_T_j=25°C<br>_V_DS=80V,_V_GS=0V,_T_j=125°C|
|Gate-source leakage current|_I_GSS|-|10|100|nA|_V_GS=20V,_V_DS=0V|
|Drain-source on-state resistance|_R_DS(on)|-<br>-|3.4<br>4.8|4.0<br>5.7|mΩ|_V_GS=10V,_I_D=50A<br>_V_GS=6V,_I_D=25A|
|Gate resistance1)|_R_G|-|1.1|1.7|Ω|-|
|Transconductance|_g_fs|45|90|-|S||_V_DS|>2|_I_D|_R_DS(on)max,_I_D=50A|
|**Table5Dynamiccharacteristics**|||||||
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Input capacitance1)|_C_iss|-|3000|3900|pF|_V_GS=0V,_V_DS=40V,_f_=1MHz|
|Output capacitance1)|_C_oss|-|500|650|pF|_V_GS=0V,_V_DS=40V,_f_=1MHz|
|Reverse transfer capacitance1)|Crss|-|24|42|pF|_V_GS=0V,_V_DS=40V,_f_=1MHz|
|Turn-on delay time|_t_d(on)|-|14|-|ns|_V_DD=40V,_V_GS=10V,_I_D=50A,<br>_R_G,ext=3Ω|
|Rise time|_t_r|-|8|-|ns|_V_DD=40V,_V_GS=10V,_I_D=50A,<br>_R_G,ext=3Ω|
|Turn-off delay time|_t_d(off)|-|25|-|ns|_V_DD=40V,_V_GS=10V,_I_D=50A,<br>_R_G,ext=3Ω|
|Fall time|_t_f|-|6|-|ns|_V_DD=40V,_V_GS=10V,_I_D=50A,<br>_R_G,ext=3Ω|



1) Defined by design. Not subject to production test. Final Data Sheet 

Rev.�2.0,��2014-12-27 

5 

BSC040N08NS5 

**==> picture [146 x 65] intentionally omitted <==**

## **OptiMOS[TM] 5�Power-Transistor,�80�V** 

## **Table�6�����Gate�charge�characteristics[1)]** 

|**Table6Gatechargecharacte**|**ristics1)**||||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Gate to source charge|_Q_gs|-|14.3|-|nC|_V_DD=40V,_I_D=50A,_V_GS=0to10V|
|Gate charge at threshold|_Q_g(th)|-|8.4|-|nC|_V_DD=40V,_I_D=50A,_V_GS=0to10V|
|Gate to drain charge2)|_Q_gd|-|9.3|14|nC|_V_DD=40V,_I_D=50A,_V_GS=0to10V|
|Switchingcharge|_Q_sw|-|15|-|nC|_V_DD=40V,_I_D=50A,_V_GS=0to10V|
|Gate charge total2)|_Q_g|-|43|54|nC|_V_DD=40V,_I_D=50A,_V_GS=0to10V|
|Gate plateau voltage|_V_plateau|-|4.8|-|V|_V_DD=40V,_I_D=50A,_V_GS=0to10V|
|Gate charge total, sync. FET|_Q_g(sync)|-|37|-|nC|_V_DS=0.1V,_V_GS=0to10V|
|Output charge2)|_Q_oss|-|52|69|nC|_V_DD=40V,_V_GS=0V|
|**Table7Reversediode**|||||||
|**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**|
|||**Min.**|**Typ.**|**Max.**|||
|Diode continuous forward current|_I_S|-|-|95|A|_T_C=25°C|
|Diode pulse current|_I_S,pulse|-|-|400|A|_T_C=25°C|
|Diode forward voltage|_V_SD|-|0.88|1.1|V|_V_GS=0V,_I_F=50A,_T_j=25°C|
|Reverse recoverytime2)|_t_rr|-|42|84|ns|_V_R=40V,_I_F=50A,d_i_F/d_t_=100A/µs|
|Reverse recoverycharge2)|_Q_rr|-|43|86|nC|_V_R=40V,_I_F=50A,d_i_F/d_t_=100A/µs|



> 1) See ″ Gate charge waveforms ″ for parameter definition 2) Defined by design. Not subject to production test. 

Final Data Sheet 

6 

Rev.�2.0,��2014-12-27 

**OptiMOS[TM]** 

5 Power-Transistor, BSC040N08NS5 80 V 

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**----- Start of picture text -----**<br>
120 120<br>100 N ee 100 | TN |<br>80 80<br>60 60<br>40 40<br>20 20<br>0 | | | PN 0 — | | | | |<br>0 25 50 75 100 125 150 175 0 25 50 75 100 125 150 175<br>T C [°C] T C [°C]<br>——TCTCTCTCT P tot=f( T C) C I D=f( TCTCTTCTCYP T C V GS ≥<br>FV —C—SOSOC*‘S<br>P tot I D<br>**----- End of picture text -----**<br>


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10 [3] 10 [1]<br>PE A ST | VV<br>1 µs<br>HE PNET SN il a a ||<br>10 [2] 10 µs 10 [0]<br>0.5<br>100 µs<br>SETHE EF 0.2  EEE me tt<br>SZC TTI TANNIN 1 ms STH = iim 0.1 afl<br>10 [1] 10 [-1]<br>10 ms 0.05<br>0.02<br>PeTTT NEN DC A 0.01 |<br>10 [0] TTTTIINSC NTT ll 10 [-2] att single pulse  TTT<br>Et RH EHH eet rEEe<br>pTENN TTT LT TT TT TET<br>a LTT TTT PETTITT PT<br>NN | CLT LETT LET LEHI EE<br>10 [-1] 10 [-3]<br>10 [-1] 10 [0] 10 [1] 10 [2] 10 [-6] 10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1]<br>V DS IV] t p [s]<br>I D=f( V DS T C D t p Z thJC=f( t p D = t p/ T<br>I D thJC<br>Z<br>**----- End of picture text -----**<br>


Final Data Sheet 

7 

5 Power-Transistor, BSC040N08NS5 80 V 

## **OptiMOS[TM]** 

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**----- Start of picture text -----**<br>
400 9<br>360 10 V 7 V 8 5 V 5.5 V 6 V<br>Pee | SSSSSSSEEEEe<br>| | | {| | Yi tA | fT | a os ee oo<br>320<br>7<br>280 esPAA | FPa oeee<br>6<br>| | | | A Yl | | ft ft A<br>240<br>7 V<br>Se 5 a eo<br>2S 200 amen 6 V Wl a22 2eae<br>2ea eeaaa<br>TL 4 =<br>160 10 V<br>|) EE<br>3<br>120 5.5 V<br>A0/42 eee a======—====—====<br>2<br>80<br>Yo 5 V<br>40 1<br>© Zeeee ee ee<br>GfPO| eeSESEoo<br>0 0 RRR RE EEE<br>0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 50 100 150 200 250 300 350 400<br>V DS I D<br>[Vv] [A]<br>I D=f( V DS T j V GS R DS(on)=f( I D T j V GS<br>] Ω<br>I D<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
320 160<br>a  a a<br>a a | a a<br>280<br>ai<br>a a<br>240 120<br>a|<br>a<br>200<br>| i Oe<br>C/O,<br>a A 160 80<br>aa<br>i<br>120<br>a iye7 2 a<br>80 A a  a A 40 oyiy<br>40<br>Ls<br>150 °C 25 °C<br>aee a<br>0 0<br>0 2 4 6 8 0 20 40 60 80 100 120 140 160<br>V GS [V] I D [A]<br>I D=f( V GS V DS|>2| I D| R DS(on)max T j g fs=f( I D T j<br>I D fs g<br>**----- End of picture text -----**<br>


Final Data Sheet 

8 

**OptiMOS[TM]** 5 Power-Transistor, BSC040N08NS5 80 V 

**==> picture [528 x 599] intentionally omitted <==**

**----- Start of picture text -----**<br>
8 A 5<br>A<br>a a a<br>7 aAOY<br>a7A 4<br>6 CD<br>i .<br>670 µA<br>5 aSo max oAZL Kr 3 SS™ ™<br>a a A 0 co<br>67 µA<br>4 a a a a cl = >a<br>typ<br>3 |aasca =arrSaa 2 ~NS ‘<br>A<br>A<br>2 aaA<br>Aaa a 1<br>1 aa<br>A<br>A<br>0 a 0<br>-60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180<br>T j T j<br>[°C] [°C]<br>R DS(on)=f( T j _ I D =50A; V GS =10V V GS(th)=f( T j V GS= V DS<br>Diagram 11: Typ. capacitances Diagram 12: Forward characteristics of reverse diode<br>10 [4] 10 [3]<br>SR (OC L] 25 °C a |<br>a CC C 150 °C a<br>a ee ee ee ee i 25 °C, max Tt tp ee pee ee<br>aa A i 150 °C, max ee<br>Ciss<br>a ee ee e S e eet<br>10 [3] 10 [2]<br>SS A CO A A A OS A” AOC GG<br>Coss<br>L .—_ OS 2S<br>& IN C———__ = pf pt tT yt tet ay ia<br>p Nf of Pa <x Lt tt tt te ee et TE<br>eS a ee ee ee PTT Tt tT ya ye ET EE<br>10 [2] 10 [1]<br>SSRS CO [oot a<br>LC A)<br>a EN ee ee<br>pf Lt tT tt tt tet at | | TT TTT TT<br>Crss<br>10 [1] 10 [0]<br>0 20 40 60 80 0.0 0.5 1.0 1.5 2.0<br>V DS [V] V SD [V]<br>C =f( V DS ); V GS =0 V; f =1 MHz I F=f( V SD ); parameter: T j<br>] Ω<br> [m<br>GS(th)<br>DS(on) V<br>R<br>C I F<br>**----- End of picture text -----**<br>


Final Data Sheet 

9 

## **OptiMOS[TM]** 5 Power-Transistor, BSC040N08NS5 80 V 

**==> picture [526 x 266] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 [2] 10<br>a PTrT CTE| TTT,ECT TTT TTTTT 9 Pty | | | | tL Aey /f<br>aCR N 8 een,A, 40 V  | |<br>25 °C<br>7<br>ASTON TTT eee | |<br>LEN ON TING TUT V4<br>6<br>16 V 64 V<br>100 °C<br>Z 10 [1] OL UMINNaGIES ee 5 AeY),,<br>SEaa a eeNSSes 4 | i A L LLL<br>125 °C<br>ESSNNTT 3 | /FEF ft ff ft fd<br>ell 2 IA, | | fff tg<br>a eeNEE<br>1<br>OAM NA\ A LLGG LLL LEE<br>10 [0] LAME ENE] 0 7<br>10 [0] 10 [1] 10 [2] 10 [3] 0 10 20 30 40 50<br>t AV [us] Q gate [nC]<br>I AS=f( t AV R GS Ω T j(start) V GS=f( Q gate I D V DD<br>I AV V GS<br>**----- End of picture text -----**<br>


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Gate charge waveforms<br>**----- End of picture text -----**<br>


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86 PETE EL_EEL_EELL<br>PELE ELL AE<br>84<br>PERERA<br>=e 82 (fil iiyvit i tt<br>PELL<br>80 TAAL EE EL<br>CAEL<br>78<br>YT TT EEL eee<br>76 PELE EEL EE EL<br>-60 -20 20 60 100 140 180<br>T j [°C]<br>V BR(DSS)=f( T j I D<br>BR(DSS)<br>V<br>**----- End of picture text -----**<br>


Final Data Sheet 

10 

**OptiMOS[TM]** 

5 Power-Transistor, BSC040N08NS5 80 V 

**==> picture [85 x 14] intentionally omitted <==**

**----- Start of picture text -----**<br>
EUROPEAN PROJECTION<br>**----- End of picture text -----**<br>


Final Data Sheet 

11 

**OptiMOS[TM]** 

5 Power-Transistor, BSC040N08NS5 80 V 

BSC040N08NS5 

|Previous Revision|Previous Revision||
|---|---|---|
|Revision|Date|Subjects (major changes since last revision)|
|2.0|2014-12-27|Release of final version|



## **erratum@infineon.com** 

## **Information** 

**www.infineon.com** ). 

## **Warnings** 

Final Data Sheet 

12 



## Links

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- [Supplier page](https://es.farnell.com/infineon/bsc040n08ns5atma1/mosfet-n-ch-80v-100a-tdson/dp/2709860)
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