# Power MOSFET, N Channel, 100 V, 17 A, 0.105 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3775950/)

**URL**: https://novapart.co/products/AUIRLR3410/power-mosfet-n-channel-100-v-17-a-0105-ohm-to-252
**SKU**: AUIRLR3410
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.2400
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (27-Jun-2018) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Qualification | AEC-Q101 |
| Power Dissipation | 79W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 17A |
| Drain Source On State Resistance | 0.105ohm |
| Gate Source Threshold Voltage Max | 2V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3775950/)

AUIRLR3410 ~~—~~ 

**AUTOMOTIVE GRADE** 

## ~~Cinfineon~~ 

## **Features** 

HEXFET[® ] Power MOSFET **VDSS 100V RDS(on)            max. 105m**  **ID 17A** ~~—-—~~ D S G D-Pak AUIRLR3410 

- Advanced Planar Technology 

- Low On-Resistance 

- Logic Level Gate Drive 

- Dynamic dV/dT Rating 

- 175°C Operating Temperature 

- Fast Switching 

- Fully Avalanche Rated 

- Repetitive Avalanche Allowed up to Tjmax 

- Lead-Free, RoHS Compliant 

- Automotive Qualified * 

## **Description** 

Specifically designed for Automotive applications, this Stripe Planar design of HEXFET® Power MOSFETs utilizes the latest D-Pak processing techniques to achieve low on-resistance per silicon AUIRLR3410 area. This benefit combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well **G D S** known for, provides the designer with an extremely efficient and Gate Drain Source ~~es~~ reliable device for use in Automotive and a wide variety of other applications. **Standard Pack Base part number Package Type Orderable Part Number Form Quantity** Tube 75 AUIRLR3410 AUIRLR3410 D-Pak ~~>SS~~ Tape and Reel Left 3000 AUIRLR3410TRL **Absolute Maximum Ratings** Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.   These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. 

|otherwise specified.||||
|---|---|---|---|
|**Symbol**<br>~~———————~~|**Parameter**<br>~~———————~~|**Max.**<br>~~ee~~|**Units**<br>~~ee~~|
|ID@ TC= 25°C<br>~~———————~~|Continuous Drain Current, VGS@ 10V<br>~~———————~~|17<br>~~ee~~|A<br>~~ee~~|
|ID @TC= 100°C<br>~~———————~~|Continuous Drain Current,VGS @10V<br>~~———————~~|12<br>~~ee~~||
|IDM<br>~~———————~~|Pulsed Drain Current<br>~~———————~~|60<br>~~ee~~||
|PD@TC= 25°C<br>~~———————~~|Maximum Power Dissipation<br>~~———————~~|79<br>~~ee~~|W<br>~~ee~~|
|~~———————~~|Linear Derating Factor<br>~~———————~~|0.53<br>~~ee~~|W/°C<br>~~ee~~|
|VGS|Gate-to-SourceVoltage|± 16|V|
|EAS|Single Pulse Avalanche Energy (ThermallyLimited) |150|mJ|
|IAR|Avalanche Current|9.0|A|
|EAR|Repetitive Avalanche Energy |7.9|mJ|
|dv/dt|Pead Diode Recoverydv/dt|5.0|V/ns|
|TJ<br>TSTG<br>~~a~~|Operating Junction and<br>Storage Temperature Range<br>~~a~~|-55  to + 175|°C|
|~~a~~|SolderingTemperature,for 10 seconds(1.6mm from case)<br>~~a~~|300||



HEXFET® is a registered trademark of Infineon. 

***** Qualification standards can be found at www.infineon.com 

1 

2015-10-29 

AUIRLR3410 ~~LLL~~ 

## ~~Cinfin eon~~ 

**Static @ TJ = 25°C (unless otherwise specified)** 

|Qg<br>~~e~~~~**s**~~|Total Gate Charge|–––|–––|34|nC<br>~~Pf~~|ID= 9.0A<br>VDS= 80V<br>VGS=5.0V<br>~~Pf~~|
|---|---|---|---|---|---|---|
|g<br>Qgs<br>~~e~~~~**s**~~<br>~~R~~|Gate-to-Source Charge|–––|–––|4.8|||
|Qgd<br>~~e~~~~**s**~~<br>~~R~~<br>~~es~~|Gate-to-Drain Charge|–––|–––|20|||
|gd<br>td(on)<br>~~R~~<br>~~es~~|Turn-On DelayTime|–––|7.2|–––|ns|VDD= 50V<br>ID= 9.0A<br>RG= 6.0<br>VGS= 5.0V|
|d(on)<br>tr<br>~~es~~<br>~~es~~|RiseTime|–––|53|–––|||
|td(off)<br>~~es~~<br>~~es~~|Turn-Off DelayTime|–––|30|–––|||
|d(off)<br>tf<br>~~es~~<br>~~es~~|Fall Time|–––|26|–––|||
|LD<br>~~es~~<br>~~—~~|Internal Drain Inductance<br>~~oe~~|–––<br>~~oe~~|4.5<br>~~oe~~|–––<br>~~oe~~|nH<br>~~oe?~~|Between lead,<br>6mm (0.25in.)<br>from package<br>and center of die contact<br>~~?~~|
|LS<br>~~—~~|Internal Source Inductance<br>~~oe~~|–––<br>~~oe~~|7.5<br>~~oe~~|–––<br>~~oe~~|||
|Ciss<br>~~—~~<br>~~**es**~~|Input Capacitance<br>~~oe~~<br>|–––<br>~~oe~~<br>|800<br>~~oe~~<br>|–––<br>~~oe~~<br>|pF<br>~~oe?~~<br>~~fo~~|VGS= 0V<br>VDS= 25V<br>ƒ= 1.0MHz<br>~~?~~<br>~~fo~~|
|Coss<br>~~**es**~~|OutputCapacitance<br>~~es~~|–––<br>~~es~~|160<br>~~es~~|–––<br>~~es~~|||
|Crss<br>~~**es**~~|ReverseTransferCapacitance<br>~~es~~|–––<br>~~es~~|90<br>~~es~~|–––<br>~~es~~|||
|**Diode Characteristics**<br>~~fo~~<br>~~**es**es~~|||||||
|~~a~~|**Parameter **<br>|**Min.**<br>|**Typ. M**<br>|**. Max.**<br>|**Units**<br>|**Conditions**|
|IS<br>~~Jf)~~|Continuous Source Current<br>(Body Diode)<br>~~Jf)~~|–––<br>~~Jf)~~|–––<br>~~Jf)~~|17<br>~~Jf)~~|A<br>~~Jf)~~<br>~~QO~~|MOSFET symbol<br>showing  the<br>integral reverse<br>p-n junction diode.|
|ISM<br>~~Jf)~~<br>~~es~~|Pulsed Source Current<br>(Body Diode)<br>~~Jf)~~<br>~~Ts~~|–––<br>~~Jf)~~<br>~~I~~|–––<br>~~Jf)~~<br>~~Us~~|60<br>~~Jf)~~<br>~~Us~~|||
|VSD<br>~~es~~<br>~~**e**~~|Diode Forward Voltage<br>~~Ts~~<br>~~**e**~~|–––<br>~~I~~<br>~~**e**e~~|–––<br>~~Us~~<br>~~e~~|1.3<br>~~Us~~<br>~~e~~|V<br>~~QO~~<br>~~e~~|TJ =25°C,IS=9.0A,VGS =0V<br>~~e~~|
|trr<br>~~es~~<br>~~**e**~~<br>~~e~~|Reverse Recovery Time<br>~~Ts ~~<br>~~**e**~~<br>~~Ds~~|–––<br> ~~I ~~<br>~~**e**e~~<br>~~Ds~~|140<br> ~~Us~~<br>~~e~~<br>~~Ds~~<br>~~I~~|210<br>~~Us ~~<br>~~e~~<br>~~Ds~~|ns<br> ~~QO~~<br>~~e~~<br>~~Ds~~|TJ= 25°C ,IF= 9.0A<br>nC   di/dt = 100A/µs<br>~~e~~|
|Qrr<br>~~**e**~~<br>~~e~~|Reverse RecoveryCharge<br>~~**e**~~<br>~~Ds~~|–––<br>~~**e**e~~<br>~~Ds~~|740<br>~~e~~<br>~~Ds~~<br>~~I~~|1100<br>~~e~~<br>~~Ds~~|nC   di/dt = 100A/<br>~~e~~<br>~~Ds~~||
|ton<br>~~**e**~~<br>~~e~~|Forward Turn-On Time<br>~~**e**~~<br>~~Ds~~|Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~**e**e~~<br>~~Ds~~<br>~~I~~|||||



## **Notes:** 

-  Repetitive rating;  pulse width limited by max. junction temperature. (See fig. 11) 

-  VDD = 25V, starting  TJ = 25°C, L = 3.1mH, RG = 25, IAS = 9.0A, VGS =10V. (See fig. 12) 

-  ISD 9.0A, di/dt 540A/µs, VDD V(BR)DSS, TJ  175°C. 

-  Pulse width 300µs; duty cycle  2%. 

- Uses IRL530N data and test conditions. 

- This is applied for LS of D-PAK is measured between lead and center of  die contact. 

-  When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 . 

-    R is measured at TJ approximately 90°C. 

2 

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## ~~Cinfineon~~ 

**==> picture [536 x 625] intentionally omitted <==**

**----- Start of picture text -----**<br>
100                    VGS  100                    VGS<br> TOP           15V  TOP           15V<br>                   12V                    12V<br>                   10V                    10V<br>                   8.0V                    8.0V<br>                   6.0V                    6.0V<br>                   4.0V                    4.0V<br>                   3.0V                    3.0V<br> BOTTOM   2.5V  BOTTOM   2.5V<br>10 10<br>TE] (ez<br>2.5V<br>1 1<br>2.5V<br> 20µs PULSE WIDTH  20µs PULSE WIDTH<br>0.1 ee)  T   = 25°CJJ A 0.1 Ea  T   = 175°CJ<br>0.1 1 10 100 0.1 1 10 100<br>V     , Drain-to-Source Voltage (V)DSDS V     , Drain-to-Source Voltage (V)DS<br>Fig. 1  Typical Output Characteristics  Fig. 2  Typical Output Characteristics<br>100 3.0<br> I    = 15AD<br>T  = 25°CJ<br>2.5<br>T  = 175°CJ<br>10 eet) 2.0 tenn<br>1.5<br>1 1.0<br>LL) = oocpett<br>0.5<br> V     = 50V DS<br>0.1 (MELA  20µs PULSE WIDTH  A 0.0 wt  V      = 10V GS<br>2 3 4 5 6 7 8 9 10 -60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>V     , Gate-to-Source Voltage (V)GS T   , Junction Temperature (°C)J<br>Fig. 3  Typical Transfer Characteristics Fig. 4  Normalized On-Resistance<br>Vs. Temperature<br>I   , Drain-to-Source Current (A)DD I   , Drain-to-Source Current (A)D<br>(Normalized)<br>D<br>I   , Drain-to-Source Current (A)<br>DS(on)<br>R           ,  Drain-to-Source On Resistance<br>**----- End of picture text -----**<br>


**==> picture [224 x 213] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>                   VGS<br> TOP           15V<br>                   12V<br>                   10V<br>                   8.0V<br>                   6.0V<br>                   4.0V<br>                   3.0V<br> BOTTOM   2.5V<br>10<br>TE]<br>1<br>2.5V<br> 20µs PULSE WIDTH<br>ee)  T   = 25°CJJ<br>0.1<br>0.1 1 10 100<br>V     , Drain-to-Source Voltage (V)DSDS<br>I   , Drain-to-Source Current (A)DD<br>**----- End of picture text -----**<br>


3 2015-10-29 ~~—_—_—_————~~ 

AUIRLR3410 ~~LLL~~ 

## ~~Cinfineon~~ 

**==> picture [226 x 213] intentionally omitted <==**

**----- Start of picture text -----**<br>
1400<br>V      = 0V,         f = 1MHzGS<br>C      = C     + C     ,   C     SHORTED iss         gs         gd         ds<br>1200 C      = Crss         gd<br>C      = C     + Coss        ds         gd<br>C iss<br>1000<br>800<br>600<br>C  oss<br>400<br>C rss<br>200<br>0<br>1 10 100<br>V     , Drain-to-Source Voltage (V)DS<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>


## **Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

**==> picture [219 x 213] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>T  = 175°CJ<br>10 | A<br>LP<br>T  = 25°CJ<br>1 ! V      = 0V GS<br>0.4 0.6 0.8 1.0 1.2 1.4<br>V     , Source-to-Drain Voltage (V)SD<br>I     , Reverse Drain Current (A)SD<br>**----- End of picture text -----**<br>


**Fig. 7** Typical Source-to-Drain Diode Forward Voltage 

**==> picture [215 x 213] intentionally omitted <==**

**----- Start of picture text -----**<br>
15<br>I    = 9.0AD<br> V      = 80VDS<br> V      = 50VDS<br>12  V      = 20VDS<br>9 1<br>6<br>aay 4a<br>3 (HG<br>| |<br> FOR TEST CIRCUIT<br>Ae     SEE FIGURE 13<br>0<br>0 10 20 30 40 50<br>Q   , Total Gate Charge (nC)G<br>GS<br>V     , Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

**==> picture [231 x 213] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000<br> OPERATION IN THIS AREA LIMITED<br>                       BY R DS(on)<br>100<br>Ooo 10µs<br>ZNO<br>10 100µs<br> T     = 25°CC 1ms<br> T     = 175°CJ<br>1  Single Pulse ay 10ms<br>1 10 100 1000<br>V     , Drain-to-Source Voltage (V)DS<br>I   , Drain Current (A)D<br>**----- End of picture text -----**<br>


**Fig 8.** Maximum Safe Operating Area 

2015-10-29 

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**==> picture [194 x 187] intentionally omitted <==**

**----- Start of picture text -----**<br>
20 TOT<br>15<br>SSE<br>COPANO<br>10<br>POPPED<br>oN<br>5 PLETE EL EEN<br>titi ti tT EN<br>0 PPP EE EE yy<br>25 50 75 100 125 150 175<br>T   , Case TemperatureC (  C)°<br>I   , Drain Current (A)D<br>**----- End of picture text -----**<br>


**Fig 10a.** Switching Time Test Circuit 

**Fig 9.** Maximum Drain Current Vs. Case Temperature 

**Fig 10b.** Switching Time Waveforms 

**==> picture [408 x 186] intentionally omitted <==**

**----- Start of picture text -----**<br>
 10<br> 1 D = 0.50 fii] Aisi nt<br>0.20<br>0.10<br>0.05 PDM<br>0.1 0.020.01 (THERMAL RESPONSE)SINGLE PULSE t1<br>t2<br>Notes:<br>1. Duty factor D = t   / t 1 2<br>2. Peak TJ = P DM x  ZthJC + TC<br>0.01<br>0.00001 0.0001 0.001 0.01 0.1  1<br>t  , Rectangular Pulse Duration (sec)1<br>(Z        )thJC<br>Thermal Response<br>**----- End of picture text -----**<br>


**Fig 11.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

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AUIRLR3410 ~~a~~ 

## ~~Cinfineon~~ 

**==> picture [211 x 130] intentionally omitted <==**

**----- Start of picture text -----**<br>
15V<br>L DRIVER<br>VDS<br>R G D.U.T +<br>- [V][DD]<br>IAS<br>S ME<br>20V<br>tp 0.01<br>i ly<br>**----- End of picture text -----**<br>


**Fig 12a.** Unclamped Inductive Test Circuit 

**==> picture [122 x 28] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS<br>tp »<br>**----- End of picture text -----**<br>


**==> picture [224 x 213] intentionally omitted <==**

**----- Start of picture text -----**<br>
350<br>                    I D<br>TOP            3.7A<br>300                    6.4A<br>BOTTOM    9.0A<br>250 KEE<br>NEE<br>200 EN eee<br>150 NR<br>100<br>NNN<br>50 ENN<br> V      = 25VDD<br>0 P| | [RSS]<br>25 50 75 100 125 150 175<br>Starting T  , Junction Temperature (°C)J<br>AS<br>E     ,   Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 12c.** Maximum Avalanche Energy vs. Drain Current 

IAS 

**Fig 12b.** Unclamped Inductive Waveforms 

**==> picture [177 x 141] intentionally omitted <==**

**----- Start of picture text -----**<br>
Id<br>Vds<br>Vgs<br>Vgs(th)<br>e T<br>Lee<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 13a.** Gate Charge Waveform 

**Fig 13b.** Gate Charge Test Circuit 

6 2015-10-29 ~~re~~ 

~~Cinfineon~~ 

AUIRLR3410 ~~[~~ 

**Fig 14.** Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs 

2015-10-29 

7 

AUIRLR3410 ~~LLL~~ 

## ~~Cinfin eon~~ 

**D-Pak (TO-252AA) Package Outline** (Dimensions are shown in millimeters (inches)) 

## **D-Pak (TO-252AA) Part Marking Information** 

**==> picture [330 x 148] intentionally omitted <==**

**----- Start of picture text -----**<br>
Part Number  AUIRLR3410<br>Date Code<br>IR Logo  T éaR YWWA  Y= Year<br>WW= Work Week<br><br>XX         XX<br>[|sd<br>Lot Code<br>**----- End of picture text -----**<br>


Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

8 

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AUIRLR3410 ~~LLL~~ 

**D-Pak (TO-252AA) Tape & Reel Information** (Dimensions are shown in millimeters (inches)) 

**==> picture [429 x 370] intentionally omitted <==**

**----- Start of picture text -----**<br>
TR TRR TRL<br>16.3 ( .641 ) 16.3 ( .641 )<br>15.7 ( .619 ) 15.7 ( .619 )<br>12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 ) FEED DIRECTION<br>11.9 ( .469 ) 7.9 ( .312 )<br>NOTES :<br>1.  CONTROLLING DIMENSION : MILLIMETER.<br>2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).<br>3.  OUTLINE CONFORMS TO EIA-481 & EIA-541.<br>  13 INCH<br>16 mm<br>**----- End of picture text -----**<br>


NOTES : 

1.  CONTROLLING DIMENSION : MILLIMETER. 

2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 

3.  OUTLINE CONFORMS TO EIA-481 & EIA-541. 

NOTES : 

1. OUTLINE CONFORMS TO EIA-481. 

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

9 

2015-10-29 

AUIRLR3410 ~~ie »&»«=5F—Ee~~ **Qualification Information** 

|**Qualification Information**|**Qualification Information**|||
|---|---|---|---|
|**Qualification Level**||Automotive<br>(per AEC-Q101)||
|||Comments: This part number(s) passed Automotive qualification. Infineon’s<br>Industrial and Consumer qualification level is granted by extension of the higher<br>Automotive level.||
|**Moisture Sensitivity Level**||D-Pak|MSL1|
|**ESD**|Machine Model|Class M4† <br>AEC-Q101-002||
||Human Body Model|Class H1C† <br>AEC-Q101-001||
||Charged Device Model|Class C5† <br>AEC-Q101-005||
|**RoHS Compliant**||Yes||



†  Highest passing voltage. 

|**Date**|**Comments**|
|---|---|
|3/17/2014|<br>Added  "Logic Level Gate Drive" bullet in the features section on page 1.<br><br>Updated data sheet with new IR corporate template.|
|10/29/2015|<br>Updated datasheet with corporate template<br><br>Corrected orderingtable onpage 1.|



**Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved.** 

## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 

10 

2015-10-29 



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