# Dual MOSFET, N Channel, 55 V, 55 V, 5.1 A, 5.1 A, 0.043 ohm

![Product image](https://novapart.co/image/farnell:2725790RL/)

**URL**: https://novapart.co/products/AUIRF7341QTR/dual-mosfet-n-channel-55-v-51-a-0043-ohm
**SKU**: AUIRF7341QTR
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Dual MOSFETs
**Price**: €0.9310
**Stock**: 1000+
**Lead Time**: 358 days (indicative)

## Description

Transistor Polarity:Dual N Channel; Continuous Drain Current Id:5.1A; Drain Source Voltage Vds:55V; On Resistance Rds(on):0; Available until stocks are exhausted Alternative available

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (08-Jul-2021) |
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | HEXFET Series |
| Qualification | AEC-Q101 |
| Transistor Case Style | SOIC |
| Operating Temperature Max | 175°C |
| Power Dissipation N Channel | 2.4W |
| Power Dissipation P Channel | 2.4W |
| Drain Source Voltage Vds N Channel | 55V |
| Drain Source Voltage Vds P Channel | 55V |
| Continuous Drain Current Id N Channel | 5.1A |
| Continuous Drain Current Id P Channel | 5.1A |
| Drain Source On State Resistance N Channel | 0.043ohm |
| Drain Source On State Resistance P Channel | 0.043ohm |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2725790RL/)

AUIRF7341Q ~~—~~ 

**AUTOMOTIVE GRADE** 

## ~~infineon~~ 

**Features** S1 1 8 D1 **VDSS 55V**  Advanced Planar Technology G1 2 7 D1 **RDS(on)   typ. 0.043**   Ultra Low On-Resistance S2 3 6 D2  Logic Level Gate Drive G2 4 5 D2 **max. 0.050**   Dual N Channel MOSFET Top View **ID 5.1A**  Surface Mount ~~=~~  Available in Tape & Reel  175°C Operating Temperature  Lead-Free, RoHS Compliant  Automotive Qualified * **Description** Specifically designed for Automotive applications, these HEXFET® Power MOSFET's in a Dual SO-8 package utilize the lastest processing SO-8 AUIRF7341Q techniques to achieve extremely low  on-resistance per  silicon  area. Additional features of these Automotive qualified HEXFET Power MOSFET's  are a 175°C  junction operating temperature, fast  switching **G D S** speed and improved repetitive avalanche rating. These benefits combine to make this design an extremely efficient and reliable device for use in ~~FEE~~ Gate Drain Source Automotive applications and a wide variety of other applications. The efficient SO-8 package provides enhanced thermal characteristics and dual MOSFET die capability making it ideal in a variety of power applications.  This dual, surface mount SO-8 can dramatically reduce board space and is also available  in Tape & Reel. **Standard Pack Base part number Package Type Orderable Part Number Form Quantity** ~~————————~~ AUIRF7341Q SO-8 Tape and Reel 4000 AUIRF7341QTR **Absolute Maximum Ratings** Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.   These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. **Symbol Parameter Max. Units** VDS Drain-Source Voltage 55 V ID @ TA = 25°C Continuous Drain Current, VGS @ 10V 5.1 ID @ TA = 70°C Continuous Drain Current, VGS @ 10V 4.2 A IDM Pulsed Drain Current  42 PD @TA = 25°C Maximum Power Dissipation   2.4 W PD @TA = 70°C Maximum Power Dissipation   1.7 Linear Derating Factor 16 mW/°C VGS Gate-to-Source Voltage ± 20 V EAS Single Pulse Avalanche Energy (Thermally Limited)  140 mJ IAR Avalanche Current 5.1 A EAR Repetitive Avalanche Energy See Fig.17, 18, 15a, 15b mJ TJ Operating Junction and -55  to + 175 °C TSTG Storage Temperature Range ~~=FE~~ **Thermal Resistance Symbol Parameter Typ. Max. Units** RJA Junction-to-Ambient  ––– 62.5 °C/W ~~[_~~ 

HEXFET® is a registered trademark of Infineon. 

> ***** Qualification standards can be found at www.infineon.com 

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## ~~Cinfin eon~~ 

**Static @ TJ = 25°C (unless otherwise specified)** 

|**Static @ TJ = 25°C (unless otherwise specified)J = 25°C (unless otherwise specified) = 25°C (unless otherwise specified)**||
|---|---|
|**Parameter**<br>**Min.**<br>**Typ. Max. Units**<br>**Conditions**<br>V(BR)DSS<br>Drain-to-Source Breakdown Voltage<br>55<br>–––<br>–––<br>V<br>VGS =0V, ID =250µA<br>V(BR)DSS/TJ<br>Breakdown Voltage Temp. Coefficient<br>––– 0.052 –––<br>V/°C Reference to 25°C,ID= 1mA<br>RDS(on)<br>Static Drain-to-Source On-Resistance<br>––– 0.043 0.050<br>VGS= 10V,ID= 5.1A<br>––– 0.056 0.065<br>VGS= 4.5V,ID= 4.42A<br>VGS(th)<br>Gate Threshold Voltage<br>1.0<br>–––<br>3.0<br>V<br>VDS= VGS,ID= 250µA<br>~~ee~~<br>~~ny ttt) tr tn~~<br>~~es~~<br>~~nDQO~~<br>~~(O~~<br>~~es~~<br>~~rs ts ts QO (~~<br>~~ee~~<br>~~OE~~<br>~~|~~<br>~~| fT Pe~~<br>~~eses~~<br>~~ts I ts( (~~||
|gfs<br>Forward Trans conductance<br>10.4<br>–––<br>–––<br>S<br>VDS =10V, ID =5.2A||
|IDSS<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>2.0<br>µAVDS =44V, VGS =0V<br>–––<br>–––<br>25<br>VDS =44V,VGS =0V,TJ =150°C<br>~~PO~~||
|IGSS<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>nAVGS =20V<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>VGS = -20V<br>~~ee ee~~<br>~~Pe~~<br>~~Po~~<br>~~oS~~<br>~~Oi~~||
|**Dynamic  Electrical Characteristics @ TJ = 25°C (unless otherwise specified)**||
|Qg<br>Total Gate Charge<br>–––<br>29<br>44<br>nC<br>ID=5.2A<br>Qgs<br>Gate-to-Source Charge<br>–––<br>2.9<br>4.4<br>VDS= 44V<br>~~es~~||
|Qgd<br>Gate-to-Drain Charge<br>–––<br>7.3<br>11<br>VGS= 10V<br>td(on)<br>Turn-On Delay Time<br>–––<br>9.2<br>–––<br>ns<br>VDD= 28V<br>tr<br>RiseTime<br>–––<br>7.7<br>–––<br>ID= 1.0A<br>td(off)<br>Turn-Off DelayTime<br>–––<br>31<br>–––<br>RG= 6.0<br>tf<br>Fall Time<br>–––<br>12.5<br>–––<br>VGS= 10V<br>Ciss<br>Input Capacitance<br>–––<br>780<br>–––<br>pF<br>VGS= 0V<br>Coss<br>Output Capacitance<br>–––<br>190<br>–––<br>VDS= 25V<br>Crss<br>ReverseTransferCapacitance<br>–––<br>66<br>–––<br>ƒ= 1.0MHz<br>**Diode Characteristics**<br>**Parameter **<br>**Min.**<br>**Typ. Max.Units**<br>**Conditions**<br>IS<br>Continuous Source Current<br>–––<br>–––<br>2.4<br>A<br>MOSFET symbol<br>(Body Diode)<br>showing  the<br>ISM<br>Pulsed Source Current<br>–––<br>–––<br>42<br>integral reverse<br>(Body Diode)<br>p-n junction diode.<br>VSD<br>Diode Forward Voltage<br>–––<br>–––<br>1.2<br>V<br>TJ =25°C,IS=2.6A,VGS =0V<br>trr<br>Reverse Recovery Time<br>–––<br>51<br>77<br>nsTJ= 25°C ,IF= 2.6A,<br>Qrr<br>Reverse Recovery Charge<br>–––<br>76<br>114<br>nC   di/dt = 100A/µs<br>~~es~~<br>~~es~~<br>~~eses~~<br>~~es~~<br>~~**es**~~<br>~~Pf~~<br>~~I~~<br>~~4, },~~<br>~~&~~<br>~~es~~<br>~~TD(I~~<br>~~(OO~~<br>~~Sg~~<br>~~a~~<br>~~a~~<br>~~eees~~<br>~~se~~||



## **Notes:** 

>  Repetitive rating;  pulse width limited by max. junction temperature. 

>  VDD =25V, Starting TJ = 25°C, L = 10.7mH, RG = 25, IAS = 5.2A. 

>  Pulse width 300µs; duty cycle  2%. 

>  Surface mounted FR-4 board, t  10sec. 

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**==> picture [510 x 201] intentionally omitted <==**

**----- Start of picture text -----**<br>
100 100 VGS<br>VGS<br>TOP          15.0V<br>TOP          15.0V<br>                 10.0V<br>                 10.0V<br>                  7.0V<br>                  7.0V<br>                  5.5V<br>pean                   5.5V fon<br>                  4.5V<br>yO                   4.5V Y                   4.0V<br>10                   4.0V 10                   3.5V<br>                  3.5V<br>BOTTOM    2.7V<br>,a BOTTOM    2.7V W gmail 2.7V<br>2.7V<br>1 67a 1 fo<br>Ari =|  AE<br>20µs PULSE WIDTH<br>20µs PULSE WIDTH<br>Tj = 175°C<br>Tj = 25°C<br>0.1 0.1<br>0.1 1 10 100 0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig. 1** Typical Output Characteristics 

**Fig. 2** Typical Output Characteristics 

**==> picture [486 x 194] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.5<br> 100 ID = 5.2A<br>aa eeee T  = 25  CJ ° eeee eeee eeeeeee 2.0<br>Senplaeeee ECLLCLELEEEEEL Dee<br>T  = 175  CJ ° 1.5<br> 10 Say 4GnnneeA creerLETeen<br>1.0<br>A Ler<br>ee ee 0.5 TULLE LEE<br>V      = 25VDS VGS = 10V<br>FEEEEEEEEE 20µs PULSE WIDTH 0.0 ee<br> 1 -60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>2.0 3.0 4.0 5.0 6.0 7.0 T  , Junction TemperatureJ (  C)°<br>V     , Gate-to-Source Voltage (V)GS<br>(Normalized)<br>D<br>I   ,  Drain-to-Source Current (A)<br>DS(on)<br>R            , Drain-to-Source On Resistance<br>**----- End of picture text -----**<br>


**Fig. 3** Typical Transfer Characteristics 

**Fig. 4** Normalized On-Resistance vs. Temperature 

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## ~~Cinfin eon~~ 

**==> picture [502 x 580] intentionally omitted <==**

**----- Start of picture text -----**<br>
20<br>14001200 el VCSHORTEDGS  iss  = 0V,       f = Cgs = 1 MHZ+ Cgd ,   Cds  Cte ID = 5.2A V V VDS DS DS = = = 44V  27V  11V<br>16<br>Crss    = Cgd<br>1000 eel Coss   = Cds + Cgd PERE Ee<br>12<br>800 Co Ciss OTT yr<br>600 NETTIEiT —W 8 H+}TTY oA<br>EP PTAA<br>400<br>SSE 4 AE<br>Coss<br>200<br>ONT CA<br>Crss<br>0 eee sllll| 0 ASE GeGnen<br>0 10 20 30 40 50<br>1 10 100 Q   , Total Gate Charge (nC)G<br>VDS, Drain-to-Source Voltage (V)<br>Fig 5.  Typical Capacitance vs.   Fig 6.  Typical Gate Charge vs.<br>      Drain-to-Source Voltage       Gate-to-Source Voltage<br> 100  1000<br>OPERATION IN THIS AREA LIMITED<br>BY RDS(on)<br>T  = 175  C J °<br> 100<br>ee a A400A<br> 10 10us<br>° 100us<br>T  = 25  C J  10<br>ae SN 1ms Ht<br> 1<br>10ms<br> 1<br> T TCJ == 175  C 25  C° °<br>0.1 AP V      = 0 V GS 0.1  Single Pulse CTI COI Ca<br>0.2 0.5 0.8 1.1 1.4 0.1  1  10  100  1000<br>V     ,Source-to-Drain Voltage (V)SD V     , Drain-to-Source Voltage (V)DS<br>GS<br>V     , Gate-to-Source Voltage (V)<br>I   , Drain Current (A) D<br>I     , Reverse Drain Current (A)SD<br>C, Capacitance(pF)<br>**----- End of picture text -----**<br>


**Fig. 7** Typical Source-to-Drain Diode 

Forward Voltage 

**Fig 8.** Maximum Safe Operating Area 

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**==> picture [193 x 187] intentionally omitted <==**

**----- Start of picture text -----**<br>
6.0<br>5.0<br>Pit eT TT TT<br>PW ET<br>4.0<br>PT PNET TE TT<br>Pt tT TNT TEE<br>3.0 ERNE<br>PT<br>2.0 Pi T TE TT ELENT TN ET<br>PT TTT TTT TN|<br>1.00.0 Pitt;PEREtT TTT eT TN<br>25 50 75 100 125 150 175<br>T   , Case TemperatureC (  C)°<br>I   , Drain Current (A)D<br>**----- End of picture text -----**<br>


**Fig 10a.** Switching Time Test Circuit 

**Fig 9.** Maximum Drain Current vs. Case Temperature 

**Fig 10b.** Switching Time Waveforms 

**==> picture [410 x 186] intentionally omitted <==**

**----- Start of picture text -----**<br>
 100<br>D = 0.50<br>0.20<br> 10 | ——_}_Sill |<br>0.10<br>0.05 ———————-<br> 1 0.02 eeL ———— |—a<br>0.01<br>P DM<br>SINGLE PULSE t1<br>0.1 (THERMAL RESPONSE) t2<br>Notes:<br>1. Duty factor D = t   / t1 2<br>2. Peak T J = P DM x  Z thJA + TA<br>0.01<br>0.00001 0.0001 0.001 0.01 0.1  1  10  100<br>t  , Rectangular Pulse Duration (sec)1<br>thJA<br>(Z        )<br>Thermal Response<br>**----- End of picture text -----**<br>


**Fig 11.** Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 

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**Fig 12.** Typical On-Resistance Vs. Gate Voltage 

**Fig 13.** Typical On-Resistance Vs. Drain Current 

**==> picture [157 x 106] intentionally omitted <==**

**----- Start of picture text -----**<br>
Id<br>Vds \<br>Vgs<br>!<br>Vgs J, (th)<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 14a.** Basic Gate Charge Waveform 

**Fig 14b.** Gate Charge Test Circuit 

**==> picture [484 x 201] intentionally omitted <==**

**----- Start of picture text -----**<br>
15V<br>400<br>I D<br>VDS L DRIVER TOP 2.1A<br>4.3A<br>320 BOTTOM 5.1A<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>20V 240<br>tp 0.01<br>i ly PooA<br> Unclamped Inductive Test Circuit  160 PeRNEee e e e<br>RK<br>V(BR)DSS(BR)DSS 80<br>> tp » PNG<br>aes<br>0<br>25 50 75 100 125 150 175<br>Starting Tj, Junction Temperature (   C)°<br>AS<br>E     , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 15a.** Unclamped Inductive Test Circuit 

**==> picture [172 x 100] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS(BR)DSS<br>> tp »<br>IAS<br>**----- End of picture text -----**<br>


**Fig 16.** Maximum Avalanche Energy vs. Drain Current 

**Fig 15b.** Unclamped Inductive Waveforms 

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**==> picture [434 x 197] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>Duty Cycle = Single Pulse<br>10<br>Allowed avalanche Current vs<br>iia HAHAHA LU<br>avalanche  pulsewidth,  tav<br>1 0.01 assuming   Tj = 25°C due to<br>avalanche losses<br>a A|<br>0.05<br>0.1 0.10<br>2Saor cor ol<br>CATT<br>0.01<br>0.001<br>BEE GEA Ee AAR A A<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02<br>tav (sec)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 17.** Typical Avalanche Current vs. Pulse width 

**==> picture [209 x 195] intentionally omitted <==**

**----- Start of picture text -----**<br>
140<br>TOP          Single Pulse<br>120 BOTTOM   10% Duty Cycle<br>ID = 5.1A<br>a<br>100 RNG eee<br>80 PIN EEN EEEEEE<br>60<br>40 TENG EEE<br>20<br>tN<br>PCE EL<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Notes on Repetitive Avalanche Curves , Figures 17, 18: (For further info, see AN-1005 at www.infineon.com)** 

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 

3.  Equation below based on circuit and waveforms shown in Figures 15a, 15b. 

4.  PD (ave) = Average power dissipation per single avalanche pulse. 

5.  BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6.  Iav = Allowable avalanche current. 

7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 11, 17). 

   - tav = Average time in avalanche. 

   - D = Duty cycle in avalanche =  tav ·f 

   - ZthJC(D, tav) = Transient thermal resistance, see Figures 11) 

**PD (ave) = 1/2 ( 1.3·BV·Iav) =**  **T/ ZthJC Iav = 2**  **T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav** 

**Fig 18.** Maximum Avalanche Energy vs. Temperature 

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## **SO-8 Package Outline** (Dimensions are shown in millimeters (inches) 

**==> picture [427 x 329] intentionally omitted <==**

**----- Start of picture text -----**<br>
INCHES MILLIMETERS<br>DIM<br>D _" B ae——}—— MIN MAX MIN MAX<br>A 5 | a A .0532 .0688 1.35 1.75<br>ee A1 .0040 .0098 0.10 0.25<br>a b .013 .020 0.33 0.51<br>E 6 | 8 7 6 5 H eeee cD .0075.189 .0098.1968 0.194.80 0.255.00<br>1 2 3 4 0.25 [.010]  A > E .1497 .1574 > 3.80 4.00<br>e .050  BASIC 1.27  BASIC<br>|<br>ee e 1 .025  BASIC 0.635  BASIC<br>> H .2284 .2440 5.80 6.20<br>6X e JL > K .0099 .0196 0.25 0.50<br>a L .016 .050 0.40 1.27<br>ee y  0°  8°  0°  8°<br>e1 K x 45°<br>A<br>A C<br>y<br>0.10 [.004]<br>8X b A1 8X L 8X c<br>0.25 [.010]  C A B 7<br>N O T E S : F O O T P R I N T<br>1 .   D I M E N S I O N I N G  &  T O L E R A N C I N G  P E R  A S M E  Y 1 4 . 5 M - 1 9 9 4 . 8 X  0 . 7 2  [ . 0 2 8 ]<br>2 .   C O N T R O L L I N G  D I M E N S I O N :  M I L L I M E T E R<br>3 .   D I M E N S I O N S  A R E  S H O W N  I N  M I L L I M E T E R S  [ I N C H E S ] .<br>4 .   O U T L I N E  C O N F O R M S  T O  J E D E C  O U T L I N E  M S - 0 1 2 A A .<br>ooo<br>5     M |    D I MO LEDN  PS RI OONT DR UO SE I OS  NN SO  NT  I NO TC TL OU  ED EX  MC EOELDD 0 P. 1R5O [T. 0R0U6 S] .I O N S . 6 . 4 6  [ . 2 5 5 ]<br>6    D I M E N S I O N  D O E S  N O T  I N C L U D E  M O L D  P R O T R U S I O N S .<br>     M O L D  P R O T R U S I O N S  N O T  T O  E X C E E D  0 . 2 5  [ . 0 1 0 ] .<br>7    D I M E N S I O N  I S  T H E  L E N G T H  O F  L E A D  F O R  S O L D E R I N G  T O<br>     A  S U B S T R A T E . , OJOOUUO }<br>3 X  1 . 2 7  [ . 0 5 0 ] 8 X  1 . 7 8  [ . 0 7 0 ]<br>**----- End of picture text -----**<br>


## **SO-8 Part Marking Information** 

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**SO-8 Tape and Reel** (Dimensions are shown in millimeters (inches) 

## TERMINAL NUMBER 1 

**==> picture [309 x 115] intentionally omitted <==**

**----- Start of picture text -----**<br>
12.3 ( .484 )<br>11.7 ( .461 )<br>8.1 ( .318 )<br>7.9 ( .312 ) FEED DIRECTION<br>**----- End of picture text -----**<br>


NOTES: 

1.   CONTROLLING DIMENSION : MILLIMETER. 

2.   ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 

3.   OUTLINE CONFORMS TO EIA-481 & EIA-541. 

**==> picture [274 x 120] intentionally omitted <==**

**----- Start of picture text -----**<br>
 330.00<br>(12.992)<br>  MAX.<br>14.40 ( .566 )<br>12.40 ( .488 )<br>**----- End of picture text -----**<br>


NOTES : 

1. CONTROLLING DIMENSION : MILLIMETER. 

2. OUTLINE CONFORMS TO EIA-481 & EIA-541. 

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## **Qualification Information** 

|**Qualification Information**|**Qualification Information**|||
|---|---|---|---|
|**Qualification Level**||Automotive<br>(per AEC-Q101)||
|||Comments: This part number(s) passed Automotive qualification. Infineon’s<br>Industrial and Consumer qualification level is granted by extension of the higher<br>Automotive level.||
|**Moisture Sensitivity Level**||SO-8|MSL1|
|**ESD**|Machine Model|Class M2 (+/- 200V)† <br>AEC-Q101-002||
||Human Body Model|Class H1A (+/- 500V)†<br>AEC-Q101-001||
||Charged Device Model|Class C5 (+/- 1125V)† <br>AEC-Q101-005||
|**RoHS Compliant**||Yes||



- Highest passing voltage. 

|**Date**|**Comments**|
|---|---|
|3/10/2014|<br>Added  "Logic Level Gate Drive" bullet in the features section on page 1<br><br>Updated data sheet with new IR corporate template|
|9/30/2015|<br>Updated datasheet with corporate template<br><br>Corrected orderingtable onpage 1.|



**Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved.** 

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The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 

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2015-9-30 



## Links

- [View this product on Novapart](https://novapart.co/products/AUIRF7341QTR/dual-mosfet-n-channel-55-v-51-a-0043-ohm)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/auirf7341qtr/mosfet-aec-q101-dual-n-ch-soic/dp/2725790RL)
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