# Bluetooth Module, BLE 5.0, 72.2 Mbps, 3 V to 4.2 V, -90 dBm, -40 °C to 85 °C

![Product image](https://novapart.co/image/farnell:3748718/)

**URL**: https://novapart.co/products/ATWINC3400-MR210CA131/bluetooth-module-ble-50-722-mbps-3-v-to-42-90-dbm
**SKU**: ATWINC3400-MR210CA131
**Manufacturer**: MICROCHIP
**Category**: Wireless Modules & Adaptors || Communications & Networking Modules || Bluetooth Modules & Adaptors
**Price**: €8.6900
**Stock**: 10+
**Lead Time**: 64 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (04-Feb-2026) |
| Interfaces | I2C, SPI, UART |
| Product Range | - |
| Certifications | CE, FCC, IC, KC, MIC, NCC, SRRC |
| Bluetooth Class | - |
| Bluetooth Version | Bluetooth 5.0 |
| Supply Voltage Range | 3 V to 4.2 V |
| Receiver Sensitivity Rx | -90 dBm |
| Operating Temperature Range | -40 °C to 85 °C |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3748718/)

## MICROCHIP 

# ATWINC3400-MR210xA 

## IEEE® 802.11 b/g/n Network Controller with Integrated Bluetooth® Low Energy Module 

## Introduction 

The ATWINC3400-MR210xA is an IEEE 802.11 b/g/n RF/Baseband/Medium Access Control (MAC) network controller with Bluetooth Low Energy module. The ATWINC3400-MR210xA modules are Bluetooth 5.0 certified. This module is optimized for low power and high performance mobile applications. This module features small form factor with integrated Power Amplifier (PA), Low-Noise Amplifier (LNA), Transmit/Receive (T/R) switch (for Wi-Fi®? and Bluetooth) and Power Management Unit (PMU). The ATWINC3400-MR210CA integrates a chip antenna while the ATWINC3400-MR210UA adds a micro co-ax (u.FL) connector for connecting to an external antenna. The ATWINC3400-MR210xA module requires a 32.768 kHz clock for sleep operation. 

The ATWINC3400-MR210xA module utilizes highly optimized IEEE 802.11 Bluetooth coexistence protocols, and provides Serial Peripheral Interface (SPI) to interface with the host controller. 

The references to the ATWINC3400-MR210xA module include the following devices: 

- « ATWINC3400-MR210CA — Integrates a chip antenna 

- ¢ ATWINC3400-MR210UA — Adds a micro co-ax (u.FL) connector for connecting to an external antenna 

## Features 

## Wi-Fi features: 

- ¢ IEEE 802.11 b/g/n RF/PHY/MAC 

- ¢ JEEE 802.11 b/g/n (1x1) with Single Spatial Stream, up to 72 Mbps PHY Rate in a 2.4 GHz ISM Band 

- ¢ Integrated Chip Antenna or Micro Co-ax (U.FL) Connector for an External Antenna 

- Superior Sensitivity and Range via Advanced PHY Signal Processing 

- ¢« Advanced Equalization and Channel Estimation 

- ¢ Advanced Carrier and Timing Synchronization 

- Supports Soft-AP 

- ¢ Supports IEEE 802.11 WEP, WPA and WPA2 Personal and WPA2 Enterprise (firmware version 1.3.1 or later) 

- Superior MAC Throughput through Hardware Accelerated Two-Level A-MSDU/A-MPDU Frame Aggregation and Block Acknowledgment 

- On-Chip Memory Management Engine to Reduce the Host Load 

- Operating Temperature Range from -40°C to +85°C 

- Input/Output voltage ranges from 2.7V to 3.6V 

- ¢« Power supply (VBAT) ranges from 3.0V to 4.2V 

- Wi-Fi Alliance® Certified for Connectivity and Optimizations — ID: WFA62065 

- ¢ Integrated On-Chip Microcontroller 

- ¢ SPI Host Interface 

- ¢ Integrated Flash Memory for Wi-Fi and Bluetooth System Software 

- ¢« Low Leakage On-Chip Memory for State Variables « Fast AP Re-Association (150 ms) 

ee © 2020 Microchip Technology Inc. Datasheet DS70005350C-page 1 

ATWINC3400-MR210xA 

- On-Chip Network Stack to Offload MCU 

- Network Features: Firmware version 1.2.0 or later — TCP, UDP, DHCP, ARP, HTTP, TLS, DNS and SNTP 

## Bluetooth features: 

- ¢ ATWINC3400-MR210xA Bluetooth Low Energy Certification (end product) QD ID: 112092 

- ¢ Adaptive Frequency Hopping (AFH) 

- Superior Sensitivity and Range 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 2 

ATWINC3400-MR210xA 

## Table of Contents 

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© 2020 Microchip Technology Inc. Datasheet 

DS70005350C-page 3 

ATWINC3400-MR210xA 

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© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page4 

ATWINC3400-MR210xA 

Ordering Information and Module Marking 

## 1. Ordering Information and Module Marking 

The following table provides the ordering details for the ATWINC3400-MR210xA module. 

Table 1-1. Ordering Details 

|ModelNumber|Ordering Code|Package|Description|Reguitely<br>Information|
|---|---|---|---|---|
|ATWINC3400-MR210CA||ATWINC3400-MR210CAxxx")||22.43 x 14.73 | Certified module|||FCC, IC, CE,|
|||x 2.0 mm|with chip|MIC, KCC, NCC,|
||||antenna|SRC|
|ATWINC3400-MR210UA|=ATWINC3400-MR210UAxxx")|22.43 x 14.73|Certified module|FCC, IC, CE|
|||x 2.0 mm|with u.FL||
||||connector for an||
||||externalantenna||



- Note: 1. 'xxx' in the preceding table and following figure denotes the software version. For example, at the time of publish, the software is v1.22, so its equivalent order code is ATWINC3400-MR210CA122. The order code changes with the software version. For more information on the ordering code, refer to the ATWINC3400 product page. 

- The following figure illustrates the ATWINC3400-MR210xA module marking information. 

Figure 1-1. Marking Information 

**==> picture [495 x 227] intentionally omitted <==**

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i]<br>!ll<br>l<br>I! l! ll !! II 1I 11 ll<br>Devicea name <---------- I ; ; ; I| Ii<br>l!!1<br>MR: Internal Code «q{-----------------!!lI!l I 1 1! 1! l!<br>2: OTA with shield <{- - - -------------------!l1 I! I 1! l<br>! I 1 1 I<br>1:z Reserved @-------------------------- ' ' I, I,<br>I11<br>0: Reserved a a a a ma tl |1 !I II<br>1 I I<br>C: i] ! I<br>Chip antenna MQ nn rece ecee! ;<br>U: External antenna<br>I I<br>Revision letter q- ----------------------------------- +e i<br>I<br>I<br>Software version <@-------- rrr cc rrr rrr rrr rr rrr ccc rrr e!<br>**----- End of picture text -----**<br>


© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 5 

ATWINC3400-MR210xA 

Block Diagram 

## 2: Block Diagram 

The following figure shows the block diagram of the ATWINC3400-MR210xA module. Figure 2-1. ATWINC3400-MR210xA Module Block Diagram 

**==> picture [423 x 264] intentionally omitted <==**

**----- Start of picture text -----**<br>
ATWINC3400-MR210xA<br>N<br>z<br>Chip2.4 AntennaGHz re Oao & 4Ps z-Oo z oO<br>or c QQ 0 2 9 6 -'<br>u.FL Connector for >a er> b&bi o& peWW —2 oO<br>an External Antenna i i { i J t i<br>Discrete Balun A>, UART TXD/RXD<br>and RX/TX<br>Filter <——> BT TXD/RXD<br>ATWINC3400 IC \— Bit RGIS<br><> SPI<br><> 2c<br>26 MHz<br>Crystal = <—_> GPIOs<br>“= GND<br>**----- End of picture text -----**<br>


© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 6 

ATWINC3400-MR210xA Pinout and Package Information 

## 3. Pinout and Package Information 

This package contains an exposed paddle that must be connected to the system board ground. The ATWINC3400MR210xA module pin assignment is shown in the following figure. This package contains an exposed paddle, Pin 37, PADDLE VSS, that must be connected to the system board ground. 

Figure 3-1. ATWINC3400-MR210xA Module Pin Assignment 

**==> picture [315 x 338] intentionally omitted <==**

**----- Start of picture text -----**<br>
Chip Antenna<br>PolsI<br>uFL connector<br>ATWINC3400-MR210xA<br>a |, MODULE<br>SPI_CFG J2 J36 GND<br>NIC J3 J35 12C_SDA_M<br>NIC J4 J34 12C_SCL_M<br>N/C J5 J33 IRQN<br>NIC J6 J32 GPIO20<br>RESETN J7 J31 GPIO19<br>BT_TXD J8 J30 GPIO18<br>BT_RXD J9 J29 GP1O17<br>12C_SDA_S J10 J28 GND<br>12C_SCL_S J11 J27 GPIO7<br>VDDIO J12 J26 SPI_MOSI<br>GND ute ono © Kr 0 D8 OH AN OY = La<br>io cr cro re re TNO NOUN N<br>mr) 7 =] —_ om} = mr) =) ==) =) ==)<br>ofok2° + AQ QeEg 2“435A 22 BS¥ CO<br>oo -_ ,! > f& 4 Oo -! |<br>ec fo toe a ©<br><< oO f o 6<br>> 5<br>**----- End of picture text -----**<br>


The following table provides the ATWINC3400-MR210xA module pin description. 

Table 3-1. ATWINC3400-MR210xA Module Pin Description 

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**----- Start of picture text -----**<br>
1 GND GND Ground pin<br>2 SPI_CFG Digital Input Serial Peripheral Interface pin, which must be tied to<br>VDDIO<br>3 NC — No connection<br>4 NC — No connection<br>8) NC — No connection<br>6 NC _— No connection<br>**----- End of picture text -----**<br>


© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 7 

ATWINC3400-MR210xA Pinout and Package Information 

|sss.|Continued|Continued||||
|---|---|---|---|---|---|
||7|RESETN|Digital Input|*|Active-low hard Reset pin|
|||||«|When the Reset pin is asserted low, the module|
||||||is in the Reset state. When the Reset pin is|
||||||asserted high, the module functions normally|
|||||¢|This pin must connect to a host output that is|
||||||low by default on power-up. Ifthe host output is|
||||||tri-stated, add a<br>1 MOhm pull-down resistor to|
||||||ensure a low level at power-up|
||8|BT_TXD|Digital I/O,|¢|Bluetooth UART transmit data output pin|
||||Programmable pull up|¢|Used only during debug for DTM interface. SPI|
||||||is the data and control interface with the host|
||||||Microcontroller|
|||||¢|tis recommended to adda test point for this pin|
||9|BT_RXD|Digital I/O,|¢|Bluetooth UART receive data input pin|
||||Programmable pull up|*|Used only during debug for the DTM interface.|
||||||SPI is the data and control interface with the|
||||||host Microcontroller|
|||||¢|Adding a test point for this pin is recommended|
||10|I2C_SDA_S|Digital I/O,|«|(|2C Slave data pin|
||||Programmable pull up|*|Used only for test purposes. Adding a test point|
||||||for this pin is recommended|
||11|I2C_SCL_S|Digital I/O,|*|12C Slave clock pin|
||||Programmable pull up|*|Used only fortestpurposes. Addinga test point|
||||||for this pin is recommended|
||12|VDDIO|Power|Digital I/O power supply||
||13|GND|GND|Ground pin||
||14|GPIO3|Digital 1/0,|General Purpose Input/Outputpin||
||||Programmable pull up|||
||15|GPIO4|Digital I/O,|General Purpose Input/Outputpin||
||||Programmable pull up|||
||16|UART_TXD|Digital I/O,|¢|Wi-Fi UART TxD output pin|
||||Programmable pull up|¢|Used only fordebug development purposes.|
||||||Addinga test point for this pin is recommended|
||17|UART_RXD|Digital I/O,|¢|Wi-Fi UART RxD input pin|
||||Programmable pull up|*|Used only fordebug development purposes.|
||||||Addinga test point for this pin is recommended|
||18|VBAT|Power|PowersupplypinforDC/DCconverterandPA||



© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 8 

## ATWINC3400-MR210xA Pinout and Package Information 

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**----- Start of picture text -----**<br>
sss. Continued<br>**----- End of picture text -----**<br>


|19|CHIP_EN|Digital Input|e«|PMU enable pin|
|---|---|---|---|---|
||||«|When the CHIP_EN pin is asserted high, the|
|||||module is enabled. When the CHIP_EN pin is|
|||||asserted low, the module is disabled or put into|
|||||Power-Down mode|
||||¢«|Connect to a host output that is low by default at|
|||||power-up. Ifthe host output is tri-stated, add a 1|
|||||MOhm pull-down resistor, if necessary, to|
|||||ensure a low level at power-up|
|20|RTC_CLK|Digital I/O,|¢|RTC Clock input pin|
|||Programmable pull up|*|This pin must connect to a 32.768 kHz clock|
|||||source|
|21|GND|GND|Ground pin||
|22|GPIO8|Digital 1/O,|General Purpose Input/Output pin")||
|||Programmable pull up|||
|23|SPI_SCK|Digital I/O,|SPI|clock pin|
|||Programmable pull up|||
|24|SPI_MISO|Digital 1/O,|SPI|MISO (Master In Slave Out) pin|
|||Programmable pull up|||
|25|SPI_SSN|Digital I/O,|Active-low SPI SSN (Slave Select) pin||
|||Programmable pull up|||
|26|SPI_MOSI|Digital I/O,|SPI|MOSI (Master Out Slave In) pin|
|||Programmable pull up|||
|27,|GPIO7|Digital I/O,|General Purpose Input/Output pin")||
|||Programmable pull up|||
|28|GND|GND|Ground pin||
|29|GPIO17|Digital I/O,|General Purpose Input/Output pin)||
|||Programmable pull up|||
|30|GPIO18|Digital I/O,|General Purpose Input/Output pin)||
|||Programmable pull up|||
|31|GPIO19|Digital I/O,|General Purpose Input/Output pin||
|||Programmable pull up|||
|32|GPIO20|Digital I/O,|General Purpose Input/Output pin")||
|||Programmable pull up|||
|33|IRQN|Digital output,|«|ATWINC3400-MR210xA module host interrupt|
|||Programmable pull up||request output pin|
||||¢|This pin must connect to a host interrupt pin|
|34|I2C_SCL_M|Digital I/O,|12C|Masterclock pin|
|||Programmable pull up|||
|35|I2C_SDA_M|Digital I/O,|12C|Masterdata pin|
|||Programmable pull up|||
|36|GND|GND|Ground pin||
|37|PADDLEVSS|GND|Connecttothesystemboardground||



© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 9 

ATWINC3400-MR210xA 

Pinout and Package Information 

Note: 

1. Usage of the GPIO functionality is not supported by the firmware. The data sheet will be updated once the support for this feature is added. 

## 3.1 Package Description 

The following table provides the ATWINC3400-MR210xA module package dimensions. 

Table 3-2. ATWINC3400-MR210xA Module Package Information 

|Table 3-2. ATWINC3400-MR210xA <br>Parameter<br>Pad count|Module Package Information<br>van<br>37|nt<br>_—|
|---|---|---|
|Package size|22.43 x 14.73||
|Total thickness|2.09||
|Pad pitch|1.20|mm|
|Pad width|0.81||
|Exposedpadsize|44x44||



©2020SiLSHHEME™S™~*~*~“‘“CS;SC#*#Microchip Technology Inc. =~*~“~s*‘C*~*~*~ ***** ~*«~S;*;*;*;*~*~*~*#~&)S70005350C-p~page‘10 

ATWINC3400-MR210xA Electrical Characteristics 

## 4. Electrical Characteristics 

This chapter provides an overview of the electrical characteristics of the ATWINC3400-MR210xA module. 

## 4.1 Absolute Maximum Ratings 

The following table provides the absolute maximum ratings for the ATWINC3400-MR210xA module. 

Table 4-1. ATWINC3400-MR210xA Module Absolute Maximum Ratings 

|VDDIO|1/O supply voltage|-0.3|5.0||
|---|---|---|---|---|
|VBAT|Battery supply voltage|-0.3|5.0||
|VIN|Digital inputvoltage|-0.3|VDDIO|Vv|
|VAIN|Analog input voltage|-0.3|ko||
|Vv<br>pSpuEM|Electrostatic discharge<br>Human Body Model (HBM)|-1000, -2000 (see notes | +1000, +2000 (see notes<br>below)<br>below)|||
|Ta|Storage temperature|-65|150||
|||||Ae|
|—|Junction temperature|—_—|125||
|—_—|RFinputpower|_—|23|dBm|



1. Vin corresponds to all the digital pins. 

2. For Vespypm; each pin is classified as Class 1, Class 2 or both: 

   - 2.1. The Class 1 pins include all the pins (both analog and digital). 

   - 2.2. The Class 2 pins include all digital pins only. 2'8. Vespupn Is +1 kV for Class 1 pins. Vegpypm is + 2 kV for Class 2 pins. 

Stresses beyond those listed under “Absolute Maximum Ratings” cause permanent damage to the device. This is a stress rating only. The functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods affects the device reliability. 

## 4.2 Recommended Operating Conditions 

The following table provides the recommended operating conditions for the ATWINC3400-MR210xA module. 

Table 4-2. ATWINC3400-MR210xA Module Recommended Operating Conditions 

|VDDIO|\/O supply voltage (1)|2.7|3.3|3.6|Vv|
|---|---|---|---|---|---|
|VBAT|Battery supply voltage(2)s)|3.0|3.3|4.2|V|
|—|Operatingtemperature|-40|—_—|85|c|



© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 11 

ATWINC3400-MR210xA 

Electrical Characteristics 

Notes: 

1. lO supply voltage is applied to the VDDIO pin. 

2. Battery supply voltage is applied to the VBAT pin. 

3. The ATWINC3400-MR210xA module is functional across this range of voltages; however, optimal RF performance is ensured for VBAT of 3.3V. 

## 4.3 DC Characteristics 

The following table provides the DC characteristics for the ATWINC3400-MR210xA module digital pads. 

Table 4-3. DC Electrical Characteristics 

|Vit|Input Low|-0.30|—|0.60||
|---|---|---|---|---|---|
||Voltage|||||
|Vin|Input High|VDDIO - 0.60|_|VDDIO + 0.30||
||Voltage|||||
||||||V|
|VoL|Output Low|—|_—|0.45||
||Voltage|||||
|Vou|Output High|VDDIO - 0.50|—|—||
||Voltage|||||
|—|Output Load|—|—_—|20||
||Capacitance|||||
||||||pF|
|—|Digital Input Load|—|—|6||
||Capacitance|||||



## 4.4 IEEE 802.11 b/g/n Radio Performance 

4.4.1 Receiver Performance 

The receiver performance is tested under the following conditions: 

- ¢ VBAT =3.3V 

- ¢« VDDIO = 3.3V 

- Temp = 25°C 

- ¢ Measured after RF matching network 

|The following table provides the receiver performance characteristics|for theATWINC3400-MR210xA module.|for theATWINC3400-MR210xA module.|
|---|---|---|
|Table 4-4. IEEE 802.11 Receiver Performance Characteristics|||
|F Parameter |Description<br>in| ye) Max | nt<br>Frequency<br>—<br>2,412<br>—_—<br>2,484<br>MHz|||
|1 Mbps DSSS|—<br>-95.0|_—|
|2 Mbps DSSS|—<br>-94.0|—|
|Sensitivity 802.11b||dBm|
|5.5 Mbps DSSS|—<br>-90.0|—|
|11MbpsDSSS|—<br>-86.0|—|



© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 12 

## ATWINC3400-MR210xA 

## Electrical Characteristics 

|+++. -Continued<br>p parameter|Description<br>| win.) Typ.) Max Unit<br>6 Mbps OFDM<br>—<br>-90.0<br>_—|+++. -Continued<br>p parameter|Description<br>| win.) Typ.) Max Unit<br>6 Mbps OFDM<br>—<br>-90.0<br>_—|+++. -Continued<br>p parameter|Description<br>| win.) Typ.) Max Unit<br>6 Mbps OFDM<br>—<br>-90.0<br>_—|+++. -Continued<br>p parameter|Description<br>| win.) Typ.) Max Unit<br>6 Mbps OFDM<br>—<br>-90.0<br>_—|+++. -Continued<br>p parameter|Description<br>| win.) Typ.) Max Unit<br>6 Mbps OFDM<br>—<br>-90.0<br>_—|+++. -Continued<br>p parameter|Description<br>| win.) Typ.) Max Unit<br>6 Mbps OFDM<br>—<br>-90.0<br>_—|+++. -Continued<br>p parameter|Description<br>| win.) Typ.) Max Unit<br>6 Mbps OFDM<br>—<br>-90.0<br>_—|+++. -Continued<br>p parameter|Description<br>| win.) Typ.) Max Unit<br>6 Mbps OFDM<br>—<br>-90.0<br>_—|
|---|---|---|---|---|---|---|---|
|||9 Mbps OFDM||—|-89.0|—||
|||12 Mbps OFDM||_—|-87.0|_—||
|||18 Mbps OFDM||—|-85.0|_—||
|Sensitivity 802.11g|||||||dBm|
|||24 Mbps OFDM||—|-82.0|—||
|||36 Mbps OFDM||—|-79.0|_—||
|||48 Mbps OFDM||—|-75.0|—||
|||54 Mbps OFDM||_—|-73.0|_||
|||MCS 0||—|-89.0|—_—||
|||MCS 1||—|-87.0|—||
|||MCS 2||—|-84.0|_—||
|(BW = 20 MHz, 800|||||||dBm|
|ns|Gl)|MCS 4||—_|-78.0|—||
|||MCS 5||—|-75.0|—||
|||MCS 6||—_—|-73.0|—||
|||MCS 7||—|-71.0|—||
|||1-11 Mbps DSSS||_—|0|_—||
|Micate<br>signal level||6-54 MbpsOFDM||a|0|_—|dBm|
|||MCS 0— 7 (800 ns GI)||_—|0|_—||
|||1 Mbps DSSS (30 MHz offset)||—|50|—||
|||11 Mbps DSSS (25 MHz offset)||—|43|—||
|Adjacent channel<br>rejection||6MbpsOFDM (25MHz offset)<br>54MbpsOFDM (25MHz offset)||—<br>=|40<br>25|—<br>=|an|
|||MCS 0 — 20 MHz BW (25 MHz offset)||—|40|—||
|||MCS 7 — 20 MHz BW (25 MHz offset)||—|20|_—||
|Transmitter Performance||||||||
|The|transmitter performance is tested under the following||conditions:|||||
|¢|VBAT = 3.3V|||||||
|*|VDDIO = 3.3V|||||||
|*|Temp = 25°C|||||||
|The|following table provides the transmitter performance||characteristics for the||ATWINC3400-MR210xA||module.|
|Table 4-5. IEEE 802.11 Transmitter Performance Characteristics||||||||
|Frequency||—_—||2,412|_—|2,484|MHz|



## 4.4.2 Transmitter Performance 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 13 

## ATWINC3400-MR210xA Electrical Characteristics 

**==> picture [69 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
+++. -Continued<br>**----- End of picture text -----**<br>


**==> picture [446 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
802.11b 1 Mbps — 16.7) —<br>802.11b 11 Mbps — 17.5 —<br>Output power 802.11g OFDM 6 Mbps _— 18.3(1) _— dBm<br>802.11g OFDM 54 Mbps — 13.0) —<br>802.11n HT20 MCS 0 (800 ns Gl) — 17.5% —<br>802.11n HT20 MCS7 (800 ns Gl) — 12.5 (1)(2) _—<br>TX power accuracy = — +1.509) = dB<br>Carrier suppression — — 30.0 _— dBc<br>Harmonic output power and — —_— -41<br>(Radiated, Regulatory 3rd _ _ A dBm/MHz<br>mode)<br>**----- End of picture text -----**<br>


## Notes: 

1. Measured as per IEEE 802.11 specifications. 

2. The typical output power is 10 dBm only for channel-10 (2.457 GHz). Values mentioned in the preceding table are applicable for all the other channels. 

3. Measured after RF matching network. 

4. The operating temperature range is -40°C to +85°C. RF performance is ensured at a room temperature of 25°C with a 2-3 dB change at the boundary conditions. 

5. With respect to TX power, different (higher/lower) RF output power settings may be used for specific antennas and/or enclosures, in which case re-certification may be required. 

6. The availability of some specific channels and/or operational frequency bands are country-dependent and must be programmed at the host product factory to match the intended destination. Regulatory bodies prohibit exposing the settings to the end user. This requirement needs to be taken care of via the host implementation. 

7. The RF parameters for the ATWINC3400-MR210UA are approximately 1 dB less than the values in the table. This insertion loss accounts for PCB trace losses, and the filter network loss to the U.FL connector. 

## 4.5 Bluetooth Radio Performance 

- 4.5.1 Receiver Performance 

The receiver performance is tested under the following conditions: 

- ¢ VBAT =3.3V 

- ¢« VDDIO = 3.3V 

- Temp: 25°C 

- ¢ Measured after RF matching network 

The following table provides the Bluetooth receiver performance characteristics for the ATWINC3400-MR210xA module. 

Table 4-6. Bluetooth Receiver Performance Characteristics 

**==> picture [457 x 75] intentionally omitted <==**

**----- Start of picture text -----**<br>
parameter | Descrntion in| tym | ax | Unit |<br>Frequency — 2,402 —_— 2,480 MHz<br>Sensitivity (ideal Tx) Bluetooth Low Energy (GFSK) _— -92.5 _—<br>dBm<br>Maximum receive signal level |Bluetooth Low Energy (GFSk) —_ -2 —_—<br>**----- End of picture text -----**<br>


© 2020 Microchip Technology Inc. Datasheet 

DS70005350C-page 14 

ATWINC3400-MR210xA 

## Electrical Characteristics 

**==> picture [456 x 233] intentionally omitted <==**

**----- Start of picture text -----**<br>
parameter+++. -Continued |Description Minn Type Max. | Unt<br>Co-channel _— 9 _—<br>adjacent + 1 MHz —_— -4 _—<br>adjacent - 1 MHz _— -2 —_—<br>adjacent + 2 MHz (image _— -24 _—<br>frequency)<br>adjacent - 2 MHz —_— -25 _—<br>ptsttsiencs iperormance adjacent + 3 MHz (adjacent to — -27 —_— dB<br>(Bluetooth Low Energy) P<br>image)<br>adjacent - 3 MHz —_— -27 _—<br>adjacent + 4 MHz _— -28 —_—<br>adjacent - 4 MHz —_— -27 _—<br>adjacent + 5 MHz _— -27 —<br>adjacent - 5 MHz _— -27 _—<br>**----- End of picture text -----**<br>


## 4.5.2 Transmitter Performance 

The transmitter performance is tested under the following conditions: 

- ¢ VBAT =3.3V 

- ¢ VDDIO = 3.3V 

- Temp: 25°C 

- ¢ Measured after RF matching network 

The following table provides the Bluetooth transmitter performance characteristics for the ATWINC3400-MR210xA module. 

Table 4-7. Bluetooth Transmitter Performance Characteristics 

|Parameter<br>Frequency|Deserton<br>—_—|ny<br>2,402<br>—_|ny<br>2,402<br>—_|ny<br>2,402<br>—_|[Maks <br>2,480|Unit<br>MHz|Unit<br>MHz|
|---|---|---|---|---|---|---|---|
|Output power|Bluetooth Low Energy(GFSK)||_—|ole)|3.8|||
||N + 2 (Image frequency)||_—|-33|_—|||
|In-band spurious emission<br>(Bluetooth Low Energy)|N +3 (Adjacenttoimage<br>frequency)||_—|-32|_—|dB|ul|
||N-2||—|-48|_|||
||N-3||—|-47|_—|||



© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 15 

ATWINC3400-MR210xA 

## Electrical Characteristics 

Notes: 

**==> picture [445 x 111] intentionally omitted <==**

**----- Start of picture text -----**<br>
|||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|1.|Measured|after|RF|matching|network.|
|2.|The|operating|temperature|range|is|-40°C|to|+85°C.|RF|performance|is|ensured|at|a|room|temperature|of|
|25°C|with|a|2-3|dB|change|at|the|boundary|conditions.|
|3.|With|respect|to|TX|power,|different|(higher/lower)|RF|output|power|settings|may|be|used|for|specific|antennas|
|and/or|enclosures,|in|which|case|re-certification|may|be|required.|
|4.|The|availability|of some|specific|channels|and/or|operational|frequency|bands|are|country-dependent|and|
|must|be|programmed|at|the|host|product|factory|to|match|the|intended|destination.|Regulatory|bodies|prohibit|
|exposing|the|settings|to|the|end|user.|This|requirement|needs|to|be|taken|care|of via|the|host|implementation.|
|5.|The|RF|parameters|for|the|ATWINC3400-MR210UA|are|approximately|1|dB|less|than|the|values|in|the|table.|
|This|insertion|loss|accounts|for|PCB|trace|losses|and|the|filter|network|loss|to|the|u.FL|connector.|

**----- End of picture text -----**<br>


ATWINC3400-MR210xA Power Management 

## 5. Power Management 

## 5.1 Device States 

The ATWINC3400-MR210xA module has multiple device states, based on the state of the IEEE 802.11 and Bluetooth subsystems. It is possible for both subsystems to be active at the same time. To simplify the device power consumption breakdown, the following basic states are defined. One subsystem can be active at a time: 

- ¢ WiFi_ON_Transmit— Device actively transmits IEEE 802.11 signal 

- WiIFi_ON_Receive — Device actively receives IEEE 802.11 signal 

- ¢ BT_ON_Transmit — Device actively transmits Bluetooth signal 

- « BT_ON_Receive — Device actively receives Bluetooth signal 

- Doze — Device is powered on but it does not actively transmit or receive data 

- Power_Down — Device core supply is powered off 

## 5.2 Controlling Device States 

The following table shows different device states and their power consumption for the ATWINC3400-MR210xA . The device states can be switched using the following: 

- ¢« CHIP_EN — Module pin (pin 19) enables or disables the DC/DC converter 

- « \VDDIO — I/O supply voltage from external supply 

In the ON states, VDDIO is ON and CHIP_EN is high (at VDDIO voltage level). To change from the ON states to Power_Down state, connect the RESETN and CHIP_EN pin to logic low (GND) by following the power-down sequence mentioned in Figure 5-1. When VDDIO is OFF and CHIP_EN is low, the chip is powered off with no leakage. 

Table 5-1. Device States Current Consumption 

|DeviceState|CodeRate|aah hibit!<br>en|Current|Consumption")|
|---|---|---|---|---|
|ON_WiFi_Transmit|802.11b 1 Mbps|16.7|271 mA|24 mA|
||802.11b 11 Mbps|17.5|265 mA|24 mA|
||802.119 6 Mbps|18.3|275 mA|24 mA|
||802.119 54 Mbps|13.0|235 mA|24 mA|
||802.11n MCS 0|17.5|272 mA|24 mA|
||802.11n MCS 7|12.5|232 mA|24 mA|
|ON_WIiFi_Receive|802.11b 1 Mbps|N/A|63.9mA|23.7mA|
||802.11b 11 Mbps|N/A|63.9 mA|23.7 mA|
||802.11g 6 Mbps|N/A|63.9 mA|23.7 mA|
||802.119 54 Mbps|N/A|63.9 mA|23.7 mA|
||802.11n MCS 0|N/A|63.9 mA|23.7 mA|
||802.11n MCS 7|N/A|63.9 mA|23.7 mA|
|ON_BT_Transmit|BLE 1 Mbps|3.3|79.37mA|23.68 mA|
|ON_BT_Receive|BLE1Mbps|N/A|51.36mA|23.68mA|



© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 17 

ATWINC3400-MR210xA Power Management 

wees. CONtINUed 

**==> picture [415 x 99] intentionally omitted <==**

**----- Start of picture text -----**<br>
Current Consumption")<br>Device State Code Rate eel acs SE<br>ial<br>Doze (Bluetooth Low N/A N/A 53 mA (2)<br>Energy Idle)<br>Doze (Bluetooth Low N/A N/A 1 mA 2)<br>Energy Low Power)<br>Power_Down N/A N/A 10.5 uA()<br>**----- End of picture text -----**<br>


Notes: 

1. Conditions: VBAT = 3.3V, VDDIO = 3.3V, at 25°C. 

2. Current consumption mentioned for these states is the sum of current consumed in VDDIO and VBAT voltage rails. 

When power is not supplied to the device (DC/DC converter output and VDDIO are OFF, at ground potential), voltage cannot be applied to the ATWINC3400-MR210xA module pins because each pin contains an ESD diode from the pin to supply. This diode turns on when voltage higher than one diode-drop is supplied to the pin. 

If voltage must be applied to the signal pads when the chip is in a low-power state, the VDDIO supply must be ON, so the Power_Down state must be used. Similarly, to prevent the pin-to-ground diode from turning ON, do not apply voltage that is more than one diode-drop below the ground to any pin. 

## 5.3 Power-Up/Down Sequence 

The following figure illustrates the power-up/down sequence for the ATWINC3400-MR210xA. 

## Figure 5-1. Power-Up/Down Sequence 

**==> picture [444 x 285] intentionally omitted <==**

**----- Start of picture text -----**<br>
|| fji l|<br>VBATT ~ N<br>I ta ta: I<br>I<br>ht) ) [er] | en ee<br>VDDIO i it te |<br>| Sf [|<br>CHIP_EN l | I<br>|: tc NEte:<br><__—____—_—__—__>|<br>RESETN | |<br>l |<br>XO Clock rl ull 7 UT<br>following table provides power-up/down sequence timing parameters.<br>Table 5-2. Power-Up/Down Sequence Timing<br>er<br>ta 0 — ms _ | VBAT rise to VDDIO | VBAT and VDDIO can rise simultaneously or connected<br>rise together. VDDIO must not rise before VBAT.<br>ta 0 — ms VDD10 rise to CHIP_EN must not rise before VDDIO. CHIP_EN must<br>CHIP_EN rise be driven high or low and must not be left floating.<br>**----- End of picture text -----**<br>


The following table provides power-up/down sequence timing parameters. 

Table 5-2. Power-Up/Down Sequence Timing 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 18 

ATWINC3400-MR210xA 

Power Management 

|sees<br>CONtINUed||||||||
|---|---|---|---|---|---|---|---|
|er||||||||
|tc<br>3)<br>_|ms |CHIP_EN rise to||This delay is required to||stabilize theXO clock before|||
|||RESETN rise|RESETN removal. RESETN must be driven high or low|||||
||||and must not be left floating.|||||
|ty<br>0<br>—|ms |VDDIO fall toVBAT|||VBAT and VDDIO must fall simultaneously or be|||||
|||fall|connected together.VBAT must not fall before VDDIO.|||||
|tp<br>0<br>—|ms_ |CHIP_EN fall to||VDDIO|must not fall before CHIP_EN.|||CHIP_EN and|
|||VDDIO fall|RESETN must fall simultaneously.|||||
|te<br>0<br>—|ms |RESETN fall to||VDDIO|must not fall before RESETN.|||RESETN and|
|||VDDIO fall|CHIP_EN fall simultaneously.|||||
|Digital I/O Pin Behavior During Power-Up Sequences||||||||
|The following table represents|the digital I/O pin states corresponding to the device power modes.|||||||
|Table 5-3. Digital I/O Pin Behavior in Different Device States||||||||
|Device State||VDDIO |CHIP_EN||RESETN ||Output Driver|t<br> |<br>"PU<br>Driver||Pull Up/Down<br>Resistor(96<br>kOhm)|
||||||||||
|Power_Down: core supply||High<br>Low|Low|Disabled (Hi-Z)||Disabled|||Disabled|
|OFF||||||||
|Power-On Reset: core supply||— High<br>High|Low|Disabled (Hi-Z)|Disabled||Enabled|
|and hard reset ON||||||||
|Power-On Default: core supply |High<br>High|||High|Disabled (Hi-Z)||Enabled||Enabled|Enabled|
|ON, device out of reset and||||||||
|not programmed||||||||
|On_Doze/ On_Transmit/||High<br>High|High|Programmed by|Opposite||Programmed by|
|On_Receive: core supply ON,||||firmware for|ofOutput|—|firmware foreach|
|device programmed by||||each pin:|Driver||pin: enabled or|
|firmware||||enabled or|state||disabled|
|||||disabled||||



## 5.4 Digital I/O Pin Behavior During Power-Up Sequences 

The following table represents the digital I/O pin states corresponding to the device power modes. Table 5-3. Digital I/O Pin Behavior in Different Device States 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 19 

ATWINC3400-MR210xA 

# Clocking 

## 6. Clocking 

## 6.1 Low-Power Clock 

The ATWINC3400-MR210xA module requires an external 32.768 kHz clock to be supplied at the module pin 20. This clock is used during the sleep operation. The frequency accuracy of this external clock must be within +200 ppm. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 20 

ATWINC3400-MR210xA CPU and Memory Subsystem 

## Fi CPU and Memory Subsystem 

## 7.1 Processor 

The ATWINC3400-MR210xA module has two Cortus APS3 32-bit processors, one is used for Wi-Fi and the other is used for Bluetooth. In IEEE 802.11 mode, the processor performs many of the MAC functions, including but not limited to: association, authentication, power management, security key management and MSDU aggregation/deaggregation. In addition, the processor provides flexibility for various modes of operation, such as Station (STA) and Access Point (AP) modes. In Bluetooth mode, the processor handles multiple tasks of the Bluetooth protocol stack. 

## 7.2 Memory Subsystem 

The APS3 core uses a 256 KB instruction/boot ROM (160 KB for IEEE 802.11 and 96 KB for Bluetooth) along with a 420 KB instruction RAM (128 KB for IEEE 802.11 and 292 KB for Bluetooth), and a 128 KB data RAM (64 KB for IEEE 802.11 and 64 KB for Bluetooth). In addition, the device uses a 160 KB shared/exchange RAM (128 KB for IEEE 802.11 and 32 KB for Bluetooth), accessible by the processor and MAC, which allows the processor to perform various data management tasks on the Tx and Rx data packets. 

## 7.3 Nonvolatile Memory (eFuse) 

The ATWINC3400-MR210xA modules have 768 bits of nonvolatile eFuse memory that can be read by the CPU after a device reset. The eF use is partitioned into six 128-bit banks (Bank 0 — Bank 5). Each bank has the same bit map (see the following figure). The purpose of the first 108 bits in each bank is fixed, and the remaining 20 bits are general-purpose software dependent bits, or reserved for future use. Currently, the Bluetooth address is derived from the Wi-Fi MAC address such that the Bluetooth address = Wi-Fi MAC address + 1. Note: If |Q Amp Used, IQ Amp Correction, IQ Pha Used, and IQ Pha Correction bit fields are programmed, Bank 0 and Bank 1 must not be programmed with any values, and only the Bank Invalid bit must be programmed. 

This nonvolatile one-time-programmable (OTP) memory can be used for storing the following customer-specific parameters: 

- « MAC address 

- Calibration information (crystal frequency offset (XO offset) and so on) 

- ¢ Other software-specific configuration parameters 

Each bank can be programmed independently, which allows for several updates of the device parameters following the initial programming. For example, if the MAC address is currently programmed in Bank 3, and to update the new MAC address, perform the following steps: 

1. Invalidate the contents of Bank 3 by programming the Bank Invalid bit field of Bank 3. 

2. Program Bank 4 with the new MAC address along with the values of ADC Calib (if used in Bank 3), Frequency Offset (from Bank 3), |Q Amp Correction (from Bank 3) and IQ Pha Correction (from Bank 3). The Used bit field for each corresponding value bit field must also be programmed. 

3. Validate the contents of Bank 4 by programming the Bank Used bit field of Bank 4. 

Each bit field (i.e., MAC Address, ADC Calibration, Frequency Offset, |Q Amp Correction, and |Q Pha Correction) has its corresponding Used bit field. Each Used bit field indicates to the firmware that the value in the related bit field is valid. A value of '0' in the Used bit field indicates that the following bit field is invalid and a value of '1' programmed to the Used bit field indicates that the corresponding bit field is valid and can be used by firmware. 

By default, all the ATWINC3400-MR210xA modules are programmed with the MAC address, Frequency Offset bits, IQ Amp and IQ Phase fields of Bank 3. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 21 

# ATWINC3400-MR210xA 

## CPU and Memory Subsystem 

Figure 7-1. Bitmap for ATWINC3400-MR210xA eFuse Bank 

**==> picture [444 x 129] intentionally omitted <==**

**----- Start of picture text -----**<br>
Width 1 1 3 2 1 48 1 7 1 15 1 13 1 13 20<br>‘S =}<br>S 6<br>>§| 3 alee Wesfe) 3<br>& Ke? = o © &<br>o|| 2SG ||o| SGa<br>Bit 31 30 29:27 26:25 24 23:0 31:8 7 6:0 31 30:16 15 14:2 1 0-31:20 19 0)<br>Word <—————- Word0.—————®_ #—- Word1 ——® <<? Word2-— ——_® #—__ Word3 —><br>**----- End of picture text -----**<br>


Note: The bit map has been updated with the |Q Amp Correction and IQ Pha Correction fields from firmware version 1.4 onwards. Earlier, these bit fields were reserved for future use. For customers using firmware older than 1.4, the IQ Amp Correction and IQ Pha Correction bit fields will not be used by the firmware. 

The matrix table below provides details on how different versions of the firmware would handle the |Q Amp Used, IQ Amp Correction, |Q Pha Used and IQ Pha Correction bit fields during Initialization. 

|:<br>:<br>Firmware Version|IQAmp Used and IQ Pha Used Bit Status|IQAmp Used and IQ Pha Used Bit Status|
|---|---|---|
|Used by|Device with l|QAmp Used and IQ Pha Used|Device with IQAmp Used and IQ Pha|
|Customer|Bits with Value ‘1’|Used Bits with Value ‘0’|
|1.4 or later|The firmware loads the IQ calibration values|The firmware ignores the values in the IQ|
||from the |QAmp Correction and IQ Pha|Amp Correction and IQ Pha Correction bit|
||Correction bit fields of the corresponding eFuse _ fields and proceeds with Initialization.||
||bank and proceeds with Initialization.||
|Prior to 1.4|The firmware does not check for the IQAmp Used and IQ Pha Used bit fields and proceeds||
||withInitialization.||



© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 22 

ATWINC3400-MR210xA WLAN Subsystem 

## 8. WLAN Subsystem 

The WLAN subsystem is composed of the Media Access Controller (MAC), Physical Layer (PHY) and the radio. 

## 8.1 MAC 

The ATWINC3400-MR210xA module is designed to operate at low power, while providing high data throughput. The IEEE 802.11 MAC functions are implemented with a combination of dedicated datapath engines, hardwired control logic and a low power, high-efficiency microprocessor. The combination of dedicated logic with a programmable processor provides optimal power efficiency and real-time response while providing the flexibility to accommodate evolving standards and future feature enhancements. 

The dedicated datapath engines are used to implement datapath functions with heavy computational requirements. For example, a Frame Check Sequence (FCS) engine checks the Cyclic Redundancy Check (CRC) of the transmitting and receiving packets, and a cipher engine performs all the required encryption and decryption operations for the WEP, WPA-TKIP and WPA2 CCMP-AES security requirements. 

Control functions, which have real-time requirements, are implemented using hardwired control logic modules. These logic modules offer real-time response while maintaining configurability through the processor. Examples of hardwired control logic modules are the channel access control module (implements EDCA/HCCA, Beacon TX control, interframe spacing and so on), protocol timer module (responsible for the Network Access vector, back-off timing, timing synchronization function and slot management), MAC Protocol Data Unit (MPDU) handling module, aggregation/deaggregation module, block ACK controller (implements the protocol requirements for burst block communication) and TX/RX control Finite State Machine (FSM) (coordinates data movement between PHY and MAC interface, cipher engine and the Direct Memory Access (DMA) interface to the TX/RX FIFOs). 

The following are the characteristics of the MAC functions implemented solely in the software on the microprocessor: 

- Functions with high memory requirements or complex data structures. Examples include association table management and power save queuing. 

- ¢ Functions with low computational load or without critical real-time requirements. Examples include authentication and association. 

- ¢ Functions that require flexibility and upgradeability. Examples include beacon frame processing and QoS scheduling. 

## Features 

The ATWINC3400-MR210xA MAC supports the following functions: 

- ¢ IEEE 802.11b/g/n 

- ¢ IEEE 802.11e WMM QoS EDCA/HCCA/PCF multiple access categories traffic scheduling 

- « Advanced IEEE 802.11n features: 

   - Transmission and reception of aggregated MPDUs (A-MPDU) 

   - Transmission and reception of aggregated MSDUs (A-MSDU) 

   - Immediate block acknowledgment 

   - Reduced Interframe Spacing (RIFS) 

- ¢ JEEE 802.11i and WFA security with key management: — WEP 64/128 

   - WPA-TKIP 

   - 128-bit WPA2 CCMP (AES) 

- « Advanced power management: 

   - Standard IEEE 802.11 power save mode 

- « RTS-CTS and CTS-self support 

- e Either STA or AP mode in the infrastructure basic service set mode 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 23 

ATWINC3400-MR210xA 

## WLAN Subsystem 

## 8.2 PHY 

The ATWINC3400-MR210xA module WLAN PHY is designed to achieve the reliable and power-efficient physical layer communication specified by the IEEE 802.11 b/g/n in single stream mode with 20 MHz bandwidth. The advanced algorithms are used to achieve maximum throughput in a real-world communication environment with impairments and interference. The PHY implements all the required functions such as Fast Fourier Transform (FFT), filtering, Forward Error Correction (FEC) that is a Viterbi decoder, frequency, timing acquisition and tracking, channel estimation and equalization, carrier sensing, clear channel assessment and automatic gain control. 

## Features 

The IEEE 802.11 PHY supports the following functions: 

- Single antenna 1x1 stream in 20 MHz channels 

- Supports IEEE 802.116 DSSS-CCK modulation: 1, 2, 5.5 and 11 Mbps 

- ¢ Supports IEEE 802.11g OFDM modulation: 6, 9, 12,18, 24, 36, 48 and 54 Mbps 

- ¢ Supports IEEE 802.11n HT modulations MCSO-7, 20 MHz, 800 and 400 ns guard interval: 6.5, 7.2, 13.0, 14.4, 19.5, 21.7, 26.0, 28.9, 39.0, 43.3, 52.0, 57.8, 58.5, 65.0 and 72.2 Mbps‘") 

- ¢ |EEE 802.11n mixed mode operation 

- ¢ Per packet TX power control 

- « Advanced channel estimation/equalization, automatic gain control, CCA, carrier/symbol recovery and frame detection 

Note: 

1. Short Gl is currently not supported by the firmware. The data sheet will be updated when the feature is supported. 

## 8.3 Radio 

This section presents information describing the properties and characteristics of the ATWINC3400-MR210xA and Wi-Fi radio transmit and receive performance capabilities of the device. 

The performance measurements are taken at the RF pin assuming 500 impedance; the RF performance is ensured for a room temperature of 25°C with a derating of 2-3 dB at the boundary conditions. 

The measurements were taken under typical conditions: VBATT = 3.3V; VDDIO = 3.3V; temperature: +25°C 

Table 8-1. Features and Properties 

|Part Number|ATWINC3400-MR210xA|
|---|---|
|WLAN Standard|IEEE 802.11 b/g/n, Wi-Fi Compliant|
|Host Interface|SPI|
|Dimension|22.4 x 14.7 x 2.0mm|
|Frequency Range|2.412 GHz ~ 2.472 GHz (2.4 GHz ISM Band)|
|Number of Channels|11 for North America and 13 for Europe and Japan|
|Modulation|802.11b: DQPSK, DBPSK, CCK|
||802.11g/n: OFDM /64-QAM,16-QAM, QPSK, BPSK|
|Data Rate|802.11b: 1, 2, 5.5, 11 Mbps|
||802.11g: 6, 9, 12, 18, 24, 36, 48, 54 Mbps|
|Data Rate|802.11n: 6.5, 13, 19.5, 26, 39, 52, 58.5, 65 Mbps|
|(20MHz,normalGI,800ns)||



© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 24 

WLAN Subsystem 

+++. -Continued Description Feature Data Rate 802.11n: 7.2, 14.4, 21.7, 28.9, 43.3, 57.8, 65,72.2 Mbps (20 MHz, short GI, 400 ns)(1) 

Operating Temperature -40 to +85°C 

Note: 

1. Currently, short GI is not supported by the firmware. The data sheet will be updated when the feature is supported. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 25 

ATWINC3400-MR210xA 

Bluetooth Low Energy 

## 9: Bluetooth Low Energy 

The Bluetooth subsystem implements all the mission critical real-time functions. It encodes/decodes HCI packets, constructs baseband data packages; and manages and monitors the connection status, slot use, data flow, routing, segmentation and buffer control. The Bluetooth subsystem supports Bluetooth Low Energy modes of operation. 

The following advanced low energy applications are supported: 

- Smart energy 

- Consumer wellness 

- Home automation 

- Security 

- ¢ Proximity detection 

- ¢ Entertainment 

- Sports and fitness 

- ¢« Automotive 

## Coexistence Mechanism 

The ATWINC3400-MR210xA supports simultaneous use of both Bluetooth Low Energy and Wi-Fi via a coexistence mechanism that allows the protocols to share the same radio. The radio defaults to Wi-Fi use until a Bluetooth Low Energy event occurs (such as connection or advertising), in which case the radio is gracefully switched over for Bluetooth Low Energy use. For the duration of the Bluetooth Low Energy event, the radio is switched back and forth between Wi-Fi and Bluetooth Low Energy, as demanded by the Bluetooth Low Energy activity, before returning to WiFi until the next Bluetooth Low Energy event. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 26 

ATWINC3400-MR210xA External Interfaces 

## 10. External Interfaces 

- The ATWINC3400-MR210CA external interfaces include: 

- |?C for debugging 

- ¢ SPI for control and data transfer 

- ¢« UART for debugging * General Purpose Input/Output pins“) 

Note: 

1. Usage of the GPIO functionality is not supported by the ATWINC3400 firmware. The data sheet will be updated once the support for this feature is added. 

## 10.1. Interfacing with the Host Microcontroller 

This section describes interfacing the ATWINC3400-MR210xA module with the host microcontroller. The interface is comprised of a slave SPI and additional control signals, as shown in the following figure. For more information on SPI interface specification and timing, refer to the SPI Interface. Additional control signals are connected to the GPIO/IRQ interface of the microcontroller. 

Figure 10-1. Interfacing with Host Microcontroller 

**==> picture [413 x 362] intentionally omitted <==**

**----- Start of picture text -----**<br>
CHIP_EN<br>RESET<br>Host Wi-Fi Controller<br>Microcontroller SPI Module<br>IRQN<br>Table 10-1. Host Microcontroller Interface Pins<br>7 RESETN<br>33 IRQN<br>19 CHIP_EN<br>25 SPI_SSN<br>26 SPI_MOSI<br>24 SPI_MISO<br>**----- End of picture text -----**<br>


Table 10-1. Host Microcontroller Interface Pins 

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Datasheet 

DS70005350C-page 27 

## External Interfaces 

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wees. CONtINUed<br>23<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
SPI_SCK<br>**----- End of picture text -----**<br>


## 10.2 SPI Slave Interface 

## 10.2.1 Overview 

The ATWINC3400-MR210xA has a Serial Peripheral Interface (SPI) that operates as an SPI slave. The SPI interface can be used for control and for serial I/O of 802.11 and Bluetooth Low Energy data. The SPI pins are mapped as shown in the following table. The SPI is a full-duplex, slave-synchronous serial interface that is available immediately following a Reset when pin 2 (SPI_CFG) is tied to VDDIO. 

Table 10-2. SPI Interface Pin Mapping 

|2|CFG: Must be tied to VDDIO|
|---|---|
|25|SSN: Active-Low Slave Select|
|26|MOSI(RXD): Serial Data Receive|
|23|SCK: Serial Clock|
|24|MISO(TXD):SerialDataTransmit|



When the SPI is not selected, that is, when the SSN is high, the SPI interface will not interfere with data transfers between the serial-master and other serial-slave devices. When the serial-slave is not selected, its transmitted data output is buffered, resulting in a high impedance drive onto the MISO line. 

The SPI interface responds to a protocol that allows an external host to read or write any register in the chip, as well as, initiate DMA transfers. 

The SPI SSN, MOSI, MISO and SCK pins of the ATWINC3400-MR210xA have internal programmable pull-up resistors. These resistors must be programmed to be disabled; otherwise, if any of the SPI pins are driven to a low level while the ATWINC3400-MR210xA is in the low-power sleep state, the current will flow from the VDDIO supply through the pull-up resistors, increasing the current consumption of the module. 

## 10.2.2 SPI Timing 

The SPI Slave interface supports four standard modes as determined by the Clock Polarity (CPOL) and Clock Phase (CPHA) settings. These modes are illustrated in the following table and figure. 

|Table 10-3. SPI Slave Modes|
|---|
|0<br>0<br>0|
|1<br>0<br>1|
|2<br>1<br>0|
|3<br>1<br>1|
|Note:<br>The ATWINC3400-MR210xA firmware uses “SPI MODE 0” to communicate with the host.|
|TheredlinesinthefollowingfigurecorrespondtoClockPhase=0andthebluelinescorrespondtoClockPhase=1.|



© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 28 

ATWINC3400-MR210xA 

External Interfaces 

Figure 10-2. SPI Slave Clock Polarity and Clock Phase Timing 

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**----- Start of picture text -----**<br>
SCK ‘ 1 ' 1 1 i) 1 1 t 1 1 1 ' t 1 1<br>RXD/TXD z 1 1 ' 1 1 ' i] ' ' i] ' 1 ' ' 1 '<br>(mosumiso) cera-1 [Fat +t 213s ;4]slel7|sfm<br>The SPI timing is provided in the following figure and table.<br>Figure 10-3. SPI Timing Diagram (SPI Mode CPOL = 0, CPHA = 0)<br>fsck<br>tH twH tw<br>~ im a“<br>. et<br>™ i<br>t SUSSN tHDSSN<br>Table 10-4. SPI Slave Timing Parameters!<br>Clock Input Frequency'2) fsck = 48 MHz<br>**----- End of picture text -----**<br>


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Datasheet 

DS70005350C-page 29 

ATWINC3400-MR210xA 

External Interfaces 

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**----- Start of picture text -----**<br>
+++. -Continued<br>**----- End of picture text -----**<br>


|Clock Low Pulse Width|twi|4|_—||
|---|---|---|---|---|
|Clock High Pulse Width|twu|5|_—||
|Clock Rise Time|tly|0|7||
|Clock Fall Time|tu|0|7||
|TXD Output Delay®)|topLy|4|9from SCK fall|ns|
|RXD Input Setup Time|tisu|1|—||
|RXD Input Hold Time|typ|5)|—_||
|SSN Input Setup Time|tsussn|3|_—||
|SSNInputHoldTime|tupssn|55|—_—||



Notes: 

1. The timing is applicable to all SP! modes. 

2. The maximum clock frequency specified is limited by the SPI Slave interface internal design; the actual maximum clock frequency can be lower and depends on the specific PCB layout. 

3. The timing is based on 15 pF output loading. Under all conditions, t, 4 + twy + ty_ + tw. must be less than or equal to 1/[fgcx.] 

## 10.3 UART Interface 

The ATWINC3400-MR210xA supports the Universal Asynchronous Receiver/Transmitter (UART) interface. Wi-Fi and Bluetooth Low Energy interfaces must be used for debug purposes only. Wi-Fi UART pins are available on pins 16 (TXD) and 17 (RXD). Bluetooth Low Energy UART pins are available on pins 8 (TXD) and 9 (RXD). The UART is compatible with the RS-232 standard. 

The default configuration for accessing the Wi-Fi UART interface of the ATWINC3400-MR210xA is mentioned below: 

- ¢ Baud rate: 460800 

- ¢ Data: 8-bit « Parity: None 

- Stop bit: 1-bit 

- ¢ Flow control: None 

It also has RX and TX FIFOs, which ensure reliable high-speed reception and low software overhead transmission. FIFO size is 4 x 8 for both RX and TX direction. The UART also has status registers showing the number of received characters available in the FIFO and various error conditions, as well as, the ability to generate interrupts based on these status bits. 

An example of the UART receiving or transmitting a single packet is shown in the following figure. This example shows 7-bit data (0x45), odd parity and two stop bits. 

Figure 10-4. Example of UART RX of TX Packet 

**==> picture [336 x 65] intentionally omitted <==**

**----- Start of picture text -----**<br>
Previous Current Packet<br>Packets or || ‘ Dats , | Next<br>Leading Packet<br>Idle . Start Parity .<br>Bits Bit Bit Stop Bits<br>nase oe ooee----------- = -----<br>**----- End of picture text -----**<br>


© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 30 

ATWINC3400-MR210xA 

External Interfaces 

## 10.4 [2C Client Interface 

The I2C slave interface is a two-wire serial interface consisting of a serial data line (SDA) on module Pin 10 and a serial clock line (SCL) on module Pin 11. This interface is used for debugging of ATWINC3400-MR210xA modules. The I2C slave responds to the seven bit address value 0x60. The ATWINC3400-MR210xA I2C supports I2C bus version 2.1 - 2000 and can operate in Standard mode (with data rates up to 100 Kb/s) and Fast mode (with data rates up to 400 Kb/s). 

Note: For specific information on I2C bus, refer to Philips Specification entitled “The I2C-Bus Specification, Version 2.1”. The I2C slave is a synchronous serial interface. The SDA line is a bidirectional signal and changes only while the SCL line is low, except for STOP, START, and RESTART conditions. The output drivers are open-drain to perform wire-AND functions on the bus. The maximum number of devices on the bus is limited by only the maximum capacitance specification of 400 pF. Data is transmitted in byte packages. 

## 10.4.1. 1?C Client Timing 

The I2C Client timing diagram for the ATWINC3400-MR210xA module is shown in the following figure. Figure 10-5. I2C Client Timing Diagram 

**==> picture [321 x 165] intentionally omitted <==**

**----- Start of picture text -----**<br>
tsupar tor tuopat 7”<br>SDA _ \ a tsusto ;<br>\ -ay fl<br>HDSTA tii<br>PR tpr<br>fou tsusta<br>**----- End of picture text -----**<br>


The following table provides the |2C Client timing parameters for the ATWINC3400-MR210xA module. Table 10-5. I2C Client Timing Parameters 

|SCL|Clock Frequency|fsc|0|400|kHz|—_|
|---|---|---|---|---|---|---|
|SCL|Low Pulse Width|twe|1.3|_—||_—|
||||||Us||
|SCL|High Pulse Width|tw|0.6|—||_—|
|SCL,|SDA Fall Time|tu|—|300||—|
|SCL,SDA|SDA RiseTime|he|_|300|ns|[ae<br>This is dictated byexternal<br>components|
||||||us||
|SDASetup|Setup Time|tsupat|100|—_—|ns|—_|
||||0|—|ns|Client and Host Default|
|SDA|Hold Time|tuppaT|40|—_—|us|HostProgrammingOption|



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Datasheet 

DS70005350C-page 31 

ATWINC3400-MR210xA 

External Interfaces 

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**----- Start of picture text -----**<br>
seeeeeeee CONTINUE<br>Bus Free Time Between STOP t 13 Hs<br>and START HUE — —<br>Glitch Pulse Reject tpr 0 50 ns —_—<br>**----- End of picture text -----**<br>


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Datasheet 

DS70005350C-page 32 

ATWINC3400-MR210xA Application Reference Design 

## 11. Application Reference Design 

The ATWINC3400-MR210xA module application schematics for different supported host interfaces are shown in this section. 

## 11.1 Host Interface 

Figure 11-1. ATWINC3400-MR210xA Reference Schematic 

**==> picture [431 x 283] intentionally omitted <==**

**----- Start of picture text -----**<br>
VBAT VDDIO<br>VDDIO<br>-<br>eo N 1M<br>Ut zs<br>& 2  spIo~_SPI_CFG 2<br>$ 8 12C_SDA_M ne<br>rorosPinaser_| SPL_MOS'gpSPTSCK so |<8[  wa S SPI_SCKPI_ML O SI ° 2¢-SCL_Miron [222J32LE Op» R21 iran<br>GPI020 GPIO_20<br>weS$son's eeTes ERENTif  BERD,2C_SCLS ATWINGHO0MRZ10 Otpolis>ae iSere. (General Purpose V0)<br>UARTRxD TP2 [_] UART_RXD GPIO3 <> GPlo_3<br>o CHIP_EN Ji9 O,_R9 Chip_EN_ (To host GPIO)<br>eee BRBEE ) Q,_R10 Reset.N. (To host GPIO}<br>SoS 85535 6 &<br>of noisy signals is required. They<br>also allow disconnecting of module<br>peak U2 4 for debug purposes.<br>= reawjor<br>=| Pr"<br>|<br>**----- End of picture text -----**<br>


Note: It is recommended to add test points for module pins J8, J9, J10, J11, J16 and J17 in the design. The following table provides the reference Bill of Material (BoM) details for the ATWINC3400-MR210xA module with SPI as host interface. 

Table 11-1. ATWINC3400-MR210xA Reference Bill of Materials for SP! Operation 

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**----- Start of picture text -----**<br>
e<br>Fs] Quantity | Referenc | Value Description Manufacturer Part Number Fesee<br>1 1 U1 ATWINC3400- | Wi-Fi/ Microchip ATWINC3400 |Custom<br>MR210xA Bluetooth/BLE | Technology -MR210xA<br>Combo Module | Inc.®<br>2 1 U2 ASH/KW-32.76 | Oscillator, Abracon® ASH7KW-32. OSCCC320<br>8kHZ-L-T 32.768 kHz, Corporation 768kKHZ-L-T | X150X100-4<br>+0/-175 ppm, N<br>1.2V - 5.5V,<br>-40°C - +85°C<br>**----- End of picture text -----**<br>


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Datasheet 

DS70005350C-page 33 

ATWINC3400-MR210xA 

Application Reference Design 

+++. -COntinued 

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**----- Start of picture text -----**<br>
e<br>3 1 R1 1M RESISTOR, Panasonic® ERJ-1GEJ10 |RSO201<br>Thick Film, 1 5C<br>MOhm, 0201<br>4 13 R2-R14 0 RESISTOR, Panasonic® ERJ-1GNORO RS0201<br>Thick Film, 0 OC<br>Ohm, 0201<br>**----- End of picture text -----**<br>


© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 34 

ATWINC3400-MR210xA 

Module Outline Drawings 

## 12. Module Outline Drawings 

The ATWINC3400-MR210xA module package details are outlined in the following figure. Figure 12-1. ATWINC3400-MR210CA Footprint and Module Package Drawings - Top, Bottom and Side View 

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**----- Start of picture text -----**<br>
22.428<br>1.981 -~— METAL SHIELD 1.30<br>| 13|1 1<br>wih<br>1.346 a] |<br>| o ?<br>“2 a<br>1.204 -— eS Fr 14.732 :<br>PITCH | a ;:<br>25 | 36<br>1.341 , |<br>—=| |e— 1.204 PITCH ANTENNA 0.787<br>TOP VIEW 2.09<br>THIS PAD MUST BE SIDE VIEW<br>SOLDERED TO GROUND<br>25 26 27 28 29 30 31 32/33 34 35 36<br>24 |<br>23 5:21<br>22<br>21<br>20<br>19 4.40<br>18<br>qe<br>16<br>15 0.94<br>14<br>4.40<br>| 13.126.13 11 10] 9 8 7 5 4 3 2 1<br>BOTTOM VIEW<br>**----- End of picture text -----**<br>


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Datasheet 

DS70005350C-page 35 

ATWINC3400-MR210xA 

Module Outline Drawings 

Figure 12-2. ATWINC3400-MR210CA Module Package Drawings - 3D View and Recommended Land Pattern 

**==> picture [361 x 407] intentionally omitted <==**

**----- Start of picture text -----**<br>
Re oN,<br>UR <><br>QB<br>RECOMMENDED LAND PATTERN<br>' i PITCH SCREEN<br>| 4.400 _ — J<br>n= 13 1<br>“4 7 AA a 5.118 I<br>= —_1, I<br>12.045 || 4.400 | 14.732<br>I EDGE OF<br>— I<br>5214 PC BOARD<br>| SSG geeaoag—-<br>1.985 [—|] 25 | __| = 0.813 ' 36<br>| 13.244 __.|<br>|____________—- 22.428<br>**----- End of picture text -----**<br>


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Datasheet 

DS70005350C-page 36 

ATWINC3400-MR210xA 

Module Outline Drawings 

Figure 12-3. ATWINC3400-MR210UA Footprint and Module Package Drawings - Top, Bottom and Side View 

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**----- Start of picture text -----**<br>
22.428<br>1.981; 13]-~—' RF CONNECTOR 1 —| 3.64 [— 1.30<br>aN<br>TT a | 2.72 im;<br>1.346 (S} T m_) |<br>| lin E<br>1.204 -— o? iF 14.732<br>PITCH | 3 :<br>:<br>“= y}_._{ ___.______t k<br>25 | | 36<br>1.341 METAL i<br>SHIELD TOP——| VIEW|-~— 1.204 PITCH - 02 . 78709<br>SIDE VIEW<br>THIS PAD MUST BE<br>SOLDERED TO GROUND<br>25 26 27 28 29 30 31 32/33 34 35 36<br>24 |<br>23 5.21<br>22<br>21<br>20<br>19 4.40<br>18<br>1<br>16<br>15 0.94<br>14<br>4.40<br>| 136.1312 11 1039 8 7 5 4 3 2 1 }<br>BOTTOM VIEW<br>**----- End of picture text -----**<br>


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ATWINC3400-MR210xA 

Module Outline Drawings 

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**----- Start of picture text -----**<br>
Figure 12-4. ATWINC3400-MR210UA Module Package Drawings - 3D View and Recommended Land Pattern<br>ao<br><<br>NPR —“— &<br>NP Re. fh " : Py)<br>“Sc 2<br>RECOMMENDED LAND PATTERN<br>-—- 6.128 1.204 SILK<br>4.400 , |<br>| — | | PITCH SCREEN<br>op 13 1<br>p8BBE a<br>“4<br>5.118<br>ee<br>} l<br>4.400 14.732<br>I EDGE OF<br>12.045 — I<br>5214 PC BOARD<br>ey |<br>AEE<br>1.985 —=! 25 | __| = 0.813 ' 36<br>| — 13.244 |<br>_——— 22.428<br>**----- End of picture text -----**<br>


Notes: 

1. Dimensions are in mm. 

2. Having a 5x5 grid of GND vias solidly connecting the exposed GND paddle of the module to the ground plane on the inner/other layers of the host board is recommended. This will provide a good ground and thermal transfer for the ATWINC3400-MR210xA module. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 38 

ATWINC3400-MR210xA Design Considerations 

## 13. | Design Considerations 

This chapter provides the guidelines on module placement and routing to achieve the best performance. 

## 13.1 ATWINC3400-MR210CA 

## 13.1.1 ATWINC3400-MR210CA Module Placement and Routing Guidelines 

- It is critical to follow the recommendations listed below to achieve the best RF performance: 

- ¢« The module must be placed on the host board and the chip antenna area must not overlap with the host board. The following figure on placement reference shows the best, poor and worst case module placements in the host board. 

Figure 13-1. ATWINC3400-MR210CA Placement Example 

**==> picture [422 x 230] intentionally omitted <==**

**----- Start of picture text -----**<br>
E thames WIHT: —<br>r= — 1 merce >7 mM<br>—<br>=<br>~<br>A<br>Aey ov A comecter Wnt oo RaH0CAIUA i. Hi<br>ag x 4 i = } n 3<br>} a +f =f i RS i<br>| Eeea Ae| ~<br>3<br>3<br>**----- End of picture text -----**<br>


Do not place the module in the middle of the host board or far away from the host board edge. 

- ¢ Follow the host board mechanical recommendation, ground plane and keepout recommendations, as shown in the following figure. Module chip antenna is specifically tuned for this host board mechanical recommendation, as shown in the following figure. The host PCB must have a thickness of 1.5 mm. 

   - Follow the module placement and keepout recommendation, as shown in the following figure. 

      - ¢ Avoid routing any traces on the top layer of the host board, which is directly below the module area. 

      - « In the keepout region, there must be no copper traces in all signal layers. 

      - ¢ Avoid placing any components (like mechanical spacers, bumpon and so on) on the host board close to the chip antenna region. 

      - « Place the GND polygon pour below the module on the top layer of the host board. Avoid breaks in this GND plane and ensure continuous GND plane for better RF performance. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 39 

# ATWINC3400-MR210xA Design Considerations 

- « The GND polygon pour in the top layer of the host board must have a minimum area of 20 x 40 mm. « Place sufficient GND vias on the host board edge and below the module for better RF performance. 

- ¢ Having a5 x 5 grid of GND vias solidly connecting the exposed GND paddle of the module to the ground plane of the host board is recommended. This will act as a good ground and thermal conduction path for the ATWILC3400-MR210CA module. The GND vias must have a minimum via hole size of 0.2 mm. 

- The antenna on the module must not be placed in direct contact or close proximity to plastic casing/ objects. Keep a minimum clearance of > 7 mm in all directions around the chip antenna. 

## Figure 13-2. ATWINC3400-MR210CA Best Case Placement Reference Example 

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8.7 mm 6mm >7mm<br>[eeeeeeeenek] [alin][Seeieieeieeeteees][alin]<br>‘ [Oe]<br>45 mm}<br>0.5 mm i<br>rarer 1.2mm 0.5 mm<br>= [ol]<br>ATWINC3400-MR210CA — HostPlane Board GND<br>[—] [No]<br>=) [Keep-out] Host Board [ area]  PCB<br>Copper on All Layers<br>**----- End of picture text -----**<br>


## 13.1.2 ©[ATWINC3400-MR210CA][Antenna][Performance] 

The ATWINC3400-MR210CA uses a chip antenna, which is fed via matching network. The table below lists the technical specification of the chip antenna. 

Table 13-1. Chip antenna specification 

|Parameter|Value|
|---|---|
|Operating frequency|2400— 2500 MHz|
|AntennaP/N|2450AT18A100|



## 13.1.2.1 Radiation Pattern 

Following figures illustrate the antenna radiation pattern measured for the ATWINC3400-MR210CA module mounted in the ATWINC3400-Xpro evaluation kit. During the measurement, the module is placed in the XZ plane with Y axis being perpendicular to the module and pointing to the front of the module. 

© 2020 Microchip Technology Inc. 

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Datasheet<br>**----- End of picture text -----**<br>


DS70005350C-page 40 

ATWINC3400-MR210xA Design Considerations **e** ee reece rece ener eeeee 

Figure 13-3. Antenna Radiation Pattern - XY Plane 

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**----- Start of picture text -----**<br>
Azimuth = -90.0 x 5<br>Elevation = 180.0<br>Roll = 0.0 aoea ge 0<br>BEI TpEe =~<br>fe Maseei 3 ‘<br>Mig ee ora Sea MMe raeae a o<br>HHidiewess.ante  2 SSeSf+] HHH w 10<br>PTAChaeetegettrfn CAE011 LNWA agreeyaaaty w<br>Hie oed pe crochtanJoepemanateee [ee] va oa -15<br>SPeerannitey<br>-20<br>aa<br>**----- End of picture text -----**<br>


Figure 13-4. Antenna Radiation Pattern - ZY Plane 

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**----- Start of picture text -----**<br>
Azimuth = 90.0 Z 5<br>Elevation = 0.0<br>Roll = -90.0 0<br>oo<br>es =] 5<br>Witeet<br>sites geuwen@unmayeestet TP yw Y 5c -<br>SANTA a a<br>itae ay tat | ft | Pereereeey, w<br>CAAA CC a -15<br>SACRAiceLSaetnaal cw<br>-20<br>Sal,<br>Antenna Radiation Pattern - ZX ZX Plane<br>Azimuth = 0.0 7 5<br>Elevation = 90.0<br>Roll = 0.0 0<br>o<br>Pe<br>Mote ieeese | Ta ie a<br>aa a a w 1 0<br>ee Te x = -<br>EEE 9°<br>WUE eae —<br>eeee EESa a = -15<br>cae a rare o<br>-20<br>-25<br>**----- End of picture text -----**<br>


Figure 13-5. Antenna Radiation Pattern - ZX ZX Plane 

Dt© 2020 Microchip Technology Inc. Datasheet DS70005350C-page 41 

ATWINC3400-MR210xA Design Considerations 

## 13.2 ATWINC3400-MR210UA External Antenna Connector 

## 13.2.1. ATWINC3400-MR210UA Module Placement and Routing Guidelines 

The ATWINC3400-MR210UA module has an Ultra Small Miniature RF Connector (u.FL) for the external antenna. The choice of antenna is limited to the antenna types for which the module was tested and approved. Fora list of tested and approved antennas that may be used with the module, refer to the respective country in the Regulatory Approval section. 

An approved list of external antennas tested and certified with the ATWINC3400-MR210UA module is shown in 13.2.2 ATWINC3400-MR210UA Approved External Antennas. 

It is critical to follow the recommendations listed below to achieve the best RF performance: 

   - Avoid routing any traces on the top layer of the host board, which is directly below the module area. 

   - « Place the GND polygon pour below the complete module area. Do not have any breaks in this GND plane. 

   - ¢ Place sufficient GND vias in the GND polygon pour below the module area for better RF performance. 

   - ¢ Having a3 x 3 grid of GND vias solidly connecting the exposed GND paddle of the module to the inner layer ground plane of the host board is recommended. This will act as a good ground and thermal conduction path for the ATWINC3400-MR210UB module. The GND vias must have a minimum via hole size of 0.3 mm. 

   - Keep large metal objects away from the external antenna to avoid electromagnetic field blocking. 

   - « Make sure the width of the traces routed to GND, VDDIO and VBAT rails are sufficiently larger for handling the peak TX current consumption. 

- 13.2.1.1 Antenna Placement Recommendations for ATWINC3400-MR210UA 

The following recommendations must be applied for the placement of antenna and its cable: 

- « The antenna cable must not be routed over circuits generating electrical noise on the host board or alongside or underneath the module. It is preferable that the cable be routed straight out of the module. 

- ¢ The antenna must not be placed in direct contact or in close proximity of the plastic casing/objects. — Donot enclose the antenna within a metal shield. 

- Keep any components that may radiate noise, signals or harmonics within the 2.4 GHz to 2.5 GHz frequency band away from the antenna and, if possible, shield those components. Any noise radiated from the host board in this frequency band degrades the sensitivity of the module. 

- ¢ It is recommended that the antenna be placed at a distance greater than 5 cm away from the module. The following figure shows the antenna keepout area; the antenna must not be placed in this area. 

- ¢ This recommendation is based on an open-air measurement and does not take into account any metal shielding of the customer end product. When a metal enclosure is used, the antenna can be located closer to the ATWINC3400-MR210UA module. 

- ¢ The drawing provides an option for routing the antenna cable depending on the location of the antenna with respect to the ATWINC3400-MR210UA PCB. There are two possible options for the optimum routing of the cable. 

ATWINC3400-MR210xA 

Design Considerations 

Figure 13-6. Antenna Placement Guideline 

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Note: These guidelines are generic and it is recommended that customers check and fine-tune the antenna positioning in the final host product based on RF performance. 

## 13.2.2 |ATWINC3400-MR210UA Approved External Antennas 

The ATWINC3400-MR210UA module is approved for use with the antennas listed in the following table. It is permissible to use a different antenna, provided the antenna is of the same type, gain (equal or less than), and has similar in-band and out-of-band characteristics are present (refer to specification sheet for cutoff frequencies). 

If other antenna types are used, the OEM installer must conduct the necessary assessments and authorize the antenna with respective regulatory agencies and ensure compliance. For more details on the corresponding regulatory approval sections, 14. Appendix A: Regulatory Approval. 

Table 13-2. List of Approved External Antennas 

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**----- Start of picture text -----**<br>
List Items Part Number Antenna Gain at 2.4 |Antenna type<br>GHz band<br>1 RFA-02-P33 Aristotle 2 PCB<br>2 RFA-02-D3 Aristotle 2 Dipole<br>**----- End of picture text -----**<br>


© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 43 

ATWINC3400-MR210xA 

Design Considerations 

|+++.|-Continued|||||
|---|---|---|---|---|---|
|List|Items|Part Number||Antenna Gain at2.4 |Antenna type||
|||||GHz band||
|3||RFA-02-L2H1|Aristotle|2|Dipole|
|4||RFA-02-P05|Aristotle|2.|PCB|
|5||RFA-02-C2M2|Aristotle|2|Dipole|
|6||W3525B039|Pulse Electronics|2|PCB|
|7||RFDPA870920IMLB3||WALSIN|1.84|Dipole|
|||01||||
|8||RN-SMA-S|Microchip|0.56|Dipole|



Notes: 

1. If the end-product using the module is designed to have an antenna port that is accessible to the end user, then the unique antenna connector (permissible by FCC) must be used (for example, Reverse Polarity (RP)SMA). 

2. If an RF coaxial cable is used between the module RF output and the enclosure, then the unique antenna connector must be used in the enclosure wall to interface with an antenna. 

3. Contact the antenna vendor for detailed antenna specifications to review suitability to end-product operating environment and to identify alternatives. 

## 13.3 Reflow Profile Information 

For information on reflow process guidelines, refer to the “Solder Reflow Recommendation Application Note” (DS00233). 

## 13.4 Module Assembly Considerations 

The ATWINC3400-MR210xA module is assembled with an EMI shield to ensure compliance with EMI emission and immunity rules. The EMI shield is made of a tin-plated steel (SPTE) and is not hermetically sealed. Solutions such as IPA and similar solvents can be used to clean this module. Cleaning solutions containing acid must never be used on the module. 

## 13.5 Conformal Coating 

The modules are not intended for use with a conformal coating and the customer assumes all risks (Such as the module reliability, performance degradation and so on) if a conformal coating is applied to the modules. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 44 

ATWINC3400-MR210xA 

Appendix A: Regulatory Approval 

## 14. Appendix A: Regulatory Approval 

The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules have received regulatory approval for the following countries: 

¢ ATWINC3400-MR210CA — United States/FCC ID: 2ADHKWINC3400 -— Canada/ISED: * IC: 20266-ATWINC3400 ¢ HVIN: ATWINC3400-MR210CA ¢ PMN: Wi-Fi and Bluetooth Module 

- Europe/CE 

— Japan/MIC: 005-101794 — Korea/KCC: R-CRM-mcp-WINC3400MR210C — Taiwan/NCC: CCAN18LP0450T0 — China/SRRC: CMIIT ID: 2018DJ2733 

* ATWINC3400-MR210UA — United States/FCC ID: 2ADHKWINC3400U — Canada/ISED: * IC: 20266-WINC3400UA * HVIN: ATWINC3400-MR210UA ¢ PMN: ATWINC3400-MR210UA 

— Europe/CE 

## Gain Table for Individual Regulatory Region 

The ATWINC3400-MR210CA module has received regulatory approvals for many regions in the world, namely United States/FCC, Canada/ISED, Europe/CE, Japan/MIC, Korea/KCC, Taiwan/NCC, and China/SRRC. The ATWINC3400-MR210UA module has received regulatory approvals for United States/FCC, Canada/ISED and Europe/CE. 

The default firmware uses a common gain table that meets IEEE 802.11 specifications, and regulatory region limits for both ATWINC3400-MR210CA and ATWINC3400-MR210UA as noted above. In some cases, the output power is reduced by limits of regulatory region with stringent transmit power limits. To optimize performance, and if end products’ destination is known, the specific gain table for that region can be optionally embedded into the firmware. 

The regulatory region certified gain table for individual regulatory region is available on ATWINC3400-MR210CA and ATWINC3400-MR210UA product page. Customers can update the gain table in firmware by following the instructions in section 6. Updating Application Gain Table into WINC3400 of ATWINC3400 — Deriving Application Gain Table Application Note 

## 14.1 United States 

The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules have received Federal Communications Commission (FCC) CFR47 Telecommunications, Part 15 Subpart C “Intentional Radiators” single-modular approval in accordance with Part 15.212 Modular Transmitter approval. Single-modular transmitter approval is defined as a complete RF transmission sub-assembly, designed to be incorporated into another device, that must demonstrate compliance with FCC rules and policies independent of any host. A transmitter with a modular grant can be installed in different end-use products (referred to as a host, host product, or host device) by the grantee or other equipment manufacturer, then the host product may not require additional testing or equipment authorization for the transmitter function provided by that specific module or limited module device. 

The user must comply with all of the instructions provided by the Grantee, which indicate installation and/or operating conditions necessary for compliance. 

A host product itself is required to comply with all other applicable FCC equipment authorization regulations, requirements, and equipment functions that are not associated with the transmitter module portion. For example, 

## Appendix A: Regulatory Approval 

compliance must be demonstrated: to regulations for other transmitter components within a host product; to requirements for unintentional radiators (Part 15 Subpart B), such as digital devices, computer peripherals, radio receivers, etc.; and to additional authorization requirements for the non-transmitter functions on the transmitter module (i.e., Suppliers Declaration of Conformity (SDoC) or certification) as appropriate (e.g., Bluetooth and Wi-Fi transmitter modules may also contain digital logic functions). 

## 14.1.1. Labeling And User Information Requirements 

The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules have been labeled with its own FCC ID number, and if the FCC ID is not visible when the module is installed inside another device, then the outside of the finished product into which the module is installed must display a label referring to the enclosed module. This exterior label should use the following wording: 

¢ For ATWINC3400-MR210CA 

Contains Transmitter Module FCC ID: 2ADHKWINC3400 

or 

Contains FCC ID: 2ADHKWINC3400 

This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. 

¢ For ATWINC3400-MR210UA 

Contains Transmitter Module FCC ID: 2ADHKWINC3400U 

or 

Contains FCC ID: 2ADHKWINC3400U 

This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. 

The user's manual for the finished product should include the following statement: 

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy, and if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: 

- ¢ Reorient or relocate the receiving antenna 

- ¢ Increase the separation between the equipment and receiver 

- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected 

- Consult the dealer or an experienced radio/TV technician for help 

Additional information on labeling and user information requirements for Part 15 devices can be found in KDB Publication 784748, which is available at the FCC Office of Engineering and Technology (OET) Laboratory Division Knowledge Database (KDB) apps.fcc.gov/oetcf/kdb/index.cfm. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 46 

Appendix A: Regulatory Approval 

## 14.1.2 RF Exposure 

All transmitters regulated by FCC must comply with RF exposure requirements. KDB 447498 General RF Exposure Guidance provides guidance in determining whether proposed or existing transmitting facilities, operations or devices comply with limits for human exposure to Radio Frequency (RF) fields adopted by the Federal Communications Commission (FCC). 

From the FCC Grant: Output power listed is conducted. This transmitter is restricted for use with the specific antenna(s) tested in this application for Certification. 

The antenna(s) used with this transmitter must be installed to provide a separation distance of at least 6.5 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter. Users and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying RF exposure compliance. 

## 14.1.3 Approved External Antennas 

To maintain modular approval in the United States, only the antenna types that have been tested shall be used. It is permissible to use different antenna, provided the same antenna type, antenna gain (equal to or less than), with similar in-band and out-of band characteristics (refer to specification sheet for cutoff frequencies). 

For ATWINC3400-MR210CA, the approval is received using the integral chip antenna. 

For ATWINC3400-MR210UA, approved antennas are listed in the table 13.2.2 ATWINC3400-MR210UA Approved External Antennas. 

## 14.1.4 Helpful Web Sites 

- Federal Communications Commission (FCC): www.fcc.gov. 

- FCC Office of Engineering and Technology (OET) Laboratory Division Knowledge Database (KDB) apps.fcc.gov/ oetcf/kdb/index.cfm. 

## 14.2 Canada 

The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules have been certified for use in Canada under Innovation, Science and Economic Development Canada (ISED, formerly Industry Canada) Radio Standards Procedure (RSP) RSP-100, Radio Standards Specification (RSS) RSS-Gen and RSS-247. Modular approval permits the installation of a module in a host device without the need to recertify the device. 

## 14.2.1. Labeling and User Information Requirements 

Labeling Requirements (from RSP-100 - Issue 11, Section 3): The host product shall be properly labeled to identify the module within the host device. 

The Innovation, Science and Economic Development Canada certification label of a module shall be clearly visible at all times when installed in the host device; otherwise, the host product must be labeled to display the Innovation, Science and Economic Development Canada certification number of the module, preceded by the word “Contains” or similar wording expressing the same meaning, as follows: 

- ¢ For ATWINC3400-MR210CA 

Contains IC: 20266-ATWINC3400 

- ¢ For ATWINC3400-MR210UA 

## Contains IC: 20266-WINC3400UA 

User Manual Notice for License-Exempt Radio Apparatus (from Section 8.4 RSS-Gen, Issue 5, March 2019): User manuals for license-exempt radio apparatus shall contain the following or equivalent notice in a conspicuous location in the user manual or alternatively on the device or both: 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 47 

ATWINC3400-MR210xA 

## Appendix A: Regulatory Approval 

This device contains license-exempt transmitter(s)/receiver(s) that comply with Innovation, Science and Economic Development Canada’s license-exempt RSS(s). Operation is subject to the following two conditions: 

(1) This device may not cause interference; 

(2) This device must accept any interference, including interference that may cause undesired operation of the device. 

L’émetteur/récepteur exempt de licence contenu dans le présent appareil est conforme aux CNR d’Innovation, Sciences et Developpement économique Canada applicables aux appareils radio exempts de licence. L’exploitation est autorisée aux deux conditions suivantes: 

1. L’appareil ne doit pas produire de brouillage; 

2. L'appareil doit accepter tout brouillage radioélectrique subi, méme si le brouillage est susceptible d’en compromettre le fonctionnement. 

Transmitter Antenna (From Section 6.8 RSS-GEN, Issue 5, March 2019): User manuals, for transmitters shall display the following notice in a conspicuous location: This radio transmitter [IC: 20266-ATWINC3400 and IC: 20266-WINC3400UA] has been approved by Innovation, Science and Economic Development Canada to operate with the antenna types listed below, with the maximum permissible gain indicated. Antenna types not included in this list that have a gain greater than the maximum gain indicated for any type listed are strictly prohibited for use with this device. Le présent émetteur radio [IC: 20266-ATWINC3400 and IC: 20266-WINC3400UA] a été approuvé par Innovation, Sciences et Développement économique Canada pour fonctionner avec les types d'antenne énuméerés cidessous et ayant un gain admissible maximal. Les types d'antenne non inclus dans cette liste, et dont le gain est supérieur au gain maximal indiqué pour tout type figurant sur la liste, sont strictement interdits pour I'exploitation de I'émetteur. 

Immediately following the above notice, the manufacturer shall provide a list of all antenna types approved for use with the transmitter, indicating the maximum permissible antenna gain (in dBi) and required impedance for each. 

## 14.2.2 | RF Exposure 

All transmitters regulated by Innovation, Science and Economic Development Canada (ISED) must comply with RF exposure requirements listed in RSS-102 - Radio Frequency (RF) Exposure Compliance of Radio communication Apparatus (All Frequency Bands). 

This transmitter is restricted for use with a specific antenna tested in this application for certification, and must not be co-located or operating in conjunction with any other antenna or transmitters within a host device, except in accordance with Canada multi-transmitter product procedures. 

The installation of the transmitter must ensure that the antenna has a separation distance of at least 6.5 cm from all persons or compliance must be demonstrated according to the ISED SAR procedures. 

## 14.2.3. Approved Antenna Types 

For the ATWINC3400-MR210CA, the approval is received using the integral chip antenna. 

For the ATWINC3400-MR210UA, approved antennas are listed in the table 13.2.2 ATWINC3400-MR210UA Approved External Antennas. 

## 14.2.4 Helpful Web Sites 

Innovation, Science and Economic Development Canada (ISED): www.ic.gc.ca/. 

## 14.3 Europe 

The ATWINC3400-MR210xA is a Radio Equipment Directive (RED) assessed radio module that is CE marked and has been manufactured and tested with the intention of being integrated into a final product. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 48 

ATWINC3400-MR210xA Appendix A: Regulatory Approval 

The ATWINC3400-MR210CA and ATWINC3400-MR210UA modules have been tested to RED 2014/53/EU Essential Requirements mentioned in the following European Compliance table. 

Table 14-1. European Compliance Information — ATWINC3400-MR210CA 

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**----- Start of picture text -----**<br>
Certification Standards Article =<br>Safety EN 62368 3.1(a)<br>Health EN 62311<br>EMC EN301489 3.1(b)<br>Radio EN300328 3:2.<br>**----- End of picture text -----**<br>


The ETSI provides guidance on modular devices in the “Guide to the application of harmonised standards covering articles 3.16 and 3.2 of the RED 2014/53/EU (RED) to multi-radio and combined radio and non-radio equipment” document available at http://www.etsi.org/deliver/etsi_eg/203300_203399/20 3367/01.01.01_60/ eg_203367v010101p.pdf. 

Note: To maintain conformance to the standards listed in the preceding European Compliance table, the module shall be installed in accordance with the installation instructions in this data sheet and shall not be modified. When integrating a radio module into a completed product, the integrator becomes the manufacturer of the final product and is therefore responsible for demonstrating compliance of the final product with the essential requirements against the RED. 

## 14.3.1. Labeling and User Information Requirements 

The label on the final product that contains the ATWINC3400-MR210xA module must follow CE marking requirements. 

## 14.3.2 Conformity Assessment 

From ETSI Guidance Note EG 203367, section 6.1, when non-radio products are combined with a radio product: 

If the manufacturer of the combined equipment installs the radio product in a host non-radio product in equivalent assessment conditions (i.e. host equivalent to the one used for the assessment of the radio product) and according to the installation instructions for the radio product, then no additional assessment of the combined equipment against article 3.2 of the RED is required. 

## 14.3.2.1 Simplified EU Declaration of Conformity 

Hereby, Microchip Technology Inc. declares that the radio equipment type ATWINC3400-MR210xA is in compliance with Directive 2014/53/EU. 

The full text of the EU declaration of conformity for this product is available at www.microchip.com/ATWINC3400 (available under Documents > Certifications). 

## 14.3.3. Approved Antenna Types 

For the ATWINC3400-MR210CA, the approval is received using the integral chip antenna. 

For the ATWINC3400-MR210UA, approved antennas are listed in the table 13.2.2 ATWINC3400-MR210UA Approved External Antennas. 

## 14.3.4 Helpful Websites 

A document that can be used asa starting point in understanding the use of Short Range Devices (SRD) in Europe is the European Radio Communications Committee (ERC) Recommendation 70-03 E, which can be downloaded from the European Communications Committee (ECC) at: http://www.ecodocdb.dk/. 

Additional helpful web sites are: 

- ¢« Radio Equipment Directive (2014/53/EU): https://ec.europa.eu/growth/single-market/european-standards/harmonised-standards/red_en 

- ¢« European Conference of Postal and Telecommunications Administrations (CEPT): 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 49 

ATWINC3400-MR210xA Appendix A: Regulatory Approval 

http://www.cept.org 

- ¢ European Telecommunications Standards Institute (ETSI): http://www.etsi.org 

- ¢« The Radio Equipment Directive Compliance Association (REDCA): http://www.redca.eu/ 

## 14.4 Japan 

The ATWINC3400-MR210CA module has received type certification and is required to be labeled with its own technical conformity mark and certification number as required to conform to the technical standards regulated by the Ministry of Internal Affairs and Communications (MIC) of Japan pursuant to the Radio Act of Japan. 

Integration of this module into a final product does not require additional radio certification provided installation instructions are followed and no modifications of the module are allowed. Additional testing may be required: 

- ¢ If the host product is subject to electrical appliance safety (for example, powered from an AC mains), the host product may require Product Safety Electrical Appliance and Material (PSE) testing. The integrator should contact their conformance laboratory to determine if this testing is required 

- ¢ There is an voluntary Electromagnetic Compatibility (EMC) test for the host product administered by VCCI: www.vcci.jp/vcci_e/index.html 

## 14.4.1. Labeling and User Information Requirements 

The label on the final product which contains the ATWINC3400-MR210CA module must follow Japan marking requirements. The integrator of the module should refer to the labeling requirements for Japan available at the Ministry of Internal Affairs and Communications (MIC) website. 

For the ATWINC3400-MR210CA module, due to a limited module size, the technical conformity logo and ID is displayed in the data sheet and/or packaging and cannot be displayed on the module label. The final product in which this module is being used must have a label referring to the type certified module inside: 

**==> picture [179 x 53] intentionally omitted <==**

**----- Start of picture text -----**<br>
¢ze RI 005-101794<br>**----- End of picture text -----**<br>


## 14.4.2 Helpful Web Sites 

- ¢ Ministry of Internal Affairs and Communications (MIC): www.tele.soumu.go.jp/e/index.htm. 

- ¢ Association of Radio Industries and Businesses (ARIB): www.arib.or.jp/english/. 

## 14.5 Korea 

The ATWINC3400-MR210CA module has received certification of conformity in accordance with the Radio Waves Act. Integration of this module into a final product does not require additional radio certification provided installation instructions are followed and no modifications of the module are allowed. 

## 14.5.1 Labeling and User Information Requirements 

The label on the final product which contains the ATWINC3400-MR210CA module must follow KC marking requirements. The integrator of the module should refer to the labeling requirements for Korea available on the Korea Communications Commission (KCC) website. 

For ATWINC3400-MR210CA, due to a limited module size, the KC mark and ID are displayed in the data sheet and/or packaging and cannot be displayed on the module label. The final product requires the KC mark and certificate number of the module: 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 50 

ATWINC3400-MR210xA Appendix A: Regulatory Approval 

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**----- Start of picture text -----**<br>
'€ R-CRM-mcp-WINC3400MR210C<br>**----- End of picture text -----**<br>


## 14.5.2 Helpful Websites 

« Korea Communications Commission (KCC): www.kcc.go.kr. « National Radio Research Agency (RRA): rra.go.kr. 

## 14.6 Taiwan 

The ATWINC3400-MR210CA module has received compliance approval in accordance with the Telecommunications Act. Customers seeking to use the compliance approval in their product should contact Microchip Technology sales or distribution partners to obtain a Letter of Authority. 

Integration of this module into a final product does not require additional radio certification provided installation instructions are followed and no modifications of the module are allowed. 

## 14.6.1 Labeling and User Information Requirements 

For the ATWINC3400-MR210CA module, due to the limited module size, the NCC mark and ID are displayed in the data sheet only and cannot be displayed on the module label: 

The user's manual should contain following warning (for RF device) in traditional Chinese: 

RHR (RT 28 a VE BS Si AR EA RR GE BR ZR Be, ARMA AT, AA), BRC AIA HE Bs, IK Ra SEa tat ZAPTER TARE SB WOE RT SE He SZ AS ae EAR[ZR][PH][ SE] MEA FIA, MSTA RAL, wea28 eH 77 A AT BUSA GUAGE, 8 te a (LE (ESR ZAR AR Bo (RDA BRS AR, BERRA SE Batti CAE. 

## 14.6.2 Helpful Web Sites 

National Communications Commission (NCC): www.ncc.gov.tw 

## 14.7 China 

The ATWINC3400-MR210CA module has received certification of conformity in accordance with the China MIIT Notice 2014-01 of State Radio Regulation Committee (SRRC) certification scheme. Integration of this module into a 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 51 

ATWINC3400-MR210xA Appendix A: Regulatory Approval 

final product does not require additional radio certification, provided installation instructions are followed and no modifications of the module are allowed. Refer to SRRC certificate available in ATWINC3400-MR210xA product page for expiry date. 

## 14.7.1. Labeling and User Information Requirements 

The ATWINC3400-MR210CA module is labeled with its own CMIIT ID as follows: 

When Host system is using an approved Full Modular Approval (FMA) radio: The host must bear a label containing the statement “This device contains SRRC approved Radio module CMIIT ID: 2018DJ2733”. 

## 14.8 Other Regulatory Information 

- ¢ For information about other countries' jurisdictions, refer to www.microchip.com/wwwproducts/en/ATWINC3400 (available under Documents > Certifications). 

- ¢ Should other regulatory jurisdiction certification be required by the customer, or the customer needs to recertify the module for other reasons, contact Microchip for the required utilities and documentation 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 52 

ATWINC3400-MR210xA 

Reference Documentation 

## 15. Reference Documentation 

For further details, refer to the following documents: 

- ATWINC3400A-MU Datasheet 

- ¢ Wi-Fi Network Controller Software Design Guide Application Note 

- ¢ Integrated Serial Flash Memory Download Procedure Application Note 

- ¢ Wi-Fi Network Controller Software Programming Guide Application Note 

- « ATWINC3400 XPro User Guide 

- ¢ BLE Profiles Application User Guide 

- Solder Reflow Recommendation Application Note 

- ATWINC3400A/ATWINC3400-MR110xA Errata 

- ATWINC3400 — Deriving Application Gain Table Application Note 

Note: Fora complete listing of development-support tools and documentation, visit http://www.microchip.com/ wwwproducts/en/ATWINC3400 or refer to the customer support section for details on the nearest Microchip field representative. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 53 

ATWINC3400-MR210xA Document Revision History 

## **e** ee 

eeee eee eeeeeeee ner 

## 16. Document Revision History 

|Cc|12/2020|Document|*|Updated ATWINC3400-MR210CA toATWINC3400-|
|---|---|---|---|---|
|||||MR210xA|
||||*|Added ATWINC3400-MR210UA module information|
||||*|Minor edits|
|||2. Block Diagram|Updated Figure 2-1||
|||3. Pinout and Package Information|¢|Updated Figure 3-1|
||||+|Updated pin descriptions of Pin 8, 9, 14, 15, 22,27,|
|||||28,29, 30, 31, 32 and 37|
||||+|Added Note|
|||4.<br>Electrical Characteristics|Updated VBAT specification in 4.2 Recommended Operating||
||||Conditions||
|||8. WLAN Subsystem|Added footnotes for Short GI feature||
|||10.2.2 SPI Timing|«|Updated Note|
||||¢|Added description in 10.4 12C Client Interface|
|||13.1.1<br>ATWINC3400-MR210CA Module|+|Added ATWINC3400-MR210CA for the section name|
|||Placementand Routing Guidelines|*|Updated Figure 13-2|
|||13.2.1<br>ATWINC3400-MR210UA Module|Added||
|||Placement and Routing Guidelines|||
|||13.2.2 ATWINC3400-MR210UAApproved |Added|||
|||External Antennas|||
|||1. Ordering Information and Module|*|Updated Table 1-1|
|||Marking|+|Updated Figure 1-1|
|||10.3 UART Interface|Updated with Wi-Fi and Bluetooth Low Energy data information||
|||11.1<br>Host Interface|Updated Figure 11-1||
|||14. Appendix A: Regulatory Approval|*|Updated Japan, Korea, Taiwan and China regulatory IDs|
|||||forATWINC3400-MR210CA|
||||*|Updated USA, Canada and Europe regulatory IDs for|
|||||ATWINC3400-MR210UA|
||||«|Added 14. Gain Table for Individual Regulatory Region|
||||«|Updated 14.1<br>United States, 14.2 Canada and 14.3|
|||||Europe with the details ofantennas used for approval|
||||*|Revamped 14.3 Europe|
||||*|Updated module label information in 14.5 Korea|
||||*|Updated expiry date information in 14.7 China|
||||*|Updated contents of 14.8 Other Regulatory Information|
|B|08/2018|Document|Updatedfrom Bluetooth 4.0 to Bluetooth 5.0 throughout the||
||||document||
|||Features|*|Removed Bluetooth Host and Controller QD ID|
||||*|Added QD ID for an end product|
|||1. Ordering Information and Module|Updated productweb page link||
|||Marking|||
|||Table10-1andTable10-2|Updatedpinnumbers||



**e** ner eeeeerereeeeeeee ener erence eee ee © 2020 Microchip Technology Inc. Datasheet DS70005350C-page 54 

ATWINC3400-MR210xA 

Document Revision History 

**==> picture [463 x 154] intentionally omitted <==**

**----- Start of picture text -----**<br>
e ee reece rece ener eeeee<br>sone CONtINUEd<br>Se a ee eas<br>Reflow profile information * Removed Reflow Profile information sections<br>* Added link to Solder Reflow Recommendation<br>Application Note<br>14. Appendix A: Regulatory Approval Added PMN details under Canada/ISED<br>15. Reference Documentation * Updated web links<br>+ Added Solder Reflow Recommendation<br>Radiation Pattern Newly added<br>A 11/2017 Document Initial Release<br>**----- End of picture text -----**<br>


et© 2020 Microchip Technology Inc. Datasheet DS70005350C-page 55 

## The Microchip Website 

Microchip provides online support via our website at www.microchip.com/. This website is used to make files and information easily available to customers. Some of the content available includes: 

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To register, go to www.microchip.com/pcn and follow the registration instructions. 

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- Technical Support 

Customers should contact their distributor, representative or ESE for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in this document. 

Technical support is available through the website at: www.microchip.com/support 

## Microchip Devices Code Protection Feature 

Note the following details of the code protection feature on Microchip devices: 

- ¢ Microchip products meet the specifications contained in their particular Microchip Data Sheet. 

- « Microchip believes that its family of products is secure when used in the intended manner and under normal conditions. 

- ¢ There are dishonest and possibly illegal methods being used in attempts to breach the code protection features of the Microchip devices. We believe that these methods require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Attempts to breach these code protection features, most likely, cannot be accomplished without violating Microchip’s intellectual property rights. 

- ¢ Microchip is willing to work with any customer who is concerned about the integrity of its code. 

- ¢ Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not mean that we are guaranteeing the product is “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may havea right to sue for relief under that Act. 

© 2020 Microchip Technology Inc. 

Datasheet 

DS70005350C-page 56 

ATWINC3400-MR210xA 

## Legal Notice 

Information contained in this publication is provided for the sole purpose of designing with and using Microchip products. Information regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. 

THIS INFORMATION IS PROVIDED BY MICROCHIP “AS IS’. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFORMANCE. 

IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE INFORMATION OR ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THE INFORMATION. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. 

## Trademarks 

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AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. 

Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, IdealBridge, InCircuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip Connectivity, JitterBlocker, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher Il, Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. 

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. 

The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. 

GestIC is a registered trademark of Microchip Technology Germany II] GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. 

All other trademarks mentioned herein are property of their respective companies. 

© 2020, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. 

ISBN: 978-1-5224-6652-9 

© 2020 Microchip Technology Inc. Datasheet 

DS70005350C-page 57 

ATWINC3400-MR210xA 

## Quality Management System 

For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality. 

© 2020 Microchip Technology Inc. 

Datasheet 

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## Ay MICROCHIP **e** ee errr ereer reer reer rece 

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## Links

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- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/microchip/atwinc3400-mr210ca131/bluetooth-module-72mbps-bluetooth/dp/3748718)
---

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