AS72652-BLGT

NIR Spectral ID Sensor, Smart 6 Channel, Electronic Shutter, LGA-20, 16 Bit, AS7265x Series

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Manufacturer: AMS OSRAM GROUP
Product type:
Available until stocks are exhausted
SVHC: No SVHC (27-Jun-2024)
IP Rating: -
Output Type: Digital-I2C
Sensor Type: Photoelectric Sensors
Light Source: LED
Product Range: AS7265x Series
Qualification: -
Sensing Method: Diffuse Reflective
Colour Resolution: 16bit
Connection Method: -
Supply Voltage Max: 3.6V
Supply Voltage Min: 2.7V
Sensing Distance Max: -
Operating Temperature Max: 85°C
Operating Temperature Min: -40°C
Delivery and price
Units per pack	250
Price	5.45 €
Current stock	1000+
Lead time	30 days
Datasheet
## Product Document 

**Published by ams OSRAM Group** 

## **AS7265x** 

## **Smart 18-Channel VIS to NIR Spectral_ ID 3-Sensor Chipset with Electronic Shutter** 

## **General Description** 

The AS7265x chipset consists of three sensor devices AS72651 with master capability, AS72652 and AS72653. The multispectral sensors can be used for spectral identification in a range from visible to NIR. Every of the three sensor devices has 6 independent on-device optical filters whose spectral response is defined in a range from 410nm to 940nm with FWHM of 20nm. The AS72651, combined with the AS72652 (spectral response from 560nm to 940nm) and the AS72653 (spectral response from 410nm to 535nm) form an AS7265x 18-channel multi-spectral sensor chip-set. Using the AS7265x chipset requires the use of firmware. It must be loaded into a serial flash via a UART interface. The list of **ams** tested serial flash memories can be found in Figure 56. The components AS72651, AS72652 and AS72653 are pre-calibrated with a specific light source. The information about the conditions of the performed calibration (for example light source, gain, integration time) can be found in the table of optical characteristics of the respective component. Any operation other than these conditions might require a new calibration in the application. 

Each AS7265x device has two integrated LED drivers with programmable current and can be timed for electronic shutter applications. 

The device family integrates Gaussian filters into standard CMOS silicon via nano-optic deposited interference filter technology in LGA packages that also provide built-in apertures to control the light entering the sensor array. 

_Ordering Information and Content Guide appear at end of datasheet._ 

## **Key Benefits & Features** 

The benefits and features of AS7265x, Smart 18-Channel VIS to NIR Spectral_ID 3-Sensor Chipset with Electronic Shutter are listed below: 

**ams Datasheet** [v1-04] 2018-Jul-09 

**Page 1** Document Feedback 

**AS7265x −** General Description 

**Figure 1:** 

## **AS7265x Chip-Set Benefits and Features** 

|**Benefits**|**Features**|
|---|---|
|**•** Compact 18-channel spectrometry chip-set<br>solution|**•** 3 chip set including master device delivering 18<br>visible and NIR channels from 410nm to 940nm<br>each with 20nm FWHM|
||**•** UART or I²C slave digital Interface|
||**•** Visible filter set realized by silicon interference<br>filters|
|**•** No additional signal conditioning required|**•** 16-bit ADC with digital access|
||**•** Programmable LED drivers|
||**•** 2.7V to 3.6V with I²C interface|
|**•** Small, robust package, with built-in aperture|**•** 20-pin LGA package 4.5mm x 4.7mm x 2.5mm<br>-40°C to 85°C temperature range|



## **Applications** 

The AS7265x applications include: 

- Product/Brand authentication 

- **•** Anti-counterfeiting 

- **•** Portable spectroscopy 

- **•** Product safety/adulteration detection 

- Horticultural and specialty lighting 

- Material analysis 

**ams Datasheet** 

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**AS7265x −** General Description 

## **Block Diagram** 

The functional blocks of this device are shown below: 

**Figure 2: AS7265x Chip-Set Block Diagram** 

**==> picture [468 x 343] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD1 VDD2<br>AS72651<br>Communication Spectral_ID VDD LED Drivers<br>VDD Sensor<br>LED_IND<br>Unit (MCU)Controller Micro  TX / SDA_SRX / SCL_SI2C_ENBINT IUART or  [2] C Slave UR VS WT Current Control LED_DRV<br>VDD Firmware Interface<br>SDA_MSCL_M I [2] C Master °C VDD<br>MISO<br>OSC S PI MOSI Serial Flash<br>SLV1_RESNSLV2_RESN 16MHz Master SCK Memory<br>RESN CSN<br>GND<br>VDD1 VDD2 VDD1 VDD2<br>AS72652 AS72653<br>Spectral_ID Spectral_ID<br>Sensor Sensor<br>Communication LED Drivers Communication LED Drivers<br>VDD VDD VDD VDD<br>LED_IND LED_IND<br>G H I A B C<br>SDA_SSCL_S I [2] C Slave J K L Current Control LED_DRV SDA_SSCL_S I [2] C Slave D E F Current Control LED_DRV<br>°C °C<br>RESN 16MHzOSC RESN 16MHzOSC<br>GND GND<br>**----- End of picture text -----**<br>


**Note(s):** 

1. Refer to the Application Diagram in Figure 60. 

**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Pin Assignments 

## **Pin Assignments** 

The device pin assignments are described below. 

**Figure 3: Pin Diagram of AS7265x (Top View)** 

**==> picture [274 x 228] intentionally omitted <==**

**----- Start of picture text -----**<br>
20 16<br>1 15<br>5 11<br>6 10<br>**----- End of picture text -----**<br>


**Figure 4: AS72651 Pin Description** 

|**Pin No.**|**Pin Name**|**Pin Type**|**Description**|
|---|---|---|---|
|1|SLV1_RESN|Digital Input and Output|Reset pin for Slave 1 e.g. AS72652, active low|
|2|RESN|Digital Input|Reset pin, active low (with internal pull-up to<br>VDD)|
|3|SCK|Digital Output|SPI serial clock|
|4|MOSI|Digital Input and Output|SPI MOSI|
|5|MISO|Digital Input and Output|SPI MISO|
|6|CSN|Digital Output|Chip select for external flash|
|7|NC||Not functional, no connect|
|8|I2C_ENB|Digital Input|Selects UART (low) or I²C (high) operation|
|9|SCL_M|Digital Output|I²C master clock for communication with<br>AS72652 and AS72653|
|10|SDA_M|Digital Input and Output|I²C master data for communication with AS72652<br>and AS72653|



**ams Datasheet** 

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**AS7265x −** Pin Assignments 

|**Pin No.**|**Pin Name**|**Pin Type**|**Description**|
|---|---|---|---|
|11|RX / SCL_S|Digital Input and Output|RX (UART) or SCL_S (I²C slave) depending on<br>I2C_ENB setting|
|12|TX / SDA_S|Digital Input and Output|TX (UART) or SDA_S (I²C slave) depending on<br>I2C_ENB setting|
|13|INT|Digital Output|INT is active low|
|14|VDD2|Voltage Supply|Voltage supply|
|15|LED_DRV|Analog Output|LED driver output for driver LED, current sink|
|16|GND|Supply|Ground|
|17|VDD1|Voltage Supply|Voltage supply|
|18|LED_IND|Analog Output|LED driver output for indicator LED, current sink|
|19|NC||Not functional, no connect|
|20|SLV2_RESN|Digital Output|Reset pin for slave 2 e.g. AS72653, active low|



## **Note(s):** 

1. Pin out is valid for firmware versions from 11 and later. 

**Figure 5: AS72652 and AS72653 Pin Description** 

|**Pin No.**|**Pin Name**|**Pin Type**|**Description**|
|---|---|---|---|
|1|NC||Not functional, no connect|
|2|RESN|Digital Input|Reset pin, active low (with internal pull-up to<br>VDD)|
|3|NC||Not functional, no connect|
|4|NC||Not functional, no connect|
|5|NC||Not functional, no connect|
|6|NC||Not functional, no connect|
|7|NC||Not functional, no connect|
|8|NC||Not functional, no connect|
|9|SCL_S|Digital Input and Output|I²C slave clock for communication with master<br>AS72651|
|10|SDA_S|Digital Input and Output|I²C slave data for communication with master<br>AS72651|



**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Pin Assignments 

|**Pin No.**|**Pin Name**|**Pin Type**|**Description**|
|---|---|---|---|
|11|NC||Not functional, no connect|
|12|NC||Not functional, no connect|
|13|INT|Digital Output|INT is active low|
|14|VDD2|Voltage Supply|Voltage supply|
|15|LED_DRV|Analog Output|LED driver output for driver LED, current sink|
|16|GND|Supply|Ground|
|17|VDD1|Voltage Supply|Voltage supply|
|18|LED_IND|Analog Output|LED driver output for indicator LED, current sink|
|19|NC||Not functional, no connect|
|20|NC||Not functional, no connect|



**ams Datasheet** 

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**AS7265x −** Absolute Maximum Ratings 

## **Absolute Maximum Ratings** 

Stresses beyond those listed under Absolute Maximum Ratings of AS7265x may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The device is not designed for high energy UV (ultraviolet) environments, including upward looking outdoor applications, which could affect long term optical performance. 

**Figure 6: Absolute Maximum Ratings of AS7265x** 

|**Symbol**|**Parameter**|**Min**|**Max**|**Unit**|**Comments**|
|---|---|---|---|---|---|
|**Electrical Parameters**||||||
|VDD1_MAX|Supply Voltage VDD1|-0.3|5|V|Pin VDD1 to GND|
|VDD2_MAX|Supply Voltage VDD2|-0.3|5|V|Pin VDD2 to GND|
|VDD_IO|Input/Output Pin Voltage|-0.3|VDD+0.3|V|Input/Output Pin to GND|
|ISCR|Input Current (latch-up<br>immunity)|± 100||mA|JESD78D|
|**Electrostatic Discharge**||||||
|ESDHBM|Electrostatic Discharge HBM|±1000||V|JS-001-2014|
|ESDCDM|Electrostatic Discharge CDM|±500||V|JESD22-C101F|
|**Temperature Ranges and Storage Conditions**||||||
|TSTRG|Storage Temperature Range|-40|85|°C||
|TBODY|Package Body Temperature||260|°C|IPC/JEDEC J-STD-020. The<br>reflow peak soldering<br>temperature (body<br>temperature) is specified<br>according IPC/JEDEC<br>J-STD-020 “Moisture/Reflow<br>Sensitivity Classification for<br>Non-hermetic Solid State<br>Surface Mount Devices”|
|RHNC|Relative Humidity<br>(non-condensing)|5|85|%||
|MSL|Moisture Sensitivity Level|3|||Represents a 168 hour max.<br>floor lifetime|



**ams Datasheet** [v1-04] 2018-Jul-09 

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Document Feedback 

**AS7265x −** Electrical Characteristics 

## **Electrical Characteristics** 

All limits are guaranteed with VDD = VDD1 = VDD2 = 3.3V, TAMB = 25°C. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. 

VDD1 and VDD2 should be sourced from the same power supply output. 

**Figure 7: Electrical Characteristics of AS7265x** 

|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|**General Operating Conditions**|||||||
|VDD1<br>/VDD2|Voltage Operating<br>Supply|UART Interface|2.97|3.3|3.6|V|
|VDD1<br>/VDD2|Voltage Operating<br>Supply|I²C Interface|2.7|3.3|3.6|V|
|TAMB|Operating Temperature||-40|25|85|°C|
|IVDD|Operating Current||||5|mA|
|**Internal RC Oscillator**|||||||
|FOSC|Internal RC Oscillator<br>Frequency||15.7|16|16.3|MHz|
|tJITTER<br>(1)|Internal Clock Jitter|@25°C|||1.2|ns|
|**Temperature Sensor**|||||||
|DTEMP|Absolute Accuracy of the<br>Internal Temperature<br>Measurement||-8.5||8.5|°C|
|**Indicator LED**|||||||
|IIND|LED Current||1||8|mA|
|IACC|Accuracy of Current||-30||30|%|
|VLED|Voltage Range of<br>Connected LED|Vds of current sink|0.3||VDD|V|
|**LED_DRV**|||||||
|ILED1|LED Current||12.5||100|mA|
|IACC|Accuracy of Current||-10||10|%|
|VLED|Voltage Range of<br>Connected LED|Vds of current sink|0.3||VDD|V|



**ams Datasheet** 

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**AS7265x −** Electrical Characteristics 

|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|**Digital Inputs and Outputs**|||||||
|IIH, IIL|Logic Input Current|Vin=0V or VDD|-1||1|μA|
|VIH|CMOS Logic High Input||0.7*<br>VDD||VDD|V|
|VIL|CMOS Logic Low Input||0||0.3*<br>VDD|V|
|VOH|CMOS Logic High Output|I=1mA|||VDD-<br>0.4|V|
|VOL|CMOS Logic Low Output|I=1mA|||0.4|V|
|tRISE<br>(1)|Current Rise Time|C(Pad)=30pF|||5|ns|
|tFALL<br>(1)|Current Fall Time|C(Pad)=30pF|||5|ns|



**Note(s):** 

1. Guaranteed by design, not tested in production. 

**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Electrical Characteristics 

## **Timing Characteristics** 

**Figure 8: AS7265x I²C Slave Timing Characteristics** 

|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|**I²C Interface**|||||||
|fSCLK|SCL Clock Frequency||0||400|kHz|
|tBUF|Bus Free Time Between a STOP and<br>START||1.3|||μs|
|tHS:STA|Hold Time (Repeated) START||0.6|||μs|
|tLOW|LOW Period of SCL Clock||1.3|||μs|
|tHIGH|HIGH Period of SCL Clock||0.6|||μs|
|tSU:STA|Setup Time for a Repeated START||0.6|||μs|
|tHS:DAT|Data Hold Time||0||0.9|μs|
|tSU:DAT|Data Setup Time||100|||ns|
|tR|Rise Time of Both SDA and SCL||20||300|ns|
|tF|Fall Time of Both SDA and SCL||20||300|ns|
|tSU:STO|Setup Time for STOP Condition||0.6|||μs|
|CB|Capacitive Load for Each Bus Line|CB - total<br>capacitance of one<br>bus line in pF|||400|pF|
|CI/O|I/O Capacitance (SDA, SCL)||||10|pF|



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**AS7265x −** Electrical Characteristics 

**Figure 9: I²C Slave Timing Diagram** 

**==> picture [468 x 203] intentionally omitted <==**

**----- Start of picture text -----**<br>
tR tF tLOW<br>SCL<br>P S tHIGH S P<br>tHD:STA tHD:DAT tSU:DAT t SU:STA tSU:STO<br>VIH<br>SDA<br>t BUF VIL<br>Stop Start<br>**----- End of picture text -----**<br>


**Figure 10: AS72651 SPI Timing Characteristics** 

|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|**SPI Interface**|||||||
|fSCK|Clock Frequency||0||16|MHz|
|tSCK_H|Clock High Time||40|||ns|
|tSCK_L|Clock Low Time||40|||ns|
|tSCK_RISE|SCK Rise Time||5|||ns|
|tSCK_FALL|SCK Fall Time||5|||ns|
|tCSN_S|CSN Setup Time|Time between CSN high-low<br>transition to first SCK high<br>transition|50|||ns|
|tCSN_H|CSN Hold Time|Time between last SCK<br>falling edge and CSN<br>low-high transition|100|||ns|
|tCSN_DIS|CSN Disable Time||100|||ns|
|tDO_S|Data-Out Setup Time||5|||ns|
|tDO_H|Data-Out Hold Time||5|||ns|
|tDI_V|Data-In Valid||10|||ns|



**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Electrical Characteristics 

## **Figure 11:** 

**SPI Master Write Timing Diagram** 

**==> picture [468 x 203] intentionally omitted <==**

**----- Start of picture text -----**<br>
tCSN_DIS<br>CSN<br>tCSN_S tSCK_RISE tSCK_FALL tCSN_H<br>SCK<br>tDO_S tDO_H<br>MOSI MSB LSB<br>HI-Z HI-Z<br>MISO<br>**----- End of picture text -----**<br>


## **Figure 12:** 

## **SPI Master Read Timing Diagram** 

**==> picture [468 x 202] intentionally omitted <==**

**----- Start of picture text -----**<br>
CSN_xx<br>tSCK_H tSCK_L<br>SCK<br>tDI_V<br>Dont care<br>MOSI<br>MISO MSB LSB<br>**----- End of picture text -----**<br>


**ams Datasheet** 

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**AS7265x −** Typical Operating Characteristics 

## **Typical Operating Characteristics** 

## **Optical Characteristics** 

All optical characteristics are optimized for diffused light. When using a point light source or collimated light on the sensor, the sensor opening must be covered by a lambertian diffuser with achromatic characteristics. Diffusor of Tsujiden like D121UP have been successfully tested at **ams** . If in the application diffused light, e.g. used by a reflective surface, no additional diffuser is required. 

**Figure 13: AS7265x LGA Average Field of View** 

**==> picture [181 x 106] intentionally omitted <==**

**----- Start of picture text -----**<br>
Diffused Light<br>A=0.75mm<br>β = 20 . 5°<br>Lens<br>H=2.5mm Sensor  α = 12°<br>DI E<br>LGA Package Substrate<br>**----- End of picture text -----**<br>


**Figure 14: AS7265x 18-Channel Spectral Responsivity** 

**==> picture [329 x 261] intentionally omitted <==**

**----- Start of picture text -----**<br>
18 Channel Spectral Response<br>AS72651 + AS72652 + AS72653<br>1 410nm A<br>435nm B<br>0.9 460nm C<br>485nm D<br>0.8<br>510nm E<br>0.7 535nm F<br>560nm G<br>0.6 585nm H<br>610nm R<br>0.5<br>645nm I<br>0.4 680nm S<br>705nm J<br>0.3 730nm T<br>760nm U<br>0.2<br>810nm V<br>0.1 860nm W<br>900nm K<br>0 NE 940nm L<br>Wavelength (λ, nm)<br>Normalized Responsivity<br>350 372 394 416 438 460 482 504 526 548 570 592 614 636 658 680 702 724 746 768 790 812 834 856 878 900 922 944 966 988<br>**----- End of picture text -----**<br>


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**AS7265x −** Typical Operating Characteristics 

**Figure 15: AS72651 Spectral Responsivity** 

**==> picture [468 x 255] intentionally omitted <==**

**----- Start of picture text -----**<br>
AS72651, 6-Channel Spectral Response<br>1.2<br>R S T U V W<br>610 680 730 760 810 860<br>1<br>0.8<br>0.6<br>0.4<br>0.2<br>0<br>Wavelength (λ, nm)<br>Normalized Responsivity<br>350 370 390 410 430 450 470 490 510 530 550 570 590 610 630 650 670 690 710 730 750 770 790 810 830 850 870 890 910 930 950 970 990<br>**----- End of picture text -----**<br>


**Figure 16:** 

**Optical Characteristics of AS72651 (Pass Band)**[(1)] 

|**Symbol**|**Parameter**|**Test Conditions**|**Channel**<br>**(nm)**|**Min**<br>**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|R|Channel R|Incandescent(2),(4)|610|35(3),(4)||counts/<br>(μW/cm2)|
|S|Channel S|Incandescent(2),(4)|680|35(3),(4)||counts/<br>(μW/cm2)|
|T|Channel T|Incandescent(2),(4)|730|35(3),(4)||counts/<br>(μW/cm2)|
|U|Channel U|Incandescent(2),(4)|760|35(3),(4)||counts/<br>(μW/cm2)|
|V|Channel V|Incandescent(2),(4)|810|35(3),(4)||counts/<br>(μW/cm2)|
|W|Channel W|Incandescent(2),(4)|860|35(3),(4)||counts/<br>(μW/cm2)|
|FWHM|Full Width Half<br>Max|||20||nm|
|Wacc|Wavelength<br>Accuracy|||+10|-10|nm|



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**AS7265x −** Typical Operating Characteristics 

|**Symbol**|**Parameter**|**Test Conditions**|**Channel**<br>**(nm)**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|dark|Dark Channel<br>Counts|GAIN=64,<br>TAMB=25°C<br>tint=165ms||||5|counts|
|AFOV|Average Field<br>of View||||±20.|5|deg|



## **Note(s):** 

1. Calibration and measurements are made using diffused light. 

2. Each channel is tested with GAIN = 16x, Integration Time (INT_T) = 166ms and VDD = VDD1 = VDD2 = 3.3V, TAMB=25°C. 

3. The accuracy of the channel counts/μW/cm[2] is ±12%. 

4. The light source is an incandescent light with an irradiance of ~1500μW/cm[2] (300-1000nm). 

## **Figure 17:** 

**AS72652 Spectral Responsivity** 

**==> picture [468 x 273] intentionally omitted <==**

**----- Start of picture text -----**<br>
AS72652, 6-Channel Spectral Response<br>(w/AS72651 as Controller)<br>1.2<br>G H I J K L<br>560 585 645 705 900 940<br>1<br>0.8<br>0.6<br>0.4<br>0.2<br>0<br>Wavelength (λ, nm)<br>Normalized Responsivity<br>350 368 386 404 422 440 458 476 494 512 530 548 566 584 602 620 638 656 674 692 710 728 746 764 782 800 818 836 854 872 890 908 926 944 962 980 998<br>**----- End of picture text -----**<br>


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**AS7265x −** Typical Operating Characteristics 

## **Figure 18:** 

**Optical Characteristics of AS72652 (Pass Band)**[(1)] 

|**Symbol**|**Parameter**|**Conditions**|**Channel**<br>**(nm)**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|G|Channel G|3300K White LED(2)|560||35(3)||counts/<br>(μW/cm2)|
|H|Channel H|3300K White LED(2)|585||35(3)||counts/<br>(μW/cm2)|
|I|Channel I|3300K White LED(2)|645||35(3)||counts/<br>(μW/cm2)|
|J|Channel J|3300K White LED(2)|705||35(3)||counts/<br>(μW/cm2)|
|K|Channel K|Incandescent(2)|900||35(3)||counts/<br>(μW/cm2)|
|L|Channel L|940nm LED(2)|940||35(3)||counts/<br>(μW/cm2)|
|FWHM|Full Width<br>Half Max||||20||nm|
|Wacc|Wavelength<br>Accuracy|||-10||+10|nm|
|dark|Dark<br>Channel<br>Counts|GAIN=64, TAMB=25°C<br>tint= 165ms||||5|counts|
|AFOV|Average<br>Field of View||||±20.5||deg|



## **Note(s):** 

1. Calibration and measurements are made using diffused light. 

2. Each channel is tested with GAIN = 16x, Integration Time (INT_T) = 166ms and VDD = VDD1 = VDD2 = 3.3V, TAMB=25°C. 

3. The accuracy of the channel counts/μW/cm[2] is ±12%. 

**ams Datasheet** 

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**AS7265x −** Typical Operating Characteristics 

## **Figure 19: AS72653 Spectral Responsivity** 

**==> picture [468 x 253] intentionally omitted <==**

**----- Start of picture text -----**<br>
AS72653, 6-Channel Spectral Response<br>(w/AS72651 as controller)<br>1.2<br>A B C D E F<br>410 435 460 485 510 535<br>1<br>0.8<br>0.6<br>0.4<br>0.2<br>0<br>Wavelength (λ, nm)<br>Normalized Responsivity<br>350 368 386 404 422 440 458 476 494 512 530 548 566 584 602 620 638 656 674 692 710 728 746 764 782 800 818 836 854 872 890 908 926 944 962 980 998<br>**----- End of picture text -----**<br>


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**AS7265x −** Typical Operating Characteristics 

## **Figure 20:** 

**Optical Characteristics of AS72653 (Pass Band)**[(1)] 

|**Symbol**|**Parameter**|**Conditions**|**Channel**<br>**(nm)**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|A|Channel A|LED:(2)<br>395nm<br>415nm<br>428nm<br>5600K white|410||35(3)||counts/<br>(μW/cm2)|
|B|Channel B||435||35(3)||counts/<br>(μW/cm2)|
|C|Channel C||460||35(3)||counts/<br>(μW/cm2)|
|D|Channel D||485||35(3)||counts/<br>(μW/cm2)|
|E|Channel E||510||35(3)||counts/<br>(μW/cm2)|
|F|Channel F||535||35(3)||counts/<br>(μW/cm2)|
|FWHM|Full Width<br>Half Max||||20||nm|
|Wacc|Wavelength<br>Accuracy|||-10||+10|nm|
|dark|Dark Channel<br>Counts|GAIN=64, TAMB=25°C<br>tint= 165ms||||5|counts|
|AFOV|Average Field<br>of View||||±20.5||deg|



**Note(s):** 

1. Calibration and measurements are made using diffused light. 

2. Each channel is tested with GAIN = 16x, Integration Time (INT_T) = 166ms and VDD = VDD1 = VDD2 = 3.3V, TAMB=25°C. 

3. The accuracy of the channel counts/μW/cm[2] is ±12%. 

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## **Detailed Description** 

## **AS7265x 18-Channel** _**Spectral_ID**_ **Detector Overview** 

Each of the three AS7265x _Spectral_ID_ devices are next-generation digital 6-channel spectral sensor devices. Each of the 6 channels has a Gaussian filter characteristic with a full width half maximum (FWHM) bandwidth of 20nm. The filters use an interference topology design providing high stability in terms of drift in time and temperature. The drifts are so small that it is undetectable in the measurement. The temperature drift of the device is largely determined by the drift of the sensor and the electronics. To compensate for the temperature drift in the application, every device of the AS7265x chipset includes an integrated temperature sensor. 

Filter accuracy will be affected by the angle of incidence which itself is limited by integrated aperture and internal micro-lens structure. The aperture-limited average field of view is ±20.5° to deliver specified accuracy. All optical characteristics are optimized for using diffused light. 

Each device contains an analog-to-digital converter (16-bit resolution ADC) which integrates the current from each channel’s photodiode. Upon completion of the conversion cycle, the integrated result is transferred to the corresponding data registers. The transfers are double-buffered to ensure data integrity is maintained. 

The external MCU interface control via I²C registers or AT commands, transparently controls the AS72652 and/or AS72653. 

A serial flash is a required operating companion for this device and enables factory calibration/normalization of the filters. Supported device types are noted in Ordering & Contact Information at the end of this document. Required operating code can be downloaded at download.ams.com. 

## **Channel Data Conversion of the AS7265x Devices** 

All three of these 6 channel devices use conversion implemented via two photodiode banks in each device. Refer to Figure 21and Figure 22. Bank 1 consists of register data from 4 of the 6 photodiodes, with 2 registers zeroed and Bank 2 consists of data from a different set of 4 of the 6 photodiodes, with 2 different registers zeroed. Spectral conversion requires the integration time (IT in ms) set to complete. If both photodiode banks are required to complete the conversion, the 2[nd] bank requires an additional IT ms. Minimum IT for a single bank conversion is 2.8 ms. If data is required from all 6 photodiodes then the device must perform 2 full conversions (2 x Integration Time). 

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This spectral data conversion process operates continuously, new data is available after each IT ms period. 

The conversion process is controlled with BANK Mode settings in the AS72651 as follows: 

## **BANK Mode 0 Registers:** 

AS72651 data will be in S, T, U & V registers (R & W will be zero) AS72652 data will be in G, H, K & I registers (J & L will be zero) AS72653 data will be in A, B, E & C registers (D & F will be zero) 

## **BANK Mode 1 Registers:** 

AS72651 data will be in R, T, U & W registers (S & V will be zero) AS72652 data will be in G, H, J & L registers (I & K will be zero) AS72653 data will be in F, A, B & D registers (C & E will be zero) 

## **BANK Mode 2 Registers:** 

AS72651 data will be in S, T, U, V, R & W registers 

AS72652 data will be in G, H, K, I, J & L registers 

AS72653 data will be in A, B, C, D, E & F registers 

For BANK Mode 2, care should be taken to assure prompt interrupt servicing so integration values from both banks are all derived from the same spectral conversion cycle. 

**Figure 21: AS7265x Photo Diode Arrays** 

**==> picture [468 x 175] intentionally omitted <==**

**----- Start of picture text -----**<br>
AS72651 Photo Diode Array AS72652 Photo Diode Array AS72653 Photo Diode Array<br>T U S G H I A B C<br>R V W J K L D E F<br>**----- End of picture text -----**<br>


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## **Figure 22: Bank Mode and Data Conversion** 

**==> picture [468 x 247] intentionally omitted <==**

**----- Start of picture text -----**<br>
BANK Mode 0<br>One Conversion S, T, U, V, I, G, H, K, C, A, B, E<br>Integration Time<br>BANK Mode 1<br>One Conversion R, T, U, W, L, G, H, J, F, A, B, D<br>Integration Time<br>BANK Mode 2<br>1st Conversion S, T, U, V, I, G, H, K, C, A, B, E<br>2nd Conversion R, T, U, W, L, G, H, J, F, A, B, D<br>Integration Time Integration Time<br>**----- End of picture text -----**<br>


## **RC Oscillator** 

The timing generation circuit consists of on-chip 16MHz, temperature compensated oscillators, which provide the individual master clocks of the AS7625x devices 

## **Temperature Sensor** 

The AS7265x internal temperature sensors are constantly measuring on-chip temperature to enable temperature compensation procedures, and can be read via I²C registers or AT commands in the AS72651. 

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## **Reset** 

Pulling down the RESN pin for longer than 100ms resets the AS72651 which proceed to reset the AS72562 and the same RESN signal shown below can be used directly to reset the AS72653. 

**Figure 23: Reset Circuit** 

**==> picture [274 x 155] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>Spectral_ID RESN<br>Engine<br>Reset<br>Push > 100ms<br>AS72651<br>**----- End of picture text -----**<br>


## **AS7265x LED_IND Controls** 

There are LED_IND pins on all AS7265x devices. An LED connected to LED_IND can be used as a general power indicator and will automatically be used to indicate a Flash firmware update is occurring. 

The LED_IND can then be setup as needed. Each AS7265x LED_ IND source can be turned on/off via AT commands or I²C register control, and LED_IND sink current is programmable to 1mA, 2mA, 4mA or 8mA. This LED_IND control can also be used in applications just like the LED_DRV control (described below), if the lower current sink of the LED_IND control is appropriate. 

## **Electronic Shutter with AS7265x LED_DRV Driver Control** 

There are LED_DRV pins on all AS7265x devices. The LED_DRV pin can be used to control external LED sources as needed for sensor applications. LED_DRV can sink a programmable current of 12.5mA, 25mA, 50mA or 100mA. The control can be turned on/off via I²C registers or AT commands, and as such it provides the AS7265x device with an electronic shutter. 

## **Interrupt Operation** 

Interrupt operation is only needed for AS72651 as it transparently controls data collection from the AS72652 (if used) or AS72653 (if used). 

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If BANK is set in the AS72651 to Mode 0 or Mode 1, data is ready after the 1[st] integration time. If BANK is set to Mode 2, data is ready after two integration times. 

For interrupt operation using I²C registers, if interrupts are enabled and data is ready, the INT pin is set low and DATA_RDY is set to 1. Reading the raw or calibration data releases (returns high) the interrupt. For multi-byte sensor data (2 or 4 bytes), after the 1st byte is read the remaining bytes are shadow protected in case an integration cycle completes just after the 1st byte is read. The sensors continue to gather information at the rate of the integration time, hence if the sensor registers are not read when the interrupt line goes low, it will stay low and the next cycle’s sensor data will be available in the registers at the end of the next integration cycle. 

For interrupt operation using AT Commands, if interrupts are enabled and data is ready the INT pin is set low and is released (returns high) after any sensor data is read. 

## **Required Flash Memory** 

Serial flash is a required operating companion for this device, and enables the I²C and UART interfaces, as well as enabling calibrated data results. Supported device types are noted in Ordering & Contact Information at the end of this document. Required operating code can be downloaded at download.ams.com. 

## **I²C Slave Interface** 

If selected by the I2C_ENB pin setting, interface and control can be accomplished through an I²C compatible slave interface to a set of registers that provide access to device control functions and output data. These registers on the AS72651 are, in reality, implemented as _virtual_ registers in software. The actual I²C slave hardware registers number only three and are described in the table below. The steps necessary to access the virtual registers defined in the following are explained in pseudocode for external I²C master writes and reads below. 

## _**I²C Feature List**_ 

- Fast mode (400kHz). 

- 7+1-bit addressing mode. 

- Write format: Byte. 

- Read format: Byte. 

- SDA input delay and SCL spike filtering by integrated RC-components. 

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**Figure 24: I²C Slave Device Address and Physical Registers** 

|**Entity**|**Description**|**Note**|
|---|---|---|
|Device Slave Address|8-bit slave address|Byte = 1001001x (device address = 49 hex)<br>**•** x= 1 for Master Read (byte = 93 hex)<br>**•** x= 0 for Master Write (byte = 92 hex)|
|STATUS Register|I²C slave interface STATUS<br>register. Read-only.|Register Address = 0x00<br>Bit 1: TX_VALID<br>**•** 0 - New data may be written to WRITE register<br>**•** 1 -WRITE register occupied. Do NOT write.<br>Bit 0: RX_VALID<br>**•** 0 -No data is ready to be read in READ register.<br>**•** 1 -Data byte available in READ register.|
|WRITE Register|I²C slave interface WRITE<br>register. Write-only.|Register Address = 0x01<br>**•** 8-Bits of data written by the I²C Master<br>intended for receipt by the I²C slave. Used for<br>both_virtual_register addresses and write data.|
|READ Register|I²C slave interface<br>READ register. Read-only.|Register Address = 0x02<br>**•** 8-Bits of data to be read by the I²C Master.|



## **I²C Virtual Register Write Access** 

I²C Virtual Resister Byte Write, detailed below, shows the pseudocode necessary to write virtual registers on the AS72651. Note that, because the actual registers of interest are realized as virtual registers, a means of indicating whether there is a pending read or write operation of a given virtual register is needed. To convey this information, the most significant bit of the virtual register address is used as a marker. If it is 1, then a write is pending, otherwise the slave is expecting a virtual read operation. The pseudocode illustrates the proper technique for polling of the I²C slave status register to ensure the slave is ready for each transaction. 

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## _**I²C Virtual Register Byte Write**_ 

## Pseudocode 

Poll I²C slave STATUS register; 

If TX_VALID bit is 0, a write can be performed on the interface; 

Send a virtual register address and set the MSB of the register address to 1 to indicate the pending write; Poll I²C slave STATUS register; 

If TX_VALID bit is 0, the virtual register address for the write has been received and the data may now be written; Write the data. 

Sample Code: 

#define I2C_AS72XX_SLAVE_STATUS_REG 0x00 #define I2C_AS72XX_SLAVE_WRITE_REG 0x01 #define I2C_AS72XX_SLAVE_READ_REG 0x02 #define I2C_AS72XX_SLAVE_TX_VALID 0x02 #define I2C_AS72XX_SLAVE_RX_VALID 0x01 

void i2cm_AS72xx_write(uint8_t virtualReg, uint8_t d) 

{ 

volatile uint8_tstatus; 

while (1) 

{ // Read slave I²C status to see if the write buffer is ready. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0) // No inbound TX pending at slave.  Okay to write now. break ; } // Send the virtual register address (enabling bit 7 to indicate a write). i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, (virtualReg | 0x80)) ; 

while (1) { // Read the slave I²C status to see if the write buffer is ready. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG) ; 

if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0) // No inbound TX pending at slave.  Okay to write data now. break ; } // Send the data to complete the operation. i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, d) ; 

} 

I²C Virtual Register Read access 

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I²C Virtual Register Byte Read, detailed below, shows the pseudocode necessary to read virtual registers on the AS72651. Note that in this case, reading a virtual register, the register address is not modified. 

## _**I²C Virtual Register Byte Read**_ 

Pseudocode 

Poll I²C slave STATUS register; 

If TX_VALID bit is 0, the virtual register address for the read may be written; 

Send a virtual register address; 

Poll I²C slave STATUS register; 

If RX_VALID bit is 1, the read data is ready; 

Read the data. 

Sample Code 

uint8_t i2cm_AS72xx_read(uint8_t virtualReg) 

{ 

volatile uint8_t status, d; 

while (1) 

{ 

// Read slave I²C status to see if the read buffer is ready. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG) ; 

if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0) 

// No inbound TX pending at slave. Okay to write now. break; 

} 

// Send the virtual register address (disabling bit 7 to indicate a read). i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, virtualReg); 

while (1) 

{ 

// Read the slave I²C status to see if our read data is available. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); 

if ((status & I2C_AS72XX_SLAVE_RX_VALID)!= 0) 

// Read data is ready. break; 

} 

// Read the data to complete the operation. 

d = i2cm_read(I2C_AS72XX_SLAVE_READ_REG) ; return d;s 

} 

The details of the i2cm_read() and i2cm_write() functions in previous figures are dependent upon the nature and implementation of the external I²C master device. 

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## **4-Byte Floating-Point (FP) Registers** 

Several 4 byte registers (hex) are used by the AS72651. Here is an example of how these registers are used to represent floating point data (based on the IEEE 754 standard). 

**Figure 25: Example of the IEEE 754 Standard** 

**==> picture [468 x 200] intentionally omitted <==**

**----- Start of picture text -----**<br>
byte 3 byte 2 byte 1 byte 0<br>3E (hex) 20 (hex) 00 (hex) 00 (hex)<br>0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0<br>31 2423 1615 8 7 0<br>sign exponent (8 bits) fraction (23 bits)<br>0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 = 0.15625<br>31 30 23 22 0<br>**----- End of picture text -----**<br>


The floating point (FP) value assumed by 32 bit **binary32 data** with a biased exponent **e** (the 8 bit unsigned integer) and a **23 bit fraction** is (for the above example): 

**==> picture [234 x 35] intentionally omitted <==**

**==> picture [194 x 35] intentionally omitted <==**

– – FPvalue = 1 ⋅ (1 + 2[2] ) ⋅ 2[3] = 0.15625 

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## **I²C Virtual Register Set** 

The figure below provides a summary of the AS72651 I²C register set for the AS72651 which serves as the master interface of the 3 device AS7265x set. Figures after that provide additional register details. All register data is hex, and all multi-byte entities are Big Endian (most significant byte is situated at the lowest register address). 

Multiple byte registers (2 byte integer, or, 4 byte floating point) must be read in the order of ascending register addresses (low to high) and if capable of being written to, must also be written in the order ascending register addresses. 

**Figure 26: AS72651 I²C Master Device Virtual Register Set Overview** 

|**Addr**|**Name**|**<D7>**|**<D6>**|**<D5>**|**<D4>**|**<D3>**|**<D2>**|**<D1>**|**<D0>**|
|---|---|---|---|---|---|---|---|---|---|
|0x00|HW Version|HW Version H||||||||
|0x01||HW Version L||||||||
|0x02|FW Version|FW Version H||||||||
|0x03||FW Version L||||||||
|0x04|Configuration|SRST|INT||GAIN|BANK|DATA_RDY||FRST|
|0x05|Integration Time|Integration Time||||||||
|0x06|Temperature|Temperature||||||||
|0x07|LED<br>Configuration|READ_<br>ERR||LED_<br>DRV||ENA-<br>BLELED<br>_DRV|LED_INT||ENABL<br>E LED_<br>INT|
|0x08|RAW value R, G, A|RAW value H||||||||
|0x09|RAW value R, G, A|RAW value L||||||||
|0x0A|RAW value S, H, B|RAW value H||||||||
|0x0B|RAW value S, H, B|RAW value L||||||||
|0x0C|RAW value T, I, C|RAW value H||||||||
|0x0D|RAW value T, I, C|RAW value L||||||||
|0x0E|RAW value U, J, D|RAW value H||||||||
|0x0F|RAW value U, J, D|RAW value L||||||||
|0x10|RAW value V, K, E|RAW value H||||||||
|0x11|RAW value V, K, E|RAW value L||||||||
|0x12|RAW value W, L, F|RAW value H||||||||
|0x13|RAW value W, L, F|RAW value L||||||||



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|**Addr**|**Name**|**<D7>**|**<D6>**|**<D5>**|**<D4>**|**<D3>**|**<D2>**|**<D1>**|**<D0>**|
|---|---|---|---|---|---|---|---|---|---|
|0x14|Calibrated value<br>channel R, G, A|CAL CHAN0_0||||||||
|0x15|Calibrated value<br>channel R, G, A|CAL CHAN0_1||||||||
|0x16|Calibrated value<br>channel R, G, A|CAL CHAN0_2||||||||
|0x17|Calibrated value<br>channel R, G, A|CAL CHAN0_3||||||||
|0x18|Calibrated value<br>channel S, H, B|CAL CHAN0_0||||||||
|0x19|Calibrated value<br>channel S, H, B|CAL CHAN0_1||||||||
|0x1A|Calibrated value<br>channel S, H, B|CAL CHAN0_2||||||||
|0x1B|Calibrated value<br>channel S, H, B|CAL CHAN0_3||||||||
|0x1C|Calibrated value<br>channel T, I, C|CAL CHAN0_0||||||||
|0x1D|Calibrated value<br>channel T, I, C|CAL CHAN0_1||||||||
|0x1E|Calibrated value<br>channel T, I, C|CAL CHAN0_2||||||||
|0x1F|Calibrated value<br>channel T, I, C|CAL CHAN0_3||||||||
|0x20|Calibrated value<br>channel U, J, D|CAL CHAN0_0||||||||
|0x21|Calibrated value<br>channel U, J, D|CAL CHAN0_1||||||||
|0x22|Calibrated value<br>channel U, J, D|CAL CHAN0_2||||||||
|0x23|Calibrated value<br>channel U, J, D|CAL CHAN0_3||||||||
|0x24|Calibrated value<br>channel V, K, E|CAL CHAN0_0||||||||
|0x25|Calibrated value<br>channel V, K, E|CAL CHAN0_1||||||||
|0x26|Calibrated value<br>channel V, K, E|CAL CHAN0_2||||||||



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|**Addr**|**Name**|**<D7>**|**<D6>**|**<D5>**|**<D4>**|**<D3>**|**<D2>**|**<D1>**|**<D0>**|
|---|---|---|---|---|---|---|---|---|---|
|0x27|Calibrated value<br>channel V, K, E|CAL CHAN0_3||||||||
|0x28|Calibrated value<br>channel W, L, F|CAL CHAN0_0||||||||
|0x29|Calibrated value<br>channel W, L, F|CAL CHAN0_1||||||||
|0x2A|Calibrated value<br>channel W, L, F|CAL CHAN0_2||||||||
|0x2B|Calibrated value<br>channel W, L, F|CAL CHAN0_3||||||||
|0x48|FW control|START|STOP|BYTES_<br>TRANSF<br>ERRED|LOCK|SWITC<br>H|BANK1|ERROR|CHKSU<br>M|
|0x49|FW byte count|FW_BYTE_COUNT_H||||||||
|0x4A|FW byte count|FW_BYTE_COUNT_L||||||||
|0x4B|FW payload|HW version H||||||||
|0x4F|DEV SEL|||Second<br>Slave|First<br>Slave|||SELECT DATA||
|0x50|COEF DATA|COEF_DATA_0||||||||
|0x51|COEF DATA|COEF_DATA_1||||||||
|0x52|COEF DATA|COEF_DATA_2||||||||
|0x53|COEF DATA|COEF_DATA_3||||||||
|0x54|COEF READ|COEF_READ||||||||
|0x55|COEF WRITE|COEF_WRITE||||||||



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## **Detailed Register Descriptions** 

**Figure 27: HW Version Registers** 

|**Addr: 0x00,0x01**|**Addr: 0x00,0x01**|**HW Version**|**HW Version**|**HW Version**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|15:8|HW version H|0x40|R|Device type|
|7:0|HW version L|0x41|R|HW version|



**Figure 28: FW Version Registers** 

|**Addr: 0x02,0x03**|**Addr: 0x02,0x03**|**FW Version**|**FW Version**|**FW Version**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|15:8|FW version H|0|R/W|Set register 0x02, 0x03 to 0x01 to 0x03 to get<br>each firmware positions high byte<br>0x01: MAJOR version [15..8]<br>0x02: PATCH version [15..8]<br>0x03: BUILD version [15..8]|
|7:0|FW version L|0|R/W||



**Figure 29: Configuration Register** 

|**Addr: 0x04**|**Addr: 0x04**|**Configuration**|**Configuration**|**Configuration**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|SRST|0|W|[W] software reset [R] gain error|
|6|INT|0|R/W|Enable interrupt pin|
|5:4|GAIN|01|R/W|Gain configuration: b00=1x; b01=3.7x; b10=16x;<br>b11=64x|
|3:2|BANK|10|R/W|Measurement mode:<br>b00=Mode 0: 4 channels<br>b01=Mode 1: 4 channels<br>b10=Mode 2: All 6 channels<br>b11=Mode 3: One-Shot operation of mode 2|
|1|DATA_RDY|0|R|Data ready to read|
|0|FRST|0|W|Factory reset|



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The maximum sensitivity value depends on the integration time. For every 2.78ms of integration time, the maximum sensitivity value increases by 1024 counts. This means that to be able to reach the full sensitivity scale, the sensitivity has to be at least 64*2.78ms. 

**Figure 30: Integration Time Register** 

|**Addr: 0x05**|**Addr: 0x05**|||**Integration Time**|**Integration Time**|**Integration Time**|**Integration Time**|
|---|---|---|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**||||
|7:0|INTEGRATION_<br>TIME|20|R/W|Integration time = <value> * 2.8ms (applies to all<br>channels); value: 1-255;Return 0 - read error||||
|||||**Value**|**Integration**<br>**Cycles**|**Integration**<br>**Time**|**Maximum**<br>**ADC**<br>**Value**|
|||||0x00|1|2.78ms|1023|
|||||0x01|2|5.56ms|2047|
|||||...|...|...|...|
|||||0x11|18|50ms|18431|
|||||0x40|65|181ms|65535|
|||||...|...|...|...|
|||||0xFF|256|711ms|65535|



**Figure 31: Temperature Register** 

|**Addr: 0x06**|**Addr: 0x06**|**Temperature**|**Temperature**|**Temperature**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|Temperature|-|R|Temperature of the device in °C<br>Read value from every device in dependency of<br>register DEV_SEL<br>From -127 to 127<br>Return -128: Means error|



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**Figure 32: LED Configuration Register** 

|**Addr: 0x07**|**Addr: 0x07**|**LED Configuration**|**LED Configuration**|**LED Configuration**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7|READ_ERR|0|R|Error while reading status|
|5:4|LED_DRV|00|R/W|LED_DRV current limit: b00=12.5mA; b01=25mA;<br>b10=50mA; b11=100mA<br>Device depends on register DEV_SEL|
|3|ENABLE LED_<br>DRV|0|R/W|Enable LED DRV<br>Device depends on register DEV_SEL|
|2:1|LED_INT|01|R/W|Current limit: b00=1mA; b01=2mA; b10=4mA;<br>b11=8mA<br>Device depends on register DEV_SEL|
|0|ENABLE LED_<br>INT|0|R/W|Enable LED IND<br>Device depends on register DEV_SEL|



**Figure 33:** 

**RAW Value Channel R,G,A Register** 

|**Addr: 0x08,0x09**|**Addr: 0x08,0x09**|**RAW Value Channel R,G,A**|**RAW Value Channel R,G,A**|**RAW Value Channel R,G,A**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|15:8|RAW value H|-|R|Channel R or J or D depends on register DEV_SEL|
|7:0|Raw value L|-|R||



**Figure 34:** 

**RAW Value Channel S,H,B Register** 

|**Addr: 0x0A,0x0B**|**Addr: 0x0A,0x0B**|**RAW Value Channel S,H,B**|**RAW Value Channel S,H,B**|**RAW Value Channel S,H,B**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|15:8|RAW value H|-|R|Channel S or I or C depends on register DEV_SEL|
|7:0|Raw value L|-|R||



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**Figure 35: RAW Value Channel T,I,C Register** 

|**Addr: 0x0C/0x0D**|**Addr: 0x0C/0x0D**|**RAW Value Channel T,I,C**|**RAW Value Channel T,I,C**|**RAW Value Channel T,I,C**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|15:8|RAW value H|-|R|Channel T or G or A depends on register DEV_<br>SEL|
|7:0|Raw value L|-|R||



**Figure 36: RAW Value Channel U,J,D Register** 

|**Addr: 0x0E,0x0F**|**Addr: 0x0E,0x0F**|**RAW Value Channel U,J,D**|**RAW Value Channel U,J,D**|**RAW Value Channel U,J,D**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|15:8|RAW value H|-|R|Channel U or H or B depends on register DEV_<br>SEL|
|7:0|Raw value L|-|R||



**Figure 37: RAW Value Channel V,K,E Register** 

|**Addr: 0x10,0x011**|**Addr: 0x10,0x011**|**RAW Value Channel V,K,E**|**RAW Value Channel V,K,E**|**RAW Value Channel V,K,E**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|15:8|RAW value H|-|R|Channel V or K or E depends on register DEV_SEL|
|7:0|Raw value L|-|R||



**Figure 38: RAW Value Channel W,L,F Register** 

|**Addr: 0x12,0x013**|**Addr: 0x12,0x013**|**RAW Value Channel W,L,F**|**RAW Value Channel W,L,F**|**RAW Value Channel W,L,F**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|15:8|RAW value H|-|R|Channel W or L or F depends on register DEV_<br>SEL|
|7:0|Raw value L|-|R||



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**Figure 39:** 

**Calibrated Value Channel R,G,A Register** 

|**Addr:**<br>**0x17,0x016,0x15,0x014**|**Addr:**<br>**0x17,0x016,0x15,0x014**|**Calibrated Value Channel R,G,A**|**Calibrated Value Channel R,G,A**|**Calibrated Value Channel R,G,A**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|31:24|CAL CHAN0_3|FF|R|Channel R or J or D depends on register DEV_<br>SEL|
|23:16|CAL CHAN0_2|FF|R||
|15:8|CAL CHAN0_1|FF|R||
|7:0|CAL CHAN0_0|FF|R||



**Figure 40: Calibrated Value Channel S, H, B Register** 

|**Addr:**<br>**0x1B,0x01A,0x19,0x018**|**Addr:**<br>**0x1B,0x01A,0x19,0x018**|**Calibrated Value Channel S,H,B**|**Calibrated Value Channel S,H,B**|**Calibrated Value Channel S,H,B**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|31:24|CAL CHAN1_3|FF|R|Channel S or I or C depends on register DEV_<br>SEL|
|23:16|CAL CHAN1_2|FF|R||
|15:8|CAL CHAN1_1|FF|R||
|7:0|CAL CHAN1_0|FF|R||



**Figure 41: Calibrated Value Channel T, I, C Register** 

|**Addr:**<br>**0x1F,0x01E,0x1D,0x01C**|**Addr:**<br>**0x1F,0x01E,0x1D,0x01C**|**Calibrated Value Channel T,I,C**|**Calibrated Value Channel T,I,C**|**Calibrated Value Channel T,I,C**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|31:24|CAL CHAN2_3|FF|R|Channel T or G or A depends on register DEV_<br>SEL|
|23:16|CAL CHAN2_2|FF|R||
|15:8|CAL CHAN2_1|FF|R||
|7:0|CAL CHAN2_0|FF|R||



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**Figure 42: Calibrated Value Channel U, J, D Register** 

|**Addr:**<br>**0x23,0x022,0x21,0x20**|**Addr:**<br>**0x23,0x022,0x21,0x20**|**Calibrated Value Channel U,J,D**|**Calibrated Value Channel U,J,D**|**Calibrated Value Channel U,J,D**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|31:24|CAL CHAN3_3|FF|R|Channel U or H or B depends on register DEV_<br>SEL|
|23:16|CAL CHAN3_2|FF|R||
|15:8|CAL CHAN3_1|FF|R||
|7:0|CAL CHAN3_0|FF|R||



**Figure 43: Calibrated Value Channel V, K, E Register** 

|**Addr:**<br>**0x27,0x026,0x25,0x24**|**Addr:**<br>**0x27,0x026,0x25,0x24**|**Calibrated Value Channel V,K,E**|**Calibrated Value Channel V,K,E**|**Calibrated Value Channel V,K,E**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|31:24|CAL CHAN4_3|FF|R|Channel V or K or E depends on register DEV_<br>SEL|
|23:16|CAL CHAN4_2|FF|R||
|15:8|CAL CHAN4_1|FF|R||
|7:0|CAL CHAN4_0|FF|R||



**Figure 44: Calibrated Value Channel W, L, F Register** 

|**Addr:**<br>**0x2B,0x02A,0x29,0x28**|**Addr:**<br>**0x2B,0x02A,0x29,0x28**|**Calibrated Value Channel W,L,F**|**Calibrated Value Channel W,L,F**|**Calibrated Value Channel W,L,F**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|31:24|CAL CHAN5_3|FF|R|Channel W or L or F depends on register DEV_<br>SEL|
|23:16|CAL CHAN5_2|FF|R||
|15:8|CAL CHAN5_1|FF|R||
|7:0|CAL CHAN5_0|FF|R||



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**Figure 45: FW Control Register** 

|**Addr: 0x48**|**Addr: 0x48**|**FW Control**|**FW Control**|**FW Control**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7|START||R/W|Set bit once to configure the device update|
|6|STOP||W|Reset firmware update state machine|
|5|BYTES_<br>TRANSFERRED||R|All 56kbytes are transferred|
|4|LOCK||R/W|Lock this firmware for the next start|
|3|SWITCH||W|Switch between both firmware|
|2|BANK1||R|Set if bank 1 is active, else bank 2|
|1|ERROR||R|Error occurred while firmware update|
|0|CHKSUM||R|Checksum of other bank is valid|



**Figure 46: FW Byte Count Register** 

|**Addr: 0x49,0x4A**|**Addr: 0x49,0x4A**|**FW Byte Count**|**FW Byte Count**|**FW Byte Count**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|15:8|FW_BYTE_<br>COUNT_H|0|R|Byte counter of transferred image|
|7:0|FW_BYTE_<br>COUNT_L||R||



**Figure 47: FW Payload Register** 

|**Addr:0x4B**|**Addr:0x4B**|**FW Payload**|**FW Payload**|**FW Payload**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|HW version H|0|R/W|Transfer of firmware byte|



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## **Figure 48: DEV SEL Register** 

|**Addr: 0x4F**|**Addr: 0x4F**|**DEV SEL**|**DEV SEL**|**DEV SEL**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|5|SECOND<br>SLAVE|0|R|Second slave Available|
|5|FIRST SLAVE|0|R|First slave available|
|1:0|SELECT DATA|00|R/W|0x00: Select master data<br>0x01: Select first slave data<br>0x02: Select second slave data|



**Figure 49: COEF DATA Register** 

|**Addr:**<br>**0x53,0x52,0x51,0x50**|**Addr:**<br>**0x53,0x52,0x51,0x50**|**COEF DATA**|**COEF DATA**|**COEF DATA**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|31:24|COEF_DATA_<br>3||R/W|Data heap to read and write calibration data|
|23:16|COEF_DATA_<br>2||R/W||
|15:8|COEF_DATA_<br>1||R/W||
|7:0|COEF_DATA_<br>0||R/W||



**Figure 50: COEF READ Register** 

|**Addr:0x54**|**Addr:0x54**|**COEF READ**|**COEF READ**|**COEF READ**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|COEF_READ||R/W|Set sub addresses to read different calibration<br>data from COEF_DATA register|



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**Figure 51: COEF WRITE Register** 

|**Addr:0x55**|**Addr:0x55**|**COEF WRITE**|**COEF WRITE**|**COEF WRITE**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|COEF_WRITE||R/W|Set sub addresses to write different calibration<br>data from COEF_DATA register to persistent<br>memory|



## **AS72651 I[2] C Firmware (FW) Update Procedure** 

- In the FW Update Control register set the Start_XFR bit to 1. 

- Write 56k of data to the FW Download register starting with the first byte in the ams file, then proceed the end of the ams 56k file with consecutive writes. 

- If desired read the FW Byte Count registers to see which byte is expected to be written next into the FW Download register. 

- When the download file is completely written, confirm the action by using the FW Update Control register bit XFR_ 56k (should =1 if 56k has been downloaded). 

- In the FW Update Control register, set the Toggle bit to 1 which will reboot the AS72651 with the new FW after checking the new FW for correct CRC. If the CRC is incorrect the toggle bit will not change and the new FW will not be used. 

**Figure 52: Firmware Byte Count High Byte** 

|**Addr: 0x60/0xE0**|**Addr: 0x60/0xE0**|**Control_Setup**|**Control_Setup**|**Control_Setup**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7|Start_XFR|0|R/W|Set to 1 to start firmware update|
|6|Kill_XFR|0|R/W|Set to 1 to stop firmware update.|
|5|XFR_56K|0|R|Set to 1 when 56k bytes have been downloaded.|
|4|Reserved|||Reserved, do not use.|
|3|Toggle|0|R/W|Set to 1 to toggle firmware image partition.|
|2:0|Reserved|||Reserved, do not use.|



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## **Figure 53:** 

**Firmware Byte Count, High Byte Register** 

|**Addr: 0x61/0xE1**|**Addr: 0x61/0xE1**|**Firmware Byte Count, High Byte**|**Firmware Byte Count, High Byte**|**Firmware Byte Count, High Byte**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|FWBC_HIGH||R|Firmware byte address to be downloaded next, High<br>Byte|



**Figure 54: Firmware Byte Count, Low Byte Register** 

|**Addr: 0x62/0xE2**|**Addr: 0x62/0xE2**|**Firmware Byte Count, Low Byte**|**Firmware Byte Count, Low Byte**|**Firmware Byte Count, Low Byte**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|FWBC_LOW||R|Firmware byte address to be downloaded next, Low<br>Byte|



**Figure 55: Firmware Download Register** 

|**Addr: 0x63/0xE3**|**Addr: 0x63/0xE3**|**Firmware Download**|**Firmware Download**|**Firmware Download**|
|---|---|---|---|---|
|**Bit**|**Bit Name**|**Default**|**Access**|**Bit Description**|
|7:0|FWLOAD||R/W|Firmware byte to be downloaded|



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## **UART Command Interface** 

If selected by the I2C_ENB pin setting, the UART module implements the TX and RX signals as defined in the RS-232 / V.24 standard communication protocol. Serial flash EPROM is a required operating companion device to enable the UART command interface. 

**Figure 56: Flash Memory Overview** 

|**Serial Flash**|**Manufacturer**|
|---|---|
|AT25SF041xx|Adesto Technologies|
|AT25DF041xx|Adesto Technologies|
|MX25L4006ExxI-12G|Macronix|
|SST25PF040C|Microchip Technology|
|W25X40CLSNIG|Winbond Electronics|
|LE25U40CMD|ON Semiconductor|



## **Note(s):** 

1. Where xx= alternative packages. 

## _**UART Feature List**_ 

- Full duplex operation (independent serial receive and transmit registers). 

- Factory set to 115.2k Baud 

- Supports serial frames with 8 Data Bits, no Parity and 1 Stop Bit. 

## _**Operation**_ 

## _**Transmission**_ 

If data is available in the transmit FIFO, it will be moved into the output shift register and the data will be transmitted at the configured Baud Rate, starting with a Start Bit (logic zero) and followed by a Stop Bit (logic one). 

## _**Reception**_ 

At any time, with the receiver being idle, if a falling edge of a start bit is detected on the input, a byte will be received and stored in the receive FIFO. The following Stop Bit will be checked to be logic one. 

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**Figure 57: UART Protocol** 

**==> picture [468 x 200] intentionally omitted <==**

**----- Start of picture text -----**<br>
Data Bits<br>TX D0 D1 D2 D3 D4 D5 D6 D7 D0<br>Start Bit Stop Bit Next Start<br>Tbit=1/Baude Rate<br>Always Low Always High<br>RX D0 D1 D2 D3 D4 D5 D6 D7 D0<br>Start Bit detected<br>After Tbit/2: Sampling of Start Bit<br>After Tbit: Sampling of Data<br>Sample Points<br>**----- End of picture text -----**<br>


## _**AT Command Interface**_ 

The microprocessor interface to control the AS72651 _Spectral_ ID_ sensor(s) is via AT Commands across the UART interface. The AS72651 provides a text-based serial command interface borrowed from the “AT Command” model used in early Hayes modems. 

For example: 

Read DATA value: ATDATA → <data>OK Set the gain of the sensor to 1x: ATGAIN=0→ OK 

The AT Command Interface, shown below provides access to the _Spectral_ID_ engine’s control and configuration functions. 

## **Figure 58:** 

**AT Command Interface Block Diagram** 

**==> picture [274 x 164] intentionally omitted <==**

**----- Start of picture text -----**<br>
RX<br>MCU AT Commands Command AT  Spectral_ID<br>TX Interface Engine<br>AT Command InterfaceAT Command Interface<br>AS72651<br>**----- End of picture text -----**<br>


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In the AT Commands figure below, numeric values may be specified with no leading prefix, in which case they will be interpreted as decimals, or with a leading “0x” to indicate that they are hexadecimal numbers. The commands are loosely grouped into functional areas. Texts appearing between angle brackets (‘<‘and ‘>‘) are commands or response arguments. A carriage return character, a linefeed character, or both may terminate commands and responses. Note that any command that encounters an error will generate the “ERROR” response shown, for example, in the NOP command at the top of the first table, but has been omitted elsewhere in the interest of readability and clarity. 

**Note(s):** The Figure 59 shows the complete list of all AS7265x AT commands. 

**Figure 59: AS7265x AT Commands** 

|**Commands**|**Direction**|**Description**|**Format**|**Value Range**|**Default**|
|---|---|---|---|---|---|
|**Status**||||||
|AT|R|NOP|-|-|-|
|ATVERSW|R|Return the current<br>software version<br>number|DEC|<MAJOR.PATCH.<br>BUILD>|-|
|ATVERHW|R|Returns the system<br>hardware as a HEX<br>value of the form<br>PRDTx where<br>P=PartID and<br>R=ChipRevision and<br>DT= DeviceType|HEX|<0xPRDT><br>PR = 40<br>DT = 15|0x4041|
|ATTEMP|R|Read the current<br>device temperature<br>in degrees Celsius|DEC|Send three tempera-<br>ture values (Format:<br>A, B, C)|-|
|ATDATA|R|Read all six raw vales<br>per device(<65535)|DEC|< R, S, T, U, V, W, G, H,<br>I, J, K, L, A, B, C, D, E,<br>F>|-|
|ATCDATA|R|Read all six calibrated<br>values per device.<br>Returns comma-<br>separated 32-bit<br>floating point values.|DEC|< R, S, T, U, V, W, G, H,<br>I, J, K, L, A, B, C, D, E,<br>F>|-|



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|**Commands**|**Direction**|**Description**|**Format**|**Value Range**|**Default**|
|---|---|---|---|---|---|
|**Control**||||||
|ATINTTIME|R/W|Set sensor<br>integration time.<br>Integration time =<br><value> * ~2.8ms.|DEC|1-255|20|
|ATGAIN|R/W|Set sensor gain: 0=1x<br>gain, 1=3.7x, 2=16x,<br>3=64x|DEC|0-3|1|
|ATINTRP|R/W|Enable/Disable<br>interrupt pin|DEC|0 - Disable<br>1 - Enable Interrupt<br>pin functionality|0|
|ATTCSMD|R/W|Set measurement<br>mode|DEC|0: Captures bank0 (1<br>integration period)<br>1: Captures bank1 (1<br>integration period)<br>2: Captures bank0+<br>bank1(2 integration<br>period)<br>3:Captures bank0+<br>bank1 in one shot<br>mode (2 integration<br>period)|2|
|ATINTRVL|R/W|Set the sampling<br>interval as an integer<br>multiple of the<br>integration time. The<br><value> is an integer<br>between [1...255].<br>A sampling<br>interval=1 implies a<br>sampling rate of 1x<br>the current<br>integration time.<br>A sampling<br>interval=255 implies<br>a slow sampling rate<br>of 255 times the<br>current integration<br>time|DEC|1…255|1|



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|**Commands**|**Direction**|**Description**|**Format**|**Value Range**|**Default**|
|---|---|---|---|---|---|
|ATBURST|R/W|Sends a number of<br>calibrated data<br>without separate<br>requests second<br>parameter for the<br>burst mode is<br>optionally format:<br>Send: ATBURST=10,0<br>or ATBURST=10<br>Read: ATBURST≥<br>10,0 OK|DEC|BURST NUMBER:<br>0 - Burst mode is<br>deactivated<br>1-254 - Number of<br>burst transfers<br>255 - Send unlimited<br>bursts (stops with<br>ATBURST=0)<br>BURST MODE:<br>0 - Raw values<br>(default, like<br>ATDATA)<br>1 - Calibrated values<br>(like ATCDATA)|0|
|ATLED0|R/W|Enables or disables<br>the indication LED|DEC|0 - LED off<br>1 - LED on|1|
|ATLED1|R/W|Enables or disables<br>the driver LED|DEC|0 - LED off<br>1 - LED on|0|
|ATLED2|R/W|Enables or disables<br>the indication LED for<br>first I2C slave|DEC|0 - LED off<br>1 - LED on|1|
|ATLED3|R/W|Enables or disables<br>the driver LED for first<br>I2C slave|DEC|0 - LED off<br>1 - LED on|0|
|ATLED4|R/W|Enables or disables<br>the indication LED for<br>second I2C slave|DEC|0 - LED off<br>1 - LED on|1|
|ATLED5|R/W|Enables or disables<br>the driver LED for<br>second I2C slave|DEC|0 - LED off<br>1 - LED on|0|
|ATLEDC|R/W|Sets LED_IND and<br>LED_DRV current<br>(for master only)|HEX|[1...0] LED_IND:<br>b00=1mA;<br>b01=2mA;<br>b10=4mA; b11=8mA<br>[5...4] LED_DRV:<br>b00=12.5mA;<br>b01=25mA;<br>b10=50mA;<br>b11=100mA|0x00|



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|**Commands**|**Direction**|**Description**|**Format**|**Value Range**|**Default**|
|---|---|---|---|---|---|
|ATLEDD|R/W|Sets LED_IND and<br>LED_DRV current for<br>first I2C slave|HEX|[1...0] LED_IND:<br>b00=1mA;<br>b01=2mA;<br>b10=4mA; b11=8mA<br>[5...4] LED_DRV:<br>b00=12.5mA;<br>b01=25mA;<br>b10=50mA;<br>b11=100mA|0x00|
|ATLEDE|R/W|Sets LED_IND and<br>LED_DRV current for<br>second I2C slave|HEX|[1...0] LED_IND:<br>b00=1mA;<br>b01=2mA;<br>b10=4mA; b11=8mA<br>[5...4] LED_DRV:<br>b00=12.5mA;<br>b01=25mA;<br>b10=50mA;<br>b11=100mA|0x00|
|ATFRST|W|Factory Reset. Stored<br>values are reset to<br>‘Factory’ defaults.<br>Afterwards a software<br>reset is started.|-|-|-|
|ATSRST|W|Software reset|-|-|-|
|**Calibration Values**||||||
|ATSCLx|R/W|Read/Write scalar for<br>the raw values<br>(x=0...17)|DEC||p2ram<br>value|
|**Firmware Update**||||||
|ATFWU|W|Starts firmware<br>update process and<br>transfer the bin file<br>checksum|-|-|-|
|ATFW|W|Download new<br>firmware.<br>Up to 7 bytes of FW<br>image at a time (14<br>hex bytes with no<br>leading or trailing 0x).<br>Repeat command till<br>all 56kBytes of<br>firmware are<br>downloaded|-|HEX STRING<br>(without 0x), max. 7<br>bytes|-|



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|**Commands**|**Direction**|**Description**|**Format**|**Value Range**|**Default**|
|---|---|---|---|---|---|
|ATFWS|W|Tests the checksum<br>on the non-active FW<br>partition and, if<br>correct, switches<br>active partition. This<br>is a toggle and used<br>to toggle between<br>the 2 FW partitions.<br>Note: The first 5 bytes<br>in page 0 are not<br>touched. It is only a<br>temporary switch<br>and must be used to<br>check the new<br>firmware whether the<br>communication<br>works!|-|-|-|
|ATFWL|W|This command locks<br>the current firmware<br>to starts on power<br>cycles. It rewrites the<br>first five bytes in<br>page0!|-|-|-|
|ATFWC|R|This command gives<br>information about<br>the current firmware<br>state|-|Bit0 - Checksum of<br>non-active firmware<br>OK<br>Bit1 - Error occurred<br>Bit2 - Bank 1 active<br>Bit3 - Not used<br>Bit4 - Current<br>firmware is locked<br>Bit5 - 56kBytes<br>transferred<br>Bit6 - Not used<br>Bit7 - Firmware<br>update active|-|
|ATFWA|W|Only for backward<br>compatibility to<br>support old firmware,<br>update mechanism.<br>Always returns with<br>OK. Because of flash<br>devices, it is not<br>possible to increment<br>the address<br>separately (page<br>erase necessary!)|-|-|-|



**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Application Information 

## **Application Information** 

## **Figure 60:** 

**Typical AS7265x 18-Channel Application Circuit** 

**==> picture [422 x 486] intentionally omitted <==**

**----- Start of picture text -----**<br>
3V3<br>U3<br>+5VR11200RD9LED 100nFC7 GND3V3 3V3 1u0C8 D11R1010kRESN TP9GNDLED_651LED_INDRESN 17141615182 VDD1VDD2RESNGNDLED_DRVLED_IND AS72651 I2C_ENBMISOMOSICSNSCKNCNC 54719386 I2C_ENASLV2_RESNCSN_EESPI_MISSPI_MOSPI_SCKSOI TP11 TP12SLV1_RESNGNDR1710kR180R NOTER18 placed - UART (default)R18 not placed - IR1310k R1410k 3V3R152k2²C R162k2<br>GRN SLV2_RESN 20 SLV2_RESN<br>---> COMM_RX 11 RX/SCL_S SLV1_RESN 1 SLV1_RESN<br><--- COMM_TX 12 TX/SDA_S SDA_M 10 SDA TP13 SDA<br>TP10 INT 13 INT SCL_M 9 SCL TP14 SCL<br>INT AS72651<br>U4<br>+5VR19200RD12LED 100nFC10 GND3V3 C111u0 LED_652SLV1_RESNGND 171416152 VDD1VDD2RESNGNDLED_DRV AS72652 NCNCNCNCNCNC 765438 3V3 SensorinterfaceSDASCLESP Board SQT4RATHF1234 J3<br>18 LED_IND NC 19 GND D6 D7 D8<br>NC 20<br>11 NC NC 1<br>12 NC SDA_S 10 SDA GND<br>13 INT SCL_S 9 SCL<br>AS72652<br>Programming header<br>U5 for FLASH<br>+5VR23200RD13LED 100nFC12GND3V3 C131u0 SLV2_RESNLED_653GND 171416152 VDD1VDD2RESNGNDLED_DRV AS72653 NCNCNCNCNCNC 765438 CSN_EESPI_MISOSPI_SCKSPI_MOSIRESN 3V3 87654321 FH34S-8S-0.5SH(50)J2<br>18 LED_IND NC 19 GND<br>NC 20<br>11 NC NC 1<br>12 NC SDA_S 10 SDA<br>13 INT SCL_S 9 SCL<br>AS72653<br>FLASH 3V3 C9<br>1u0 GND header for FLASH (NEW)Alternative programming<br>CSN_EE 1 U6CS 600R/250mA7427927161 RESN<br>SPI_MOSISPI_SCKSPI_MISO 5623 DICLKDOWP AT25SF041 SPI_MISOSPI_SCKCSN_EE J4135 246 GNDL1SPI_MOSIVDD_PROG100nFC17 DTC113ZUAQ1<br>7 HOLD TC2030-NL GND GND<br>GND<br>9<br>01<br>8<br>VCC<br>GND<br>4<br>**----- End of picture text -----**<br>


## **Note(s):** 

1. For each AS7265x device, orientation of the device aperture to any light source(s) will determine spectral content to be measured. For example with the proper orientation, sensors on the AS72651 can be used to measure light from the LEDs on the AS72652 and/or AS76253. 

2. The AS72651 is required while the AS72652 and AS72653 are both optional for a total solution of 6, 12 or 18 channels. 

**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Package Drawings & Markings 

## **Package Drawings & Markings** 

## **Figure 61: Package Drawing** 

**==> picture [50 x 55] intentionally omitted <==**

**----- Start of picture text -----**<br>
RoHS<br>amu<br>Green<br>**----- End of picture text -----**<br>


## **Note(s):** 

1. All dimensions are in millimeters. 

2. XXXXX = tracecode. 

3. Unless otherwise specified tolerances are: Angular (±.5°), Two Place Decimal (±.1), Three Place Decimal (±.05). 

4. Contact finish is Au. 

5. This package contains no lead (Pb). 

6. This drawing is subject to change without notice. 

**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** PCB Pad Layout 

## **PCB Pad Layout** 

Suggested PCB pad layout guidelines for the LGA device are shown. Flash Gold is recommended as a surface finish for the landing pads. 

## **Figure 62:** 

## **Recommended PCB Pad Layout (Top View)** 

**==> picture [274 x 279] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.65 0.40<br>Unit: mm<br>0.55<br>1<br>5<br>4.05<br>3.85<br>**----- End of picture text -----**<br>


## **Note(s):** 

1. Unless otherwise specified, all dimensions are in millimeters. 

2. Add 0.05mm all around the nominal lead width and length for the PCB pad land pattern. 

3. This drawing is subject to change without notice. 

**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** PCB Pad Layout 

In order to prevent interference, avoid trace routing feedthroughs with exposure directly under the AS7265x devices. An example routing is illustrated in the Figure 63. 

**Figure 63: Typical Layout Routing** 

**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Mechanical Data 

## **Mechanical Data** 

**Figure 64: Tape & Reel Information** 

**==> picture [467 x 331] intentionally omitted <==**

## **Note(s):** 

1. All dimensions in millimeters unless of otherwise stated. 

2. Measured from centreline of sprocket hole to centreline of pocket. 

3. Cumulative tolerance of 10 sprocket holes is ±0.20. 

4. Measured from centreline of sprocket hole to centreline of pocket. 

5. Other material available. 

**ams Datasheet** 

**Page 52** Document Feedback 

[v1-04] 2018-Jul-09 

**AS7265x −** Soldering & Storage Information 

## **Soldering & Storage Information** 

## **Soldering Information** 

The module has been tested and has demonstrated an ability to be reflow soldered to a PCB substrate. The solder reflow profile describes the expected maximum heat exposure of components during the solder reflow process of product on a PCB. Temperature is measured on top of component. The components should be limited to a maximum of three passes through this solder reflow profile. 

## **Figure 65: Solder Reflow Profile** 

|**Parameter**|**Reference**|**Device**|
|---|---|---|
|Average temperature gradient in preheating||2.5°C/s|
|Soak time|tSOAK|2 to 3 minutes|
|Time above 217°C(T1)|t1|Max 60s|
|Time above 230°C(T2)|t2|Max 50s|
|Time above Tpeak- 10°C(T3)|t3|Max 10s|
|Peak temperature in reflow|Tpeak|260°C|
|Temperature gradient in cooling||Max -5°C/s|



**Figure 66: Solder Reflow Profile Graph** 

**==> picture [467 x 236] intentionally omitted <==**

**ams Datasheet** [v1-04] 2018-Jul-09 

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Document Feedback 

**AS7265x −** Soldering & Storage Information 

## _**Manufacturing Process Considerations**_ 

The AS72651,AS72652 and AS72653 packages are compatible with standard reflow no-clean and cleaning processes including aqueous, solvent or ultrasonic techniques. However, as an open-aperture device, precautions must be taken to avoid particulate or solvent contamination as a result of any manufacturing processes, including pick and place, reflow, cleaning, integration assembly and/or testing. Temporary covering of the aperture is allowed. To avoid degradation of accuracy or performance in the end product, care should be taken that any temporary covering and associated sealants/debris are thoroughly removed prior to any optical testing or final packaging. 

## **Storage Information** 

## _**Moisture Sensitivity**_ 

Optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previously absorbed into the package. To ensure the package contains the smallest amount of absorbed moisture possible, each device is baked prior to being dry packed for shipping. 

Devices are dry packed in a sealed aluminized envelope called a moisture-barrier bag with silica gel to protect them from ambient moisture during shipping, handling, and storage before use. 

## _**Shelf Life**_ 

The calculated shelf life of the device in an unopened moisture barrier bag is 12 months from the date code on the bag when stored under the following conditions: 

- Shelf Life: 12 months 

- Ambient Temperature: <40°C 

- Relative Humidity: <90% 

Rebaking of the devices will be required if the devices exceed the 12 month shelf life or the Humidity Indicator Card shows that the devices were exposed to conditions beyond the allowable moisture region. 

**ams Datasheet** 

**Page 54** Document Feedback 

[v1-04] 2018-Jul-09 

**AS7265x −** Soldering & Storage Information 

## _**Floor Life**_ 

The module has been assigned a moisture sensitivity level of MSL 3. As a result, the floor life of devices removed from the moisture barrier bag is 168 hours from the time the bag was opened, provided that the devices are stored under the following conditions: 

Floor Life: 168 hours 

Ambient Temperature: <30°C 

Relative Humidity: <60% 

If the floor life or the temperature/humidity conditions have been exceeded, the devices must be rebaked prior to solder reflow or dry packing. 

## _**Rebaking Instructions**_ 

When the shelf life or floor life limits have been exceeded, rebake at 50°C for 12 hours. 

**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Ordering & Contact Information 

## **Ordering & Contact Information** 

**Figure 67: Ordering Information** 

|**Ordering**<br>**Code**|**Package**|**Marking**|**Description**|**Delivery Form**|**Delivery**<br>**Quantity**|
|---|---|---|---|---|---|
|AS72651-BLGT|20-pin LGA|AS7265|Smart 6-Channel NIR Spectral_ID<br>Sensor with Electronic Shutter<br>and 18-Channel AS7265x Master<br>Capability|Tape & Reel|2000 pcs/reel|
|AS72652-BLGT|20-pin LGA|AS7266|Smart 6-Channel NIR Spectral_ID<br>Sensor with Electronic Shutter|Tape & Reel|2000 pcs/reel|
|AS72653-BLGT|20-pin LGA|AS7267|Smart 6-Channel Spectral_ID<br>Sensor with Electronic Shutter|Tape & Reel|2000 pcs/reel|



## **Note(s):** 

1. The AS72651 is required for operation of either the AS72652 or AS72653. 

2. A companion flash memory is required for functionality and should be ordered from the flash memory supplier or their authorized channels. See approved flash memory manufacturers in Figure 56. For latest update of the flash memory list contact regional FAE support. 

3. AS72651 flash memory software is available from **ams** . 

Buy our products or get free samples online at: www.ams.com/Products 

Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback 

For further information and requests, e-mail us at: ams_sales@ams.com 

For sales offices, distributors and representatives, please visit: www.ams.com/Contact 

## **Headquarters** 

ams AG Tobelbader Strasse 30 8141 Premstaetten Austria, Europe 

Tel: +43 (0) 3136 500 0 

Website: www.ams.com 

**ams Datasheet** 

**Page 56** Document Feedback 

[v1-04] 2018-Jul-09 

**AS7265x −** RoHS Compliant & ams Green Statement 

## **RoHS Compliant & ams Green Statement** 

**RoHS:** The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes. 

**ams Green (RoHS compliant and no Sb/Br):** ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). 

**Important Information:** The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 

**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Copyrights & Disclaimer 

## **Copyrights & Disclaimer** 

Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. 

Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied warranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. 

ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of ams AG rendering of technical or other services. 

**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Document Status 

## **Document Status** 

|**Document Status**|**Product Status**|**Definition**|
|---|---|---|
|Product Preview|Pre-Development|Information in this datasheet is based on product ideas in<br>the planning phase of development. All specifications are<br>design goals without any warranty and are subject to<br>change without notice|
|Preliminary Datasheet|Pre-Production|Information in this datasheet is based on products in the<br>design, validation or qualification phase of development.<br>The performance and parameters shown in this document<br>are preliminary without any warranty and are subject to<br>change without notice|
|Datasheet|Production|Information in this datasheet is based on products in<br>ramp-up to full production or full production which<br>conform to specifications in accordance with the terms of<br>ams AG standard warranty as given in the General Terms of<br>Trade|
|Datasheet (discontinued)|Discontinued|Information in this datasheet is based on products which<br>conform to specifications in accordance with the terms of<br>ams AG standard warranty as given in the General Terms of<br>Trade, but these products have been superseded and<br>should not be used for new designs|



**ams Datasheet** [v1-04] 2018-Jul-09 

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**AS7265x −** Revision Information 

## **Revision Information** 

|**Changes from 1-03 (2017-Oct-17) to current revision 1-04 (2018-Jul-09)**|**Page**|
|---|---|
|Updated text under General Description|1|
|Updated text under Key Benefits & Features|1|
|Updated Figure 2 (AS7265x Chip- Set Block Diagram)|3|
|Renamed Figure 3 to “Pin Diagram of AS72651,AS72652 and AS72653 (Top View)”|4|
|Updated Figure 4 (AS72651 pin description)|4|
|Added Figure 5 (AS72652 and AS72653 pin description)|5|
|Updated text under “Absolute Maximum Ratings”<br>(replaced AS72651 with AS7265x)|7|
|Updated titles names in Figure 6,8 to AS7265x|7,10|
|Updated title name in Figure 7 and notes under it|8|
|Updated text under Optical Characteristics|13|
|Moved Figure “AS7265x LGA Average Field of View” under “Optical Characteristics”|13|
|Updated Figure 14|13|
|Updated Figure 16|14|
|Updated Figure 18|16|
|Updated Figure 19|18|
|Updated title name in figure 20 and notes under it|18|
|Updated text under AS7265x 18-Channel Spectral_ID Detector Overview|19|
|Updated text under AS7265x LED_IND Controls|22|
|Updated text under Interrupt Operation|22|
|Updated text under Required Flash Memory|23|
|Updated text under I²C Feature List|23|
|Updated I²C Virtual Register Byte Write|25|
|Updated I²C Virtual Register Byte Read|26|
|Updated Figure 26|28|
|Updated text under Detailed Register Descriptions including Figure 27 to 51|31|
|Updated text under UART Command Interface|41|
|Added Figure 56(List of ams approved flash manufacturer)|41|
|Updated text under Figure 58|43|



**ams Datasheet** 

**Page 60** Document Feedback 

[v1-04] 2018-Jul-09 

**AS7265x −** Revision Information 

|**Changes from 1-03 (2017-Oct-17) to current revision 1-04 (2018-Jul-09)**|**Page**|
|---|---|
|Updated Figure 59 (AS7265x AT Commands) and text above it|43|
|Updated Figure 60 (Typical AS7265x 18-Channel Application Circuit)|48|
|Updated text under Manufacturing Process Considerations<br>(replaced AS72651 with AS72651, AS72652,AS72653)|54|
|Updated note under Figure 67|56|



## **Note(s):** 

1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision. 

2. Correction of typographical errors is not explicitly mentioned. 

**ams Datasheet** [v1-04] 2018-Jul-09 

**Page 61** Document Feedback 

**AS7265x −** Content Guide 

## **Content Guide** 

- **1 General Description** 

- 1 Key Benefits & Features 2 Applications 3 Block Diagram 

- **4 Pin Assignments 7 Absolute Maximum Ratings** 

- **8 Electrical Characteristics** 

- 10 Timing Characteristics 

- **13 Typical Operating Characteristics** 

- 13 Optical Characteristics 

- **19 Detailed Description** 

- 19 AS7265x 18-Channel Spectral_ID Detector Overview 

- 19 Channel Data Conversion of the AS7265x Devices 

- 21 RC Oscillator 

- 21 Temperature Sensor 

- 22 Reset 

- 22 AS7265x LED_IND Controls 

- 22 Electronic Shutter with AS7265x LED_DRV Driver Control 

- 22 Interrupt Operation 

- 23 Required Flash Memory 

- 23 I²C Slave Interface 

- 23 I²C Feature List 

- 24 I²C Virtual Register Write Access 

- 25 I²C Virtual Register Byte Write 

- 26 I²C Virtual Register Byte Read 

- 27 4-Byte Floating-Point (FP) Registers 

- 28 I²C Virtual Register Set 

- 31 Detailed Register Descriptions 

- 39 AS72651 I2C Firmware (FW) Update Procedure 

- 41 UART Command Interface 

- 41 UART Feature List 

- 41 Operation 

- _41 Transmission_ 

- _41 Reception_ 

- 42 AT Command Interface 

## **48 Application Information** 

- **49 Package Drawings & Markings** 

- **50 PCB Pad Layout** 

- **52 Mechanical Data** 

## **53 Soldering & Storage Information** 

- 53 Soldering Information 

- 54 Manufacturing Process Considerations 

- 54 Storage Information 

- 54 Moisture Sensitivity 

- 55 Rebaking Instructions 

**ams Datasheet** 

**Page 62** Document Feedback 

[v1-04] 2018-Jul-09 

**AS7265x −** Content Guide 

- **56 Ordering & Contact Information 57 RoHS Compliant & ams Green Statement 58 Copyrights & Disclaimer 59 Document Status 60 Revision Information** 

**ams Datasheet** [v1-04] 2018-Jul-09 

**Page 63** Document Feedback
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