I2C vs SPI: How to Choose the Right Bus for Your Peripherals

You have a temperature sensor, an EEPROM and an accelerometer to connect to your microcontroller. Do you wire them all to one I2C bus or give each its own SPI chip-select line? The choice shapes your pin budget, PCB routing, throughput and how many hours you spend debugging bus lockups. Here is the decision framework.

The fundamental trade-off

I2C uses two wires (SCL, SDA) shared by every device on the bus. Each device has a 7-bit or 10-bit address. You can theoretically hang 127 devices on two MCU pins. SPI uses four wires per device (SCLK, MOSI, MISO, CS), plus a dedicated chip-select line per peripheral. Ten SPI devices need 10 + 3 = 13 GPIOs.

The I2C bus wins on pin count. SPI wins on speed and signal simplicity. That trade-off drives most real-world decisions.

Speed: numbers that matter

Standard-mode I2C runs at 100 kbit/s. Fast-mode at 400 kbit/s. Fast-mode Plus at 1 Mbit/s. High-speed mode at 3.4 Mbit/s, rarely used. A 400 kHz I2C bus reading a 16-bit register from a sensor takes roughly 30-40 clock cycles including start, address, register pointer, repeated start, data read and stop. At 400 kHz, that is about 100 µs per read, roughly 10,000 samples per second for a single register.

SPI has no fixed speed limit. Most MCUs push 10-50 MHz with ease. Reading 16 bits from an SPI ADC at 20 MHz takes under 1 µs per sample. For a 100 ksps data acquisition system, SPI is the only realistic choice.

Multi-device wiring

I2C: every device on the same two wires. The catch: address conflicts. A board with two identical I2C temperature sensors (both default to address 0x48) requires either address-pin strapping (if the chip supports it) or an I2C multiplexer like the TCA9548A. This adds a dollar and board space.

Pull-up resistor sizing matters more than most engineers admit. Stronger pull-ups (lower resistance) increase rise speed but also increase power when the bus is pulled low. For a 3.3 V bus at 400 kHz, 2.2 kΩ to 4.7 kΩ works. For a 1.8 V bus, 1.5 kΩ to 2.2 kΩ. The bus capacitance (trace + pin capacitance of all devices) determines the actual rise time. Every device adds roughly 3-10 pF. A bus with eight sensors and long traces might need 1 kΩ pull-ups to meet the 300 ns rise-time spec for Fast-mode.

SPI: each peripheral gets its own chip-select line. No addressing. No shared bandwidth. The downside is GPIO count and routing complexity. For a design with one MCU and two SPI peripherals, it is trivial. For eight peripherals, use an I/O expander or a decoder (74HC138) to generate chip-select lines from fewer GPIOs.

Daisy-chaining works for shift-register-style devices. The MISO of one device feeds the MOSI of the next. This is common with SPI LED drivers and some ADCs, but not universally supported.

Signal integrity and distance

I2C was designed for on-board communication, not cables. Beyond 50 cm, the bus capacitance makes edges too slow. Differential I2C extenders (P82B96, PCA9615) convert to differential signalling over CAT5 cable for distances up to 20 meters.

SPI handles longer traces on a PCB than I2C at high speed because it uses push-pull drivers rather than open-drain with resistive pull-ups. For off-board SPI, LVDS drivers (SN65LVDT41/SN65LVDT14) convert single-ended SPI to differential pairs for meter-scale transmission.

Power consumption

I2C burns static power whenever SCL or SDA is low because current flows through the pull-up resistor. At 3.3 V with 2.2 kΩ pull-ups, each low line draws 1.5 mA. During an active transaction, both lines may be low roughly half the time, giving about 1.5 mA average bus current. SPI uses push-pull CMOS drivers that burn almost zero static current, only dynamic power during edges.

For a battery-powered sensor node that wakes once per minute, the difference is negligible. For a device that polls a sensor continuously, I2C pull-up current can be a meaningful fraction of the power budget.

FAQ

Q: Can I mix 3.3 V and 5 V devices on an I2C bus?

Yes, with a level translator designed for I2C like the PCA9306 or TCA9517. Standard MOSFET-based level shifters (BSS138 circuit) work for I2C because the protocol is bidirectional and open-drain. Do not use unidirectional level shifters like the TXB0104; they cannot handle the bidirectional SDA line.

Q: Why does my I2C bus lock up and require a power cycle?

The most common cause: the master resets mid-transaction while a slave is holding SDA low (stretching the clock or sending a data bit). The slave never releases the line. The fix: provide a software recovery routine that toggles SCL 9 times to clock out any stuck data, then issue a stop condition. Most MCU I2C peripherals have a bus-reset function. If yours does not, bit-bang the recovery manually.

Q: Do I need series termination resistors on SPI lines?

For SPI clocks below 20 MHz on traces under 10 cm, series termination is usually unnecessary. Above 20 MHz or for longer traces, place a 22-33 Ω series resistor at the driver end of SCLK to dampen reflections. Check the rise time and overshoot with an oscilloscope. If the overshoot exceeds 10% of the signal swing, add termination.

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